WO1990003681A1

WO1990003681A1 - Circuit protection arrangement

Info

Publication number: WO1990003681A1
Application number: PCT/GB1989/001102
Authority: WO
Inventors: Ian Paul Atkins
Original assignee: Raychem Limited
Priority date: 1988-09-20
Filing date: 1989-09-20
Publication date: 1990-04-05

Abstract

An arrangement for protecting an electrical circuit from a voltage transient comprises a voltage clamping device (3) e.g. a pair of back-to-back diodes (4) arranged to be connected to a pair of current carrying lines (1, 2) of the circuit so that it extends across the load of the circuit, and a solid-state threshold foldback device (6) connected in parallel with the voltage clamping device. The threshold foldback device and the voltage clamping device each have a capacitance of not more than 100 pF. An additional circuit protection device (9) e.g. a spark gap may be employed in parallel with the voltage clamping device (3) and the threshold foldback device (6) if desired. Also, a capacitor (7) may be included in series with the foldback device in order to keep it within its safe operating area.

Description

Circuit Protection Arrangement

This invention relates to the protection of electrical circuits from voltage transients.

Voltage transients may be produced in electrical circuits by a variety of methods, for example by lightning, electrostatic discharge or by a nuclear electromagnetic pulse. These phenomena may all induce very large currents on cables and structures such as aircraft and ships which can penetrate and damage electrical systems, either causing hardware damage such as semiconductor burnout or electronic upset such as transmission loss or loss of stored data.

Electrostatic discharges are extremely fast discharges from a capacitor such as a human body. These discharges, because they can be so local, present a great threat to the individual electronic components. Induced electrical transients caused by lightning represent a threat to electrical/electronic equipment especially in aerospace vehicles. Some of the induced pulses are described in the SAE AE4L committee report AE4L-81-22, the two basic types being waveform 3 with a frequency of between 1 and 10 MHz, a rise time of 45 nanoseconds and a peak current of 24 amps, and waveform 4A which is a decaying exponential with a rise time of 100 nanoseconds, a width of 2 microseconds, a peak voltage of 300 volts and a peak current of 60 amps.

The most severe threat to electrical and electro¬ nic equipment is the electromagnetic pulse, a typical pulse exhibiting a field strength of about 10-5 ~l with an accompanying H field intensity of 130 Am~l (based on free space impedance of 377 ohms), a pulse width of a few microseconds and a rise time of a few nanoseconds. In general damaging amplitudes in the pulse occur within the frequency range of 10 kHz to 100 MHz.

According to the present invention, there is pro¬ vided an arrangement for protecting an electrical cir¬ cuit from a voltage transient, which comprises a voltage clamping device arranged to be connected to a pair of current-carrying lines of the circuit so that it extends across the load of the circuit, and a solid state threshold foldback device and the voltage clamping device each having a capacitance of not more than 100 pF.

The voltage clamping device may be selected from a number of devices that have voltage limiting proper¬ ties, for example a back-to-back diode arrangement in which the diodes may comprise semiconductor diodes, avalanche diodes, Zener diodes or tunnel diodes. Alternatively the voltage clamping device may comprise a MIM or nin device or a gaseous voltage regulator. MIM and nin devices that may be employed in the inven tion are described in our International Applications Nos. PCT/GB89/000809 andPCT/GB89/00808, claiming priority from British patent applications Nos. 8816630 and 8816631, the disclosures of which are incorporated herein by reference. The term nin device as used herein includes devices in which the amorphous silicon containing layer is sandwiched between doped layers that can contain either n± or p~ dopants as described more fully in our copending patent application. Preferably the voltage clamping device has a capaci¬ tance of not more than 50 pF, and for this reason nin devices are preferred to MIM devices. The clamping voltage of the device will normally be arranged so that it is above the normal operating voltage of the cir¬ cuit, e.g. about 1.5 times the normal operating voltage, so that it will not interfere with the opera¬ tion of the circuit but will not allow too high a voltage across the load before clamping.

The term "threshold foldback device" as used herein is intended to mean a device which exhibits a high electrical resistance, e.g. at least 100 kohms, preferably at least 1 Mohm, and especially at least 10 Mohms, at low electrical voltages but whose resistance falls from a high value to a low value, e.g. less than 10 ohms, when subjected to a high voltage (the lowest such voltage being referred to as the "threshold voltage)". The device will remain in its low resistance state only for as long as a small "holding" current is maintained through the device, otherwise it will automatically revert to its high resistance state.

The threshold foldback device preferably has a capacitance of not more than 50 pF, more preferably not more than 20 pF, and especially not more than 10 pF. Preferred threshold foldback devices include those based on amorphous chalcogenide compositions, and espe¬ cially a device based on a composition comprising sele¬ nium and/or sulphur together with at least one, and preferably two of, germanium, gallium, arsenic or anti¬ mony. The chelcogenide composition preferably contains not more than 10 atomic %, more preferably not more than 5 atomic % tellurium, and especially contains substantially no tellurium since the presence of signi¬ ficant quantities can lead to an unacceptable reduction in the high resistance (or "off") state resistivity of the composition. Such chalcogenide containing devices have the advantage that they switch extremely rapidly, usually in the region of 1 ns from their high resistance state to their low resistance state when subjected to a voltage transient. In addition such chalcogenide devices usually exhibit very low capaci¬ tances, e.g. in the order to 10 pF. Examples of such devices are disclosed in European patent applications Nos. 196,891, 198,624, 242,902, 261,937, 261,938 and 261,939 (corresponding to US applications Nos. 170,576, 945,640, 214,913, 99,947, 218,511 and 99,931, the disclosures of which are incorporated herein by reference) . More than one foldback device may be employed if desired. For example a number of foldback devices may be connected in parallel with one another between the lines as proposed in European patent appli¬ cation Nos. 259,177 and 359,178, the disclosures of which are incorporated herein by reference.^'

The arrangement according to the invention may be employed very effectively to protect the lead of an electrical circuit from a voltage transient. The low capacitance of the arrangement enables it to be used in very high frequency signal and data transmission systems operating with frequencies of up to about 1 GH_Z without adversely affecting the signal or data transmission.

In most instances, when the circuit is subjected to a transient the potential difference across both the foldback and the voltage clamping devices increases until it reaches the clamping voltage of the clamping device whereupon the voltage across the load is held at the clamping voltage of the clamping device. The fold- back device may be separated from the clamping device by a resistor or a delay so that the voltage across the foldback device due to the transient can continue to increase until the threshold voltage of the device is reached, whereupon the device changes to its low resistance state and shunts the transient across the load, the device reverting to its high resistance state after the transient has passed. Normally the foldback device and the voltage clamping device are separated by a resistance of up to 100 kohms, preferably at least 10 kohms. In addition, a capacitor will normally be con¬ nected in series with the foldback device in order to prevent the device being held in its low resistance state by the normal operating currents in the circuit.

If desired the foldback device and voltage clamp may be connected in parallel with a further circuit protection device, e.g. one that is capable of shunting large amounts of energy across the load but which will normally be much slower than the solid-state foldback device, the additional device usually being located between the solid-state foldback device and the signal transmission line and being employed to protect the solid-state threshold foldback device and the voltage clamping device from the effects of very large tran¬ sients. A preferred additional circuit protection device is a foldback device such as a gas discharge unit or "spark gap". Such devices are capable of transmitting considerable amounts of power and yet have very low capacitances. If such an additional device is employed it will usually be separated from the solid- state foldback device by a series resistance of up to 100 kohms, but preferably at least 10 kohms which will allow the voltage across the further circuit protection device to rise to the threshold voltage of the device even though the solid-state foldback device has switched to its low resistance state.

In the case where a further circuit protection device is present, the capacitor can act as a high pass filter and allow the low energy high frequency front edge of the waveform to be handled by the foldback device, and the lower speed high energy position of the waveform to be handled by the further circuit protec¬ tion device. Correct choice of the value of the capa¬ citor maintains the foldback device in its safe operating area, and ensures that no voltage overshoot occurs because of the lack of speed of operation of the gas discharge tube. The value of the capacitor will depend on a number of factors including the safe operating area of the foldback device, the source impe- dence of the circuit and the reliable switching voltage and speed of the further circuit protection device but will normally be in the range of from 100 pF to 200 nF.

It is possible for additional devices to be included in the arrangement. For example a resettable fuse type device may be included in one of the circuit lines usually between the voltage clamp and the load. Such a device, which will normally exhibit a low resistance but whose resistance will increase to a very high value, is described in our international applica¬ tion No. PCT/GB89/00797, which claims priority from British patent application No. 8816632.7, the disclo¬ sure of which is incorporated herein by reference.

Yet another device that may be included in a series circuit protection device located between the further protection device and the signal transmission line which will change from a low to a high electrical resistance to shut down the circuit in the case of extremely long duration overloads such as a short cir¬ cuit etc. Such a device may, for example, be a PTC (positive temperature coefficient) device circuit pro¬ tection device as described in US patents Nos. 4,237,441, 4,426,633, 4,426,339 and 4,774,024, and in European application No. 38,713 the disclosures of which are incorporated herein by reference. A suitable device is sold by Raychem Corporation, Menlo Park, California, USA, under the trade mark "Polyswitch" .

In some instances the arrangement according to the invention may function in a different manner to that described above. For example, the circuit may be sub¬ jected to a transient caused by an electrostatic discharge which will normally have a wavefront that rises very rapidly, e.g. at a rate of 1000 V ns-1. it is possible for the solid-state foldback device and the voltage clamping device to be separated by a sufficient delay that the voltage across the foldback device exceeds the threshold voltage of the device before the voltage clamping device experiences the transient to any extent. Thus, where a fast foldback device such as a chalcogenide device is employed, it is possible for the transient to be shunted across the load by the foldback device without the voltage clamping device or resettable fuse (if present) experiencing it. This is particularly advantageous since it is possible for voltage clamping devices to be permanently damaged by such forms of transient.

One form of device will now be described with reference to the accompanying drawings which is a cir¬ cuit diagram of a circuit protection arrangement according to the invention.

Referring to the accompanying drawing a pair of lines 1 and 2 connect the signal transmission line (beyond the left side of the drawing) to the load (beyond the right of the load). A voltage clamping device 3 comprising a pair of back-to-back diodes 4 and 5 is connected across the load, and, on the signal transmission line side of the voltage clamping device 3 a solid-state threshold foldback device 6 based on an amorphous chalcogenide composition is also connected between lines 1 and 2. A 100 pF to 200 uF capacitor is connected in series with the chalcogenide foldback device 6 in order to prevent the device 6 being held in its low resistance state by the normal operating currents in the circuit, and a resistance 8, typically of up to 1 kohm, is connected between the lines in series with the foldback device 6 and capacitor 7, the resistance 8 preferably being selected so that, together with all the other series and parallel ele¬ ments of the arrangement, it matches the incoming line impedance and so minimises the reflected transient. Preferably the resistance is of such a size that not more than 50%, more preferably not more than 25% and especially not more than 10% of the transient power is reflected.

A spark gap 9 is connected between the lines 1 and 2 on the transmission line side of the foldback device 6, and, on the transmission line side of the spark gap

9 is a series connected carbon loaded polymer circuit protection device. In addition a series connected resettable fuse 11 is provided between the clamping device 3 and the load.

Series resistors 12 and 13 are provided between the clamping device 3 and foldback device 6, and bet¬ ween the foldback device 6 and the spark-gap 9 respec¬ tively, each resistor having a resistance between 5 and

10 kohms.

When the arrangement is subjected to a voltage transient the voltage across the clamping device 3 rises until the fuse 11 becomes high resistance and device 3 clamps the voltage across it at a substan¬ tially constant value, e.g. 5 to 100 V, and usually 10 to 20 V. The voltage across points A and B continues to rise until at typically 80 to 200 V the foldback device 6 changes to its low resistance state. The device 6 then passes current to resistance 8 and the voltage across points A and B rises until spark-gap 9 fires, typically at least 200 ns after the start of the transient.

If the duration of the transient exceeds about 100 s, the carbon-loaded polymer device 10 will begin to change to its high resistance state and shut the cir¬ cuit off.

Claims

CLAIMS :

1. An arrangement for protecting an electrical cir¬ cuit from a voltage transient, which comprises a voltage clamping device arranged to be connected to a pair of current-carrying lines of the circuit so that it extends across the load of the circuit, and a solid state threshold foldback device connected in parallel with the voltage clamping device, the threshold fold- back device and the volgage clamping device each having a capacitance of not more than 100 pF.

2. An arrangement as claimed in claim 1, which includes an additional circuit protection device con¬ nected in parallel with the threshold foldback device and the voltage clamping device.

3. An arrangement as claimed in claim 2, which includes a resistance of such a size that the total of all series and parallel elements matches the incoming line impedance.

4. An arrangement as claimed in claim 2 or claim 3, wherein the additional circuit protection device comprises a spark-gap.

5. An arrangement as claimed in any one of claims 1 to 4, which includes a capacitor connected in series with the threshold foldback device.

6. An arrangement as claimed in claim 5, wherein the capacitor acts as a voltage clamp.

7. An arrangement as claimed in any one of claims 1 to 6, wherein the threshold foldback device includes a switching element that is formed from an amorphous chalcogenide composition.

8. An arrangement as claimed in claim 8, wherein the chalcogenide composition comprises selenium and/or sulphur together with at least one of germanium, gallium, arsenic or antimony, but contains no more than 10 atomic % tellerium.

9. An arrangement as claimed in claim 8, wherein the theshold foldback device has a resistance in its high resistance state of at least 1 M ohm.

10. An arrangement as claimed in any one of claims 1 to 9, wherein the voltage clamping device comprises a MIM or nin device, a semiconductor diode, an avalanche diode, a Zener diode, a tunnel diode or a gaseous voltage regulator.

11. An arrangement as claimed in any one of claims 1 to 10, wherein the threshold foldback device and/or the voltage clamping device has a capacitance of not more than 50 pF.

12. An arrangement as claimed in claim 11, wherein the capacitance of the threshold foldback device and/or of the voltage clamping device is not more than 20 pF.

* * * * * *