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USD570307S1 - Portion of a printed circuit board - Google Patents

Portion of a printed circuit board Download PDF

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Publication number
USD570307S1
USD570307S1 US29/279,838 US27983807F USD570307S US D570307 S1 USD570307 S1 US D570307S1 US 27983807 F US27983807 F US 27983807F US D570307 S USD570307 S US D570307S
Authority
US
United States
Prior art keywords
circuit board
printed circuit
view
showing
elevational view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US29/279,838
Inventor
Atsushi Kobayashi
Hiroshi Takei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Assigned to KABUSHIKI KAISHA TOSHIBA reassignment KABUSHIKI KAISHA TOSHIBA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KOBAYASHI, ATSUSHI, TAKEI, HIROSHI
Application granted granted Critical
Publication of USD570307S1 publication Critical patent/USD570307S1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

FIG. 1 is a front, bottom and right side perspective view of a portion of a printed circuit board, showing our new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a top plan view thereof;
FIG. 5 is a bottom plan view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a left side elevational view thereof;
FIG. 8 is an enlarged view thereof showing the portion marked with 88 in FIG. 6; and,
FIG. 9 is an enlarged view thereof showing the portion marked with 99 in FIG. 5.
The broken lines are for illustrative purposes only and form no part of the claimed design.

Claims (1)

  1. The ornamental design for a portion of a printed circuit board, as shown and described.
US29/279,838 2006-11-30 2007-05-08 Portion of a printed circuit board Expired - Lifetime USD570307S1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006033056 2006-11-30

Publications (1)

Publication Number Publication Date
USD570307S1 true USD570307S1 (en) 2008-06-03

Family

ID=39466905

Family Applications (1)

Application Number Title Priority Date Filing Date
US29/279,838 Expired - Lifetime USD570307S1 (en) 2006-11-30 2007-05-08 Portion of a printed circuit board

Country Status (1)

Country Link
US (1) USD570307S1 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD761745S1 (en) * 2013-06-28 2016-07-19 Sumitomo Electric Industries, Ltd. Semiconductor device
USD804437S1 (en) * 2016-09-30 2017-12-05 Norton (Waterford) Limited Circuit board
USD852763S1 (en) * 2017-08-31 2019-07-02 ebm-papst Lanshut GmbH Circuit board
USD942974S1 (en) * 2018-11-20 2022-02-08 Thales Dis Ais Deutschland Gmbh Cellular module
USD1022931S1 (en) * 2021-08-02 2024-04-16 Hewlett-Packard Development Company, L.P. Integrated circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD761745S1 (en) * 2013-06-28 2016-07-19 Sumitomo Electric Industries, Ltd. Semiconductor device
USD804437S1 (en) * 2016-09-30 2017-12-05 Norton (Waterford) Limited Circuit board
USD852763S1 (en) * 2017-08-31 2019-07-02 ebm-papst Lanshut GmbH Circuit board
USD942974S1 (en) * 2018-11-20 2022-02-08 Thales Dis Ais Deutschland Gmbh Cellular module
USD1022931S1 (en) * 2021-08-02 2024-04-16 Hewlett-Packard Development Company, L.P. Integrated circuit

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