[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

US6671750B2 - LAN interface - Google Patents

LAN interface Download PDF

Info

Publication number
US6671750B2
US6671750B2 US09/820,220 US82022001A US6671750B2 US 6671750 B2 US6671750 B2 US 6671750B2 US 82022001 A US82022001 A US 82022001A US 6671750 B2 US6671750 B2 US 6671750B2
Authority
US
United States
Prior art keywords
lan
bus
lan controller
link pulse
counter device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime, expires
Application number
US09/820,220
Other versions
US20010027531A1 (en
Inventor
Koichi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rock Creek Networks LLC
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
US case filed in Texas Western District Court litigation Critical https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00673 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
First worldwide family litigation filed litigation https://patents.darts-ip.com/?family=18611721&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US6671750(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00256 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A23-cv-00298 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00675 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00081 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00082 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00290 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00080 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00068 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
US case filed in Texas Western District Court litigation https://portal.unifiedpatents.com/litigation/Texas%20Western%20District%20Court/case/6%3A21-cv-00231 Source: District Court Jurisdiction: Texas Western District Court "Unified Patents Litigation Data" by Unified Patents is licensed under a Creative Commons Attribution 4.0 International License.
Assigned to NEC CORPORATION reassignment NEC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NAKAMURA, KOICHI
Application filed by NEC Corp filed Critical NEC Corp
Publication of US20010027531A1 publication Critical patent/US20010027531A1/en
Application granted granted Critical
Publication of US6671750B2 publication Critical patent/US6671750B2/en
Assigned to ACER INC. reassignment ACER INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NEC CORPORATION
Assigned to ROCK CREEK NETWORKS, LLC reassignment ROCK CREEK NETWORKS, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ACER INCORPORATED
Adjusted expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3209—Monitoring remote activity, e.g. over telephone lines or network connections
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to a LAN interface. Particularly, the present invention relates to a LAN interface capable of reducing power consumption.
  • PC terminals which have LAN interface functions as standard equipment, have been increasingly used for business users.
  • some users may not always use the LAN connection.
  • PC personal computer
  • the case where the LAN function is not totally used occurs often.
  • the battery power is wastefully consumed even in an idle state of the LAN interface.
  • the problem is that every time the user goes out with the notebook-type PC, it has to be repeated to attach and detach the LAN interface to and from it.
  • the present invention is made to solve the abovementioned problems.
  • An objective of the present invention is to provide a novel LAN interface capable of reducing the whole power consumption of a terminal at the time an LAN interface is not required.
  • a LAN interface comprises a terminal connected to an I/O bus and a counter device connected to connection ports of the LAN interface.
  • the LAN interface is connected to the I/O bus and transmitting and receiving a link pulse to confirm connection between the terminal and the counter device.
  • the LAN interface includes a LAN controller for processing a signal transmitted from the terminal and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; an isolation section connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; an analog circuit connected between the LAN controller and the connection port, for subjecting a transmission signal and a received signal to an analog process; and a link pulse detector for operating on a predetermined voltage supplied via the I/O bus and detecting a link pulse from the counter device connected to the connection port.
  • the link pulse detector when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof.
  • the link pulse detector when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
  • the link pulse detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
  • the link pulse comprises a signal on the basis of the IEEE 802.3 standards.
  • a LAN interface comprises a terminal connected to an I/O bus.
  • the LAN interface is connected to the I/O bus.
  • the LAN interface includes a LAN controller for processing a signal transmitted from the terminal and then transmitting a processed signal to a counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; an isolation section connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; an analog circuit connected between the LAN controller and the connection port, for subjecting a transmission signal and a received signal to an analog process; and a frame detector for operating on a predetermined voltage supplied via the I/O bus and detecting the presence or absence of a frame, based on a signal from the counter device connected to the connection port.
  • the frame detector when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof.
  • the frame detector when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
  • the frame detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
  • a LAN interface comprises a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; a separator connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; and a link pulse detector for operating on a predetermined voltage supplied via the I/O bus and detecting a link pulse from the counter device connected to the connection port.
  • the link pulse detector when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof.
  • the link pulse detector when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
  • the link pulse detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
  • the link pulse comprises a signal on the basis of the IEEE 802.3 standards.
  • a LAN interface comprises a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; a separator connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from said I/O bus; and a frame detector for operating on a predetermined voltage supplied via the I/O bus and detecting the presence or absence of a frame based on a signal from the counter device connected to the connection port.
  • the frame detector when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof.
  • the frame detector when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
  • the frame detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
  • FIG. 1 is a block diagram illustrating a LAN interface according to a first embodiment of the present invention
  • FIG. 2 is a flowchart of the first embodiment
  • FIG. 3 is an explanatory diagram explaining a normal link pulse transmission function defined in IEEE 802.3 standard for confirmation of mutual connection between a terminal and a counter device;
  • FIG. 4 is a block diagram illustrating a LAN interface according to a second embodiment of the present invention.
  • a LAN interface relates a LAN interface used for an information processing terminal such as a personal computer to configure a local area network (LAN) such as 10BASE-T or 100BASE-TX in compliance with the IEEE 802.3 standard, using shield-less twisted pair cables as transmission media.
  • the LAN interface has the function of monitoring at all times a link pulse signal which confirms physical and electrical connection between segments defined by the IEEE 802.3 on a normally energizing power source.
  • the LAN interface further has the function of controllably supplying the drive power source to the LAN controller based on the presence or absence of the link pulse signal.
  • the LAN interface has the function of controllably isolating the I/O bus from the LAN controller.
  • a link pulse signal received on a received signal Rx is transmitted from a counter device (e.g., a terminal or HUB) via the LAN cable with a fixed period (25 to 50 ms).
  • a link pulse detector 16 which operates on a normally energizing power source (Main_Voo), monitors the presence or absence of the link pulse signal at all times. Thus, the link pulse detector 16 automatically controls the operation of the isolation section 12 and the supply of the drive power source (LAN_Vcc) to the LAN controller 13 .
  • the link pulse detector 16 can automatically control the supply of the drive power source for the LAN controller as well as connection/disconnection of the I/O bus.
  • the resources memory space, IO space, interrupt channel, and so on
  • FIG. 1 is a block diagram illustrating a LAN interface according to the first embodiment of the present invention.
  • FIG. 2 is a flowchart of the first embodiment.
  • FIG. 3 is an explanatory diagram explaining a normal link pulse transmission function defined in IEEE 802.3 standard for confirmation of mutual connection between a terminal and a counter device.
  • the system consists of a terminal, a LAN interface 10 , and a counter device.
  • the terminal is connected to the I/O bus 11 .
  • the LAN interface 10 is connected to the I/O bus 11 .
  • the counter device is connected to the connection port 15 of the LAN interface 10 .
  • the LAN interface 10 transmits and receives a link pulse to confirm connection between the terminal and the counter device.
  • the LAN interface includes a LAN controller 13 for processing a signal transmitted from the terminal and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the connection device and then transmitting a processed signal to the counter device; an isolation section 12 connected between the LAN controller 13 and the I/O bus 11 , for electrically disconnecting the LAN controller 13 from the I/O bus 11 ; an analog circuit 14 connected between the LAN controller 13 and the connection port 15 , for subjecting a transmission signal and a received signal to an analog process; and a link pulse detector 16 for operating on a predetermined voltage supplied via the I/O bus 11 and detecting a link pulse from the counter device connected to the connection port 15 .
  • the link pulse detector 16 when detecting a link pulse output from the counter device, controls the LAN controller 13 and the isolation section 12 to controllably bring them to an operation state thereof.
  • the link pulse detector 16 when not detecting a link pulse output from the counter device, controls the LAN controller 13 and the isolation section 12 to controllably bring them to an operation state.
  • the terminal 21 or the counter device 22 (wiring device such as multiport repeater), connected to the LAN such as 10BASE-T or 100BASE-TX in compliance with the IEEE 802.3 standard, as shown in FIG. 3, transmit a link pulse signal (a normal link pulse) which confirms mutual physical connection.
  • a link pulse signal (a normal link pulse) which confirms mutual physical connection.
  • each device detects a link pulse signal from the counter device to confirm establishment of physical connection. Therefore, it can be confirmed whether or not either device has been physically connected to the LAN by detecting the presence or absence of the link pulse signal.
  • the link pulse detector 16 receives Main_Vcc (5 volts dc) via the I/O bus 11 .
  • a link pulse signal is not detected in the received signal Rx, it is judged that the terminal is not connected to the LAN.
  • the drive power source LAN_Vcc is not supplied to the LAN controller 13 while the Isolate signal 16 a to the isolation section 12 becomes active (step S 22 in FIG. 2 ).
  • the isolation section 12 makes the Isolate signal 16 a active to electrically disconnect the I/O bus 11 from the LAN controller 13 .
  • the LAN interface 10 when the LAN interface 10 is viewed from the terminal, it is regarded that the LAN interface 10 itself does not exist in the terminal so that the resources (memory space, IO space, interrupt channel, and so on) of the terminal are not allocated.
  • the link pulse detector 16 confirms the presence or absence of a link pulse signal on the received signal Rx for a fixed time period (step S 21 in FIG. 2 ).
  • the link pulse detector 16 judges that the terminal is connected to the LAN.
  • the link pulse detector 16 supplies the drive power source LAN_Vcc to the LAN controller 13 and makes the isolation signal 16 a to the isolation section 12 NonActive (step S 23 in FIG. 2 ).
  • the LAN controller 13 becomes an operable state. Since the isolation signal 16 a is made NonActive, the isolation section 12 electrically connects the I/O bus 11 to the LAN controller 13 .
  • the terminal detects the presence of the LAN interface 10 and the resources (memory space, IO space, interrupt channel and so on) of the terminal is allocated to the LAN interface 10 .
  • the LAN interface 10 becomes operable as a LAN interface of the terminal.
  • a signal of controlling the power potential of the isolation section 12 may be used as the Isolate signal 16 a. Any control signal that disconnects the isolation section 12 from the I/O bus 11 may be used as the Isolate signal 16 a.
  • the control signal which matches the circuit configuration, if necessary, may be created as the Isolate signal 16 a.
  • a LAN interface according to a second embodiment of the present invention will be explained below in detail by referring to FIG. 4 .
  • a frame detector 41 is used in place of the link pulse detector 16 in FIG. 1 .
  • the frame detector 41 monitors the received signal Rx for a fixed time period to detect the presence or absence of an actual frame on the LAN.
  • the frame detector 41 implements supply control of LAN_Vcc and output control of the isolation signal based on the presence or absence of the frame and then automatically judges and controls the state of the LAN connection.
  • This embodiment captures all frames of data on the LAN, regardless of broadcast and uni-cast, in a similar manner to that of the LAN analyzer measuring equipment.
  • the present embodiment can monitor the state of LAN connection and can control the LAN interface.
  • the power consumption of the whole of the LAN interface can be largely reduced.
  • the present invention has an excellent effect in that the resources (memory space, 10 space, interrupt channel and so on) of a terminal can be automatically opened without physically disconnecting the LAN interface from the terminal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

A LAN interface is provided that can reduce the power consumption of the whole of a terminal in an unnecessary state of a LAN interface. The LAN interface includes a link pulse detector 16 that operates on a predetermined voltage supplied via the I/O bus 11 and detects a link pulse transmitted from a counter device connected to the connection port 15. When detecting a link pulse sent from a counter device, the link pulse detector 16 controls the LAN controller 13 and the isolation section 12 to controllably bring them to an operation state thereof. When not detecting a link pulse sent from the counter device, the link controller 13 controls the LAN controller 13 and the isolation section 12 to bring them to a non-operation state.

Description

BACKGROUND OF THE INVENTION
The present invention relates to a LAN interface. Particularly, the present invention relates to a LAN interface capable of reducing power consumption.
Recently, PC terminals, which have LAN interface functions as standard equipment, have been increasingly used for business users. However, some users may not always use the LAN connection. When a notebook-type personal computer (PC) is used outdoors, the case where the LAN function is not totally used occurs often. With the LAN interface attached, there is the problem that the battery power is wastefully consumed even in an idle state of the LAN interface. In the case of removal of the LAN interface, it is relatively easy to disconnect the PC card from the PC body. However, it is difficult or impossible to physically remove the LAN interface from the motherboard. Moreover, the problem is that every time the user goes out with the notebook-type PC, it has to be repeated to attach and detach the LAN interface to and from it.
SUMMARY OF THE INVENTION
The present invention is made to solve the abovementioned problems. An objective of the present invention is to provide a novel LAN interface capable of reducing the whole power consumption of a terminal at the time an LAN interface is not required.
In order to achieve the objective of the present invention, a LAN interface comprises a terminal connected to an I/O bus and a counter device connected to connection ports of the LAN interface. The LAN interface is connected to the I/O bus and transmitting and receiving a link pulse to confirm connection between the terminal and the counter device. The LAN interface includes a LAN controller for processing a signal transmitted from the terminal and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; an isolation section connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; an analog circuit connected between the LAN controller and the connection port, for subjecting a transmission signal and a received signal to an analog process; and a link pulse detector for operating on a predetermined voltage supplied via the I/O bus and detecting a link pulse from the counter device connected to the connection port. The link pulse detector, when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof. The link pulse detector, when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
In the LAN interface, the link pulse detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
In the LAN interface, the link pulse comprises a signal on the basis of the IEEE 802.3 standards.
In another aspect of the invention, a LAN interface comprises a terminal connected to an I/O bus. The LAN interface is connected to the I/O bus. The LAN interface includes a LAN controller for processing a signal transmitted from the terminal and then transmitting a processed signal to a counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; an isolation section connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; an analog circuit connected between the LAN controller and the connection port, for subjecting a transmission signal and a received signal to an analog process; and a frame detector for operating on a predetermined voltage supplied via the I/O bus and detecting the presence or absence of a frame, based on a signal from the counter device connected to the connection port. The frame detector, when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof. The frame detector, when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
In the LAN interface, the frame detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
In further another aspect of the invention, a LAN interface comprises a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; a separator connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from the I/O bus; and a link pulse detector for operating on a predetermined voltage supplied via the I/O bus and detecting a link pulse from the counter device connected to the connection port. The link pulse detector, when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof. The link pulse detector, when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
In the LAN interface, the link pulse detector controls the power source potential of the LAN controller and the power source potential of the isolation section. In the LAN interface, the link pulse comprises a signal on the basis of the IEEE 802.3 standards.
In still another aspect of the invention, a LAN interface comprises a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the counter device and then transmitting a processed signal to the connection device; a separator connected between the LAN controller and the I/O bus, for electrically disconnecting the LAN controller from said I/O bus; and a frame detector for operating on a predetermined voltage supplied via the I/O bus and detecting the presence or absence of a frame based on a signal from the counter device connected to the connection port. The frame detector, when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof. The frame detector, when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
In the LAN interface, the frame detector controls the power source potential of the LAN controller and the power source potential of the isolation section.
BRIEF DESCRIPTION OF THE DRAWINGS
This and other objects, features and advantages of the present invention will become more apparent upon a reading of the following detailed description and drawings, in which:
FIG. 1 is a block diagram illustrating a LAN interface according to a first embodiment of the present invention;
FIG. 2 is a flowchart of the first embodiment;
FIG. 3 is an explanatory diagram explaining a normal link pulse transmission function defined in IEEE 802.3 standard for confirmation of mutual connection between a terminal and a counter device; and
FIG. 4 is a block diagram illustrating a LAN interface according to a second embodiment of the present invention.
DESCRIPTION OF THE EMBODIMENTS
A LAN interface according to the present invention relates a LAN interface used for an information processing terminal such as a personal computer to configure a local area network (LAN) such as 10BASE-T or 100BASE-TX in compliance with the IEEE 802.3 standard, using shield-less twisted pair cables as transmission media. The LAN interface has the function of monitoring at all times a link pulse signal which confirms physical and electrical connection between segments defined by the IEEE 802.3 on a normally energizing power source. The LAN interface further has the function of controllably supplying the drive power source to the LAN controller based on the presence or absence of the link pulse signal. Moreover, the LAN interface has the function of controllably isolating the I/O bus from the LAN controller.
Referring to FIG. 1, a link pulse signal received on a received signal Rx is transmitted from a counter device (e.g., a terminal or HUB) via the LAN cable with a fixed period (25 to 50 ms). A link pulse detector 16, which operates on a normally energizing power source (Main_Voo), monitors the presence or absence of the link pulse signal at all times. Thus, the link pulse detector 16 automatically controls the operation of the isolation section 12 and the supply of the drive power source (LAN_Vcc) to the LAN controller 13.
According to the presence or absence of a link pulse, or the presence or absence of connection between the LAN and the terminal, the link pulse detector 16 can automatically control the supply of the drive power source for the LAN controller as well as connection/disconnection of the I/O bus. Hence, when a terminal is not connected to a LAN, that is, the LAN interface is unnecessary, the power consumption of the whole of the terminal can be reduced. In this case, the resources (memory space, IO space, interrupt channel, and so on) of the terminal can be automatically opened.
Semiconductor devices according to embodiments of the present invention will be described below in detail with reference to the attached drawings.
First Embodiment
A LAN interface according to a first embodiment will be explained below by referring to the FIGS. 1 to 3. FIG. 1 is a block diagram illustrating a LAN interface according to the first embodiment of the present invention. FIG. 2 is a flowchart of the first embodiment. FIG. 3 is an explanatory diagram explaining a normal link pulse transmission function defined in IEEE 802.3 standard for confirmation of mutual connection between a terminal and a counter device.
Referring to FIGS. 1 to 3, the system consists of a terminal, a LAN interface 10, and a counter device. The terminal is connected to the I/O bus 11. The LAN interface 10 is connected to the I/O bus 11. The counter device is connected to the connection port 15 of the LAN interface 10. The LAN interface 10 transmits and receives a link pulse to confirm connection between the terminal and the counter device.
The LAN interface includes a LAN controller 13 for processing a signal transmitted from the terminal and then transmitting a processed signal to the counter device, and for processing a signal transmitted from the connection device and then transmitting a processed signal to the counter device; an isolation section 12 connected between the LAN controller 13 and the I/O bus 11, for electrically disconnecting the LAN controller 13 from the I/O bus 11; an analog circuit 14 connected between the LAN controller 13 and the connection port 15, for subjecting a transmission signal and a received signal to an analog process; and a link pulse detector 16 for operating on a predetermined voltage supplied via the I/O bus 11 and detecting a link pulse from the counter device connected to the connection port 15. The link pulse detector 16, when detecting a link pulse output from the counter device, controls the LAN controller 13 and the isolation section 12 to controllably bring them to an operation state thereof. The link pulse detector 16, when not detecting a link pulse output from the counter device, controls the LAN controller 13 and the isolation section 12 to controllably bring them to an operation state.
The first embodiment will be explained below in more detail.
The terminal 21 or the counter device 22 (wiring device such as multiport repeater), connected to the LAN such as 10BASE-T or 100BASE-TX in compliance with the IEEE 802.3 standard, as shown in FIG. 3, transmit a link pulse signal (a normal link pulse) which confirms mutual physical connection. Thus, each device detects a link pulse signal from the counter device to confirm establishment of physical connection. Therefore, it can be confirmed whether or not either device has been physically connected to the LAN by detecting the presence or absence of the link pulse signal.
When the power source for a terminal itself is turned on, the link pulse detector 16 receives Main_Vcc (5 volts dc) via the I/O bus 11. The link pulse detector 16 checks whether or not the received signal Rx has a link pulse for the time period (x seconds, for example, 24 ms (=16+8) or more) sufficient to detect the pulse signal (step S21 in FIG. 2). When a link pulse signal is not detected in the received signal Rx, it is judged that the terminal is not connected to the LAN. Then, the drive power source LAN_Vcc is not supplied to the LAN controller 13 while the Isolate signal 16 a to the isolation section 12 becomes active (step S22 in FIG. 2). Since the drive power source LAN_Vcc is not supplied, the LAN controller 13 cannot totally operate and does not consume any electric power. The isolation section 12 makes the Isolate signal 16 a active to electrically disconnect the I/O bus 11 from the LAN controller 13. Hence, when the LAN interface 10 is viewed from the terminal, it is regarded that the LAN interface 10 itself does not exist in the terminal so that the resources (memory space, IO space, interrupt channel, and so on) of the terminal are not allocated.
On the other hand, the link pulse detector 16 confirms the presence or absence of a link pulse signal on the received signal Rx for a fixed time period (step S21 in FIG. 2). When detecting the link pulse signal in the received signal Rx, the link pulse detector 16 judges that the terminal is connected to the LAN. Then, the link pulse detector 16 supplies the drive power source LAN_Vcc to the LAN controller 13 and makes the isolation signal 16 a to the isolation section 12 NonActive (step S23 in FIG. 2). In response to the supply of the drive power source LAN_Vcc, the LAN controller 13 becomes an operable state. Since the isolation signal 16 a is made NonActive, the isolation section 12 electrically connects the I/O bus 11 to the LAN controller 13. Hence, when the LAN interface 10 is viewed from the terminal, the terminal detects the presence of the LAN interface 10 and the resources (memory space, IO space, interrupt channel and so on) of the terminal is allocated to the LAN interface 10. Thus, the LAN interface 10 becomes operable as a LAN interface of the terminal.
A signal of controlling the power potential of the isolation section 12 may be used as the Isolate signal 16 a. Any control signal that disconnects the isolation section 12 from the I/O bus 11 may be used as the Isolate signal 16 a. The control signal which matches the circuit configuration, if necessary, may be created as the Isolate signal 16 a.
Second Embodiment
A LAN interface according to a second embodiment of the present invention will be explained below in detail by referring to FIG. 4.
In the LAN interface of the second embodiment, a frame detector 41 is used in place of the link pulse detector 16 in FIG. 1. The frame detector 41 monitors the received signal Rx for a fixed time period to detect the presence or absence of an actual frame on the LAN. The frame detector 41 implements supply control of LAN_Vcc and output control of the isolation signal based on the presence or absence of the frame and then automatically judges and controls the state of the LAN connection.
This embodiment captures all frames of data on the LAN, regardless of broadcast and uni-cast, in a similar manner to that of the LAN analyzer measuring equipment. Thus, there is the new advantage in that the present embodiment can monitor the state of LAN connection and can control the LAN interface.
In the LAN interface with the above-mentioned configuration according to the present invention, when the terminal is not connected to the LAN, that is, the LAN interface is unnecessary, the power consumption of the whole of the LAN interface can be largely reduced.
The present invention has an excellent effect in that the resources (memory space, 10 space, interrupt channel and so on) of a terminal can be automatically opened without physically disconnecting the LAN interface from the terminal.
The entire disclosure of Japanese Application No. 2000-097042 filed on Mar. 31, 2000 including specification, claims, drawings and summary are incorporated herein by reference in its entirely.

Claims (10)

What is claimed is:
1. A LAN interface comprising:
a terminal connected to an I/O bus; and
a counter device connected to connection ports of said LAN interface;
said LAN interface being connected to said I/O bus and transmitting and receiving a link pulse to confirm connection between said terminal and said counter device;
said LAN interface including:
a LAN controller for processing a signal transmitted from said terminal and then transmitting a processed signal to said counter device, and for processing a signal transmitted from said counter device and then transmitting a processed signal to said connection device;
an isolation section connected between said LAN controller and said I/O bus, for electrically disconnecting said LAN controller from said I/O bus;
an analog circuit connected between said LAN controller and said connection port, for subjecting a transmission signal and a received signal to an analog process; and
a link pulse detector for operating on a predetermined voltage supplied via said I/O bus and detecting a link pulse from said counter device connected to said connection port;
wherein said link pulse detector, when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof and, when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
2. The LAN interface defined in claim 1, wherein said link pulse detector controls the power source potential of said LAN controller and the power source potential of said isolation section.
3. The LAN interface defined in claim 1, wherein said link pulse comprises a signal on the basis of the IEEE 802.3 standards.
4. A LAN interface comprising:
a terminal connected to an I/O bus;
said LAN interface being connected to said I/O bus;
said LAN interface including:
a LAN controller for processing a signal transmitted from said terminal and then transmitting a processed signal to a counter device, and for processing a signal transmitted from said counter device and then transmitting a processed signal to said connection device;
an isolation section connected between said LAN controller and said I/O bus, for electrically disconnecting said LAN controller from said I/O bus;
an analog circuit connected between said LAN controller and said connection port, for subjecting a transmission signal and a received signal to an analog process; and
a frame detector for operating on a predetermined voltage supplied via said I/O bus and detecting the presence or absence of a frame, based on a signal from said counter device connected to said connection port;
wherein said frame detector, when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof and, when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
5. The LAN interface defined in claim 4, wherein said frame detector controls the power source potential of said LAN controller and the power source potential of said isolation section.
6. A LAN interface comprising:
a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to said counter device, and for processing a signal transmitted from said counter device and then transmitting a processed signal to said connection device;
a separator connected between said LAN controller and said I/O bus, for electrically disconnecting said LAN controller from said I/O bus; and
a link pulse detector for operating on a predetermined voltage supplied via said I/O bus and detecting a link pulse from said counter device connected to said connection port;
wherein said link pulse detector, when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof and, when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
7. The LAN interface defined in claim 4, wherein said link pulse detector controls the power source potential of said LAN controller and the power source potential of said isolation section.
8. The LAN interface defined in claim 6, wherein said link pulse comprises a signal on the basis of the IEEE 802.3 standards.
9. A LAN interface comprising:
a LAN controller for processing a signal transmitted from a terminal connected to an I/O bus and then transmitting a processed signal to said counter device, and for processing a signal transmitted from said counter device and then transmitting a processed signal to said connection device;
a separator connected between said LAN controller and said I/O bus, for electrically disconnecting said LAN controller from said I/O bus; and
a frame detector for operating on a predetermined voltage supplied via said I/O bus and detecting the presence or absence of a frame based on a signal from said counter device connected to said connection port;
wherein said frame detector, when detecting a frame, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof and, when not detecting a frame, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.
10. The LAN interface defined in claim 9, wherein said frame detector controls the power source potential of said LAN controller and the power source potential of said isolation section.
US09/820,220 2000-03-31 2001-03-29 LAN interface Expired - Lifetime US6671750B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000097042A JP3492586B2 (en) 2000-03-31 2000-03-31 LAN interface device
JP2000-097042 2000-03-31

Publications (2)

Publication Number Publication Date
US20010027531A1 US20010027531A1 (en) 2001-10-04
US6671750B2 true US6671750B2 (en) 2003-12-30

Family

ID=18611721

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/820,220 Expired - Lifetime US6671750B2 (en) 2000-03-31 2001-03-29 LAN interface

Country Status (2)

Country Link
US (1) US6671750B2 (en)
JP (1) JP3492586B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060062030A1 (en) * 2002-10-18 2006-03-23 Keller Anton W Bus controlled power switch
US20070177532A1 (en) * 2004-07-28 2007-08-02 Aisin Seiki Kabushiki Kaisha Terminal control system
US20080316940A1 (en) * 2007-06-19 2008-12-25 George Brooks Methods and systems for using managed port circuitry to map connections among structured cabling apparatus and network devices

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100656473B1 (en) * 2005-11-09 2006-12-11 삼성전자주식회사 Switching network system with LAN interface and overload control method in the system
US9459681B2 (en) * 2011-11-14 2016-10-04 Samsung Electronics Co., Ltd. Method and apparatus to control power supply to network device
KR101933136B1 (en) * 2011-11-14 2018-12-27 삼성전자주식회사 Power control apparatus and method

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4903338A (en) * 1986-11-17 1990-02-20 Amp Incorporated Optical interface
US5136580A (en) * 1990-05-16 1992-08-04 Microcom Systems, Inc. Apparatus and method for learning and filtering destination and source addresses in a local area network system
JPH0514359A (en) 1991-07-03 1993-01-22 Ricoh Co Ltd Lan adaptor and its power supply control method
US5555277A (en) * 1993-12-01 1996-09-10 Datapoint Corporation Technique for cancelling common mode switching noise to achieve reduced error rates in a local area network
JPH1093609A (en) 1996-09-11 1998-04-10 Ricoh Co Ltd Host computer and network device
JPH1188352A (en) 1997-09-08 1999-03-30 Nec Corp Power source control system and interface
US5901136A (en) * 1996-12-26 1999-05-04 Alcatel Usa Sourcing, L.P. System and method for controlling timing in a distributed digital cross-connect system
US5935249A (en) * 1997-02-26 1999-08-10 Sun Microsystems, Inc. Mechanism for embedding network based control systems in a local network interface device
US6061768A (en) * 1997-12-18 2000-05-09 Advanced Micro Devices, Inc. Apparatus and method in a network interface device for storing tracking information indicating stored data status between contending memory controllers
US6290131B1 (en) * 1999-05-12 2001-09-18 Metrologic Instruments, Inc. Optical scanner adapted for direct interfacing to a data communications network

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4903338A (en) * 1986-11-17 1990-02-20 Amp Incorporated Optical interface
US5136580A (en) * 1990-05-16 1992-08-04 Microcom Systems, Inc. Apparatus and method for learning and filtering destination and source addresses in a local area network system
JPH0514359A (en) 1991-07-03 1993-01-22 Ricoh Co Ltd Lan adaptor and its power supply control method
US5555277A (en) * 1993-12-01 1996-09-10 Datapoint Corporation Technique for cancelling common mode switching noise to achieve reduced error rates in a local area network
JPH1093609A (en) 1996-09-11 1998-04-10 Ricoh Co Ltd Host computer and network device
US5901136A (en) * 1996-12-26 1999-05-04 Alcatel Usa Sourcing, L.P. System and method for controlling timing in a distributed digital cross-connect system
US5935249A (en) * 1997-02-26 1999-08-10 Sun Microsystems, Inc. Mechanism for embedding network based control systems in a local network interface device
JPH1188352A (en) 1997-09-08 1999-03-30 Nec Corp Power source control system and interface
US6061768A (en) * 1997-12-18 2000-05-09 Advanced Micro Devices, Inc. Apparatus and method in a network interface device for storing tracking information indicating stored data status between contending memory controllers
US6290131B1 (en) * 1999-05-12 2001-09-18 Metrologic Instruments, Inc. Optical scanner adapted for direct interfacing to a data communications network

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060062030A1 (en) * 2002-10-18 2006-03-23 Keller Anton W Bus controlled power switch
US7711970B2 (en) 2002-10-18 2010-05-04 Thomson Licensing Bus controlled power switch
US20070177532A1 (en) * 2004-07-28 2007-08-02 Aisin Seiki Kabushiki Kaisha Terminal control system
US20080316940A1 (en) * 2007-06-19 2008-12-25 George Brooks Methods and systems for using managed port circuitry to map connections among structured cabling apparatus and network devices
US8165014B2 (en) * 2007-06-19 2012-04-24 Commscope, Inc. Of North Carolina Methods and systems for using managed port circuitry to map connections among structured cabling apparatus and network devices

Also Published As

Publication number Publication date
JP3492586B2 (en) 2004-02-03
JP2001285320A (en) 2001-10-12
US20010027531A1 (en) 2001-10-04

Similar Documents

Publication Publication Date Title
US8150539B2 (en) Information processing apparatus and method for controlling power supply of the apparatus
US7921314B2 (en) Providing power over ethernet cables
US7454641B2 (en) System powered from a local area network cable
JP4850848B2 (en) Adjusting the current limit threshold based on the output voltage of a power supply in a system for powering over a communication link
US7320077B2 (en) Power supply controlling apparatus of a device connected to a serial bus
US20020144159A1 (en) HomePNA device with the function of transmitting power over a network wire
US9336176B2 (en) Remote access appliance with communication protocol autosensing feature
US7149906B2 (en) Communication device
US20020181700A1 (en) Information terminal device using automatically switchable power supply
US6671750B2 (en) LAN interface
US6477602B1 (en) Method and circuit for detecting the presence of a connector in a socket
JP2004070785A (en) Serial bus connecting apparatus and driver software
US5739597A (en) Adapter design for dual sourced power
JP3686863B2 (en) Uninterruptible power system
JP3063838U (en) PC card with automatic power saving sleep function
JPH10262071A (en) Device and method for charging battery
EP3497535B1 (en) Switching the power class of a power over ethernet powered device
CN113572622A (en) POE power supply system and POE power supply method
JPH09284287A (en) Network system
CN110830266B (en) Power switching management method, network device and power switching management module
US11297231B1 (en) Uninterruptible power system powered by power over ethernet and method thereof
US20240345642A1 (en) Ethernet media converter apparatuses and systems
JP2001077877A (en) Communication equipment, control method therefor and information processor
JP3613135B2 (en) Network system
JPH11224142A (en) Power supplying method and external equipment

Legal Events

Date Code Title Description
AS Assignment

Owner name: NEC CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NAKAMURA, KOICHI;REEL/FRAME:011647/0766

Effective date: 20010326

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STCF Information on status: patent grant

Free format text: PATENTED CASE

FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYER NUMBER DE-ASSIGNED (ORIGINAL EVENT CODE: RMPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

AS Assignment

Owner name: ACER INC., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:022615/0337

Effective date: 20090331

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12

AS Assignment

Owner name: ROCK CREEK NETWORKS, LLC, TEXAS

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ACER INCORPORATED;REEL/FRAME:054246/0810

Effective date: 20201028