US3711692A - Determination of number of ones in a data field by addition - Google Patents
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- US3711692A US3711692A US00124089A US3711692DA US3711692A US 3711692 A US3711692 A US 3711692A US 00124089 A US00124089 A US 00124089A US 3711692D A US3711692D A US 3711692DA US 3711692 A US3711692 A US 3711692A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters
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- a counting arrangement in which a first series of full adders count the number of occurrences of a selected value simultaneously in three element subsets of the data field, and includes an additional series of full adders for combining the totals produced by each of the adders of the first series.
- FIG. 1 is a schematic showing of the counting arrangement of the present invention for a six element field
- FIG. 2 is a schematic showing of the counting arrangement for a seven element field.
- FIG. 3 is a schematic showing of a counting arrangement for a fifteen element field.
- the data fields referred to in the following description may be stored in any suitable data storage means, such as the response store of an associative memory or associative processor. Regardless of the particular storage device involved, the data is stored as individual bits in the usual digital manner each having a O or 1 value.
- FIG. 1 shows a six element data field 10 and illustrates the basic concept of the present invention.
- Each of the elements b of the data field 10 may have either a or. I value. While the elements are shown grouped into two sets of three elements each, this is for illustration only and the data field is not necessarily so arranged physically.
- a typical full adder would be a MCl0l9 integrated circuit manufactured by Motorola Semiconductor Products, Inc..
- Each of the full adders 12-18 is capable of receiving three binary inputs and adding these inputs to produce the two digit binary sum thereof, with the least significant digit of the sum being produced at the output s and the more significant digit being produced at the output 0.
- the full adder 12 receives as inputs the values of three of the bits of the data field 10 and the full adder 14 receives as inputs the values of the remaining three data bits.
- converting means may be provided between the elements of the field and the full adders. Such converting means produces a 0 output if the element is not of the selected value and a 1 output if the element is of the selected value.
- a third full adder 16 receives as inputs the least significant digit outputs of the first full adders l2 and 14. The output of this full adder 16 represents the sum of the least significant digits of the outputs of the adders I2 and 14. The least significant digit of the output of the adder 16 is thus the least significant digit of the sum of the 1's in the data field 10. This digit is supplied to the output device 20.
- a fourth full adder 18 receives as inputs the most significant digit output of the full adder l6 and the most significant digit outputs of the full adders I2 and 14.
- the least significant digit of the addition performed by the full adder 18 is the second significant digit of the total count while the most significant digit of the output is the most significant digit of the full count.
- the output of the least significant digit of the full adder l6 and the full output of the adder 18 comprise the full count of the number of ones in the data field 10.
- FIG. 2 illustrates the arrangement of full adders employed with a data field 22 having seven elements.
- a first set of full adders 24 and 26 each count the values of three positions of the data field 22.
- An additional set of full adders 28 and 30 count, respectively, the single previously uncounted bit value of the data field 22, the least significant digits of the outputs of the counters 24 and 26, and the most significant digit of the output of the counter 28 and the most significant digits of the outputs of the counters 24 and 26.
- the least significant digit output of the counter 28 is the least significant digit of the total count while the outputs of the full adder 30 provide the second and third significant digits of the total count.
- These three outputs are supplied to the output device 32 and represent the total count of the number of l s in the data field 22.
- the basic counting system described in the above paragraphs may be expanded to count the number of ls in a field of any length. Essentially, this is accomplished by dividing the data field into subsets which may be counted by one of the counting arrangements described above and by adding the totals achieved for each subset by means of additional full adders.
- a fifteen element data field 48 may be divided into three subsets: S, which consists of a single bit of the data field 48, S which consists of the next seven data bits of the field 48; and S which consists of the remaining seven data bits. It should be noted that the order in which the data field 48 is divided into the subsets S S and S is purely arbitrary.
- the total count of 1's in the subsets S and 8; may be determined by full counters 50 and 52 which are each equivalent to the full adder arrangement of FIG. 2.
- the counts produced by the seven position counters 50 and 52 and the count of the least significant bit subset S are added by means of additional full adders 54-58.
- These full adders 54-58 add, respectively, the least significant digit values, the next most significant digit values and the carry value of the previous adder, and the most significant digit values and the carry value from the previous adder.
- the outputs of the full adders 54-58 provide the successively higher ranked significant digits of the total count and these outputs are furnished to the output device 60.
- the maximum time required to achieve the total count of the number of I s in the data field is equal to the delay imposed by a full adder multiplied by the total number of full adders involved in producing one digit of the output or final count.
- the maximum delay is five times the delay of one full adder. Since the adders 62 and 64 operate simultaneiously these two full adders impose only one time delay in the count. The adder 68, however, receives inputs both from the adder 62 and from the full adder 66. As a result, two additional delays are imposed.
- the full adder 56 receives inputs both from the adder 68 and the adder 54 so that two additional time delays are again imposed.
- a field having 11 bit positions can be counted with a maximum delay of P full adders
- a field having 2n 1 bit positions can be counted with a maximum delay off 2 full adders.
- the maximum delay will be 2m 3 multiplied by the delay of one full adder.
- the counting arrangement of the present invention is applicable to date fields of any length.
- the data field is first divided into three primary subsets S S and S with the subsets S and 8;, being of equal length and the subset S containing at most a single element.
- the subsets S,, S and 8; are mutually exclusive and exhaust the elements of the data field.
- the primary subsets S and 8; each contain more than three elements, they are further divided into secondary subsets S S and S and S S and S respectively.
- the secondary subsets are also mutually exclusive and exhaustive of the elements of their respective primary subsets.
- the division of the primary subsets is accomplished in the same manner as the original division of the data field.
- the subsets S and S are of equal length and the subset S is either void or contains a single element, depending on whether the primary subset S contains an even or odd number of elements. Division of the multiple element subsets is continued in the same manner until a series of ultimate subsets, none of which contains more than three elements of the data field, is achieved.
- a full adder is provided for each of the ultimate subsets which contains more than a single element.
- the full adders produce the counts of the number of 1's in the multiple element ultimate subsets.
- the counts of the penultimate subsets are obtained by means of additional full adders, two additional full adders being provided for each penultimate subset with one full adder combining the count of the single element subset, if present, and the least significant digit outputs of the ultimate subset adders and the second full adder combining the most significant digit of the output of the first full adder and the most significant digits of the ultimate subset full adders.
- additional full adders arranged in the same manner, the counts of the successive subsets of the hierarchical rank of the subsets are obtained.
- the final series of adders combines the counts of the subsets 5,, S and S to produce the total count for the entire data field.
- step (a) dividing all elements produced in the immediately preceeding division which contain more than three elements into three subsets satisfying the conditions of step (a);
- Apparatus for counting the number of occurrences of a predetermined value in a data field of at least fifteen elements comprising:
- first and second counting means for counting the number of occurrences in first and second portions, respectively, of the data field, the first and second portions being non-overlapping, of equal length, and including at least all but one element of the data field;
- a first full adder receiving as inputs the value of the data field element excluded from the first and second portions and the least significant digits of the output of the first and second counting means;
- an output device receiving the least significant digit outputs of each full adder and the most significant digit output of the final full adder, the output of the first full adder being the least significant digit of the total and the outputs of successive full adders being the successively more significant digits of the total.
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Abstract
An arrangement for counting the number of a given data such as ones in a data field. The system employs full adders which count the number of ones in basic three element subsets of the data field. Additional full adders total the results of the first series of full adders and also count any additional ones of the data field.
Description
United States Patent Batcher [451 Jan. 16, 1973 [54] DETERMINATION OF NUMBER OF 3.466.433 9/969 Dudact al .235/l75 3,603,776 9/!97] Wcinherger ..235/l75 ONES IN A DATA FIELD BY ADDITION [75] Inventor: Kenneth E. Batcher, Stow, Ohio [73] Assignee: Goodyear Aerospace Corporation,
Akron, Ohio [22] Filed: March 15, 1971 [2]] Appl. No.: l24,08 9
[52] US. Cl ..235/l75 [51] Int. Cl ..G06f 7/50 [58] Field of Search ..235/l75, 92, 92 CP, 92 SA [56] References Cited UNITED STATES PATENTS 3,535,502 l0/l970 Clapper ..235/l75 X Primary Examiner-Eugene G. Botz Assistant ExaminerDavid H. Malzahn Att0rney.l. G. Pere and L. A. Germain [57] ABSTRACT An arrangement for counting the number of a given data such as ones in a data field. The system employs full adders which count the number of ones in basic three element subsets of the data field. Additional full adders total the results of the first series of full adders and also count any additional ones of the data field.
5 Claims, 3 Drawing Figures OUTPUT PATENTEDJAN 1 6 I973 SHEET 2 0F 2 mmE INVENTOR KENNETH E. BATCHER WWW,
ATTORNEYS DETERMINATION OF NUMBER OF ONES IN A DATA FIELD BY ADDITION It is the primary object of the present invention to provide means for counting the number of occurrences ofa given value in a data field.
It is also an object of the invention to provide means for counting the number of occurrences of a given value in a data field which provides for the fast counting of the selected value occurrences.
The above and other objects of the invention which will become apparent in the following detailed description are achieved by providing a counting arrangement in which a first series of full adders count the number of occurrences of a selected value simultaneously in three element subsets of the data field, and includes an additional series of full adders for combining the totals produced by each of the adders of the first series.
For a more complete understanding of the invention and the objects and advantages thereof reference should be had to the following detailed descriptionand the accompanying drawings wherein there is shown a preferred embodiment of the invention.
In the drawing:
FIG. 1 is a schematic showing of the counting arrangement of the present invention for a six element field;
FIG. 2 is a schematic showing of the counting arrangement for a seven element field; and
FIG. 3 is a schematic showing of a counting arrangement for a fifteen element field.
The data fields referred to in the following description may be stored in any suitable data storage means, such as the response store of an associative memory or associative processor. Regardless of the particular storage device involved, the data is stored as individual bits in the usual digital manner each having a O or 1 value.
FIG. 1 shows a six element data field 10 and illustrates the basic concept of the present invention. Each of the elements b of the data field 10 may have either a or. I value. While the elements are shown grouped into two sets of three elements each, this is for illustration only and the data field is not necessarily so arranged physically. In order to count the total number of bits b which are of a particular value, for example which have the value 1, there is provided an arrangement of full adders 12-18. A typical full adder would be a MCl0l9 integrated circuit manufactured by Motorola Semiconductor Products, Inc.. Each of the full adders 12-18 is capable of receiving three binary inputs and adding these inputs to produce the two digit binary sum thereof, with the least significant digit of the sum being produced at the output s and the more significant digit being produced at the output 0. The full adder 12 receives as inputs the values of three of the bits of the data field 10 and the full adder 14 receives as inputs the values of the remaining three data bits. If the data field is expressed in a form other than a binary code, converting means may be provided between the elements of the field and the full adders. Such converting means produces a 0 output if the element is not of the selected value and a 1 output if the element is of the selected value. Thus, the full adders 12 and 14 will simultaneously produce the total count of the 1's in their respective subsets of the data field 10. A third full adder 16 receives as inputs the least significant digit outputs of the first full adders l2 and 14. The output of this full adder 16 represents the sum of the least significant digits of the outputs of the adders I2 and 14. The least significant digit of the output of the adder 16 is thus the least significant digit of the sum of the 1's in the data field 10. This digit is supplied to the output device 20. A fourth full adder 18 receives as inputs the most significant digit output of the full adder l6 and the most significant digit outputs of the full adders I2 and 14. The least significant digit of the addition performed by the full adder 18 is the second significant digit of the total count while the most significant digit of the output is the most significant digit of the full count. Thus, the output of the least significant digit of the full adder l6 and the full output of the adder 18 comprise the full count of the number of ones in the data field 10.
FIG. 2 illustrates the arrangement of full adders employed with a data field 22 having seven elements. A first set of full adders 24 and 26 each count the values of three positions of the data field 22. An additional set of full adders 28 and 30 count, respectively, the single previously uncounted bit value of the data field 22, the least significant digits of the outputs of the counters 24 and 26, and the most significant digit of the output of the counter 28 and the most significant digits of the outputs of the counters 24 and 26. Again, the least significant digit output of the counter 28 is the least significant digit of the total count while the outputs of the full adder 30 provide the second and third significant digits of the total count. These three outputs are supplied to the output device 32 and represent the total count of the number of l s in the data field 22.
The basic counting system described in the above paragraphs may be expanded to count the number of ls in a field of any length. Essentially, this is accomplished by dividing the data field into subsets which may be counted by one of the counting arrangements described above and by adding the totals achieved for each subset by means of additional full adders. Thus, as is shown in FIG. 3, a fifteen element data field 48 may be divided into three subsets: S, which consists ofa single bit of the data field 48, S which consists of the next seven data bits of the field 48; and S which consists of the remaining seven data bits. It should be noted that the order in which the data field 48 is divided into the subsets S S and S is purely arbitrary. The arrangement shown in which the first element is assigned to the subset the next seven elements to the subset S ,-and the remaining seven elements to subset S is chosen for convenience of illustration. However, any other arrangement may be employed so long as the subsets S and 8;, are of equal length and the subset S, contains not more than one element.
The total count of 1's in the subsets S and 8;, may be determined by full counters 50 and 52 which are each equivalent to the full adder arrangement of FIG. 2. The counts produced by the seven position counters 50 and 52 and the count of the least significant bit subset S are added by means of additional full adders 54-58. These full adders 54-58 add, respectively, the least significant digit values, the next most significant digit values and the carry value of the previous adder, and the most significant digit values and the carry value from the previous adder. The outputs of the full adders 54-58 provide the successively higher ranked significant digits of the total count and these outputs are furnished to the output device 60. It should be noted that the maximum time required to achieve the total count of the number of I s in the data field is equal to the delay imposed by a full adder multiplied by the total number of full adders involved in producing one digit of the output or final count. Referring again to the arrangement of FIG. 3 it will be seen that the maximum delay is five times the delay of one full adder. Since the adders 62 and 64 operate simultaneiously these two full adders impose only one time delay in the count. The adder 68, however, receives inputs both from the adder 62 and from the full adder 66. As a result, two additional delays are imposed. Likewise, the full adder 56 receives inputs both from the adder 68 and the adder 54 so that two additional time delays are again imposed. In general, if a field having 11 bit positions can be counted with a maximum delay of P full adders, a field having 2n 1 bit positions can be counted with a maximum delay off 2 full adders. For a field having 2" 1 bit positions, where m is greater than or equal to 2, the maximum delay will be 2m 3 multiplied by the delay of one full adder.
The counting arrangement of the present invention is applicable to date fields of any length. The data field is first divided into three primary subsets S S and S with the subsets S and 8;, being of equal length and the subset S containing at most a single element. The subsets S,, S and 8;, are mutually exclusive and exhaust the elements of the data field. lf the primary subsets S and 8;, each contain more than three elements, they are further divided into secondary subsets S S and S and S S and S respectively. The secondary subsets are also mutually exclusive and exhaustive of the elements of their respective primary subsets. The division of the primary subsets is accomplished in the same manner as the original division of the data field. Thus, the subsets S and S are of equal length and the subset S is either void or contains a single element, depending on whether the primary subset S contains an even or odd number of elements. Division of the multiple element subsets is continued in the same manner until a series of ultimate subsets, none of which contains more than three elements of the data field, is achieved.
A full adder is provided for each of the ultimate subsets which contains more than a single element. The full adders produce the counts of the number of 1's in the multiple element ultimate subsets. The counts of the penultimate subsets are obtained by means of additional full adders, two additional full adders being provided for each penultimate subset with one full adder combining the count of the single element subset, if present, and the least significant digit outputs of the ultimate subset adders and the second full adder combining the most significant digit of the output of the first full adder and the most significant digits of the ultimate subset full adders. By means of additional full adders arranged in the same manner, the counts of the successive subsets of the hierarchical rank of the subsets are obtained. The final series of adders combines the counts of the subsets 5,, S and S to produce the total count for the entire data field.
It will be understood that while only the best known embodiment of the invention has been described in detail, in accordance with the Patent Statutes, the invention is not so limited. Reference should therefore be had to the appended claims in determining the true scope of the invention.
What is claimed is:
1. The method of determining the number of occurrences of a selected value in a data field having at least fifteen elements, which comprises the steps of l. dividing the data field into mutually exclusive, ex-
haustive subsets S S and S where S, and S, are of equal length and 8, includes at most one element of the data field;
2. counting the occurrences of the selected value in each of the subsets S, and S 3. adding, by means ofa full adder, the number of occurrences of the selected value in subset S and the least significant digit of the count of each of the subsets S and S 4. adding, by means of an additional full adder, the most significant digit of the output of the previous full adder and the next significant digit of the count of each of the subsets S and S 5. repeating step (4) until all the digits of the count of each of the subsets S, and 5;, have been exhausted, an additional full adder being employed for each addition; and
6. transmitting to an output device the least significant digit of the output of each full adder and both digits of the output of the last full adder, the least significant digit of the output of the first full adder being the least significant digit of the total count, the least significant digits of the outputs of successive full adders being the successive digits of the full count, and the most significant digit of the output of the final full adder being the most significant digit of the full count.
2. The method according to claim 1 wherein the count of each multiple element subset of the data field is determined by the steps of:
a. dividing .the subset into three mutually exclusive, exhaustive subsets, the first-of which has at most one element, a second and third of which are of equal length;
b. determining if any subset produced in the immediately preceeding division contains more than three elements;
c. dividing all elements produced in the immediately preceeding division which contain more than three elements into three subsets satisfying the conditions of step (a);
. repeating steps (b) and (0) until an ultimate series of subsets no one of which contains more than three elements is obtained;
e. summing, by means of full adders, the number of occurrences of the selected value of each ultimate subset having more than one element; and
f. by means of additional full adders, progressively combining andadding to the sums the number of occurrences of the selected value in those subsets having one element in the reverse order of their creation in steps (a) through (d) until the total count of each multiple element subset has been achieved.
3. Apparatus for counting the number of occurrences of a predetermined value in a data field of at least fifteen elements, comprising:
first and second counting means for counting the number of occurrences in first and second portions, respectively, of the data field, the first and second portions being non-overlapping, of equal length, and including at least all but one element of the data field;
a first full adder receiving as inputs the value of the data field element excluded from the first and second portions and the least significant digits of the output of the first and second counting means;
additional full adders receiving as inputs, respectively, the more significant digit output of the preceeding full adder and the succeedingly more significant digits of the outputs of the first and second counting means; and
an output device receiving the least significant digit outputs of each full adder and the most significant digit output of the final full adder, the output of the first full adder being the least significant digit of the total and the outputs of successive full adders being the successively more significant digits of the total.
4. Apparatus according to claim 3 wherein the first and second counting means each comprise a plurality of full adders.
5. Apparatus according to claim 4 wherein the full adders comprising each counting means are arranged in a plurality of series, the full adders of the first series counting the occurrences in two to three element subsets of the portion, the full adders of successive series combining the totals of the previous series of full adders.
Claims (10)
1. The method of determining the number of occuRrences of a selected value in a data field having at least fifteen elements, which comprises the steps of 1. dividing the data field into mutually exclusive, exhaustive subsets S1, S2, and S3, where S2 and S3 are of equal length and S1 includes at most one element of the data field; 2. counting the occurrences of the selected value in each of the subsets S2 and S3; 3. adding, by means of a full adder, the number of occurrences of the selected value in subset S1 and the least significant digit of the count of each of the subsets S2 and S3; 4. adding, by means of an additional full adder, the most significant digit of the output of the previous full adder and the next significant digit of the count of each of the subsets S2 and S3; 5. repeating step (4) until all the digits of the count of each of the subsets S2 and S3 have been exhausted, an additional full adder being employed for each addition; and 6. transmitting to an output device the least significant digit of the output of each full adder and both digits of the output of the last full adder, the least significant digit of the output of the first full adder being the least significant digit of the total count, the least significant digits of the outputs of successive full adders being the successive digits of the full count, and the most significant digit of the output of the final full adder being the most significant digit of the full count.
2. The method according to claim 1 wherein the count of each multiple element subset of the data field is determined by the steps of: a. dividing the subset into three mutually exclusive, exhaustive subsets, the first of which has at most one element, a second and third of which are of equal length; b. determining if any subset produced in the immediately preceeding division contains more than three elements; c. dividing all elements produced in the immediately preceeding division which contain more than three elements into three subsets satisfying the conditions of step (a); d. repeating steps (b) and (c) until an ultimate series of subsets no one of which contains more than three elements is obtained; e. summing, by means of full adders, the number of occurrences of the selected value of each ultimate subset having more than one element; and f. by means of additional full adders, progressively combining and adding to the sums the number of occurrences of the selected value in those subsets having one element in the reverse order of their creation in steps (a) through (d) until the total count of each multiple element subset has been achieved.
2. counting the occurrences of the selected value in each of the subsets S2 and S3;
3. adding, by means of a full adder, the number of occurrences of the selected value in subset S1 and the least significant digit of the count of each of the subsets S2 and S3;
3. Apparatus for counting the number of occurrences of a predetermined value in a data field of at least fifteen elements, comprising: first and second counting means for counting the number of occurrences in first and second portions, respectively, of the data field, the first and second portions being non-overlapping, of equal length, and including at least all but one element of the data field; a first full adder receiving as inputs the value of the data field element excluded from the first and second portions and the least significant digits of the output of the first and second counting means; additional full adders receiving as inputs, respectively, the more significant digit output of the preceeding full adder and the succeedingly more significant digits of the outputs of the first and second counting means; and an output device receiving the least significant digit outputs of each full adder and the most significant digit output of the final full adder, the output of the first full adder being the least significant digit of the total and the outputs of successive full adders being the successively more significant digits of the total.
4. Apparatus according to claim 3 wherein the first and second counting means each comprise a plurality of full adders.
4. adding, by means of an additional full adder, the most significant digit of the output of the previous full adder and the next significant digit of the count of each of the subsets S2 and S3;
5. repeating step (4) until all the digits of the count of each of the subsets S2 and S3 have been exhausted, an additional full adder being employed for each addition; and
5. Apparatus according to claim 4 wherein the full adders comprising each counting means are arranged in a plurality of series, the full adders of the first series counting the occurrences in two to three element subsets of the portion, the full adders of successive series combining the totals of the previous series of full adders.
6. transmitting to an output device the least significant digit of the output of each full adder and both digits of the output of the last full adder, the least significant digit of the output of the first full adder being the least significant digit of the total count, the least significant digits of the outputs of successive full adders being the successive digits of the full count, and the most significant digit of the output of the final full adder being the most significant digit of the full count.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12408971A | 1971-03-15 | 1971-03-15 |
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Cited By (84)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2385146A1 (en) * | 1977-03-24 | 1978-10-20 | Western Electric Co | COUNTING CIRCUIT OF THE NUMBER OF "1" IN A DIGITAL WORD |
| US4336600A (en) * | 1979-04-12 | 1982-06-22 | Thomson-Csf | Binary word processing method using a high-speed sequential adder |
| US4399517A (en) * | 1981-03-19 | 1983-08-16 | Texas Instruments Incorporated | Multiple-input binary adder |
| US4488253A (en) * | 1981-05-08 | 1984-12-11 | Itt Industries, Inc. | Parallel counter and application to binary adders |
| EP0195284A2 (en) * | 1985-03-20 | 1986-09-24 | Siemens Aktiengesellschaft | Device for counting the number of 1/0 bits contained in an n-bits binary word |
| US4713786A (en) * | 1985-02-15 | 1987-12-15 | Harris Corporation | Digital hardware selection filter |
| EP0388506A2 (en) * | 1989-03-20 | 1990-09-26 | Digital Equipment Corporation | Normalizer |
| US5148388A (en) * | 1991-05-17 | 1992-09-15 | Advanced Micro Devices, Inc. | 7 to 3 counter circuit |
| WO1996017289A1 (en) * | 1994-12-01 | 1996-06-06 | Intel Corporation | A novel processor having shift operations |
| US5539683A (en) * | 1993-08-10 | 1996-07-23 | Fujitsu Limited | Method and device for processing, and detecting a state of, binary data |
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