US20200212149A1 - Display panel, manufacturing method thereof and display device - Google Patents
Display panel, manufacturing method thereof and display device Download PDFInfo
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- US20200212149A1 US20200212149A1 US16/813,707 US202016813707A US2020212149A1 US 20200212149 A1 US20200212149 A1 US 20200212149A1 US 202016813707 A US202016813707 A US 202016813707A US 2020212149 A1 US2020212149 A1 US 2020212149A1
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- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000005538 encapsulation Methods 0.000 claims abstract description 17
- 239000000463 material Substances 0.000 claims description 17
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000000576 coating method Methods 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 7
- 230000000149 penetrating effect Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 abstract description 157
- 238000009792 diffusion process Methods 0.000 abstract description 29
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- 238000005457 optimization Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
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- 238000000034 method Methods 0.000 description 6
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
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- 238000005530 etching Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
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- H01L27/3246—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H01L51/5206—
-
- H01L51/5256—
-
- H01L51/56—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
- H10K50/81—Anodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/844—Encapsulations
- H10K50/8445—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
- H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H01L2227/323—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/805—Electrodes
- H10K59/8051—Anodes
- H10K59/80515—Anodes characterised by their shape
Definitions
- the present invention relates to a display field, and more particularly to a display panel, a manufacturing method thereof and a display device.
- the Active Matrix Light-Emitting Diode has fast response, high color gamut, high contrast, wide viewing angle, low power consumption, foldability, simple structure and self-illumination, and is more and more widely used in the development of lighting products and panel industry, which is regarded as one of the most promising products.
- PECVD plasma-enhanced chemical vapor deposition
- IJP inkjet printing
- TFE multilayer film encapsulation
- the organic layer and the inorganic layer are alternately arranged to prevent oxidation of the OLED by moisture and oxygen.
- a first retaining wall (Dam) and a second retaining wall on the planarization layer of the edge area of the display panel to control the diffusion range of Ink as shown in FIG. 1 .
- the presence of the first retaining wall and the second retaining wall increases the width of the non-display area in the display panel, thus reducing the screen occupation ratio of the display panel.
- An objective of the present invention is to provide a display panel, which can control the diffusion rate and diffusion range of an organic layer for reducing an edge area of the display panel to increase a screen occupation ratio.
- the display panel of the present invention comprises a substrate, and a planarization layer, an anode layer, a pixel definition layer, a cathode layer and an encapsulation layer sequentially stacked on the substrate; wherein outside a display area of the display panel, the pixel definition layer comprises a retaining wall group disposed on the anode layer, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, and the retaining wall group comprises a first side close to the display area of the display panel and a second side away from the display area of the display panel, wherein spaces of the plurality of the sub-retaining walls, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side to the second side.
- the sub-retaining walls are protrusions disposed on the anode layer, and a height of the protrusions is 5 ⁇ m to 15 ⁇ m.
- the anode layer is provided with a plurality of anode holes penetrating through the anode layer, and the sub-retaining walls are correspondingly disposed in the anode holes and protrude from the anode layer, and the sub-retaining walls pass through the anode layer and are connected with the planarization layer and the cathode layer.
- the sub-retaining walls comprise first sub-retaining walls and second sub-retaining walls, and the first sub-retaining walls are arranged at intervals along an extending direction perpendicular to a direction from the first side to the second side, and an interval between two first sub-retaining walls is a first space, and the second sub-retaining walls are arranged at intervals along the extending direction perpendicular to the direction from the first side to the second side, and one of the second sub-retaining walls is arranged corresponding to the interval between the two first sub-retaining walls, and a width of the sub-retaining walls is greater than or equal to a width of the first space.
- the sub-retaining walls further comprise at least one third sub-retaining wall disposed close to the second side, and the third sub-retaining wall has a width greater than a sum of a width of the first sub-retaining wall and a width of the second sub-retaining wall.
- the pixel definition layer comprises an edge retaining wall on a side of the retaining wall group away from the display area of the display panel, and the edge retaining wall is spaced apart from the retaining wall group.
- a spacer layer is stacked on the pixel definition layer, and each of the sub-retaining walls comprises a first portion and a second portion stacked on the first portion, and the first portion is disposed in a same layer as the pixel definition layer, and the second portion is disposed in a same layer as the spacer layer.
- the manufacturing method of the display panel for manufacturing the aforesaid display panel comprises:
- the pixel definition layer outside a display area of the display panel comprises a retaining wall group
- the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart
- the retaining wall group comprises a first side close to the display area of the display panel and a second side away from the display area, wherein spaces of the plurality of the sub-retaining walls, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side to the second side;
- Forming the anode layer on the substrate and the planarization layer comprises:
- the pixel definition layer outside a display area of the display panel comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, comprises:
- a pixel material layer on the anode layer and the planarization layer, and patterning the pixel material layer to form a pixel definition layer, wherein the pixel material layer outside the display area of the display panel is patterned to form the retaining wall group, and the sub-retaining walls of the retaining wall group are correspondingly disposed in the anode holes and protrude from the anode layer.
- the display device of the present invention comprises the aforesaid display panel.
- the diffusion rate and diffusion range of the organic layer in the encapsulation layer are controlled by performing anode hole optimization in the anode layer to form staggered sub-retaining walls, thereby reducing a number of edge retaining walls of the display panel and reducing an edge area of the display panel to increase a screen occupation ratio.
- FIG. 1 is a plan view structural diagram of a conventional display panel outside a display area.
- FIG. 2 is a sectional diagram of a display panel according to the present invention.
- FIG. 3 is a plan view structural diagram of the first embodiment of the display panel shown in FIG. 2 .
- FIG. 4 is a partial structural diagram of the display panel shown in FIG. 2 .
- FIG. 5 is a distribution structure diagram of anode holes outside the display area of the display panel in FIG. 2 .
- FIG. 6 is a plan view structural diagram of the second embodiment of the display panel shown in FIG. 2 .
- FIG. 7 is a plan view structural diagram of the third embodiment of the display panel shown in FIG. 2 .
- FIG. 8 is a plan view structural diagram of the fourth embodiment of the display panel shown in FIG. 2 .
- FIG. 9 is a flowchart of a manufacturing method of a display panel according to the present invention.
- the present invention provides a display panel.
- the display panel is an AMOLED (Active Matrix Organic Light Emitting Diode).
- the display panel 100 comprises a display area 101 and an edge area 102 , and the edge area 102 refers to an area outside the display area 102 of the display panel 100 .
- the display panel 100 comprises a substrate 10 , and a planarization layer 20 , an anode layer 31 , a pixel definition layer 32 , a cathode layer 33 and an encapsulation layer 40 which are sequentially stacked on the substrate 10 .
- the pixel definition layer 32 comprises a retaining wall group disposed on the anode layer 31
- the retaining wall group comprises a plurality of sub-retaining walls 50 which are spaced apart
- the retaining wall group comprises a first side 501 close to the display area 101 of the display panel 100 and a second side 502 away from the display area 101 of the display panel 100 , wherein spaces of the plurality of the sub-retaining walls 50 , which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side 501 to the second side 502 to extend a flow path of organic material to the edge region 102 during encapsulation, thereby effectively controlling the diffusion rate and diffusion
- the substrate 10 comprises a flexible substrate 11 made of PI (Polyimide) and a thin film transistor layer 12 laminated on the flexible substrate 11 .
- the first side 501 and the second side 502 of the retaining wall group are opposite and parallel, and both are perpendicular to an extending direction from the display area 101 to the edge area 102 .
- the path formed by the plurality of sub-retaining walls 50 does not include a linear distance from the first side 501 to the second side 502 .
- a plurality of sub-retaining walls arranged in a staggered arrangement are formed on the planarization layer outside the display area of the display panel of the present invention.
- the spaces of the plurality of sub-retaining walls form a path.
- the diffusion rate and the diffusion range of the organic layer can be effectively controlled to reduce the amount of organic material diffused to the outermost side of the edge area, and to reduce the number of the retaining walls for retaining the organic material in the edge area, thereby reducing the edge area of the display panel and increasing the screen occupation ratio of the display panel.
- the encapsulation layer 40 comprises a first inorganic layer 41 , an organic layer 42 covering the first inorganic layer 41 and a second inorganic layer 43 on the organic layer 42 .
- the encapsulation layer is formed by alternately stacking an inorganic layer, an organic layer and an inorganic layer, and may be stacking 3 or 5 layers.
- the inorganic layer is a combination of SiOx, SiNx or other inorganic materials.
- the organic layer is formed by uniformly coating a molten material (hereinafter referred to as Ink), which can block moisture between two inorganic layers by an IJP (Inject Printer) technology, and can flatten the surface of the display panel and increase the bendability of the display panel.
- Ink molten material
- the encapsulation layer 40 is stacked on the cathode layer 33 for encapsulating the display panel to prevent the display panel from being attacked by moisture and oxygen.
- the sub-retaining walls 50 are protrusions disposed on the anode layer 31 , and a height of the protrusions is 5 ⁇ m to 15 ⁇ m for controlling the diffusion rate and diffusion range of Ink.
- the sub-retaining walls 50 comprise first sub-retaining walls 51 and second sub-retaining walls 52 .
- the first sub-retaining walls 51 are arranged at intervals along an extending direction perpendicular to a direction from the first side 501 to the second side 502 , and an interval between two first sub-retaining walls 51 is a first space 511
- the second sub-retaining walls 52 are arranged at intervals along the extending direction perpendicular to the direction from the first side 501 to the second side 502
- one of the second sub-retaining walls 52 is arranged corresponding to the interval between the two first sub-retaining walls 51
- a width of the sub-retaining walls 52 is greater than or equal to a width of the first space 511 .
- the plurality of first sub-retaining walls 51 forms a plurality of first sub-retaining wall groups
- the plurality of the second sub-retaining walls 52 forms a plurality of second sub-retaining wall groups; along the extending direction from the first side 501 to the second side 502 , the plurality of first sub-retaining wall groups and the plurality of second sub-retaining wall groups are spaced apart.
- the anode layer 31 is provided with a plurality of anode holes 311 penetrating through the anode layer 31 , and the sub-retaining walls 50 are correspondingly disposed in the anode holes 311 and protrudes from the anode layer 31 , and the sub-retaining walls 50 pass through the anode layer 31 and are connected with the planarization layer 20 and the cathode layer 33 .
- the anode holes 311 include first anode holes 312 and second anode holes 313 .
- a plurality of the first anode holes 312 are arranged at intervals along the Y-axis direction in the figure.
- One of the second anode holes 313 is arranged corresponding to the space 3121 between the two first anode holes 312 , and a width of the second anode holes 313 is greater than or equal to a width of the space 3122 .
- a width of the first anode hole 312 and the second anode hole 313 is defined as X 1
- a width of the space between the first anode hole 312 and the second anode hole 313 is defined as X 2
- a width of the first anode hole 312 is defined as Y 1
- a width of the space between the adjacent two first anode holes 312 is defined as Y 2
- the space between the adjacent two second anode holes 313 is defined as Y 3
- a width of the second anode hole 313 is defined as Y 4
- the sub-retaining walls 50 have a one-to-one correspondence with the anode holes 311 .
- the first sub-retaining wall 51 is located in the first anode hole 312
- the second sub-retaining wall 52 is located in the second anode hole 313 .
- the size of the anode hole 311 changes, the size of the sub-retaining wall 50 also changes accordingly, and the paths formed by the spaces of the plurality of spaced sub-retaining walls 50 are different, and the degree of control over the diffusion rate and the diffusion range of the organic material will also be different. Please refer to FIG. 3 , again.
- the first sub-retaining wall 51 and the second sub-retaining wall 52 have the same size, that is, the first anode hole 312 and the second anode hole 313 have the same size.
- Ink flows from a first space 511 between two first sub-retaining walls 51 of a first sub-retaining wall group to a space between two second sub-retaining walls 52 of a second sub-retaining wall group, and then Ink flows to a first space 511 of another first sub-retaining wall group.
- the diffusion path of Ink increases significantly, and as Ink diffuses from the first side 501 to the second side 502 , the diffusion rate of Ink gradually decreases.
- the pixel definition layer 32 comprises an edge retaining wall 60 on a side of the retaining wall group away from the display area 101 of the display panel 100 , and the edge retaining wall 60 is spaced apart from the retaining wall group to restrict the diffusion range of the Ink flowing out of the retaining wall group and to reduce the number of retaining walls at the edge of the conventional display panel, thereby reducing the edge area 102 and increasing the screen occupation ratio.
- the edge retaining wall 60 passes through the anode layer 31 and is connected with the planarization layer 20 and the encapsulation layer 40 .
- a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line in FIG. 3 .
- the difference from the first embodiment is that the size of the first sub-retaining wall 51 is smaller than the size of the second sub-retaining wall 52 , that is, the size of the first anode hole 312 is smaller than the size of the second anode hole 313 .
- Ink flows in the path formed by the sub-retaining walls 50 which are disposed at intervals. Compared with FIG. 1 , the diffusion path of Ink is significantly increased, and the diffusion rate of the organic layer 42 can be effectively controlled.
- the edge retaining wall 60 of the pixel definition layer 32 on the side of the retaining wall group away from the display area 101 of the display panel 100 restricts the diffusion range of the Ink flowing out of the retaining wall group and to reduce the number of retaining walls at the edge of the conventional display panel, thereby reducing the edge area 102 and increasing the screen occupation ratio.
- a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line in FIG. 6 .
- the difference from the aforesaid two embodiments is that the sub-retaining walls 50 comprise at least one third sub-retaining wall 53 , and the third sub-retaining wall 53 passes through the anode layer 31 , and is connected with the planarization layer 20 and the cathode layer 33 , and is perpendicular to the extending direction from the first side 501 to the second side, and a width of the third sub-retaining wall 53 is greater than the width of the first sub-retaining wall 51 and the width of the second sub-retaining wall 52 .
- the anode holes 311 comprise at least one third anode hole, and in the X-axis direction, the width of the third anode hole is larger than the width of the first anode hole 312 and the width of the second anode hole 313 .
- the sub-retaining walls 50 include a third sub-retaining wall 53 .
- the third sub-retaining wall 53 is an entire retaining wall that completely retains ink flowing out of the first sub-retaining walls 51 and the second sub-retaining walls 52 .
- the edge retaining wall in the edge area of the conventional display panel is completely eliminated for greatly reducing the size of the edge area 102 , and further increasing the screen occupation ratio.
- a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line in FIG. 7 .
- the sub-retaining walls 50 include a plurality of third sub-retaining walls 53 .
- the plurality of the third sub-retaining walls 53 are spaced apart at interval, and a width of each of the third sub-retaining walls 53 is equal to a sum of a width of three of the first sub-retaining walls 51 and a width of two of the first spacers 511 .
- the arrangement of the plurality of the third sub-retaining walls 53 further retains the Ink flowing out from the first sub-retaining wall 51 and the second sub-retaining wall 52 , so that the flow path of Ink is further increased, which is more advantageous for controlling the diffusion rate and the diffusion range of Ink. Meanwhile, the arrangement of the plurality of the third sub-retaining walls is advantageous for improving the display flexibility of the display panel and reducing the bending radius of the display panel.
- each of the sub-retaining walls 50 in the retaining wall group is formed in the same process with the pixel definition layer 32 .
- a spacer layer is further stacked on the pixel definition layer 32 , and each of the sub-retaining walls comprises a first portion and a second portion stacked on the first portion, and the first portion is disposed in the same process with the pixel definition layer 32 , and the second portion is disposed in the same process with the spacer layer.
- the present invention further provides a manufacturing method of a display panel for manufacturing the aforesaid panel, comprises:
- Step S 1 forming a planarization layer 20 on a substrate 10 .
- the substrate 10 comprises a flexible substrate 11 made of PI (Polyimide) and a thin film transistor layer 12 laminated on the flexible substrate 11 .
- PI Polyimide
- Step S 2 forming an anode layer 31 on the substrate 10 and the planarization layer 20 .
- the step specifically comprises: coating a metal layer on the substrate 10 and the planarization layer 20 , and patterning the metal layer to form the anode layer 31 , and forming anode holes 311 penetrating through the anode layer 31 and being spaced apart outside the display area 101 of the display panel 100 .
- the patterning process includes coating, photomasking, etching and development.
- Step S 3 forming a pixel definition layer 32 on the anode layer 31 and the planarization layer 20 .
- the pixel definition layer 32 outside a display area 101 of the display panel 100 comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls 50 which are spaced apart, and the retaining wall group comprises a first side 501 close to the display area 101 of the display panel 100 and a second side 502 away from the display area 101 , wherein spaces of the plurality of the sub-retaining walls 50 , which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side 501 to the second side 502 .
- the aforesaid step comprises: coating a pixel material layer on the anode layer 31 and the planarization layer 20 , and patterning the pixel material layer to form a pixel definition layer 32 , wherein the pixel material layer outside the display area 101 of the display panel 100 is patterned to form the retaining wall group, and the sub-retaining walls 50 of the retaining wall group are correspondingly disposed in the anode holes 311 and protrude from the anode layer 31 .
- Step S 4 forming a cathode layer 33 on the pixel definition layer 32 and the retaining wall group. Specifically, a metal layer is coated on the surface of the pixel definition layer 32 and each of the sub-retaining walls 50 to form a cathode layer 33 .
- Step S 5 forming an encapsulation layer 40 on the cathode layer 33 .
- the encapsulation layer 40 comprises a first inorganic layer 41 , an organic layer 42 covering the first inorganic layer 41 and a second inorganic layer 43 on the organic layer 42 .
- the encapsulation layer 40 is stacked on the cathode layer 33 for encapsulating the display panel to prevent the display panel from being attacked by moisture and oxygen.
- the present invention further provides a manufacturing method of a display panel, which is different from the foregoing manufacturing method of the display panel, the step of forming the pixel definition layer 32 on the anode layer 31 and the planarization layer 20 specifically comprises: coating a pixel material layer on the anode layer 31 and the planarization layer 20 , and patterning the pixel material layer to form a pixel definition layer 32 and a first portion of each of the sub-retaining walls 50 located within each of the anode holes 311 , and then coating a barrier material layer on the pixel definition layer 32 and the first portion of each of the sub-retaining walls 50 , and patterning the barrier material layer to form a barrier layer and a second portion of each of the sub-retaining walls 50 stacked on the first portion of each of the sub-retaining walls 50 .
- each of the sub-retaining walls 50 is formed while forming the pixel definition layer 31 and the barrier layer, without adding an additional process and without increasing the manufacturing cost.
- the pixel material layer 32 and the barrier material layer are patterned to form the first portion and the second portion of each of the sub-retaining walls 50 by etching.
- the present invention further provides a display device, comprising the aforesaid display panel.
- the diffusion rate and diffusion range of the organic layer material in the encapsulation layer are controlled by forming staggered sub-retaining walls, thereby reducing the number of edge retaining walls of the display panel and reducing the size of the edge area of the display panel to increase a screen occupation ratio.
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Abstract
Provided is a display panel, comprising: a substrate, and a planarization layer, an anode layer, a pixel definition layer, a cathode layer and an encapsulation layer sequentially stacked on the substrate; wherein in an edge area of the display panel, the pixel definition layer comprises a retaining wall group on the anode layer, comprising sub-retaining walls which are spaced apart, and the retaining wall group comprises a first side close to a display area and a second side away therefrom, wherein spaces of the sub-retaining walls form a path with a length greater than a straight line distance from the first side to the second side. The diffusion rate and diffusion range of the organic layer are controlled by performing anode hole optimization to form staggered sub-retaining walls, thereby reducing a number of edge retaining walls and reducing the edge area to increase a screen occupation ratio.
Description
- This is a divisional application of co-pending U.S. patent application Ser. No. 16/125,196, filed on Sep. 7, 2018, which is a continuing application of PCT Patent Application No. PCT/CN2018/089050 entitled “Display panel, manufacturing method thereof and display device”, filed on May 30, 2018, which claims priority to Chinese Patent Application No. 201810193576.2, filed on Mar. 9, 2018.
- The present invention relates to a display field, and more particularly to a display panel, a manufacturing method thereof and a display device.
- In the current field of illumination and display, the Active Matrix Light-Emitting Diode (AMOLED) has fast response, high color gamut, high contrast, wide viewing angle, low power consumption, foldability, simple structure and self-illumination, and is more and more widely used in the development of lighting products and panel industry, which is regarded as one of the most promising products.
- Since OLED devices are extremely sensitive to moisture and oxygen, plasma-enhanced chemical vapor deposition (PECVD) and inkjet printing (IJP) are widely used to alternately deposit polymer organic films and inorganic films on the surface of the OLED to form a multilayer film encapsulation (TFE) structure, in which the organic layer and the inorganic layer are alternately arranged to prevent oxidation of the OLED by moisture and oxygen. However, due to the flow of the organic layer material on the surface of the OLED, it is often necessary to design a first retaining wall (Dam) and a second retaining wall on the planarization layer of the edge area of the display panel to control the diffusion range of Ink as shown in
FIG. 1 . However, the presence of the first retaining wall and the second retaining wall increases the width of the non-display area in the display panel, thus reducing the screen occupation ratio of the display panel. - An objective of the present invention is to provide a display panel, which can control the diffusion rate and diffusion range of an organic layer for reducing an edge area of the display panel to increase a screen occupation ratio.
- Further provided are a manufacturing method of a display panel and a display device.
- The display panel of the present invention comprises a substrate, and a planarization layer, an anode layer, a pixel definition layer, a cathode layer and an encapsulation layer sequentially stacked on the substrate; wherein outside a display area of the display panel, the pixel definition layer comprises a retaining wall group disposed on the anode layer, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, and the retaining wall group comprises a first side close to the display area of the display panel and a second side away from the display area of the display panel, wherein spaces of the plurality of the sub-retaining walls, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side to the second side.
- The sub-retaining walls are protrusions disposed on the anode layer, and a height of the protrusions is 5 μm to 15 μm.
- The anode layer is provided with a plurality of anode holes penetrating through the anode layer, and the sub-retaining walls are correspondingly disposed in the anode holes and protrude from the anode layer, and the sub-retaining walls pass through the anode layer and are connected with the planarization layer and the cathode layer.
- The sub-retaining walls comprise first sub-retaining walls and second sub-retaining walls, and the first sub-retaining walls are arranged at intervals along an extending direction perpendicular to a direction from the first side to the second side, and an interval between two first sub-retaining walls is a first space, and the second sub-retaining walls are arranged at intervals along the extending direction perpendicular to the direction from the first side to the second side, and one of the second sub-retaining walls is arranged corresponding to the interval between the two first sub-retaining walls, and a width of the sub-retaining walls is greater than or equal to a width of the first space.
- The sub-retaining walls further comprise at least one third sub-retaining wall disposed close to the second side, and the third sub-retaining wall has a width greater than a sum of a width of the first sub-retaining wall and a width of the second sub-retaining wall.
- The pixel definition layer comprises an edge retaining wall on a side of the retaining wall group away from the display area of the display panel, and the edge retaining wall is spaced apart from the retaining wall group.
- A spacer layer is stacked on the pixel definition layer, and each of the sub-retaining walls comprises a first portion and a second portion stacked on the first portion, and the first portion is disposed in a same layer as the pixel definition layer, and the second portion is disposed in a same layer as the spacer layer.
- The manufacturing method of the display panel for manufacturing the aforesaid display panel, comprises:
- forming a planarization layer on a substrate;
- forming an anode layer on the substrate and the planarization layer;
- forming a pixel definition layer on the anode layer and the planarization layer, wherein the pixel definition layer outside a display area of the display panel comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, and the retaining wall group comprises a first side close to the display area of the display panel and a second side away from the display area, wherein spaces of the plurality of the sub-retaining walls, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side to the second side;
- forming a cathode layer on the pixel definition layer and the retaining wall group;
- forming an encapsulation layer on the cathode layer.
- Forming the anode layer on the substrate and the planarization layer comprises:
- coating a metal layer on the substrate and the planarization layer, and patterning the metal layer to form the anode layer, and forming anode holes penetrating through the anode layer and being spaced apart outside the display area of the display panel;
- forming the pixel definition layer on the anode layer and the planarization layer, wherein the pixel definition layer outside a display area of the display panel comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, comprises:
- coating a pixel material layer on the anode layer and the planarization layer, and patterning the pixel material layer to form a pixel definition layer, wherein the pixel material layer outside the display area of the display panel is patterned to form the retaining wall group, and the sub-retaining walls of the retaining wall group are correspondingly disposed in the anode holes and protrude from the anode layer.
- The display device of the present invention comprises the aforesaid display panel.
- In the display panel, the diffusion rate and diffusion range of the organic layer in the encapsulation layer are controlled by performing anode hole optimization in the anode layer to form staggered sub-retaining walls, thereby reducing a number of edge retaining walls of the display panel and reducing an edge area of the display panel to increase a screen occupation ratio.
- In order to more clearly illustrate the embodiments of the present invention or prior art, the following figures will be described in the embodiments are briefly introduced. It is obvious that the drawings are merely some embodiments of the present invention, those of ordinary skill in this field can obtain other figures according to these figures without paying the premise.
-
FIG. 1 is a plan view structural diagram of a conventional display panel outside a display area. -
FIG. 2 is a sectional diagram of a display panel according to the present invention. -
FIG. 3 is a plan view structural diagram of the first embodiment of the display panel shown inFIG. 2 . -
FIG. 4 is a partial structural diagram of the display panel shown inFIG. 2 . -
FIG. 5 is a distribution structure diagram of anode holes outside the display area of the display panel inFIG. 2 . -
FIG. 6 is a plan view structural diagram of the second embodiment of the display panel shown inFIG. 2 . -
FIG. 7 is a plan view structural diagram of the third embodiment of the display panel shown inFIG. 2 . -
FIG. 8 is a plan view structural diagram of the fourth embodiment of the display panel shown inFIG. 2 . -
FIG. 9 is a flowchart of a manufacturing method of a display panel according to the present invention. - Embodiments of the present invention are described in detail with the technical matters, structural features, achieved objects, and effects with reference to the accompanying drawings as follows. It is clear that the described embodiments are part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments to those of ordinary skill in the premise of no creative efforts obtained, should be considered within the scope of protection of the present invention.
- Please refer to
FIG. 2 andFIG. 3 . The present invention provides a display panel. The display panel is an AMOLED (Active Matrix Organic Light Emitting Diode). Thedisplay panel 100 comprises adisplay area 101 and anedge area 102, and theedge area 102 refers to an area outside thedisplay area 102 of thedisplay panel 100. Thedisplay panel 100 comprises asubstrate 10, and aplanarization layer 20, ananode layer 31, apixel definition layer 32, acathode layer 33 and anencapsulation layer 40 which are sequentially stacked on the substrate 10.Outside adisplay area 101 of thedisplay panel 100, thepixel definition layer 32 comprises a retaining wall group disposed on theanode layer 31, and the retaining wall group comprises a plurality ofsub-retaining walls 50 which are spaced apart, and the retaining wall group comprises afirst side 501 close to thedisplay area 101 of thedisplay panel 100 and asecond side 502 away from thedisplay area 101 of thedisplay panel 100, wherein spaces of the plurality of thesub-retaining walls 50, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from thefirst side 501 to thesecond side 502 to extend a flow path of organic material to theedge region 102 during encapsulation, thereby effectively controlling the diffusion rate and diffusion range of the organic material. Thesubstrate 10 comprises aflexible substrate 11 made of PI (Polyimide) and a thinfilm transistor layer 12 laminated on theflexible substrate 11. Thefirst side 501 and thesecond side 502 of the retaining wall group are opposite and parallel, and both are perpendicular to an extending direction from thedisplay area 101 to theedge area 102. The path formed by the plurality ofsub-retaining walls 50 does not include a linear distance from thefirst side 501 to thesecond side 502. - On the planarization layer outside the display area of the display panel of the present invention, a plurality of sub-retaining walls arranged in a staggered arrangement are formed. The spaces of the plurality of sub-retaining walls form a path. When the display panel is encapsulated, and the organic material in the encapsulation layer diffuses from the display area to the edge area, the organic material diffuses along the path formed by the spaces of the sub-retaining walls. The length of the flow path of the organic layer in the display panel of the present invention is increased compared to the linear diffusion of the organic layer in the conventional display panel. The diffusion rate and the diffusion range of the organic layer can be effectively controlled to reduce the amount of organic material diffused to the outermost side of the edge area, and to reduce the number of the retaining walls for retaining the organic material in the edge area, thereby reducing the edge area of the display panel and increasing the screen occupation ratio of the display panel.
- In the present invention, the
encapsulation layer 40 comprises a firstinorganic layer 41, anorganic layer 42 covering the firstinorganic layer 41 and a secondinorganic layer 43 on theorganic layer 42. Generally, the encapsulation layer is formed by alternately stacking an inorganic layer, an organic layer and an inorganic layer, and may be stacking 3 or 5 layers. The inorganic layer is a combination of SiOx, SiNx or other inorganic materials. The organic layer is formed by uniformly coating a molten material (hereinafter referred to as Ink), which can block moisture between two inorganic layers by an IJP (Inject Printer) technology, and can flatten the surface of the display panel and increase the bendability of the display panel. Theencapsulation layer 40 is stacked on thecathode layer 33 for encapsulating the display panel to prevent the display panel from being attacked by moisture and oxygen. - Please refer to
FIG. 4 , together. Thesub-retaining walls 50 are protrusions disposed on theanode layer 31, and a height of the protrusions is 5 μm to 15 μm for controlling the diffusion rate and diffusion range of Ink. Thesub-retaining walls 50 comprise firstsub-retaining walls 51 and secondsub-retaining walls 52. The firstsub-retaining walls 51 are arranged at intervals along an extending direction perpendicular to a direction from thefirst side 501 to thesecond side 502, and an interval between two firstsub-retaining walls 51 is afirst space 511, and the secondsub-retaining walls 52 are arranged at intervals along the extending direction perpendicular to the direction from thefirst side 501 to thesecond side 502, and one of the secondsub-retaining walls 52 is arranged corresponding to the interval between the two firstsub-retaining walls 51, and a width of thesub-retaining walls 52 is greater than or equal to a width of thefirst space 511. Specifically, in a direction perpendicular to the direction from thefirst side 501 to thesecond side 502, the plurality of firstsub-retaining walls 51 forms a plurality of first sub-retaining wall groups, and the plurality of the secondsub-retaining walls 52 forms a plurality of second sub-retaining wall groups; along the extending direction from thefirst side 501 to thesecond side 502, the plurality of first sub-retaining wall groups and the plurality of second sub-retaining wall groups are spaced apart. - Please refer to FIG, together. The
anode layer 31 is provided with a plurality ofanode holes 311 penetrating through theanode layer 31, and thesub-retaining walls 50 are correspondingly disposed in the anode holes 311 and protrudes from theanode layer 31, and thesub-retaining walls 50 pass through theanode layer 31 and are connected with theplanarization layer 20 and thecathode layer 33. Outside thedisplay area 101 of thedisplay panel 100, the anode holes 311 include first anode holes 312 and second anode holes 313. A plurality of the first anode holes 312 are arranged at intervals along the Y-axis direction in the figure. One of the second anode holes 313 is arranged corresponding to the space 3121 between the two first anode holes 312, and a width of the second anode holes 313 is greater than or equal to a width of the space 3122. In the present invention, in the Y-axis direction, a width of the first anode hole 312 and the second anode hole 313 is defined as X1, and a width of the space between the first anode hole 312 and the second anode hole 313 is defined as X2; in the X-axis direction, a width of the first anode hole 312 is defined as Y1, and a width of the space between the adjacent two first anode holes 312 is defined as Y2, and the space between the adjacent two second anode holes 313 is defined as Y3, and a width of the second anode hole 313 is defined as Y4, and a misalignment width of the first anode hole 312 and the second anode hole 313 along the X-axis direction is defined as Y5, wherein Y2=αY1, Y3=βY4, Y5=γY4, X2=δX1, and α, β, γ, δ=0.1 to 0.3, then Y2<Y4, Y3<Y1, Y2+2Y1=Y4+2(Y3+Y5), and Y4=[(2β+2γ+1)/(α+2)]Y1 can be derived, and thus, the values of the two hole density coefficients of the anode holes 311 in the anode layer 31 in the present invention can be determined as Y2/(Y1+Y2) and Y3/(Y4+Y3), respectively. - Specifically, the
sub-retaining walls 50 have a one-to-one correspondence with the anode holes 311. The firstsub-retaining wall 51 is located in thefirst anode hole 312, and the secondsub-retaining wall 52 is located in thesecond anode hole 313. When the size of theanode hole 311 changes, the size of thesub-retaining wall 50 also changes accordingly, and the paths formed by the spaces of the plurality of spacedsub-retaining walls 50 are different, and the degree of control over the diffusion rate and the diffusion range of the organic material will also be different. Please refer toFIG. 3 , again. In the first embodiment of the present invention, the firstsub-retaining wall 51 and the secondsub-retaining wall 52 have the same size, that is, thefirst anode hole 312 and thesecond anode hole 313 have the same size. As shown inFIG. 3 , Ink flows from afirst space 511 between two firstsub-retaining walls 51 of a first sub-retaining wall group to a space between two secondsub-retaining walls 52 of a second sub-retaining wall group, and then Ink flows to afirst space 511 of another first sub-retaining wall group. In comparison withFIG. 1 , the diffusion path of Ink increases significantly, and as Ink diffuses from thefirst side 501 to thesecond side 502, the diffusion rate of Ink gradually decreases. Outside thedisplay area 101 of thedisplay panel 100, thepixel definition layer 32 comprises anedge retaining wall 60 on a side of the retaining wall group away from thedisplay area 101 of thedisplay panel 100, and theedge retaining wall 60 is spaced apart from the retaining wall group to restrict the diffusion range of the Ink flowing out of the retaining wall group and to reduce the number of retaining walls at the edge of the conventional display panel, thereby reducing theedge area 102 and increasing the screen occupation ratio. Theedge retaining wall 60 passes through theanode layer 31 and is connected with theplanarization layer 20 and theencapsulation layer 40. In the present embodiment, a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line inFIG. 3 . - As shown in
FIG. 6 , in the second embodiment of the present invention, the difference from the first embodiment is that the size of the firstsub-retaining wall 51 is smaller than the size of the secondsub-retaining wall 52, that is, the size of thefirst anode hole 312 is smaller than the size of thesecond anode hole 313. Similarly, Ink flows in the path formed by thesub-retaining walls 50 which are disposed at intervals. Compared withFIG. 1 , the diffusion path of Ink is significantly increased, and the diffusion rate of theorganic layer 42 can be effectively controlled. Outside thedisplay area 101 of thedisplay panel 100, theedge retaining wall 60 of thepixel definition layer 32 on the side of the retaining wall group away from thedisplay area 101 of thedisplay panel 100 restricts the diffusion range of the Ink flowing out of the retaining wall group and to reduce the number of retaining walls at the edge of the conventional display panel, thereby reducing theedge area 102 and increasing the screen occupation ratio. In the present embodiment, a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line inFIG. 6 . - In other embodiments of the present invention, the difference from the aforesaid two embodiments is that the
sub-retaining walls 50 comprise at least one thirdsub-retaining wall 53, and the thirdsub-retaining wall 53 passes through theanode layer 31, and is connected with theplanarization layer 20 and thecathode layer 33, and is perpendicular to the extending direction from thefirst side 501 to the second side, and a width of the thirdsub-retaining wall 53 is greater than the width of the firstsub-retaining wall 51 and the width of the secondsub-retaining wall 52. Namely, the anode holes 311 comprise at least one third anode hole, and in the X-axis direction, the width of the third anode hole is larger than the width of thefirst anode hole 312 and the width of thesecond anode hole 313. - As shown in
FIG. 7 , in the third embodiment of the present invention, thesub-retaining walls 50 include a thirdsub-retaining wall 53. The thirdsub-retaining wall 53 is an entire retaining wall that completely retains ink flowing out of the firstsub-retaining walls 51 and the secondsub-retaining walls 52. The edge retaining wall in the edge area of the conventional display panel is completely eliminated for greatly reducing the size of theedge area 102, and further increasing the screen occupation ratio. In the present embodiment, a diffusion path of Ink in the Y-axis direction in the retaining wall group is indicated by a broken line inFIG. 7 . - As shown in
FIG. 8 , in the fourth embodiment of the present invention, thesub-retaining walls 50 include a plurality of thirdsub-retaining walls 53. In a direction perpendicular to the direction from thefirst side 501 to thesecond side 502, the plurality of the thirdsub-retaining walls 53 are spaced apart at interval, and a width of each of the thirdsub-retaining walls 53 is equal to a sum of a width of three of the firstsub-retaining walls 51 and a width of two of thefirst spacers 511. The arrangement of the plurality of the thirdsub-retaining walls 53 further retains the Ink flowing out from the firstsub-retaining wall 51 and the secondsub-retaining wall 52, so that the flow path of Ink is further increased, which is more advantageous for controlling the diffusion rate and the diffusion range of Ink. Meanwhile, the arrangement of the plurality of the third sub-retaining walls is advantageous for improving the display flexibility of the display panel and reducing the bending radius of the display panel. - Specifically, each of the
sub-retaining walls 50 in the retaining wall group is formed in the same process with thepixel definition layer 32. It can be understood that a spacer layer is further stacked on thepixel definition layer 32, and each of the sub-retaining walls comprises a first portion and a second portion stacked on the first portion, and the first portion is disposed in the same process with thepixel definition layer 32, and the second portion is disposed in the same process with the spacer layer. Forming each of the sub-retaining walls while forming the pixel definition layer and/or the spacer layer saves the manufacturing cost of the display panel and improves the competitiveness of the product. - As shown in
FIG. 9 , the present invention further provides a manufacturing method of a display panel for manufacturing the aforesaid panel, comprises: - Step S1, forming a
planarization layer 20 on asubstrate 10. Thesubstrate 10 comprises aflexible substrate 11 made of PI (Polyimide) and a thinfilm transistor layer 12 laminated on theflexible substrate 11. - Step S2, forming an
anode layer 31 on thesubstrate 10 and theplanarization layer 20. The step specifically comprises: coating a metal layer on thesubstrate 10 and theplanarization layer 20, and patterning the metal layer to form theanode layer 31, and forminganode holes 311 penetrating through theanode layer 31 and being spaced apart outside thedisplay area 101 of thedisplay panel 100. The patterning process includes coating, photomasking, etching and development. - Step S3, forming a
pixel definition layer 32 on theanode layer 31 and the planarization layer 20.Thepixel definition layer 32 outside adisplay area 101 of thedisplay panel 100 comprises a retaining wall group, and the retaining wall group comprises a plurality ofsub-retaining walls 50 which are spaced apart, and the retaining wall group comprises afirst side 501 close to thedisplay area 101 of thedisplay panel 100 and asecond side 502 away from thedisplay area 101, wherein spaces of the plurality of thesub-retaining walls 50, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from thefirst side 501 to thesecond side 502. Specifically, the aforesaid step comprises: coating a pixel material layer on theanode layer 31 and theplanarization layer 20, and patterning the pixel material layer to form apixel definition layer 32, wherein the pixel material layer outside thedisplay area 101 of thedisplay panel 100 is patterned to form the retaining wall group, and thesub-retaining walls 50 of the retaining wall group are correspondingly disposed in the anode holes 311 and protrude from theanode layer 31. - Step S4, forming a
cathode layer 33 on thepixel definition layer 32 and the retaining wall group. Specifically, a metal layer is coated on the surface of thepixel definition layer 32 and each of thesub-retaining walls 50 to form acathode layer 33. - Step S5, forming an
encapsulation layer 40 on thecathode layer 33. In the present embodiment, theencapsulation layer 40 comprises a firstinorganic layer 41, anorganic layer 42 covering the firstinorganic layer 41 and a secondinorganic layer 43 on theorganic layer 42. Theencapsulation layer 40 is stacked on thecathode layer 33 for encapsulating the display panel to prevent the display panel from being attacked by moisture and oxygen. - The present invention further provides a manufacturing method of a display panel, which is different from the foregoing manufacturing method of the display panel, the step of forming the
pixel definition layer 32 on theanode layer 31 and theplanarization layer 20 specifically comprises: coating a pixel material layer on theanode layer 31 and theplanarization layer 20, and patterning the pixel material layer to form apixel definition layer 32 and a first portion of each of thesub-retaining walls 50 located within each of the anode holes 311, and then coating a barrier material layer on thepixel definition layer 32 and the first portion of each of thesub-retaining walls 50, and patterning the barrier material layer to form a barrier layer and a second portion of each of thesub-retaining walls 50 stacked on the first portion of each of thesub-retaining walls 50. With this method, each of thesub-retaining walls 50 is formed while forming thepixel definition layer 31 and the barrier layer, without adding an additional process and without increasing the manufacturing cost. Thepixel material layer 32 and the barrier material layer are patterned to form the first portion and the second portion of each of thesub-retaining walls 50 by etching. - The present invention further provides a display device, comprising the aforesaid display panel.
- In the manufacturing method of the display panel according to the present invention, by forming anode holes in the anode layer in the edge area and optimizing the sizes, positions and densities of the anode holes, the diffusion rate and diffusion range of the organic layer material in the encapsulation layer are controlled by forming staggered sub-retaining walls, thereby reducing the number of edge retaining walls of the display panel and reducing the size of the edge area of the display panel to increase a screen occupation ratio.
- Above are embodiments of the present invention, which does not limit the scope of the present invention. Any modifications, equivalent replacements or improvements within the spirit and principles of the embodiment described above should be covered by the protected scope of the invention.
Claims (2)
1. A manufacturing method of a display panel, comprising:
forming a planarization layer on a substrate;
forming an anode layer on the substrate and the planarization layer;
forming a pixel definition layer on the anode layer and the planarization layer, wherein the pixel definition layer outside a display area of the display panel comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, and the retaining wall group comprises a first side close to the display area of the display panel and a second side away from the display area, wherein spaces of the plurality of the sub-retaining walls, which are spaced apart, form a path, and a length of the path is greater than a straight line distance from the first side to the second side;
forming a cathode layer on the pixel definition layer and the retaining wall group;
forming an encapsulation layer on the cathode layer.
2. The manufacturing method of the display panel according to claim 1 , wherein forming the anode layer on the substrate and the planarization layer comprises:
coating a metal layer on the substrate and the planarization layer, and patterning the metal layer to form the anode layer, and forming anode holes penetrating through the anode layer and being spaced apart outside the display area of the display panel;
forming the pixel definition layer on the anode layer and the planarization layer, wherein the pixel definition layer outside a display area of the display panel comprises a retaining wall group, and the retaining wall group comprises a plurality of sub-retaining walls which are spaced apart, comprises:
coating a pixel material layer on the anode layer and the planarization layer, and patterning the pixel material layer to form a pixel definition layer, wherein the pixel material layer outside the display area of the display panel is patterned to form the retaining wall group, and the sub-retaining walls of the retaining wall group are correspondingly disposed in the anode holes and protrude from the anode layer.
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US16/125,196 US10622422B2 (en) | 2018-03-09 | 2018-09-07 | Display panel, manufacturing method thereof and display device |
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CN110416282A (en) * | 2019-08-28 | 2019-11-05 | 云谷(固安)科技有限公司 | Display device and its display base plate |
WO2021036411A1 (en) | 2019-08-28 | 2021-03-04 | 云谷(固安)科技有限公司 | Display panel, display device, and manufacturing method of display panel |
CN111653589B (en) * | 2020-04-29 | 2021-12-03 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
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US20220359627A1 (en) * | 2021-03-30 | 2022-11-10 | Boe Technology Group Co., Ltd. | Display substrate and display device |
CN113013221B (en) * | 2021-04-14 | 2024-04-19 | 京东方科技集团股份有限公司 | Color film substrate, display panel and display device |
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