US20170238416A1 - Dummy core restrict resin process and structure - Google Patents
Dummy core restrict resin process and structure Download PDFInfo
- Publication number
- US20170238416A1 US20170238416A1 US15/064,437 US201615064437A US2017238416A1 US 20170238416 A1 US20170238416 A1 US 20170238416A1 US 201615064437 A US201615064437 A US 201615064437A US 2017238416 A1 US2017238416 A1 US 2017238416A1
- Authority
- US
- United States
- Prior art keywords
- printed circuit
- circuit board
- inner core
- conductive layer
- rigid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0277—Bendability or stretchability details
- H05K1/028—Bending or folding regions of flexible printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/05—Flexible printed circuits [FPCs]
- H05K2201/058—Direct connection between two or more FPCs or between flexible parts of rigid PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09545—Plated through-holes or blind vias without lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Definitions
- the present invention is generally directed to printed circuit boards. More specifically, the present invention is directed to printed circuit boards having select exposure of inner layer circuitry.
- a printed circuit board mechanically supports and electrically connects electronic components using conductive traces, pads and other features etched from electrically conductive sheets, such as copper sheets, laminated onto a non-conductive substrate.
- Multi-layered printed circuit boards are formed by stacking and laminating multiple such etched conductive sheet/non-conductive substrate. Conductors on different layers are interconnected with plated-through holes called vias.
- a printed circuit board includes a plurality of stacked layers, the layers made of alternating non-conductive layers and conductive layers.
- the non-conductive layers can be made of prepreg or base material that is part of a core structure, or simply core.
- Prepreg is a fibrous reinforcement material impregnated or coated with a thermosetting resin binder, and consolidated and cured to an intermediate stage semi-solid product.
- Prepreg is used as an adhesive layer to bond discrete layers of multilayer PCB construction, where a multilayer PCB consists of alternative layers of conductors and base materials bonded together, including at least one internal conductive layer.
- a base material is an organic or inorganic material used to support a pattern of conductor material.
- a core is a metal clad base material where the base material has integral metal conductor material on one or both sides.
- a laminated stack is formed by stacking multiple core structures with intervening prepreg and then laminating the stack.
- a via is then formed by drilling a hole through the laminated stack and plating the wall of the hole with electrically conductive material, such as copper. The resulting plating interconnects the conductive layers in the laminated stack.
- part of the printed circuit board with a reduced number of layers, which are flexible, to form a flexible portion that is bendable yet remains interconnected to other rigid portions of the printed circuit board, thereby forming a rigid-flexible printed circuit board.
- Current process flow is to pre-cut prepreg at a desired flexible portion and then control resin squeeze out during the lamination process. This process flow has disadvantages such as high cost of low flow prepreg, limited supply of low flow prepreg and difficulty in controlling resin squeeze out. Additionally, lamination accessories such as release film and conformal film are needed which also add cost. Release film provides a separation between a surface copper layer (conducting layer) in the lamination stack and the conformal film.
- Conformal film is a thermoplastic layer which softens under lamination temperature and conforms to the area with prepreg pre-cut. This reduces prepreg resin flowing into the flexible portion. However, resin can still flow into the rigid-flexible boundary randomly, resulting in an irregular rigid-flexible boundary. Such an irregular boundary forms a serrated surface that cuts against the flexible portion. Further, lamination under high pressure and the impact of conformal film can result in increased panel distortion and it is difficult to achieve flat surface for fine line etching or even dielectric thickness across panel to control impedance. A panel here refers to the finished product of the stack of laminate and prepreg after lamination. In order to solve these issues, a new manufacturing process for rigid-flex printed circuit boards is needed.
- Embodiments are directed to a PCB having multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the coverlay and inner core circuitry are exposed from the remaining layers of the PCB to form a flexible PCB portion.
- the PCB having an exposed coverlay and inner core circuitry is formed using a dummy core plus coverlay process.
- the select inner core circuitry is part of an inner core.
- a coverlay is applied over the select inner core circuitry and a dummy core is applied over the coverlay.
- the coverlay and the dummy core protect the select inner core circuitry during subsequent process steps and also enable exposure of the coverlay and select inner core circuitry as described in detail below.
- the flexible PCB portion is an extension of the remaining adjacent multiple layer PCB.
- the remaining portion of the multiple layer PCB is rigid, referred to as a rigid PCB portion.
- the inner core is a layer(s) of the PCB and is therefore common to both the flexible PCB portion and the remaining rigid PCB portion.
- the flexible PCB portion can be formed as an interior portion of the PCB such that a rigid PCB portion is coupled to either end of the flexible PCB portion.
- a printed circuit board in an aspect, includes a rigid printed circuit board portion and a flexible printed circuit board portion.
- the rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure.
- the flexible printed circuit board portion comprises a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion.
- the second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry.
- each of the conductive layers is pattern etched.
- the printed circuit board further comprises one or more plated through hole vias in the rigid printed circuit board portion.
- the rigid printed circuit board portion comprises a first rigid printed circuit board portion, further wherein the printed circuit board further comprises a second rigid printed circuit board portion comprising a second laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the second laminated stack further comprises a third portion of the inner core structure, further wherein the flexible printed circuit board portion is coupled between the first rigid printed circuit board portion and the second rigid printed circuit board portion.
- the inner core structure comprises an inner core non-conductive layer having a first surface and a first conductive layer positioned on the first surface of the inner core non-conductive layer.
- the first conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure.
- the inner core non-conductive layer has a second surface opposing the first surface, further wherein the inner core structure further comprises a second conductive layer positioned on the second surface of the inner core non-conductive layer.
- the second conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure.
- the inner core non-conductive layer comprises polyimide.
- the coverlay material comprises a combination of polyimide and adhesive.
- a printed circuit board set form comprises a plurality of printed circuit boards and breakaway substrate.
- the plurality of printed circuit boards are aligned within a common plane, wherein each printed circuit board is mechanically connected by a common substrate.
- Each printed circuit board comprises a rigid printed circuit board portion and a flexible printed circuit board portion.
- the rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure.
- the flexible printed circuit board portion comprises a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion.
- the second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry.
- the breakaway substrate is aligned within the common plane and mechanically connected around a perimeter of the connected plurality of printed circuit boards, wherein the breakaway substrate includes a dummy core portion.
- the breakaway substrate provides lateral structural stability to the connected plurality of printed circuit boards.
- the plurality of printed circuit boards are electrically isolated from each other.
- a method of manufacturing a printed circuit board comprises forming an inner core structure having an inner core circuitry on at least one surface of the inner core structure and applying a coverlay material over the inner core circuitry.
- the method also comprises forming a printed circuit board stack up, wherein the printed circuit board stack up comprises the inner core structure, a dummy core, one or more non-conductive layers and one or more conductive layers, wherein the dummy core is stacked on the coverlay material.
- the method also comprises laminating the printed circuit board stack up, thereby forming a laminated stack.
- the method also comprises forming a depth controlled rout from a surface of the laminated stack to the dummy core and around a perimeter of the dummy core, wherein a portion of the laminated stack within the perimeter of the rout and to a depth including the dummy core forms a laminated stack cap.
- the method also comprises removing the laminated stack cap, thereby exposing the coverlay material and forming a flexible portion of the printed circuit board.
- the perimeter of the dummy core corresponds to a perimeter of the inner core circuitry.
- the method also comprises forming the dummy core, wherein the dummy core comprises a non-conductive layer and a conductive layer.
- the dummy core is stacked on the coverlay material such that the conductive layer of the dummy core contacts the coverlay material.
- the method also comprises forming at least one plated through hole via in the laminated stack prior to forming the depth controlled rout, wherein the at least one plated through hole via is not aligned within the inner core circuitry.
- the method also comprises pattern etching the conductive layers in the laminated stack prior to forming the printed circuit board stack up.
- forming the inner core structure comprises applying a first conductive layer on a first surface of a non-conductive layer and applying a second conductive layer on a second surface of the non-conductive layer.
- the first conductive layer is pattern etched and the second conductive layer is pattern etched.
- the one or more non-conductive layers comprise one or more regular flow prepreg layers.
- laminating the printed circuit board stack up comprises applying a standard lamination pressure less than about 450 psi.
- a remaining portion of the laminated stack outside the perimeter of the rout forms a rigid portion of the printed circuit board, wherein an exposed outer surface of the laminated stack is smooth and non-rippled due to laminating the printed circuit board stack up using regular lamination pressure and the inclusion of regular flow prepreg.
- the printed circuit board comprises a rigid printed circuit board portion and a flexible printed circuit board portion.
- the rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers.
- the plurality of non-conducting layers comprises a plurality of regular flow prepreg layers.
- An exposed outer surface of the laminated stack is smooth and non-rippled.
- the laminated stack further comprises a first portion of an inner core structure.
- the flexible printed circuit board portion comprises a second portion of the inner core structure.
- the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion.
- the second portion of the inner core structure comprises inner core circuitry
- the second portion of the inner core structure further comprises an exposed coverlay material covering the inner core circuitry.
- the regular flow prepreg layers each comprise prepreg having resin flow greater than about 100 mil.
- an exposed lateral surface of the rigid printed circuit board forms a rigid-flexible boundary, wherein the rigid-flexible boundary formed at the exposed lateral surface is substantially smooth and regular.
- FIG. 1 illustrates a perspective top view of various layers included in a printed circuit board prior to stacking and lamination according to some embodiments.
- FIG. 2 illustrates an exemplary PCB stack-up 24 according to some embodiments.
- FIG. 3 illustrates a cut out side view of a portion of the PCB-stack-up shown in FIG. 2 as a lamination step is performed.
- FIG. 4 illustrates a cut out side view of the PCB stack-up of FIG. 3 after lamination.
- FIGS. 5-14 illustrate various steps in the process used to manufacture a printed circuit board according to some embodiments.
- FIGS. 15-23 illustrate various steps in the process used to manufacture a printed circuit board according to other embodiments.
- FIG. 24 illustrates an exemplary PCB set form according to an embodiment.
- FIG. 25 illustrates a perspective side view of the PCB set form 30 of FIG. 24 .
- Embodiments of the present application are directed to a printed circuit board.
- Those of ordinary skill in the art will realize that the following detailed description of the printed circuit board is illustrative only and is not intended to be in any way limiting. Other embodiments of the printed circuit board will readily suggest themselves to such skilled persons having the benefit of this disclosure.
- FIG. 1 illustrates a perspective top view of various layers included in a printed circuit board prior to stacking and lamination according to some embodiments.
- An inner core 2 includes multiple layers (not shown).
- the inner core 2 is FCCL (flexible copper clad laminate) or other non-conductive base material layer having a conductive layer on each surface of the non-conductive layer.
- FCCL is made of non-conductive polyimide material with copper on single or double sides. Polyimide is bendable. It is understood that alternative inner core structures can be used which include a conductive layer on only one surface of the non-conductive layer. The conductive layers are patterned and etched to form conductive interconnects.
- coverlay is bendable.
- coverlay is a combination of polyimide and adhesive.
- coverlay is not glass reinforced like prepreg.
- the dummy core 6 protects the select inner core circuitry covered by the applied coverlay.
- the dummy core 6 is a two-layer structure.
- a first layer is a non-conductive layer, such as a base material.
- the second layer is a conductive layer, such as a copper foil.
- the dummy core 6 is shaped similar to an inverted stencil where the stencil pattern is formed of the dummy core material and the area surrounding the pattern is free of material.
- the pattern of the dummy core 6 includes overlay portions 8 that have substantially the same shape and size as the areas of applied coverlay 4 .
- the pattern of the dummy core 6 also includes interconnect portions 10 that connect the overlay portions 8 and an outer perimeter portion 12 .
- the interconnect portions 10 and the outer perimeter portion 12 of the dummy core pattern provide a stable framework for accurately placing the overlay portions 8 relative to the coverlay 4 .
- a layer 14 is a non-conductive, insulating layer, such as prepreg.
- the prepreg used herein is a regular flow prepreg, which enables a regular pressure to be used during a subsequent lamination step, described above.
- “low flow” prepreg such as that described in the background, is a general term to describe prepreg with lower resin flow than “regular flow” prepreg.
- Low flow prepreg usually has resin flow that is less than 100 mil.
- Regular flow” prepreg has resin flow that is greater than 100 mil.
- a layer 16 is a conductive layer, such as copper foil or laminate, where a laminate includes a non-conductive layer such as base material and a conductive layer on one or both sides of non-conductive layer. In some embodiments, the layer 16 is representative of a multilayer buildup that can include many interspersed conductive and non-conductive layers.
- FIG. 2 illustrates an exemplary PCB stack-up 24 according to some embodiments.
- the stack-up 24 includes the inner core 2 , the dummy core pattern 6 , the non-conductive layer 14 , the conductive layer 16 , a dummy core pattern 18 , a non-conductive layer 20 and a conductive layer 22 .
- the dummy core pattern 18 can be patterned the same as the dummy core pattern 6 or differently depending on the inner core circuitry and coverlay patterns applied on a back side (not shown) of the inner core 2 .
- the non-conductive layer 20 can be similar to the non-conductive layer 14 .
- the conductive layer 22 can have the same or different patterned interconnects as the conductive layer 16 .
- the conductive layer 16 can represent a single layer or a multilayer buildup, and the conductive layer 22 can represent a single layer or multilayer buildup independently configured than the conductive layer 16 .
- FIG. 3 illustrates a cut out side view of a portion of the PCB-stack-up shown in FIG. 2 as a lamination step is performed.
- the portion of the PCB stack-up shown in FIG. 3 coincides with an overly portion 8 of the dummy core pattern 6 and a coverlay portion 4 applied over inner core circuitry of the inner core 2 .
- An overlay portion 8 ′ of the dummy core pattern 18 of FIG. 2 and a coverlay portion 4 ′ applied over backside inner core circuitry of the inner core 2 is also shown.
- standard lamination pressure refers to the lamination pressure used with “regular flow” prepreg. With “regular flow” prepreg, lamination pressure is less than about 450 psi. With “low flow” prepreg, lamination pressure is more than about 450 psi. A total thickness of the dummy core and coverlay is thicker than an adjacent area such that a uniform pressure applied across the entire top and bottom surfaces of the PCB stack-up results in a higher relative pressure applied at the areas corresponding to the dummy core. Prepreg resin flows into the adjacent area under lower pressure.
- FIG. 4 illustrates a cut out side view of the PCB stack-up of FIG. 3 after lamination.
- FIGS. 5-14 illustrate various steps in the process used to manufacture a printed circuit board according to some embodiments.
- the printed circuit board manufactured using the various steps shown in FIGS. 5-14 is similar to and shares features of the printed circuit boards and constituent layers shown in FIGS. 1-4 .
- Each of the FIGS. 5-14 illustrate a cut out side view of the printed circuit board according to the various process steps.
- an exemplary inner core structure is shown.
- the inner core structure is a metal clad structure including a bendable non-conductive layer 102 and conductive layers 104 , 106 formed on both opposing surfaces. It is understood that an alternative inner core structure can be used which includes a conductive layer on only one surface of the non-conductive layer.
- the inner core structure is an FCCL.
- the conductive layers 104 and 106 are selectively pattern etched to form inner core circuitry 108 and 110 , respectively.
- the conductive layers 104 , 106 are already pattern etched during fabrication of the inner core structure in FIG. 5 . It is understood that FIG. 5-14 only show a portion of the printed circuit board and in particular only show a portion of the inner core structure. Additional interconnects and circuitry may be formed on portions of the inner core structure not shown in FIGS. 5-14 , those portions to be included as part of a rigid PCB portion of the printed circuit board.
- coverlay 112 , 114 is applied on the inner core circuitry 108 and 110 , respectively.
- the resulting structure forms an inner core assembly wherein the inner core circuitry is encapsulated by the coverlay.
- the coverlay has a low adhesion to a conductive layer, such as copper, of a dummy core as described in detail below.
- additional core structures and dummy core structures are fabricated, and the core structures, the inner core assembly and the dummy core structures are stacked with intervening non-conductive layers, such as regular flow prepreg.
- the additional core structures can be similar to the inner core structure of FIG. 5 with the conductive layers pattern etched accordingly. However, the conductive layers of the additional core structures are formed such that the resulting interconnects will be positioned in a rigid PCB portion of the resulting printed circuit board. In most instances, the additional core structures are made using a non-conductive base material as opposed to FCCL. In the exemplary configuration shown in FIG. 8 , two additional core structures are included.
- a first core structure 122 includes a non-conductive layer 124 and conductive layers 126 and 128 .
- the conductive layers 126 and 128 are selectively pattern etched. As shown in FIG. 8 , the portions of the conductive layers 126 and 128 aligned with the inner core circuitry 108 are removed. However, removal of the conductive layers 126 and 128 is optional and in other embodiments these portions of the conductive layers 126 and 128 may remain.
- a second core structure 130 includes a non-conductive layer 132 and conductive layers 134 and 136 .
- the conductive layers 134 and 136 are selectively pattern etched. As shown in FIG. 8 , the portions of the conductive layers 134 and 136 aligned with the inner core circuitry 110 are removed. However, removal of the conductive layers 134 and 136 is optional and in other embodiments these portions of the conductive layers 134 and 136 may remain.
- a dummy core 120 is positioned on the coverlay 112 of the inner core assembly and a dummy core 121 is positioned on the coverlay 114 of the inner core assembly.
- the dummy core 120 includes a conductive layer 118 and a non-conductive layer 116 , and the dummy core 120 is oriented such that the conductive layer 118 is positioned against the coverlay 112 .
- the type of coverlay used has a low adhesion to the material type of the conductive layer 118 . This low adhesion enables removal of the dummy core 120 from the inner core assembly during a subsequent decap step shown and described in relation to FIG. 13 .
- the dummy core 121 includes a conductive layer 119 and a non-conductive layer 117 , and the dummy core 121 is oriented such that the conductive layer 119 is positioned against the coverlay 114 .
- the type of coverlay used has a low adhesion to the material type of the conductive layer 119 . This low adhesion enables removal of the dummy core 121 from the inner core assembly during the subsequent decap step.
- An intervening non-conductive layer 140 such as regular flow prepreg, is positioned between the dummy core 120 and the core structure 122
- an intervening non-conductive layer 142 such as regular flow prepreg
- additional conductive layer 146 and intervening non-conductive layer 138 such as regular flow prepreg
- additional conductive layer 148 and intervening non-conductive layer 144 such as regular flow prepreg
- a single lamination step results in the laminated stack shown in FIG. 8 .
- vias are formed in those portions of the printed circuit board that will be rigid PCB portions.
- a desmear process is performed to remove residue, such as residual particles from the drilling of via 150 .
- an electroless plating process is performed to form plating 152 on the side walls of the via 150 .
- copper is used as the plating material. It is understood that other plating materials can be used.
- the plating 152 forms an interconnect with various conductive layers in the stack.
- an outer conducting layer etching process is performed.
- the additional conductive layers 146 and 148 on the top and bottom, respectively, of the laminated stack are pattern etched to form patterned conductive layers 146 ′ and 148 ′.
- the portions of the conductive layers 146 and 148 aligned with the dummy cores 120 and 121 , respectively, are removed.
- a depth controlled rout step is performed.
- a routing tool having a rout bit is used to form a rout into the laminated stack to a depth of the conductive layer on the respective dummy core.
- a rout 154 is made from the non-conductive layer 138 to the conductive layer 118 of the dummy core 120
- a rout 155 is made from the non-conductive layer 144 to the conductive layer 119 of the dummy core 121 .
- FIG. 12 shows a two dimensional view of the rout 154 and 155 .
- the routs 154 and 155 are formed at an outer perimeter of the dummy cores 120 and 121 , respectively.
- a lateral rout is also performed such that the conductive layers 118 and 119 are free from surrounding prepreg material
- a plug 156 is removed and a plug 157 is removed, thereby exposing the coverlay 112 and 114 , respectively.
- the plug 156 is the area within the rout 154 perimeter and between the non-conducive layer 138 and the conductive layer 118 of the dummy core 120 .
- the plug 157 is the area within the rout 155 perimeter and between the non-conductive layer 144 and the conductive layer 119 of the dummy core 121 . Removal of the plugs 156 and 157 is referred to as a decap process.
- the low adhesion between the conductive layer 118 and the coverlay 112 , and between the conductive layer 119 and the coverlay 114 enables the plugs to simply be pulled apart from the coverlay.
- FIG. 14 shows the resulting printed circuit board after the decap process.
- the exposed coverlay 112 , 114 , inner core circuitry 108 , 110 and corresponding non-conductive layer 102 form a flexible PCB portion 164 .
- Remaining portions of the laminated stack form rigid PCB portions 160 and 162 on either end of the flexible PCB portion 164 .
- FIGS. 2-14 show an exemplary configuration where both sides of the inner core circuitry are protected using coverlay and dummy core, and subsequently exposed. This is referred to as a double-sided configuration
- the inner core circuitry is formed from an inner core structure that is positioned as the outer most layers of a PCB stack-up. In the case where both sides of the inner core structure have inner core circuitry, only the inward facing side need by protected using coverlay and a dummy core, the outward facing side is left uncovered by coverlay. In the case where the inward facing side of the inner core structure does not include inner core circuitry, coverlay need not be used and only a dummy core is used to form the flexible PCB portion.
- FIGS. 15-23 illustrate various steps in the process used to manufacture a printed circuit board according to other embodiments.
- the printed circuit board manufactured using the various steps shown in FIGS. 15-23 is similar to and shares features of the printed circuit board and constituent layers shown in FIGS. 5-14 except that the FIGS. 15-23 are directed to a single-sided process where the inward facing side of the inner core structure doe not include inner core circuitry.
- Each of the FIGS. 15-23 illustrate a cut out side view of the printed circuit board according to the various process steps.
- the inner core structure is a metal clad structure including a non-conductive layer 202 and conductive layers 204 and 206 formed on both opposing surfaces. It is understood that an alternative inner core structure can be used which includes a conductive layer on only one surface of the non-conductive layer. In some embodiments, the inner core structure is an FCCL.
- the conductive layer 206 is selectively pattern etched to form pattern etched conductive layer 208 and at least to expose surface 203 of the non-conductive layer 202 .
- the conductive layer 206 is already pattern etched during fabrication of the inner core structure in FIG. 15 . It is understood that FIG. 15-23 only show a portion of the printed circuit board and in particular only show a portion of the pattern etched layer 208 . Additional interconnects and circuitry may be formed on portions of the inner core structure not shown in FIGS. 15-23 , those portions to be included as part of a rigid PCB portion of the printed circuit board.
- additional core structures and a dummy core structure are fabricated, and the core structures, the inner core structure of FIG. 16 and the dummy core structure are stacked with intervening non-conductive layers, such as regular flow prepreg.
- the additional core structures can be similar to the inner core structure of FIG. 15 with the conductive layers pattern etched accordingly. However, the conductive layers of the additional core structures positioned are formed such that the resulting interconnects will be positioned in a rigid PCB portion of the resulting printed circuit board. In those additional core structures that include portions of a subsequent plug to be removed during a decap process, the corresponding conductive layer portions can be etched away or left intact. In most instances, the additional core structures are made using a non-conductive base material as opposed to FCCL.
- a first core structure 222 includes a non-conductive layer 224 and conductive layers 226 and 228 .
- the conductive layers 226 and 228 are selectively pattern etched. As shown in FIG. 17 , the portions of the conductive layers 226 and 228 aligned with exposed surface 203 are removed. Alternatively, the portions of the conductive layers 226 and 228 aligned with the exposed surface 203 can be left intact.
- a second core structure 230 includes a non-conductive layer 232 and conductive layers 234 and 236 . The conductive layers 234 and 236 are selectively pattern etched. As shown in FIG. 17 , the portions of the conductive layers 234 and 236 aligned with the exposed surface 203 may include patterned interconnects.
- a dummy core 220 is positioned on the exposed surface 203 of the inner core structure.
- the dummy core 220 includes a conductive layer 218 and a non-conductive layer 216 .
- the dummy core 220 is oriented such that the conductive layer 218 is positioned against the exposed surface 203 .
- the base material of the non-conductive layer 202 has a low adhesion to the material type of the conductive layer 218 . This low adhesion enables removal of the dummy core from the inner core structure during a subsequent decap step shown and described in relation to FIG. 22 .
- An intervening non-conductive layer 238 such as regular flow prepreg, is positioned between the dummy core 220 and the core structure 222
- an intervening non-conductive layer 242 such a s regular flow prepreg, is positioned between the core structure 222 and the core structure 230 .
- vias are formed in those portions of the printed circuit board that will be rigid PCB portions.
- a desmear process is performed to remove residue, such as residual particles from the drilling of via 250 .
- an electroless plating process is performed to form plating 252 on the side walls of the via 250 .
- copper is used as the plating material. It is understood that other plating materials can be used.
- the plating 252 forms an interconnect with various conductive layers in the stack.
- an outer conducting layer etching process is performed.
- the outward facing conductive layer 204 of the inner core structure is pattern etched to form inner core circuitry 210 and conductive layer 236 is pattern etched to form patterned conductive layers 236 ′.
- the portion of the conductive layers 246 aligned with the dummy core 220 is removed.
- a depth controlled rout step is performed.
- a rout 254 is made from the non-conductive layer 232 to the conductive layer 218 of the dummy core 220 .
- FIG. 21 shows a two dimensional view of the rout 254 . In three-dimensions, the rout 254 is formed at an outer perimeter of the dummy core 220 .
- a lateral rout is also performed such that the conductive layer 218 is free from surrounding prepreg material.
- a plug 256 is removed, thereby exposing the surface 203 of the non-conductive layer 202 .
- the plug 256 is the area within the rout 254 perimeter and between the non-conducive layer 232 and the conductive layer 218 of the dummy core 220 .
- the low adhesion between the conductive layer 218 and the surface 203 enables the plug to simply be pulled apart from the non-conductive layer 202 .
- FIG. 23 shows the resulting printed circuit board after the decap process.
- the inner core circuitry 210 and the portion of the non-conductive layer 202 corresponding to the exposed surface 203 form a flexible PCB portion 264 .
- Remaining portions of the laminated stack form rigid PCB portions 260 and 262 on either end of the flexible PCB portion 264 .
- FIG. 24 illustrates an exemplary PCB set form according to an embodiment.
- the exemplary PCB set form 30 includes two PCBs.
- a first PCB includes a rigid PCB portion 32 and a flexible PCB portion 36 .
- a second PCB includes a rigid PCB portion 34 and a flexible PCB portion 38 .
- the PCBs shown in FIG. 24 each include only a single rigid PCB portion.
- PCB set forms can include more or less than the exemplary two PCBs shown in FIG. 24 .
- the two PCBs are connected physically but not electrically.
- an additional routing step is applied to an outer perimeter portion of a PCB set form.
- the additional routing step can be performed at any point in the printed circuit board manufacturing process after the lamination step is performed.
- the additional routing step can be performed at any point after the lamination step shown in FIG. 8 .
- the additional routing step removes a perimeter portion of the laminated PCB stack up including the outer perimeter portion of the dummy core pattern, such as the outer perimeter portion 12 of FIG. 1 .
- a resulting perimeter area surrounding the PCBs in the PCB set form 30 is shown in FIG. 24 as breakaway area 46 .
- the rigid PCB portions 32 , 34 are ready for surface components to be mounted on select areas, such as through a surface mount technology (SMT) process. After the components are mounted, the PCBs are separated for subsequent installation into other devices. Separating the PCBs can be performed using any conventional process including, but not limited to, cutting the PCB set form 30 along etched lines. Cutting along the perimeter etch lines separates the breakaway area 46 from the PCBs.
- SMT surface mount technology
- FIG. 25 illustrates a perspective side view of the PCB set form 30 of FIG. 24 .
- the breakaway area 46 includes a dummy core portion 60 , which is a remnant of a dummy core pattern used to protect the flexible PCB portion 38 of FIG. 24 .
- a dummy core pattern can include an interconnect portion, such as the interconnect portion 10 of the dummy core pattern 6 in FIG. 1 , a portion of which coincides with the breakaway area of a PCB set form, such as the breakaway area 46 in FIG. 25 .
- the outer perimeter portion of the dummy core pattern such as the outer perimeter portion 12 in FIG.
- the interconnect portions that connect to the outer perimeter portion of the dummy core pattern remain.
- the flexible PCB portions can be formed as connector sections between rigid PCB portions, such as the configuration shown in FIG. 24 .
- the flexible PCB portion is flexible thereby enabling two adjoining rigid PCB portions to rotate, or pivot, relative to each other.
- the printed circuit board and manufacturing processes described herein provided numerous advantages.
- the printed circuit board having both rigid PCB portions and a flexible PCB portions is formed using regular flow prepreg.
- flexible PCB portions are formed using low flow prepreg as well as lamination accessories such as release film and conformal film.
- Use of low flow prepreg is needed to control squeeze out during lamination.
- a greater lamination pressure is required which results in surface ripple on the PCB exterior surfaces. Under high pressure the underlying topography of the inner layer circuitry is reflected on the surface resulting in the irregular, or rippled, surface.
- the printed circuit board and manufacturing process described herein also resolves the resin squeeze out issue at the rigid-flex boundary.
- a well controlled and regular rigid-flex boundary is achieved while the prior art processes have poor control and irregular rigid-flex boundary which varies lot by lot.
- Conventional processes using low flow prepreg result in rougher, more irregular rigid-flex boundary.
- Such an irregular boundary affects reliability of the flexible PCB portion.
- resin flow is restricted by the dummy core and a rigid-flexible boundary is defined by depth control rout. Therefore, the rigid-flexible boundary is substantially smooth and regular.
- the present process also enables precise removal of the plug using the described decap process steps.
- Standard rigid PCB design can be transferred to rigid-flex design smoothly using the present process, this expands product categories such as HDI, ELIC, 0.3 mm BGA pitch and sequential lamination, and hence increases business opportunities.
- An advantage of using the coverlay and dummy core in the manufacturing process is that relatively early in the manufacturing process a final circuit surface, for example the inner core circuitry, can be prepared and protected during subsequent process steps.
- the final covered circuit surface can be re-exposed from other layers of a PCB laminated stack later in the process without having been contaminated.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the covered inner core circuitry is exposed from the remaining layers of the PCB. The PCB having covered inner core circuitry is formed using a dummy core plus coverlay process. The select inner core circuitry is part of an inner core. The inner core corresponding to the covered inner core circuitry forms a flexible PCB portion. The flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the flexible PCB portion and the remaining rigid PCB portion.
Description
- This application claims priority under 35 U.S.C. §119(a)-(d) of the Chinese Patent Application No: 201610090048.5, filed Feb. 17, 2016 and titled, “DUMMY CORE RESTRICT RESIN PROCESS AND STRUCTURE,” which is hereby incorporated by reference in its entirety for all purposes.
- The present invention is generally directed to printed circuit boards. More specifically, the present invention is directed to printed circuit boards having select exposure of inner layer circuitry.
- A printed circuit board (PCB) mechanically supports and electrically connects electronic components using conductive traces, pads and other features etched from electrically conductive sheets, such as copper sheets, laminated onto a non-conductive substrate. Multi-layered printed circuit boards are formed by stacking and laminating multiple such etched conductive sheet/non-conductive substrate. Conductors on different layers are interconnected with plated-through holes called vias.
- A printed circuit board includes a plurality of stacked layers, the layers made of alternating non-conductive layers and conductive layers. The non-conductive layers can be made of prepreg or base material that is part of a core structure, or simply core. Prepreg is a fibrous reinforcement material impregnated or coated with a thermosetting resin binder, and consolidated and cured to an intermediate stage semi-solid product. Prepreg is used as an adhesive layer to bond discrete layers of multilayer PCB construction, where a multilayer PCB consists of alternative layers of conductors and base materials bonded together, including at least one internal conductive layer. A base material is an organic or inorganic material used to support a pattern of conductor material. A core is a metal clad base material where the base material has integral metal conductor material on one or both sides. A laminated stack is formed by stacking multiple core structures with intervening prepreg and then laminating the stack. A via is then formed by drilling a hole through the laminated stack and plating the wall of the hole with electrically conductive material, such as copper. The resulting plating interconnects the conductive layers in the laminated stack.
- In some applications, it is desirable to form part of the printed circuit board with a reduced number of layers, which are flexible, to form a flexible portion that is bendable yet remains interconnected to other rigid portions of the printed circuit board, thereby forming a rigid-flexible printed circuit board. Current process flow is to pre-cut prepreg at a desired flexible portion and then control resin squeeze out during the lamination process. This process flow has disadvantages such as high cost of low flow prepreg, limited supply of low flow prepreg and difficulty in controlling resin squeeze out. Additionally, lamination accessories such as release film and conformal film are needed which also add cost. Release film provides a separation between a surface copper layer (conducting layer) in the lamination stack and the conformal film. Conformal film is a thermoplastic layer which softens under lamination temperature and conforms to the area with prepreg pre-cut. This reduces prepreg resin flowing into the flexible portion. However, resin can still flow into the rigid-flexible boundary randomly, resulting in an irregular rigid-flexible boundary. Such an irregular boundary forms a serrated surface that cuts against the flexible portion. Further, lamination under high pressure and the impact of conformal film can result in increased panel distortion and it is difficult to achieve flat surface for fine line etching or even dielectric thickness across panel to control impedance. A panel here refers to the finished product of the stack of laminate and prepreg after lamination. In order to solve these issues, a new manufacturing process for rigid-flex printed circuit boards is needed.
- Embodiments are directed to a PCB having multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the coverlay and inner core circuitry are exposed from the remaining layers of the PCB to form a flexible PCB portion. The PCB having an exposed coverlay and inner core circuitry is formed using a dummy core plus coverlay process. The select inner core circuitry is part of an inner core. During manufacturing of the PCB, a coverlay is applied over the select inner core circuitry and a dummy core is applied over the coverlay. The coverlay and the dummy core protect the select inner core circuitry during subsequent process steps and also enable exposure of the coverlay and select inner core circuitry as described in detail below. The flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid, referred to as a rigid PCB portion. The inner core is a layer(s) of the PCB and is therefore common to both the flexible PCB portion and the remaining rigid PCB portion. The flexible PCB portion can be formed as an interior portion of the PCB such that a rigid PCB portion is coupled to either end of the flexible PCB portion.
- In an aspect, a printed circuit board is disclosed. The printed circuit board includes a rigid printed circuit board portion and a flexible printed circuit board portion. The rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure. The flexible printed circuit board portion comprises a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion. The second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry. In some embodiments, each of the conductive layers is pattern etched. In some embodiments, the printed circuit board further comprises one or more plated through hole vias in the rigid printed circuit board portion. In some embodiments, the rigid printed circuit board portion comprises a first rigid printed circuit board portion, further wherein the printed circuit board further comprises a second rigid printed circuit board portion comprising a second laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the second laminated stack further comprises a third portion of the inner core structure, further wherein the flexible printed circuit board portion is coupled between the first rigid printed circuit board portion and the second rigid printed circuit board portion. In some embodiments, the inner core structure comprises an inner core non-conductive layer having a first surface and a first conductive layer positioned on the first surface of the inner core non-conductive layer. In some embodiments, the first conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure. In some embodiments, the inner core non-conductive layer has a second surface opposing the first surface, further wherein the inner core structure further comprises a second conductive layer positioned on the second surface of the inner core non-conductive layer. In some embodiments, the second conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure. In some embodiments, the inner core non-conductive layer comprises polyimide. In some embodiments, the coverlay material comprises a combination of polyimide and adhesive.
- In another aspect, a printed circuit board set form is disclosed. The printed circuit board set form comprises a plurality of printed circuit boards and breakaway substrate. The plurality of printed circuit boards are aligned within a common plane, wherein each printed circuit board is mechanically connected by a common substrate. Each printed circuit board comprises a rigid printed circuit board portion and a flexible printed circuit board portion. The rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure. The flexible printed circuit board portion comprises a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion. The second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry. The breakaway substrate is aligned within the common plane and mechanically connected around a perimeter of the connected plurality of printed circuit boards, wherein the breakaway substrate includes a dummy core portion. In some embodiments, the breakaway substrate provides lateral structural stability to the connected plurality of printed circuit boards. In some embodiments, the plurality of printed circuit boards are electrically isolated from each other.
- In yet another aspect, a method of manufacturing a printed circuit board is disclosed. The method comprises forming an inner core structure having an inner core circuitry on at least one surface of the inner core structure and applying a coverlay material over the inner core circuitry. The method also comprises forming a printed circuit board stack up, wherein the printed circuit board stack up comprises the inner core structure, a dummy core, one or more non-conductive layers and one or more conductive layers, wherein the dummy core is stacked on the coverlay material. The method also comprises laminating the printed circuit board stack up, thereby forming a laminated stack. The method also comprises forming a depth controlled rout from a surface of the laminated stack to the dummy core and around a perimeter of the dummy core, wherein a portion of the laminated stack within the perimeter of the rout and to a depth including the dummy core forms a laminated stack cap. The method also comprises removing the laminated stack cap, thereby exposing the coverlay material and forming a flexible portion of the printed circuit board. In some embodiments, the perimeter of the dummy core corresponds to a perimeter of the inner core circuitry. In some embodiments, the method also comprises forming the dummy core, wherein the dummy core comprises a non-conductive layer and a conductive layer. In some embodiments, the dummy core is stacked on the coverlay material such that the conductive layer of the dummy core contacts the coverlay material. In some embodiments, the method also comprises forming at least one plated through hole via in the laminated stack prior to forming the depth controlled rout, wherein the at least one plated through hole via is not aligned within the inner core circuitry. In some embodiments, the method also comprises pattern etching the conductive layers in the laminated stack prior to forming the printed circuit board stack up. In some embodiments, forming the inner core structure comprises applying a first conductive layer on a first surface of a non-conductive layer and applying a second conductive layer on a second surface of the non-conductive layer. In some embodiments, the first conductive layer is pattern etched and the second conductive layer is pattern etched. In some embodiments, the one or more non-conductive layers comprise one or more regular flow prepreg layers. In some embodiments, laminating the printed circuit board stack up comprises applying a standard lamination pressure less than about 450 psi. In some embodiments, a remaining portion of the laminated stack outside the perimeter of the rout forms a rigid portion of the printed circuit board, wherein an exposed outer surface of the laminated stack is smooth and non-rippled due to laminating the printed circuit board stack up using regular lamination pressure and the inclusion of regular flow prepreg.
- In yet another aspect, another printed circuit board is disclosed. The printed circuit board comprises a rigid printed circuit board portion and a flexible printed circuit board portion. The rigid printed circuit board portion comprises a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers. The plurality of non-conducting layers comprises a plurality of regular flow prepreg layers. An exposed outer surface of the laminated stack is smooth and non-rippled. The laminated stack further comprises a first portion of an inner core structure. The flexible printed circuit board portion comprises a second portion of the inner core structure. The inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion. The second portion of the inner core structure comprises inner core circuitry In some embodiments, the second portion of the inner core structure further comprises an exposed coverlay material covering the inner core circuitry. In some embodiments, the regular flow prepreg layers each comprise prepreg having resin flow greater than about 100 mil. In some embodiments, an exposed lateral surface of the rigid printed circuit board forms a rigid-flexible boundary, wherein the rigid-flexible boundary formed at the exposed lateral surface is substantially smooth and regular.
- Several example embodiments are described with reference to the drawings, wherein like components are provided with like reference numerals. The example embodiments are intended to illustrate, but not to limit, the invention. The drawings include the following figures:
-
FIG. 1 illustrates a perspective top view of various layers included in a printed circuit board prior to stacking and lamination according to some embodiments. -
FIG. 2 illustrates an exemplary PCB stack-up 24 according to some embodiments. -
FIG. 3 illustrates a cut out side view of a portion of the PCB-stack-up shown inFIG. 2 as a lamination step is performed. -
FIG. 4 illustrates a cut out side view of the PCB stack-up ofFIG. 3 after lamination. -
FIGS. 5-14 illustrate various steps in the process used to manufacture a printed circuit board according to some embodiments. -
FIGS. 15-23 illustrate various steps in the process used to manufacture a printed circuit board according to other embodiments. -
FIG. 24 illustrates an exemplary PCB set form according to an embodiment. -
FIG. 25 illustrates a perspective side view of the PCB setform 30 ofFIG. 24 . - Embodiments of the present application are directed to a printed circuit board. Those of ordinary skill in the art will realize that the following detailed description of the printed circuit board is illustrative only and is not intended to be in any way limiting. Other embodiments of the printed circuit board will readily suggest themselves to such skilled persons having the benefit of this disclosure.
- Reference will now be made in detail to implementations of the printed circuit board as illustrated in the accompanying drawings. The same reference indicators will be used throughout the drawings and the following detailed description to refer to the same or like parts. In the interest of clarity, not all of the routine features of the implementations described herein are shown and described. It will, of course, be appreciated that in the development of any such actual implementation, numerous implementation-specific decisions must be made in order to achieve the developer's specific goals, such as compliance with application and business related constraints, and that these specific goals will vary from one implementation to another and from one developer to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of engineering for those of ordinary skill in the art having the benefit of this disclosure.
-
FIG. 1 illustrates a perspective top view of various layers included in a printed circuit board prior to stacking and lamination according to some embodiments. Aninner core 2 includes multiple layers (not shown). In some embodiments, theinner core 2 is FCCL (flexible copper clad laminate) or other non-conductive base material layer having a conductive layer on each surface of the non-conductive layer. In some embodiments, FCCL is made of non-conductive polyimide material with copper on single or double sides. Polyimide is bendable. It is understood that alternative inner core structures can be used which include a conductive layer on only one surface of the non-conductive layer. The conductive layers are patterned and etched to form conductive interconnects. Select portions of the conductive interconnects, referred to as inner core circuitry, are to be part of the flexible PCB portion. Each inner core circuit is covered by a coverlay material, or simply “coverlay”. Coverlay is bendable. In some embodiments, coverlay is a combination of polyimide and adhesive. For example, coverlay is not glass reinforced like prepreg. - The
dummy core 6 protects the select inner core circuitry covered by the applied coverlay. In some embodiments, thedummy core 6 is a two-layer structure. A first layer is a non-conductive layer, such as a base material. The second layer is a conductive layer, such as a copper foil. Thedummy core 6 is shaped similar to an inverted stencil where the stencil pattern is formed of the dummy core material and the area surrounding the pattern is free of material. The pattern of thedummy core 6 includesoverlay portions 8 that have substantially the same shape and size as the areas of appliedcoverlay 4. The pattern of thedummy core 6 also includesinterconnect portions 10 that connect theoverlay portions 8 and anouter perimeter portion 12. Theinterconnect portions 10 and theouter perimeter portion 12 of the dummy core pattern provide a stable framework for accurately placing theoverlay portions 8 relative to thecoverlay 4. - A
layer 14 is a non-conductive, insulating layer, such as prepreg. The prepreg used herein is a regular flow prepreg, which enables a regular pressure to be used during a subsequent lamination step, described above. In the PCB industry, “low flow” prepreg, such as that described in the background, is a general term to describe prepreg with lower resin flow than “regular flow” prepreg. “Low flow” prepreg usually has resin flow that is less than 100 mil. “Regular flow” prepreg has resin flow that is greater than 100 mil. Alayer 16 is a conductive layer, such as copper foil or laminate, where a laminate includes a non-conductive layer such as base material and a conductive layer on one or both sides of non-conductive layer. In some embodiments, thelayer 16 is representative of a multilayer buildup that can include many interspersed conductive and non-conductive layers. - A PCB stack-up is formed by stacking various combinations of the layers, or similar to the layers, shown in
FIG. 1 .FIG. 2 illustrates an exemplary PCB stack-up 24 according to some embodiments. The stack-up 24 includes theinner core 2, thedummy core pattern 6, thenon-conductive layer 14, theconductive layer 16, adummy core pattern 18, anon-conductive layer 20 and aconductive layer 22. Thedummy core pattern 18 can be patterned the same as thedummy core pattern 6 or differently depending on the inner core circuitry and coverlay patterns applied on a back side (not shown) of theinner core 2. Thenon-conductive layer 20 can be similar to thenon-conductive layer 14. Theconductive layer 22 can have the same or different patterned interconnects as theconductive layer 16. Theconductive layer 16 can represent a single layer or a multilayer buildup, and theconductive layer 22 can represent a single layer or multilayer buildup independently configured than theconductive layer 16. - A laminated stack is formed by laminating the PCB stack-up shown in
FIG. 2 . Any conventional lamination technique can be used.FIG. 3 illustrates a cut out side view of a portion of the PCB-stack-up shown inFIG. 2 as a lamination step is performed. The portion of the PCB stack-up shown inFIG. 3 coincides with an overlyportion 8 of thedummy core pattern 6 and acoverlay portion 4 applied over inner core circuitry of theinner core 2. Anoverlay portion 8′ of thedummy core pattern 18 ofFIG. 2 and acoverlay portion 4′ applied over backside inner core circuitry of theinner core 2 is also shown. With the dummy core positioned on the coverlay, the dummy core touches firmly with the coverlay under standard lamination pressure. As used herein, standard lamination pressure refers to the lamination pressure used with “regular flow” prepreg. With “regular flow” prepreg, lamination pressure is less than about 450 psi. With “low flow” prepreg, lamination pressure is more than about 450 psi. A total thickness of the dummy core and coverlay is thicker than an adjacent area such that a uniform pressure applied across the entire top and bottom surfaces of the PCB stack-up results in a higher relative pressure applied at the areas corresponding to the dummy core. Prepreg resin flows into the adjacent area under lower pressure. Prepreg resin flow into the coverlay is restricted by the dummy core as well as the higher relative pressure. The coverlay and the dummy core provide structural support during the lamination step so as to provide protection to the inner core circuitry.FIG. 4 illustrates a cut out side view of the PCB stack-up ofFIG. 3 after lamination. -
FIGS. 5-14 illustrate various steps in the process used to manufacture a printed circuit board according to some embodiments. The printed circuit board manufactured using the various steps shown inFIGS. 5-14 is similar to and shares features of the printed circuit boards and constituent layers shown inFIGS. 1-4 . Each of theFIGS. 5-14 illustrate a cut out side view of the printed circuit board according to the various process steps. InFIG. 5 , an exemplary inner core structure is shown. The inner core structure is a metal clad structure including a bendablenon-conductive layer 102 andconductive layers - In
FIG. 6 , theconductive layers inner core circuitry conductive layers FIG. 5 . It is understood thatFIG. 5-14 only show a portion of the printed circuit board and in particular only show a portion of the inner core structure. Additional interconnects and circuitry may be formed on portions of the inner core structure not shown inFIGS. 5-14 , those portions to be included as part of a rigid PCB portion of the printed circuit board. - In
FIG. 7 ,coverlay inner core circuitry - In
FIG. 8 , additional core structures and dummy core structures are fabricated, and the core structures, the inner core assembly and the dummy core structures are stacked with intervening non-conductive layers, such as regular flow prepreg. The additional core structures can be similar to the inner core structure ofFIG. 5 with the conductive layers pattern etched accordingly. However, the conductive layers of the additional core structures are formed such that the resulting interconnects will be positioned in a rigid PCB portion of the resulting printed circuit board. In most instances, the additional core structures are made using a non-conductive base material as opposed to FCCL. In the exemplary configuration shown inFIG. 8 , two additional core structures are included. Afirst core structure 122 includes anon-conductive layer 124 andconductive layers conductive layers FIG. 8 , the portions of theconductive layers inner core circuitry 108 are removed. However, removal of theconductive layers conductive layers second core structure 130 includes anon-conductive layer 132 andconductive layers conductive layers FIG. 8 , the portions of theconductive layers inner core circuitry 110 are removed. However, removal of theconductive layers conductive layers - A
dummy core 120 is positioned on thecoverlay 112 of the inner core assembly and adummy core 121 is positioned on thecoverlay 114 of the inner core assembly. Thedummy core 120 includes aconductive layer 118 and anon-conductive layer 116, and thedummy core 120 is oriented such that theconductive layer 118 is positioned against thecoverlay 112. The type of coverlay used has a low adhesion to the material type of theconductive layer 118. This low adhesion enables removal of thedummy core 120 from the inner core assembly during a subsequent decap step shown and described in relation toFIG. 13 . Thedummy core 121 includes aconductive layer 119 and anon-conductive layer 117, and thedummy core 121 is oriented such that theconductive layer 119 is positioned against thecoverlay 114. The type of coverlay used has a low adhesion to the material type of theconductive layer 119. This low adhesion enables removal of thedummy core 121 from the inner core assembly during the subsequent decap step. - An intervening
non-conductive layer 140, such as regular flow prepreg, is positioned between thedummy core 120 and thecore structure 122, and an interveningnon-conductive layer 142, such as regular flow prepreg, is positioned between thedummy core 121 and thecore structure 130. In the exemplary configuration shown inFIG. 8 , additionalconductive layer 146 and interveningnon-conductive layer 138, such as regular flow prepreg, is added to the top of the stack and additionalconductive layer 148 and interveningnon-conductive layer 144, such as regular flow prepreg, is added to the bottom of the stack, where the terms top and bottom are used only in relation to the orientation shown inFIG. 8 . A single lamination step results in the laminated stack shown inFIG. 8 . - In
FIG. 9 , selective holes are drilled through the laminated stack ofFIG. 8 to form vias, such as via 150. Vias are formed in those portions of the printed circuit board that will be rigid PCB portions. - In
FIG. 10 , a desmear process is performed to remove residue, such as residual particles from the drilling of via 150. Next, an electroless plating process is performed to form plating 152 on the side walls of thevia 150. In some embodiments, copper is used as the plating material. It is understood that other plating materials can be used. The plating 152 forms an interconnect with various conductive layers in the stack. - In
FIG. 11 , an outer conducting layer etching process is performed. The additionalconductive layers conductive layers 146′ and 148′. In particular, the portions of theconductive layers dummy cores - In
FIG. 12 , a depth controlled rout step is performed. In some embodiments, a routing tool having a rout bit is used to form a rout into the laminated stack to a depth of the conductive layer on the respective dummy core. As shown inFIG. 12 , arout 154 is made from thenon-conductive layer 138 to theconductive layer 118 of thedummy core 120, and arout 155 is made from thenon-conductive layer 144 to theconductive layer 119 of thedummy core 121.FIG. 12 shows a two dimensional view of therout routs dummy cores conductive layers - In
FIG. 13 , aplug 156 is removed and aplug 157 is removed, thereby exposing thecoverlay plug 156 is the area within therout 154 perimeter and between thenon-conducive layer 138 and theconductive layer 118 of thedummy core 120. Theplug 157 is the area within therout 155 perimeter and between thenon-conductive layer 144 and theconductive layer 119 of thedummy core 121. Removal of theplugs conductive layer 118 and thecoverlay 112, and between theconductive layer 119 and thecoverlay 114 enables the plugs to simply be pulled apart from the coverlay. -
FIG. 14 shows the resulting printed circuit board after the decap process. The exposed coverlay 112, 114,inner core circuitry non-conductive layer 102 form aflexible PCB portion 164. Remaining portions of the laminated stack formrigid PCB portions flexible PCB portion 164. - It is understood that the various structural configurations and the position of the inner core assembly shown in the embodiments of
FIGS. 5-14 can be interchanged according to a specific application and application requirement. -
FIGS. 2-14 show an exemplary configuration where both sides of the inner core circuitry are protected using coverlay and dummy core, and subsequently exposed. This is referred to as a double-sided configuration In other embodiments, the inner core circuitry is formed from an inner core structure that is positioned as the outer most layers of a PCB stack-up. In the case where both sides of the inner core structure have inner core circuitry, only the inward facing side need by protected using coverlay and a dummy core, the outward facing side is left uncovered by coverlay. In the case where the inward facing side of the inner core structure does not include inner core circuitry, coverlay need not be used and only a dummy core is used to form the flexible PCB portion. Either of these cases is referred to as a single-sided configuration.FIGS. 15-23 illustrate various steps in the process used to manufacture a printed circuit board according to other embodiments. The printed circuit board manufactured using the various steps shown inFIGS. 15-23 is similar to and shares features of the printed circuit board and constituent layers shown inFIGS. 5-14 except that theFIGS. 15-23 are directed to a single-sided process where the inward facing side of the inner core structure doe not include inner core circuitry. Each of theFIGS. 15-23 illustrate a cut out side view of the printed circuit board according to the various process steps. - In
FIG. 15 , an exemplary inner core structure is shown. The inner core structure is a metal clad structure including anon-conductive layer 202 andconductive layers - In
FIG. 16 , theconductive layer 206 is selectively pattern etched to form pattern etchedconductive layer 208 and at least to exposesurface 203 of thenon-conductive layer 202. Alternatively, theconductive layer 206 is already pattern etched during fabrication of the inner core structure inFIG. 15 . It is understood thatFIG. 15-23 only show a portion of the printed circuit board and in particular only show a portion of the pattern etchedlayer 208. Additional interconnects and circuitry may be formed on portions of the inner core structure not shown inFIGS. 15-23 , those portions to be included as part of a rigid PCB portion of the printed circuit board. - In
FIG. 17 , additional core structures and a dummy core structure are fabricated, and the core structures, the inner core structure ofFIG. 16 and the dummy core structure are stacked with intervening non-conductive layers, such as regular flow prepreg. The additional core structures can be similar to the inner core structure ofFIG. 15 with the conductive layers pattern etched accordingly. However, the conductive layers of the additional core structures positioned are formed such that the resulting interconnects will be positioned in a rigid PCB portion of the resulting printed circuit board. In those additional core structures that include portions of a subsequent plug to be removed during a decap process, the corresponding conductive layer portions can be etched away or left intact. In most instances, the additional core structures are made using a non-conductive base material as opposed to FCCL. In the exemplary configuration shown inFIG. 17 , two additional core structures are included. Afirst core structure 222 includes anon-conductive layer 224 andconductive layers conductive layers FIG. 17 , the portions of theconductive layers surface 203 are removed. Alternatively, the portions of theconductive layers surface 203 can be left intact. Asecond core structure 230 includes anon-conductive layer 232 andconductive layers conductive layers FIG. 17 , the portions of theconductive layers surface 203 may include patterned interconnects. - A
dummy core 220 is positioned on the exposedsurface 203 of the inner core structure. Thedummy core 220 includes aconductive layer 218 and anon-conductive layer 216. Thedummy core 220 is oriented such that theconductive layer 218 is positioned against the exposedsurface 203. The base material of thenon-conductive layer 202 has a low adhesion to the material type of theconductive layer 218. This low adhesion enables removal of the dummy core from the inner core structure during a subsequent decap step shown and described in relation toFIG. 22 . - An intervening
non-conductive layer 238, such as regular flow prepreg, is positioned between thedummy core 220 and thecore structure 222, and an interveningnon-conductive layer 242, such a s regular flow prepreg, is positioned between thecore structure 222 and thecore structure 230. - In
FIG. 18 , selective holes are drilled through the laminated stack ofFIG. 17 to form vias, such as via 250. Vias are formed in those portions of the printed circuit board that will be rigid PCB portions. - In
FIG. 19 , a desmear process is performed to remove residue, such as residual particles from the drilling of via 250. Next, an electroless plating process is performed to form plating 252 on the side walls of thevia 250. In some embodiments, copper is used as the plating material. It is understood that other plating materials can be used. The plating 252 forms an interconnect with various conductive layers in the stack. - In
FIG. 20 , an outer conducting layer etching process is performed. The outward facingconductive layer 204 of the inner core structure is pattern etched to forminner core circuitry 210 andconductive layer 236 is pattern etched to form patternedconductive layers 236′. In particular, the portion of the conductive layers 246 aligned with thedummy core 220 is removed. - In
FIG. 21 , a depth controlled rout step is performed. As shown inFIG. 21 , arout 254 is made from thenon-conductive layer 232 to theconductive layer 218 of thedummy core 220.FIG. 21 shows a two dimensional view of therout 254. In three-dimensions, therout 254 is formed at an outer perimeter of thedummy core 220. A lateral rout is also performed such that theconductive layer 218 is free from surrounding prepreg material. - In
FIG. 22 , aplug 256 is removed, thereby exposing thesurface 203 of thenon-conductive layer 202. Theplug 256 is the area within therout 254 perimeter and between thenon-conducive layer 232 and theconductive layer 218 of thedummy core 220. The low adhesion between theconductive layer 218 and thesurface 203 enables the plug to simply be pulled apart from thenon-conductive layer 202. -
FIG. 23 shows the resulting printed circuit board after the decap process. Theinner core circuitry 210 and the portion of thenon-conductive layer 202 corresponding to the exposedsurface 203 form aflexible PCB portion 264. Remaining portions of the laminated stack formrigid PCB portions flexible PCB portion 264. - It is understood that the various structural configurations shown in the embodiments of
FIGS. 15-23 can be interchanged according to a specific applications and application requirement. - In some manufacturing processes, multiple PCBs are manufactured as discrete portions of a single substrate, which are separated into individual PCBs at the end of the manufacturing process. Such a single substrate configuration is referred to as a PCB set form.
FIG. 24 illustrates an exemplary PCB set form according to an embodiment. The exemplary PCB setform 30 includes two PCBs. A first PCB includes arigid PCB portion 32 and aflexible PCB portion 36. A second PCB includes arigid PCB portion 34 and aflexible PCB portion 38. In contrast to the PCBs shown inFIGS. 14 and 23 that include two rigid PCB portions per PCB, the PCBs shown inFIG. 24 each include only a single rigid PCB portion. It is understood that PCB set forms can include more or less than the exemplary two PCBs shown inFIG. 24 . The two PCBs are connected physically but not electrically. In some embodiments, an additional routing step is applied to an outer perimeter portion of a PCB set form. The additional routing step can be performed at any point in the printed circuit board manufacturing process after the lamination step is performed. For example, in the printed circuit board manufacturing process shown inFIGS. 5-14 , the additional routing step can be performed at any point after the lamination step shown inFIG. 8 . The additional routing step removes a perimeter portion of the laminated PCB stack up including the outer perimeter portion of the dummy core pattern, such as theouter perimeter portion 12 ofFIG. 1 . A resulting perimeter area surrounding the PCBs in the PCB setform 30 is shown inFIG. 24 asbreakaway area 46. - The
rigid PCB portions form 30 along etched lines. Cutting along the perimeter etch lines separates thebreakaway area 46 from the PCBs. -
FIG. 25 illustrates a perspective side view of the PCB setform 30 ofFIG. 24 . Thebreakaway area 46 includes adummy core portion 60, which is a remnant of a dummy core pattern used to protect theflexible PCB portion 38 ofFIG. 24 . As exemplified inFIG. 1 , a dummy core pattern can include an interconnect portion, such as theinterconnect portion 10 of thedummy core pattern 6 inFIG. 1 , a portion of which coincides with the breakaway area of a PCB set form, such as thebreakaway area 46 inFIG. 25 . As such, although the outer perimeter portion of the dummy core pattern, such as theouter perimeter portion 12 inFIG. 1 , as well as the overlay portions of the dummy core pattern that are applied over the coverlay and corresponding inner core circuitry, such as theoverlay portions 8 inFIG. 1 , are removed during the PCB manufacturing process, the interconnect portions that connect to the outer perimeter portion of the dummy core pattern remain. - In some embodiments, the flexible PCB portions can be formed as connector sections between rigid PCB portions, such as the configuration shown in
FIG. 24 . The flexible PCB portion is flexible thereby enabling two adjoining rigid PCB portions to rotate, or pivot, relative to each other. - The printed circuit board and manufacturing processes described herein provided numerous advantages. The printed circuit board having both rigid PCB portions and a flexible PCB portions is formed using regular flow prepreg. In prior art printed circuit boards, flexible PCB portions are formed using low flow prepreg as well as lamination accessories such as release film and conformal film. Use of low flow prepreg is needed to control squeeze out during lamination. However, since low flow prepreg is used, a greater lamination pressure is required which results in surface ripple on the PCB exterior surfaces. Under high pressure the underlying topography of the inner layer circuitry is reflected on the surface resulting in the irregular, or rippled, surface. In the present application, there is no need to control resin squeeze out, there is no limitation in prepreg selection, there is no need of lamination accessories or high lamination pressure, which results in a flat exterior surfaces. The present process improves board flatness that solves impedance control issues and improves reliability of surface mounted component connections. Yield of
fine line 2/2 mil etching and soldermask fine line imaging is also improved because of the flat exterior surfaces. Without use of lamination accessories and yield improvement, the process of the present application saves running cost dramatically. Higher pressure lamination as used in conventional processes leads to expansion in the X-Y plane of the PCB. Such lateral expansion moves surface contact pads relative to their designed positions. The present process uses standard lamination pressure and therefore reduces lateral expansion. Such dimensional control is becoming more and more significant with smaller and smaller pitch components to be surface mounted. - The printed circuit board and manufacturing process described herein also resolves the resin squeeze out issue at the rigid-flex boundary. In the present process, a well controlled and regular rigid-flex boundary is achieved while the prior art processes have poor control and irregular rigid-flex boundary which varies lot by lot. Conventional processes using low flow prepreg result in rougher, more irregular rigid-flex boundary. Such an irregular boundary affects reliability of the flexible PCB portion. In the current application, resin flow is restricted by the dummy core and a rigid-flexible boundary is defined by depth control rout. Therefore, the rigid-flexible boundary is substantially smooth and regular.
- The present process also enables precise removal of the plug using the described decap process steps.
- Standard rigid PCB design can be transferred to rigid-flex design smoothly using the present process, this expands product categories such as HDI, ELIC, 0.3 mm BGA pitch and sequential lamination, and hence increases business opportunities.
- An advantage of using the coverlay and dummy core in the manufacturing process is that relatively early in the manufacturing process a final circuit surface, for example the inner core circuitry, can be prepared and protected during subsequent process steps. The final covered circuit surface can be re-exposed from other layers of a PCB laminated stack later in the process without having been contaminated.
- The present application has been described in terms of specific embodiments incorporating details to facilitate the understanding of the principles of construction and operation of the printed circuit board. Many of the components shown and described in the various figures can be interchanged to achieve the results necessary, and this description should be read to encompass such interchange as well. As such, references herein to specific embodiments and details thereof are not intended to limit the scope of the claims appended hereto. It will be apparent to those skilled in the art that modifications can be made to the embodiments chosen for illustration without departing from the spirit and scope of the application.
Claims (30)
1. A printed circuit board comprising:
a. a rigid printed circuit board portion comprising a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure; and
b. a flexible printed circuit board portion comprising a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion, further wherein the second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry, wherein the coverlay material comprises a continuous layer having a first portion in the flexible printed circuit board portion that is the exposed coverlay material covering the inner core circuitry and a second portion embedded within the laminated stack of the rigid printed circuit board portion, the second portion only partially extending into the rigid printed circuit board portion.
2. The printed circuit board of claim 1 wherein each of the conductive layers is pattern etched.
3. The printed circuit board of claim 1 further comprising one or more plated through hole vias in the rigid printed circuit board portion.
4. The printed circuit board of claim 1 wherein the rigid printed circuit board portion comprises a first rigid printed circuit board portion, further wherein the printed circuit board further comprises a second rigid printed circuit board portion comprising a second laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the second laminated stack further comprises a third portion of the inner core structure, further wherein the flexible printed circuit board portion is coupled between the first rigid printed circuit board portion and the second rigid printed circuit board portion.
5. The printed circuit board of claim 1 wherein the inner core structure comprises an inner core non-conductive layer having a first surface and a first conductive layer positioned on the first surface of the inner core non-conductive layer.
6. The printed circuit board of claim 5 wherein the first conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure.
7. The printed circuit board of claim 6 wherein the inner core non-conductive layer has a second surface opposing the first surface, further wherein the inner core structure further comprises a second conductive layer positioned on the second surface of the inner core non-conductive layer.
8. The printed circuit board of claim 7 wherein the second conductive layer of the inner core structure comprises the inner core circuitry in the second portion of the inner core structure.
9. The printed circuit board of claim 5 wherein the inner core non-conductive layer comprises polyimide.
10. The printed circuit board of claim 1 wherein the coverlay material comprises a combination of polyimide and adhesive.
11. A printed circuit board set form comprising:
a. a plurality of printed circuit boards aligned within a common plane, wherein each printed circuit board is mechanically connected by a common substrate, further wherein each printed circuit board comprises:
i. a rigid printed circuit board portion comprising a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the laminated stack further comprises a first portion of an inner core structure; and
ii. a flexible printed circuit board portion comprising a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion, further wherein the second portion of the inner core structure comprises inner core circuitry and exposed coverlay material covering the inner core circuitry; and
b. a breakaway substrate aligned within the common plane and mechanically connected around a perimeter of the connected plurality of printed circuit boards, wherein the breakaway substrate includes a dummy core portion.
12. The printed circuit board set form of claim 9 wherein the breakaway substrate provides lateral structural stability to the connected plurality of printed circuit boards.
13. The printed circuit board set form of claim 9 wherein the plurality of printed circuit boards are electrically isolated from each other.
14. A method of manufacturing a printed circuit board comprising:
a. forming an inner core structure having an inner core circuitry on at least one surface of the inner core structure;
b. applying a coverlay material over the inner core circuitry;
c. forming a printed circuit board stack up, wherein the printed circuit board stack up comprises the inner core structure, a dummy core, one or more non-conductive layers and one or more conductive layers, wherein the dummy core is stacked on the coverlay material;
d. laminating the printed circuit board stack up, thereby forming a laminated stack;
e. forming a depth controlled rout from a surface of the laminated stack to the dummy core and around a perimeter of the dummy core, wherein a portion of the laminated stack within the perimeter of the rout and to a depth including the dummy core forms a laminated stack cap;
f. removing the laminated stack cap, thereby exposing the coverlay material and forming a flexible portion of the printed circuit board.
15. The method of claim 14 wherein the perimeter of the dummy core corresponds to a perimeter of the inner core circuitry.
16. The method of claim 14 further comprising forming the dummy core, wherein the dummy core comprises a non-conductive layer and a conductive layer.
17. The method of claim 16 wherein the dummy core is stacked on the coverlay material such that the conductive layer of the dummy core contacts the coverlay material.
18. The method of claim 14 further comprising forming at least one plated through hole via in the laminated stack prior to forming the depth controlled rout, wherein the at least one plated through hole via is not aligned within the inner core circuitry.
19. The method of claim 14 further comprising pattern etching the conductive layers in the laminated stack prior to forming the printed circuit board stack up.
20. The method of claim 14 wherein forming the inner core structure comprises applying a first conductive layer on a first surface of a non-conductive layer and applying a second conductive layer on a second surface of the non-conductive layer.
21. The method of claim 20 wherein the first conductive layer is pattern etched and the second conductive layer is pattern etched.
22. The method of claim 14 wherein the one or more non-conductive layers comprise one or more regular flow prepreg layers.
23. The method of claim 22 wherein laminating the printed circuit board stack up comprises applying a standard lamination pressure less than about 450 psi.
24. The method of claim 23 wherein a remaining portion of the laminated stack outside the perimeter of the rout forms a rigid portion of the printed circuit board, wherein an exposed outer surface of the laminated stack is smooth and non-rippled due to laminating the printed circuit board stack up using regular lamination pressure and the inclusion of regular flow prepreg.
25. A printed circuit board comprising:
a. a rigid printed circuit board portion comprising a laminated stack of a plurality of non-conducting layers and a plurality of conductive layers, wherein the plurality of non-conducting layers comprises a plurality of regular flow prepreg layers, further wherein an exposed outer surface of the laminated stack is smooth and non-rippled, wherein the laminated stack further comprises a first portion of an inner core structure; and
b. a flexible printed circuit board portion comprising a second portion of the inner core structure, wherein the inner core structure is a continuous structure that extends through both the rigid printed circuit board portion and the flexible printed circuit board portion, further wherein the second portion of the inner core structure comprises inner core circuitry, wherein an exposed lateral surface of the rigid printed circuit board forms a rigid-flexible boundary, wherein the rigid-flexible boundary formed at the exposed lateral surface is substantially smooth and regular.
26. The printed circuit board of claim 25 wherein the second portion of the inner core structure further comprises an exposed coverlay material covering the inner core circuitry.
27. The printed circuit board of claim 25 wherein the regular flow prepreg layers each comprise prepreg having resin flow greater than about 100 mil.
28. (canceled)
29. The printed circuit board of claim 26 wherein the coverlay material comprises a continuous layer having a first portion in the flexible printed circuit board portion that is the exposed coverlay material covering the inner core circuitry and a second portion embedded within the laminated stack of the rigid printed circuit board portion, the second portion only partially extending into the rigid printed circuit board portion.
30. The printed circuit board of claim 1 wherein the first portion of the coverlay material in the flexible printed circuit board portion has a first surface facing the inner core circuitry and a second surface opposite the first surface, wherein an entirety of the second surface of the first portion of the coverlay material in the flexible printed circuit board portion is exposed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/552,723 US10772220B2 (en) | 2016-02-17 | 2019-08-27 | Dummy core restrict resin process and structure |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610090048.5 | 2016-02-17 | ||
CN201610090048 | 2016-02-17 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/552,723 Division US10772220B2 (en) | 2016-02-17 | 2019-08-27 | Dummy core restrict resin process and structure |
Publications (1)
Publication Number | Publication Date |
---|---|
US20170238416A1 true US20170238416A1 (en) | 2017-08-17 |
Family
ID=59561981
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/064,437 Abandoned US20170238416A1 (en) | 2016-02-17 | 2016-03-08 | Dummy core restrict resin process and structure |
US16/552,723 Active US10772220B2 (en) | 2016-02-17 | 2019-08-27 | Dummy core restrict resin process and structure |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/552,723 Active US10772220B2 (en) | 2016-02-17 | 2019-08-27 | Dummy core restrict resin process and structure |
Country Status (1)
Country | Link |
---|---|
US (2) | US20170238416A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113382536A (en) * | 2021-07-27 | 2021-09-10 | 生益电子股份有限公司 | PCB preparation method and PCB |
CN114900998A (en) * | 2022-06-06 | 2022-08-12 | 盐城维信电子有限公司 | Multilayer circuit board and processing method thereof |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20230016089A (en) | 2021-07-22 | 2023-02-01 | 삼성전자주식회사 | Semiconductor package |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4338149A (en) * | 1979-11-20 | 1982-07-06 | Kollmorgen Technologies Corporation | Process for making circuit boards having rigid and flexible areas |
US5004639A (en) * | 1990-01-23 | 1991-04-02 | Sheldahl, Inc. | Rigid flex printed circuit configuration |
US5116440A (en) * | 1989-08-09 | 1992-05-26 | Risho Kogyo Co., Ltd. | Process for manufacturing multilayer printed wiring board |
US5121297A (en) * | 1990-12-31 | 1992-06-09 | Compaq Computer Corporation | Flexible printed circuits |
US5175047A (en) * | 1990-08-09 | 1992-12-29 | Teledyne Industries, Inc. | Rigid-flex printed circuit |
US5206463A (en) * | 1990-07-24 | 1993-04-27 | Miraco, Inc. | Combined rigid and flexible printed circuits and method of manufacture |
US7281328B2 (en) * | 2004-10-28 | 2007-10-16 | Samsung Electro-Mechanics Co., Ltd. | Method of fabricating rigid-flexible printed circuit board |
US7576288B2 (en) * | 2002-11-27 | 2009-08-18 | Sumitomo Bakelite Company Limited | Circuit board, multi-layer wiring boards, method of producing circuit boards and method of producing multilayer wiring boards |
US8558116B2 (en) * | 2009-10-28 | 2013-10-15 | Samsung Electro-Mechanics Co., Ltd. | Multilayer rigid flexible printed circuit board and method for manufacturing the same |
US20150027627A1 (en) * | 2012-02-24 | 2015-01-29 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing rigid-flexible printed circuit board |
US20150376444A1 (en) * | 2013-02-12 | 2015-12-31 | Panasonic Intellectual Property Management Co., Ltd. | Resin composition, resin varnish, prepreg, metal-clad laminate and printed wiring board |
US20160324012A1 (en) * | 2013-12-11 | 2016-11-03 | Guangzhou Fastprint Circut Tech Co., Ltd. | Rigid-flexible circuit board having flying-tail structure and method for manufacturing same |
Family Cites Families (60)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2755290C2 (en) | 1976-12-13 | 1983-08-18 | Tokyo Denki Kagaku Kogyo K.K., Tokyo | DEVICE FOR CUTTING AND BENDING THE LEADS OF AN ELECTRONIC COMPONENT INSERTED IN A PRINTED CIRCUIT |
US4356619A (en) | 1980-05-12 | 1982-11-02 | Universal Instruments Corporation | Cut and clinch head assembly |
US4630172A (en) | 1983-03-09 | 1986-12-16 | Printed Circuits International | Semiconductor chip carrier package with a heat sink |
US4726114A (en) | 1985-04-22 | 1988-02-23 | Theodore Staviski | Electrical component lead bending and cutting apparatus |
US4691419A (en) | 1985-11-12 | 1987-09-08 | Rca Corporation | Robot end effector for processing component leads |
US4941516A (en) | 1988-10-20 | 1990-07-17 | Weiswurm Klaus D | Method and apparatus for straightening the pins of a pin grid array |
US5159750A (en) | 1989-12-20 | 1992-11-03 | National Semiconductor Corporation | Method of connecting an IC component with another electrical component |
US5227223A (en) | 1989-12-21 | 1993-07-13 | Monsanto Company | Fabricating metal articles from printed images |
JP2881963B2 (en) | 1990-05-25 | 1999-04-12 | ソニー株式会社 | Wiring board and manufacturing method thereof |
US5153050A (en) * | 1991-08-27 | 1992-10-06 | Johnston James A | Component of printed circuit boards |
JP3300820B2 (en) | 1993-03-17 | 2002-07-08 | 株式会社リコー | Thermal transfer recording medium |
JPH0786717A (en) | 1993-09-17 | 1995-03-31 | Fujitsu Ltd | Printing wiring board structure |
US5876859A (en) | 1994-11-10 | 1999-03-02 | Vlt Corporation | Direct metal bonding |
US6214525B1 (en) | 1996-09-06 | 2001-04-10 | International Business Machines Corp. | Printed circuit board with circuitized cavity and methods of producing same |
US5784782A (en) | 1996-09-06 | 1998-07-28 | International Business Machines Corporation | Method for fabricating printed circuit boards with cavities |
US6090237A (en) | 1996-12-03 | 2000-07-18 | Reynolds; Carl V. | Apparatus for restraining adhesive overflow in a multilayer substrate assembly during lamination |
US6350387B2 (en) | 1997-02-14 | 2002-02-26 | Teledyne Industries, Inc. | Multilayer combined rigid/flex printed circuit board containing flexible soldermask |
KR100265461B1 (en) | 1997-11-21 | 2000-09-15 | 윤종용 | Semiconductor integrated circuit device having dummy bonding wire |
US6224965B1 (en) * | 1999-06-25 | 2001-05-01 | Honeywell International Inc. | Microfiber dielectrics which facilitate laser via drilling |
AU2003214877A1 (en) | 2002-01-22 | 2003-09-02 | Pmj Automec Usa, Inc. D/B/A Pmj Cencorp, Inc. | Depaneling systems |
JP2003229669A (en) | 2002-02-01 | 2003-08-15 | Tdk Corp | Multilayered ceramic substrate and method and device for manufacturing it |
JP4276864B2 (en) | 2002-03-19 | 2009-06-10 | 大日本印刷株式会社 | Security element, thermal transfer sheet, intermediate transfer recording medium, and security element forming method |
US20040219342A1 (en) | 2003-01-07 | 2004-11-04 | Boggs David W. | Electronic substrate with direct inner layer component interconnection |
JP4320559B2 (en) | 2003-05-14 | 2009-08-26 | セイコーエプソン株式会社 | Droplet discharge device |
US7382629B2 (en) | 2004-05-11 | 2008-06-03 | Via Technologies, Inc. | Circuit substrate and method of manufacturing plated through slot thereon |
US7221050B2 (en) | 2004-09-02 | 2007-05-22 | Intel Corporation | Substrate having a functionally gradient coefficient of thermal expansion |
US8217869B2 (en) | 2004-12-20 | 2012-07-10 | Palo Alto Research Center Incorporated | Flexible display system |
US8252385B2 (en) | 2005-03-25 | 2012-08-28 | E I Du Pont De Nemours And Company | Spin-printing of electronic and display components |
DE502005002224D1 (en) | 2005-05-13 | 2008-01-24 | Sefar Ag | Printed circuit board and method for its production |
SE529377C2 (en) | 2005-10-18 | 2007-07-24 | Morphic Technologies Ab Publ | Method and arrangement for locating and picking up items from a carrier |
JP3993211B2 (en) | 2005-11-18 | 2007-10-17 | シャープ株式会社 | Multilayer printed wiring board and manufacturing method thereof |
US7523545B2 (en) | 2006-04-19 | 2009-04-28 | Dynamic Details, Inc. | Methods of manufacturing printed circuit boards with stacked micro vias |
KR100754080B1 (en) | 2006-07-13 | 2007-08-31 | 삼성전기주식회사 | Rigid-flexible printed circuit board and manufacturing method therefor |
US7949220B2 (en) | 2006-07-20 | 2011-05-24 | Hitachi Chemical Company, Ltd. | Hybrid optical/electrical mixed circuit board |
US7313464B1 (en) | 2006-09-05 | 2007-12-25 | Adept Technology Inc. | Bin-picking system for randomly positioned objects |
JP4788544B2 (en) | 2006-09-22 | 2011-10-05 | 株式会社村田製作所 | Multilayer ceramic substrate and manufacturing method thereof |
US20080217708A1 (en) | 2007-03-09 | 2008-09-11 | Skyworks Solutions, Inc. | Integrated passive cap in a system-in-package |
JP5104761B2 (en) | 2007-04-09 | 2012-12-19 | 株式会社村田製作所 | Ceramic substrate and manufacturing method thereof |
AT505834B1 (en) | 2007-09-21 | 2009-09-15 | Austria Tech & System Tech | CIRCUIT BOARD ELEMENT |
KR100891814B1 (en) | 2007-10-29 | 2009-04-07 | 삼성전기주식회사 | Low temperature co-fired ceramics and method of manufacturing the same |
KR100887133B1 (en) | 2007-11-28 | 2009-03-04 | 삼성전기주식회사 | Low temperature co-fired ceramic substrate |
CN101911853B (en) | 2008-01-18 | 2012-04-25 | 松下电器产业株式会社 | Three-dimensional wiring board |
TWI449745B (en) | 2008-12-22 | 2014-08-21 | Iteq Corp | Bonding sheet and resin composition for preparing the same |
EP2399289B1 (en) | 2009-02-20 | 2018-06-27 | Telefonaktiebolaget LM Ericsson (publ) | Thermal pad and method of forming the same |
US7898068B2 (en) | 2009-02-20 | 2011-03-01 | National Semiconductor Corporation | Integrated circuit micro-module |
US8187920B2 (en) | 2009-02-20 | 2012-05-29 | Texas Instruments Incorporated | Integrated circuit micro-module |
US8020292B1 (en) | 2010-04-30 | 2011-09-20 | Ddi Global Corp. | Methods of manufacturing printed circuit boards |
US8519270B2 (en) | 2010-05-19 | 2013-08-27 | Unimicron Technology Corp. | Circuit board and manufacturing method thereof |
US9282626B2 (en) | 2010-10-20 | 2016-03-08 | Lg Innotek Co., Ltd. | Printed circuit board and method for manufacturing the same |
US8735739B2 (en) | 2011-01-13 | 2014-05-27 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
US20130341078A1 (en) | 2012-06-20 | 2013-12-26 | Keith Bryan Hardin | Z-directed printed circuit board components having a removable end portion and methods therefor |
JP5464760B2 (en) | 2011-10-21 | 2014-04-09 | 株式会社フジクラ | Multilayer circuit board manufacturing method |
WO2013099944A1 (en) | 2011-12-27 | 2013-07-04 | 株式会社村田製作所 | Multilayer ceramic substrate and electronic component using same |
US8835195B2 (en) | 2012-07-19 | 2014-09-16 | Eastman Kodak Company | Corrugated membrane MEMS actuator fabrication method |
JP5895131B2 (en) | 2012-12-25 | 2016-03-30 | パナソニックIpマネジメント株式会社 | Electronic component mounting system and electronic component mounting method |
JP6214930B2 (en) | 2013-05-31 | 2017-10-18 | スナップトラック・インコーポレーテッド | Multilayer wiring board |
JP2015012022A (en) | 2013-06-26 | 2015-01-19 | イビデン株式会社 | Printed wiring board |
US9085826B2 (en) | 2013-09-27 | 2015-07-21 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Method of fabricating printed circuit board (PCB) substrate having a cavity |
CN106134308B (en) | 2014-03-28 | 2019-10-11 | 株式会社富士 | Cutting clenches device and to substrate operation machine |
US9999134B2 (en) | 2016-03-14 | 2018-06-12 | Multek Technologies Limited | Self-decap cavity fabrication process and structure |
-
2016
- 2016-03-08 US US15/064,437 patent/US20170238416A1/en not_active Abandoned
-
2019
- 2019-08-27 US US16/552,723 patent/US10772220B2/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4338149A (en) * | 1979-11-20 | 1982-07-06 | Kollmorgen Technologies Corporation | Process for making circuit boards having rigid and flexible areas |
US5116440A (en) * | 1989-08-09 | 1992-05-26 | Risho Kogyo Co., Ltd. | Process for manufacturing multilayer printed wiring board |
US5004639A (en) * | 1990-01-23 | 1991-04-02 | Sheldahl, Inc. | Rigid flex printed circuit configuration |
US5206463A (en) * | 1990-07-24 | 1993-04-27 | Miraco, Inc. | Combined rigid and flexible printed circuits and method of manufacture |
US5175047A (en) * | 1990-08-09 | 1992-12-29 | Teledyne Industries, Inc. | Rigid-flex printed circuit |
US5121297A (en) * | 1990-12-31 | 1992-06-09 | Compaq Computer Corporation | Flexible printed circuits |
US7576288B2 (en) * | 2002-11-27 | 2009-08-18 | Sumitomo Bakelite Company Limited | Circuit board, multi-layer wiring boards, method of producing circuit boards and method of producing multilayer wiring boards |
US7281328B2 (en) * | 2004-10-28 | 2007-10-16 | Samsung Electro-Mechanics Co., Ltd. | Method of fabricating rigid-flexible printed circuit board |
US8558116B2 (en) * | 2009-10-28 | 2013-10-15 | Samsung Electro-Mechanics Co., Ltd. | Multilayer rigid flexible printed circuit board and method for manufacturing the same |
US20150027627A1 (en) * | 2012-02-24 | 2015-01-29 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing rigid-flexible printed circuit board |
US20150376444A1 (en) * | 2013-02-12 | 2015-12-31 | Panasonic Intellectual Property Management Co., Ltd. | Resin composition, resin varnish, prepreg, metal-clad laminate and printed wiring board |
US20160324012A1 (en) * | 2013-12-11 | 2016-11-03 | Guangzhou Fastprint Circut Tech Co., Ltd. | Rigid-flexible circuit board having flying-tail structure and method for manufacturing same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113382536A (en) * | 2021-07-27 | 2021-09-10 | 生益电子股份有限公司 | PCB preparation method and PCB |
CN114900998A (en) * | 2022-06-06 | 2022-08-12 | 盐城维信电子有限公司 | Multilayer circuit board and processing method thereof |
Also Published As
Publication number | Publication date |
---|---|
US20200015365A1 (en) | 2020-01-09 |
US10772220B2 (en) | 2020-09-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9999134B2 (en) | Self-decap cavity fabrication process and structure | |
US10321560B2 (en) | Dummy core plus plating resist restrict resin process and structure | |
JP4499126B2 (en) | Rigid flexible printed circuit board and manufacturing method thereof | |
US9763327B2 (en) | Selective segment via plating process and structure | |
US10064292B2 (en) | Recessed cavity in printed circuit board protected by LPI | |
EP2001271A2 (en) | Method for making a multilayered circuitized substrate | |
US20090232925A1 (en) | Cutting mold for rigid-flexible circuit board and method for forming the same | |
CN106034377B (en) | Selective segment via plating process and structure | |
JP6795137B2 (en) | Manufacturing method of printed circuit board with built-in electronic elements | |
US10772220B2 (en) | Dummy core restrict resin process and structure | |
US9992880B2 (en) | Rigid-bend printed circuit board fabrication | |
US10292279B2 (en) | Disconnect cavity by plating resist process and structure | |
TW200412205A (en) | Double-sided printed circuit board without via holes and method of fabricating the same | |
KR102488164B1 (en) | Printed circuit boards having profiled conductive layer and methods of manufacturing same | |
US6745463B1 (en) | Manufacturing method of rigid flexible printed circuit board | |
JP2008311612A (en) | Multilayer printed circuit board, and method of manufacturing the same | |
KR101023372B1 (en) | Pcb manufacturing method with a plurality of differently-layered structures and pcb thereby | |
EP1802187A2 (en) | Printed circuit board and manufacturing method thereof | |
US20170271734A1 (en) | Embedded cavity in printed circuit board by solder mask dam | |
KR20160097801A (en) | Printed circuit board and method of manufacturing the same | |
KR101055455B1 (en) | Carrier member for substrate manufacturing and method for manufacturing substrate using same | |
US20170339788A1 (en) | Split via second drill process and structure | |
KR100722600B1 (en) | Method for forming through holes of multilayer printed circuit board | |
CN106163076B (en) | Selective segment via plating process and structure | |
JP2005109299A (en) | Multilayer wiring board and its manufacturing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: MULTEK TECHNOLOGIES LIMITED, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ZHOU, JL;YU, PUI YIN;REEL/FRAME:037925/0897 Effective date: 20160302 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: FINAL REJECTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: ADVISORY ACTION MAILED |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |