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US20140225876A1 - Display apparatus, driving chip and error message transmission method thereof - Google Patents

Display apparatus, driving chip and error message transmission method thereof Download PDF

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Publication number
US20140225876A1
US20140225876A1 US13/948,177 US201313948177A US2014225876A1 US 20140225876 A1 US20140225876 A1 US 20140225876A1 US 201313948177 A US201313948177 A US 201313948177A US 2014225876 A1 US2014225876 A1 US 2014225876A1
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US
United States
Prior art keywords
error
data stream
driving chip
display
recited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/948,177
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English (en)
Inventor
Chih-Chao Yang
Wei-Ying Tu
Feng-Jung Kuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Novatek Microelectronics Corp
Original Assignee
Novatek Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Novatek Microelectronics Corp filed Critical Novatek Microelectronics Corp
Assigned to NOVATEK MICROELECTRONICS CORP. reassignment NOVATEK MICROELECTRONICS CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KUO, FENG-JUNG, TU, WEI-YING, YANG, CHIH-CHAO
Publication of US20140225876A1 publication Critical patent/US20140225876A1/en
Abandoned legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/10—Use of a protocol of communication by packets in interfaces along the display data pipeline

Definitions

  • the invention relates to a driving chip of a display apparatus; more particularly, the invention relates to an apparatus and a method for a driving chip to transmit an error message to a system end.
  • MIPI mobile industry processor interface
  • the system end if it is intended to transmit the error message back to the system end, the system end is required to terminate the transmission of the image sequence data stream and then receive the error message through the MIPI. That is, in order to rectify the error, the display apparatus cannot be used for a while, which causes inconvenience to users of the display apparatus.
  • the invention is directed to a driving chip for driving a display panel and capable of transmitting an error message in the driving chip to a system end immediately.
  • the invention is directed to a display apparatus in which a driving chip is able to transmit an error message in the driving chip to a system end immediately.
  • the invention is directed to an error message transmission method of a driving chip of a display apparatus.
  • the error message in the driving chip may be effectively and immediately transmitted to a system end.
  • a driving chip connects a system end to drive a display panel.
  • the driving chip includes a display data receiving interface and an error detector.
  • the display data receiving interface receives a display data stream from the system end.
  • the error detector is coupled to the display data receiving interface and detects at least one error message generated when the display data receiving interface receives the display data stream.
  • the driving chip has a plurality of output pins, and the driving chip transmits the error message to the system end through at least one idle pin among the output pins.
  • a display apparatus that includes a system end, a display panel, and a driving chip.
  • the driving chip is coupled to the system end and the display panel.
  • the driving chip includes a display data receiving interface and an error detector.
  • the display data receiving interface receives a display data stream from the system end.
  • the error detector is coupled to the display data receiving interface.
  • the error detector detects at least one error message generated when the display data receiving interface receives the display data stream.
  • the driving chip has a plurality of output pins, and the error detector transmits the error message to the system end through at least one idle pin among the output pins.
  • an error message transmission method of a driving chip of a display apparatus includes: receiving a display data stream from a system end; detecting at least one error message generated when the display data stream is received; transmitting the error message to the system end through at least one idle pin among a plurality of output pins of the driving chip.
  • the error detector immediately detects the error message generated when the display data receiving interface receives the display data stream from the system end, and the error message is transmitted to the system end through the idle pin on the driving chip. Thereby, the system end is able to timely obtain the error message from the driving chip and is not required to receive the error message after terminating the transmission of the display data stream within a certain time frame, such that the display apparatus may be operated in a more efficient manner.
  • FIG. 1 is a schematic diagram illustrating a display apparatus 100 according to an embodiment of the invention.
  • FIG. 2 illustrates a waveform of an error data stream ERRS according to an embodiment of the invention.
  • FIG. 3A to FIG. 3C respectively illustrate waveforms of error data signals according to several embodiments of the invention.
  • FIG. 4 is a flowchart illustrating an error message transmission method according to an embodiment of the invention.
  • FIG. 1 is a schematic diagram illustrating a display apparatus 100 according to an embodiment of the invention.
  • the display apparatus 100 includes a system end 110 , a driving chip 120 , and a display panel 130 .
  • the driving chip 120 is coupled to the system end 110 and the display panel 130 .
  • the driving chip 120 includes a display data receiving interface 121 , an error detector 122 , a display controller 123 , and a memory 124 .
  • the display data receiving interface 121 is coupled to the system end 110 to receive a display data stream DSI from the system end 110 .
  • the error detector 122 is coupled to the display data receiving interface 121 and detects at least one error message generated when the display data receiving interface 121 receives the display data stream DSI.
  • the error message may be generated because of the interference from the location of the display apparatus 100 , the impedance mismatch of a transmission line between the system end 110 and the display data receiving interface 121 , and/or the excessively fast data transmission speed of the display data stream DSI.
  • the error detector 122 After the error detector 122 detects and obtains at least one error message generated when the display data receiving interface 121 receives the display data stream DSI, the error detector 122 transmits the detected error message back to the system end 110 .
  • the error detector 122 may generate an error data stream ERRS according to the error message and transmit the error data stream ERRS to the system end 110 for analysis through a non-high-speed transmission channel.
  • the error detector 122 described in the present embodiment may transmit the error data stream ERRS through the idle pin among the output pins of the driving chip 120 .
  • the idle pin may be a backlight control signal pin LEDPWM or a tearing effect (TE) signal pin TE, for instance.
  • any serial interface may be applied, such as an inter-integrated circuit (I2C) interface, a serial peripheral interface (SPI), and so forth.
  • I2C inter-integrated circuit
  • SPI serial peripheral interface
  • the display controller 123 is coupled to the display data receiving interface 121 and receives a display data from the display data receiving interface 121 . According to the received display data, the display controller 123 generates a plurality of driving signals DOUT to drive the display panel 130 .
  • the memory 124 is coupled to the display controller 123 and serves as a data buffer for the display controller 123 . According to the requirements of the display controller 123 , the memory 124 may act as a frame buffer and/or a line buffer. Since the way to use the memory as the frame buffer and/or the line buffer is known to people having ordinary skill in the pertinent art, no further explanation is provided hereinafter.
  • FIG. 2 illustrates a waveform of an error data stream ERRS according to an embodiment of the invention.
  • the error data stream ERRS sequentially includes an error start signal ES, error data signals ER 1 and ER 2 , and an error end signal EE.
  • the number of the error data signals ER 1 and ER 2 shown in FIG. 2 is merely exemplary, while the error start signal ES and the error end signal EE in the same error data stream ERRS may include one or more error data signals; that is, the number of the error data signals should not be construed as a limitation to the invention.
  • the error data stream ERRS may further include an error start protection signal GOS that is configured between the error start signal ES and the error data signal ER 1 for separating these two signals and preventing these two signals from interrupting each other. It is also likely to configure a bit boundary signal BB between the error data signals ER 1 and ER 2 , so as to separate the error data signals ER 1 and ER 2 from each other. That is, in one error data stream ERRS, the number of the bit boundary signals BB may be obtained by subtracting 1 from the number of the error data signals.
  • the error start signal ES is composed of plural pulses for informing the system end 110 of preparing to receive the error data signals ER 1 and ER 2 subsequently.
  • the error start protection signal GOS may be a pulse signal that is continuously pulled up, so as to effectively separate the error start signal ES from the subsequent error data signal ER 1 .
  • the error start protection signal GOS is not required; given that the signal transmission quality is satisfactory, the error start protection signal GOS may be omitted.
  • the bit boundary signal BB may also be a pulse signal that is continuously pulled up, so as to effectively separate the adjacent error data signals ER 1 and ER 2 . Certainly, in case of the favorable signal transmission quality, the bit boundary signal BB may also be omitted.
  • the error end signal EE may also be a pulse signal that is continuously pulled up, so as to notify the termination of the transmission of the error data stream ERRS.
  • the pull-up time of these signals may be defined differently, such that the system end 110 is able to learn whether the pull-up signal received by itself is the error end signal EE or the bit boundary signal BB (for separating the adjacent error data signals ER 1 and ER 2 )/the error start protection signal GOS.
  • the error end signal EE, the bit boundary signal BB, and the error start protection signal GOS may also be represented by different waveforms and should not be limited to the pull-up signals described in the present embodiment.
  • FIG. 3A to FIG. 3C respectively illustrate waveforms of error data signals according to several embodiments of the invention.
  • the error data stream ERRS is in the digital format
  • the error data signal ER 1 is divided into a plurality of time periods T1 to T4
  • the error data signal ER 2 is divided into a plurality of time periods T13 to T17.
  • These error data signals ER 1 and ER 2 are respectively defined to correspond to the errors that may occur when the display data receiving interface 121 receives the display data stream DSI.
  • the error data signal ER 1 may be divided into 10 time periods respectively corresponding to the errors 1 to 10
  • the error data signal ER 2 may be divided into 10 time periods respectively corresponding to the errors 11 to 20.
  • the errors 2 and 14 occur; thus, the voltage in the time period T2 of the error data signal ER 1 corresponding to the error 2 is pulled up to be equal to a specific voltage (e.g., a logic high voltage), and the voltage in the time period T14 of the error data signal ER 2 corresponding to the error 14 is also pulled up to be equal to the logic high voltage.
  • a specific voltage e.g., a logic high voltage
  • the errors 1, 3 to 13, and 15-20 do not occur, and thus the voltage in the time periods T1, T3 to T13, and T15 to T20 of the error data signals ER 1 and ER 2 stays to be a logic low voltage (e.g., at 0 volt).
  • the bit boundary signal BB is not required for separating the error data signals ER 1 and ER 2 from each other.
  • the error data signal ER 1 may be divided into 10 time periods respectively corresponding to the errors 20 to 11
  • the error data signal ER 2 may be divided into 10 time periods respectively corresponding to the errors 10 to 1.
  • the errors 19 and 7 may occur when the display data receiving interface 121 receives the display data stream DSI.
  • the error data stream is in the analog format.
  • the error data signal ER 1 of the error data stream ERRS 1 indicates that no error occurs, such that voltages V1 to V5 of the error data signal ER 1 gradually increase in a stepwise manner during the consecutive time periods T1 to T4.
  • the error data signal ER 2 of the error data stream ERRS 2 the voltages in the time periods T1 and T4 are pulled to be equal to a certain voltage (i.e., the voltage V0). If the time periods T1 to T4 respectively correspond to errors 1 to 4, the error data signal ER 2 indicates that the errors 1 and 4 occur.
  • FIG. 4 is a flowchart illustrating an error message transmission method according to an embodiment of the invention.
  • the driving chip receives a display data stream from a system end; in step S 420 , the step of detecting at least one error message generated when the display data stream is received is simultaneously performed; in step S 430 , the error message is transmitted to the system end through at least one idle pin among the output pins of the driving chip.
  • the detailed steps of the error message transmission method in the embodiment are elaborated in above embodiments and thus will not be further provided hereinafter.
  • the error detector is applied to detect the error message generated when the display data receiving interface receives the display data stream, and the error message is transmitted to the system end through the idle pin of the driving chip.
  • the error message may be transmitted back to the system end by means of the existing pins of the driving chip while the display data stream is continuously transmitted. Since the error message is effectively and immediately transmitted to the system end, the system end is able to timely analyze the transmission status of the display data stream and rectify the error, and therefore the performance of the display apparatus may be improved.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
US13/948,177 2013-02-08 2013-07-23 Display apparatus, driving chip and error message transmission method thereof Abandoned US20140225876A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW102105160A TWI506608B (zh) 2013-02-08 2013-02-08 顯示裝置、驅動晶片以及錯誤信息的傳輸方式
TW102105160 2013-02-08

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US20140225876A1 true US20140225876A1 (en) 2014-08-14

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TW (1) TWI506608B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD856880S1 (en) * 2017-04-17 2019-08-20 Nio Nextev Limited Central screen in a car

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI755482B (zh) * 2017-02-20 2022-02-21 日商精工愛普生股份有限公司 驅動器、光電裝置及電子機器

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KR20050052890A (ko) * 2003-12-01 2005-06-07 엘지전자 주식회사 이동통신 단말기의 표시부 백라이트 전원제어장치
US20080303836A1 (en) * 2007-06-01 2008-12-11 National Semiconductor Corporation Video display driver with partial memory control
US20120102534A1 (en) * 2010-10-26 2012-04-26 Samsung Electronics Co., Ltd. Method and device for transmitting and receiving video stream
US20120166896A1 (en) * 2010-12-28 2012-06-28 Silicon Works Co., Ltd Method and apparatus for transmitting data between timing controller and source driver, having bit error rate test function
US20130031344A1 (en) * 2011-07-28 2013-01-31 Hon Hai Precision Industry Co., Ltd. Computer and display and boot circuit for same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI327305B (en) * 2006-02-07 2010-07-11 Au Optronics Corp Circuit and method for checking connection between application specific integrated circuit (asic) and buffer memory for a panel, and asic for a panel
KR20070080720A (ko) * 2006-02-08 2007-08-13 삼성전자주식회사 신호 처리 장치, 액정 표시 장치 및 액정 표시 장치의테스트 시스템
TW201115218A (en) * 2009-10-27 2011-05-01 Himax Tech Ltd Liquid crystal display (LCD) and LCD driver IC thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050052890A (ko) * 2003-12-01 2005-06-07 엘지전자 주식회사 이동통신 단말기의 표시부 백라이트 전원제어장치
US20080303836A1 (en) * 2007-06-01 2008-12-11 National Semiconductor Corporation Video display driver with partial memory control
US20120102534A1 (en) * 2010-10-26 2012-04-26 Samsung Electronics Co., Ltd. Method and device for transmitting and receiving video stream
US20120166896A1 (en) * 2010-12-28 2012-06-28 Silicon Works Co., Ltd Method and apparatus for transmitting data between timing controller and source driver, having bit error rate test function
US20130031344A1 (en) * 2011-07-28 2013-01-31 Hon Hai Precision Industry Co., Ltd. Computer and display and boot circuit for same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD856880S1 (en) * 2017-04-17 2019-08-20 Nio Nextev Limited Central screen in a car

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TWI506608B (zh) 2015-11-01
TW201432644A (zh) 2014-08-16

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Legal Events

Date Code Title Description
AS Assignment

Owner name: NOVATEK MICROELECTRONICS CORP., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YANG, CHIH-CHAO;TU, WEI-YING;KUO, FENG-JUNG;REEL/FRAME:030929/0610

Effective date: 20130412

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION