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US20110272178A1 - Substrate for an electrical device - Google Patents

Substrate for an electrical device Download PDF

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Publication number
US20110272178A1
US20110272178A1 US13/188,478 US201113188478A US2011272178A1 US 20110272178 A1 US20110272178 A1 US 20110272178A1 US 201113188478 A US201113188478 A US 201113188478A US 2011272178 A1 US2011272178 A1 US 2011272178A1
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United States
Prior art keywords
conductive element
insulator
substrate
conductive
protruding portion
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Abandoned
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US13/188,478
Inventor
Chung-Cheng Wang
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Individual
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Individual
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Priority claimed from TW093134190A external-priority patent/TW200616522A/en
Priority claimed from TW094106427A external-priority patent/TW200633080A/en
Application filed by Individual filed Critical Individual
Priority to US13/188,478 priority Critical patent/US20110272178A1/en
Publication of US20110272178A1 publication Critical patent/US20110272178A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
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    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
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    • H01L2924/01078Platinum [Pt]
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    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
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    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Definitions

  • the present invention generally relates to a substrate for electrical device, and more particularly to a substrate which is enhancing the reliability of electrical device and downsizing an electrical device.
  • FIG. 9 shows a conventional electrical device 9 comprising a substrate 1 which including an insulator 30 , a plurality of conductive elements 7 , 8 and a via 5 , wherein said insulator 30 having a first upper surface 31 and a first lower surface 32 , said first upper surface 31 of insulator 30 having an receiving area 4 which is used for accommodating a chip; said conductive element 7 is formed on said first upper surface 31 of insulator 30 and surrounding said receiving area 4 , said conductive element 8 formed on said first lower surface 32 of insulator 30 , said via 5 electrically connected the conductive element 7 to the conductive element 8 , wherein said via 5 having a through hole 6 (i.e.
  • the via 5 is hollow) in which an filler 43 such as solder paste, epoxy, glue or solder mask filled therein; a chip 20 mounted on the receiving area 4 of substrate 1 ; a conductive wire 60 electrically connected the chip 20 to the conductive element 7 ; an encapsulant 40 encapsulates the substrate 1 , chip 20 and conductive wire 60 , a solder ball 50 attached to the conductive element 8 for electrically connecting to the outside (e.g.
  • solder ball 50 due to the solder ball 50 , it is convenient for said electrical device 9 to be electrically connected to the outside, nevertheless, the cost of said electrical device 9 is increased, Moreover, the solder ball 50 is attached to the conductive element 8 by the surface 53 of the solder ball 50 exclusively, it is easy to cause peeling-off problems of said solder ball 50 by means of contamination which is happened while operating the attaching (solder ball) process, thermal effects and/or other reasons such as collision. When the peeling-off problem happened, the solder ball 50 separated from the conductive element 8 easily, it may cause the electrical device 9 not to be functional well.
  • the via 5 is hollow, in this manner, it is easy to cause a crack problem “E” of said via 5 by means of thermal effects, when the crack “E” happened, the conductive element 7 will not be electrically connected to the conductive element 8 through said via 5 securely, then it will cause the electrical device 9 not to be functional well either;
  • the conductive wire 60 electrically connected said chip 20 to said conductive element 7 of substrate 1 by means of a wire-bonding process, wherein said substrate 1 needs to be warm-up (i.e.
  • the temperature of heating is 140 ⁇ 300° C.) in order to ensure the conductive wire 60 electrically connected said chip 20 to said conductive element 7 firmly, while operating a wire-bonding process, wherein although there is a filler (e.g. solder paste) 43 filled into the through hole 6 of the via 5 for reinforcing the strength of the via 5 , however said filler (solder paste) 43 will become soft during the period of heating (due to the melting temperature of solder paste is about 183° C.
  • a filler e.g. solder paste
  • said conductive wire 60 does not enable to be electrically connected to said via 5 directly, but needs to be electrically connected to the conductive element 7 instead, then it is necessary for the substrate 1 to be comprised of said conductive element 7 , and then cost is increased, besides, the designation of said substrate 1 is restricted too.
  • the substrate includes an insulator and a plurality of conductive elements, wherein the conductive elements are embedded in the insulator, and a portion of conductive element exposed to the insulator for external connection, wherein some of the portion of conductive element exposed to the insulator enable to protrude the insulator surface for external connection, In this manner, the solder balls are not needed.
  • the substrate of the present invention may further comprise a submember serving as a heat spreader which is for enhancing the heat dissipation of chip,
  • a submember serving as a heat spreader which is for enhancing the heat dissipation of chip
  • FIG. 1A shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1B shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1C shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1D shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1E shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1F shows a cross-sectional view of substrate in accordance with the present invention.
  • FIGS. 2 ⁇ 8 are cross-sectional views showing embodiments of electrical device in accordance with the present invention.
  • FIG. 9 shows a cross-sectional view of electrical device according to a prior art.
  • FIG. 1A shows a substrate 10 comprising: an insulator 30 , said insulator 30 having a first upper surface 31 , a first lower surface 32 and a side wall 37 ; a plurality of first conductive elements 70 which are made of either copper, copper alloy, nickel, aluminum, titanium or metallic alloy, said first conductive elements 70 are substantially solid; said first conductive elements 70 having a first upper surface 71 , a first lower surface 72 and a first side edge 73 respectively, each said first side edge 73 of the first conductive element 70 is encapsulated by the insulator 30 , in this manner, each first conductive element 70 embedded in the insulator 30 , wherein the first upper surface 71 of first conductive element 70 exposed to the first upper surface 31 of insulator 30 for external connection, and the first lower surface 72 of said first conductive element 70 exposed to the first lower surface 32 of insulator 30 for external connection too, wherein the first lower surface 72 of first conductive element 70 is protruding the first lower surface 32 of insulator 30 ;
  • the substrate 10 it is not necessary for the substrate 10 to be comprised of a conductive element (see the “ 7 ” in FIG. 9 ), and then cost is saved, moreover, the restriction of designing said substrate 10 is also decreased, and the reliability of said substrate 10 is enhanced.
  • FIG. 1B shows a substrate 10 comprising: an insulator 30 having a first upper surface 31 , a first lower surface 32 and a side wall 37 , wherein the first lower surface 32 of insulator 30 is not substantially flat (i.e. rough); a receiving area 14 is used for accommodating a chip(s), in order that a chip enables to be mounted on said substrate 10 ; a plurality of first conductive elements 70 , each conductive element 70 having a first upper surface 71 , a first lower surface 72 , a first side edge 73 and an extending portion 75 , wherein the extending portion 75 is coupled with the first upper surface 31 of insulator 30 , and said extending portion 75 is common unitary with said first conductive element 70 (i.e.
  • both said extending portion 75 and said first conductive element 70 are substantially unitary), meanwhile, the first side edge 73 of first conductive element 70 encapsulated by the insulator 30 and embedded therein, wherein, the first upper, lower surfaces 71 , 72 of first conductive element 70 protrude and expose the first upper, lower surfaces 31 , 32 of insulator 30 for external connection respectively; Accordingly, due to the first conductive element 70 having an extending portion 75 , then (i.) the surface of said first conductive element 70 contacted with the insulator 30 is increased (due to not only the first side edge 73 is encapsulated by the insulator 30 but the extending portion 75 is also coupled with said insulator 30 ), in this manner, said first conductive element 70 enables to be coupled with said insulator 30 more securely, and then the reliability of said substrate 10 can be enhanced; and (ii.) said extending portion 75 enables to be extending upon the first upper surface 31 of said insulator 30 , then the restriction of designing said substrate 10 is decreased,
  • FIG. 1C shows a substrate 10 comprising: an insulator 30 having a first upper surface 31 , a first lower surface 32 and a through hole 15 which is serving as a receiving area of said substrate 10 for accommodating chip(s) therein; a plurality of first conductive elements 70 , each first conductive element including a protruding portion 77 having an upper surface which is employ as the first upper surface 71 of said first conductive element 70 , a first lower surface 72 and a first side edge 73 ; a plurality of second conductive elements 70 a including a first upper surface 71 a of said second conductive element 70 a , a first lower surface 72 a and a first side edge 73 a , wherein each first, second conductive element 70 , 70 a encapsulated by the insulator 30 and embedded therein, and each first upper, lower surface 71 / 71 a , 72 / 72 a of said first, second conductive elements 70 , 70 a exposed to the first upper, lower surface 31
  • FIG. 1D shows a substrate 12 which is formed by two substrates 10 in accordance with the present invention, and each structure of substrate 10 is substantially the same as each other, said substrates 10 are stacked, wherein said substrates 10 are electrically connected to each other through the solder paste 62 , and wherein each submember 80 such as a heat spreader is connected to each other through said solder paste too, in this manner, the heat dissipation of the substrate 12 enables to be enhanced, and wherein each first conductive element 70 having a protruding portion 77 c (the advantages of said protruding portion 77 c being described in the detailed description of FIG. 1E ), and each protruding portion 77 c having a lower surface which is employ as the first lower surface 72 of said first conductive element 70 .
  • FIG. 1E shows a substrate 10 comprising: a plurality of first conductive element 70 , 70 a having a first upper surface 71 , 71 a , a first lower surface 72 , 72 a , a first side edge 73 , 73 a and a protruding portion 77 c , 77 ca respectively,
  • said first conductive element 70 a further comprising an extending portion 75 a which is extended from the protruding portion 77 ca of first conductive element 70 a ; an insulator 30 having a first upper surface 31 , a first lower surface 32 and a side wall 37 ; each first conductive element 70 , 70 a encapsulated by said insulator 30 and embedded therein respectively, wherein each first side edge 73 , 73 a of said first conductive element 70 , 70 a being encapsulated by said insulator 30 , and wherein each protruding portion 77 c , 77 ca of first conductive element 70 , 70 a
  • FIG. 1F shows a substrate 10 , wherein the structure of said substrate 10 shown in FIG. 1F is substantially the same as the structure of substrate 10 shown in FIG. 1B , the reason why illustrating said substrate 10 shown in FIG. 1F is:
  • the detailed descriptions of said substrate 10 shown in FIG. 1F are as following:
  • said substrate 10 shown in FIG. 1F comprising: an insulator 30 having a first upper surface 31 , a first lower surface 32 and a side wall 37 ; a plurality of first conductive element 70 , wherein the structure of each first conductive element 70 is substantially the same as each other, said first conductive element 70 having a first upper surface 71 , a first lower surface 72 , a first side edge 73 , a protruding portion 77 c , and an extending portion 75 , wherein said extending portion 75 is common unitary with said protruding portion 77 c , and said protruding portion 77 c is common unitary with said first conductive element 70 , in this manner, each said first conductive element associated with both said protruding portion and said extending portion is common unitary; meanwhile each said first conductive element 70 encapsulated by said insulator 30 and embedded therein respectively, wherein each first side edge 73 of said first conductive element 70 being encapsulated by said insulator 30
  • the solder ball is not needed, as this result, the cost for manufacturing the substrate 10 decreased;
  • said extending portion 75 is common unitary with said protruding portion 77 c
  • said protruding portion 77 c is common unitary with said first conductive element 70 , that is to say said extending portion 75 associated with said protruding portion 77 c being common unitary with said first conductive element 70 , in this manner, said first conductive element 70 associated with both said protruding portion 77 c and said extending portion 75 being common unitary, then the rigidity of said extending portion 75 associated with said protruding portion 77 c can be enhanced, as this result, it can prevent said extending portion 75 associated with said protruding portion 77 c from peeling off said first conductive element 70 , therefore, the reliability of said substrate 10 enables to be enhanced (Because said first conductive element 70 associated with both said protruding portion 77 c and said extending portion 75 being unitary, in
  • said substrate 10 can further includes: (i). an another insulator (not shown) which is situated on the first lower surface 32 of insulator 30 is for protecting said substrate 10 , wherein said another insulator can be coupled with a portion of said extending portion 75 ; and (ii). a further another insulator (not shown) which is situated on the first upper surface 31 of insulator 30 is for protecting said substrate 10 too.
  • the mentioned-above insulator of substrate may be made of glass, ceramics, silicon, adhesive means such as glue, epoxy or the like, meanwhile, by means of plating process, the portion of conductive element which is exposed to the insulator and the portion of submember which is also exposed to the insulator can be plated by at least a conductive material such as nickel, palladium, silver, gold or the like for enhancing the quality of electrical connection, moreover, both the conductive element and the submember enable to be formed by predetermined shapes (patterns), furthermore, the side edge of conductive element and the side edge of submember 80 may also be exposed to the side wall 37 of insulator 30 as required.
  • a conductive material such as nickel, palladium, silver, gold or the like
  • FIGS. 2 ⁇ 8 show embodiments of electrical device, wherein the substrate of electrical device is in accordance with the present invention, detailed description as follow:
  • FIG. 2 shows an electrical device 90 comprising: a substrate 10 includes an insulator 30 , a plurality of first conductive elements 70 , and a submember 80 serving as a heat spreader, wherein said first conductive element 70 and submember 80 are embedded in the insulator 30 , said first conductive element 70 having a protruding portion 77 which including an upper surface which is employed as the first upper surface of said first conductive element 70 and a first lower surface 72 which is protruding the first lower surface 32 of insulator 30 for external connection; said submember 80 having a cavity 86 , wherein the cavity 86 is serving as the receiving area of substrate 10 for situating chip etc., and the first upper, lower surface 81 , 82 of submember 80 exposed to the insulator 30 respectively; a chip 20 placed in the cavity 86 of submember 80 ; a plurality of conductive means (conductive wires) 60 electrically connected the chip 20 to the first conductive element 70 and the submember 80 respectively; an encapsulant 40 encapsulates
  • the restriction for designing the substrate 10 is decreased; furthermore due to the first conductive element 70 having a protruding portion 77 , then the surface of said first conductive element 70 contacted with the encapsulant 40 is increased, in this manner, the substrate 10 enables to be encapsulated by the encapsulant 40 more securely in order to prevent from peeling-off problem, and then the reliability of electrical device 90 enhanced, meanwhile, due to the submember 80 of substrate 10 serving as a heat spreader, the heat dissipation of electrical device 90 enhanced too, in addition, the submember 80 of substrate 10 also serving as a conductive element, and then said submember 80 of substrate 10 enables to electrically connect to outside too, wherein another advantage of the protruding portion 77 of said first conductive element 70 will be explained in FIG. 5 .
  • FIG. 3 shows an electrical device 90 , wherein both the first conductive elements 70 and the second conductive elements 70 a are embedded in the insulator 30 , the first upper surface 71 of said first conductive element 70 protrudes and exposes the first upper surface 31 of insulator 30 , and the extending portion 75 of said first conductive element 70 situated on the first upper surface 31 of insulator 30 , nevertheless, the first upper surface 71 a of the second conductive element 70 a is not protruded but exposed to the first upper surface 31 of insulator 30 , in this manner, the first upper surface 71 and the first upper surface 71 a are not in the same horizontal level; a chip 20 mounted on the receiving area 14 of said substrate 10 ; accordingly, due to the first upper surface 71 of first conductive element 70 and the first upper surface 71 a of the second conductive element 70 a are not in the same horizontal level, in this manner, the gap “G” between the conductive mean (wire) 60 which is electrically connected to the first conductive element 70 and another
  • FIG. 4 shows an electrical device 90 , wherein the substrate 10 including a submembers 80 such as a heat spreaders, a second conductive element 70 a having a through hole 79 a which is serving as the receiving area ( 15 ) of substrate 10 ; the chip 20 placed in the through hole 79 a of said second conductive element 70 a , and said second conductive element 70 a surrounding said chip 20 , wherein said second conductive element 70 may be serving as a power supply bus (e.g.
  • the chip 20 in order to be electrically connected to a plurality of conductive wires 60 ; accordingly, due to the through hole 79 a of said second conductive element 70 a , the chip 20 enables to be placed therein, then the electrical device 90 thickness is thinner, moreover, due to the submembers 80 embedded in the insulator 30 , in this manner, the heat dissipation of the chip 20 will be enhanced.
  • FIG. 5 shows an electrical device 90 , wherein the first conductive element 70 having a plurality of protruding portions 77 , 77 c which are opposite to each other, wherein said protruding portion 77 of the first conductive element 70 being protruded and exposed to said first upper surface 31 of the insulator 30 , however said (another) protruding portion 77 c of the first conductive element 70 being not protruded but exposed to the first lower surface 32 of said insulator 30 ; a chip 20 situated on the receiving area 14 of substrate 10 , wherein the active surface 21 of said chip 20 having a plurality of conductive means (bumps) 65 , said conductive means (bumps) 65 electrically connected the chip 20 to the first conductive elements 70 of the substrate 10 respectively; an encapsulant 40 encapsulates the chip 20 , conductive means 65 and the substrate 10 ; accordingly, due to the protruding portion 77 of said first conductive element 70 , the first conductive element 70 surface contacted with the conductive
  • FIG. 6 shows an electrical device 90 , wherein, the extending portion 75 of first conductive element 70 disposed on the first upper surface 31 of insulator 30 ; a chip 20 mounted on the receiving area 14 , meanwhile said chip 20 also coupled with the first upper surface 71 of the first conductive element 70 , wherein the receiving area 14 also including a portion of first conductive element 70 ; accordingly, due to a portion of first conductive element 70 involved in the receiving area 14 , in this manner, the size of said electrical device 90 enables to be shrunk, and it is good for the industry; in addition, a solder mask 46 attached onto the substrate 10 for protecting said substrate 10 .
  • FIG. 7 shows an electrical device 90 , wherein the extending portion 75 of first conductive element 70 coupled with the first lower surface 32 of insulator 30 , the submember 80 having a through hole 88 serving as an opening of said substrate 10 , in this manner, the substrate 10 having an opening ( 88 ); a chip 20 , wherein the active surface 21 of said chip 20 is coupled with the first upper surface 31 of insulator 30 , (i.e.
  • the active surface 21 of said chip 20 is coupled with the surface of substrate 10 ), meanwhile a portion of active surface 21 of chip 20 exposed to the opening of the substrate 10 ; a plurality of conductive wires 60 pass through the opening of substrate 10 and electrically connect the chip 20 to either the first conductive elements 70 or the first lower surface 82 of submember 80 respectively; a plurality of encapsulant 40 encapsulate the chip 20 , conductive wires 60 and the substrate 10 ; accordingly, due to both the first upper surface 71 and the first lower surface 72 of first conductive element 70 exposed to the insulator 30 respectively, in this manner, Not only the electrical device 90 enables to be electrically connected to outside by means of the solder ball 50 attached onto both the first upper surface 71 and the first lower surface 72 of first conductive element 70 , but the electrical device 90 also enables to be electrically connected to another electrical device (not shown) and stacked thereon, in this manner, said electrical device 90 will become more useful.
  • FIG. 8 shows an electrical device 90 , wherein the insulator 30 having a protruding portion(s) “P” which is (are) protruding the first upper surface 31 of insulator 30 , wherein said protruding portion “P” is close to the periphery of the insulator 30 ; a chip 20 mounted on the receiving area 14 ; a plurality of conductive wires 60 electrically connect the chip 20 to the first conductive elements 70 respectively; a lid “C” situated on the protruding portion “P” of insulator 30 , in this manner, a sealed area 17 is formed by both the lid “C” and the substrate 10 , then the chip 20 and the conductive wires 60 are all hermetically sealed in the sealed area 17 , wherein the chip 20 may be employed as an image sensor, optical chip or the like, and the lid “C” may be employed as a transparent plate as required; in addition, an encapsulant (not shown) may be filled into the sealed area 17 for encapsulating the chip 20 ,

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Abstract

Substrate for electrical devices is disclosed. An embodiment for the substrate comprised of an insulator, a conductive element(s) and a conductive material(s), wherein the conductive element embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, wherein the upper surface of conductive element is below the upper surface of insulator and is plated by the conductive material, meanwhile the conductive element include a protruding portion which is protruded the insulator, in this manner, solder balls are not needed, moreover the conductive element can further include an extending portion; the present invention may be capable of affording a thinner electrical device thickness and enhanced reliability.

Description

  • This application is a continuation of application Ser. No. 12/852,458 filed on Aug. 7, 2010 which is a continuation of application Ser. No. 11/268,702 filed on Nov. 8, 2005
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention generally relates to a substrate for electrical device, and more particularly to a substrate which is enhancing the reliability of electrical device and downsizing an electrical device.
  • 2. Description of the Related Art
  • Currently, both science and technology are developing rapidly, meanwhile, electrical devices are designed for thinner, wider application, lower cost, and better quality, wherein the better quality of electrical device includes higher reliability and enhanced heat dissipation, in order to achieve above objects, the manufacturers keep on developing it.
  • FIG. 9 shows a conventional electrical device 9 comprising a substrate 1 which including an insulator 30, a plurality of conductive elements 7,8 and a via 5, wherein said insulator 30 having a first upper surface 31 and a first lower surface 32, said first upper surface 31 of insulator 30 having an receiving area 4 which is used for accommodating a chip; said conductive element 7 is formed on said first upper surface 31 of insulator 30 and surrounding said receiving area 4, said conductive element 8 formed on said first lower surface 32 of insulator 30, said via 5 electrically connected the conductive element 7 to the conductive element 8, wherein said via 5 having a through hole 6 (i.e. the via 5 is hollow) in which an filler 43 such as solder paste, epoxy, glue or solder mask filled therein; a chip 20 mounted on the receiving area 4 of substrate 1; a conductive wire 60 electrically connected the chip 20 to the conductive element 7; an encapsulant 40 encapsulates the substrate 1, chip 20 and conductive wire 60, a solder ball 50 attached to the conductive element 8 for electrically connecting to the outside (e.g. a mother board); Accordingly, due to the solder ball 50, it is convenient for said electrical device 9 to be electrically connected to the outside, nevertheless, the cost of said electrical device 9 is increased, Moreover, the solder ball 50 is attached to the conductive element 8 by the surface 53 of the solder ball 50 exclusively, it is easy to cause peeling-off problems of said solder ball 50 by means of contamination which is happened while operating the attaching (solder ball) process, thermal effects and/or other reasons such as collision. When the peeling-off problem happened, the solder ball 50 separated from the conductive element 8 easily, it may cause the electrical device 9 not to be functional well. Furthermore, due to the via 5 is hollow, in this manner, it is easy to cause a crack problem “E” of said via 5 by means of thermal effects, when the crack “E” happened, the conductive element 7 will not be electrically connected to the conductive element 8 through said via 5 securely, then it will cause the electrical device 9 not to be functional well either; In addition, the conductive wire 60 electrically connected said chip 20 to said conductive element 7 of substrate 1 by means of a wire-bonding process, wherein said substrate 1 needs to be warm-up (i.e. heating; the temperature of heating is 140˜300° C.) in order to ensure the conductive wire 60 electrically connected said chip 20 to said conductive element 7 firmly, while operating a wire-bonding process, wherein although there is a filler (e.g. solder paste) 43 filled into the through hole 6 of the via 5 for reinforcing the strength of the via 5, however said filler (solder paste) 43 will become soft during the period of heating (due to the melting temperature of solder paste is about 183° C. usually), in this manner, said conductive wire 60 does not enable to be electrically connected to said via 5 directly, but needs to be electrically connected to the conductive element 7 instead, then it is necessary for the substrate 1 to be comprised of said conductive element 7, and then cost is increased, besides, the designation of said substrate 1 is restricted too.
  • SUMMARY OF THE INVENTION
  • It is therefore an object of the invention to solve the mentioned-above problems, in accordance with the invention, the substrate includes an insulator and a plurality of conductive elements, wherein the conductive elements are embedded in the insulator, and a portion of conductive element exposed to the insulator for external connection, wherein some of the portion of conductive element exposed to the insulator enable to protrude the insulator surface for external connection, In this manner, the solder balls are not needed. Moreover, the substrate of the present invention may further comprise a submember serving as a heat spreader which is for enhancing the heat dissipation of chip, In addition, due to the conductive element of substrate is solid and hard enough, in accordance with the present invention, in this manner, the conductive wire enables to be electrically connected to the conductive element directly, then cost is saved and the restriction for designing the substrate is decreased too, moreover, the conductive element of substrate can further including an extending portion.
  • The aforementioned and further objects of the present invention will be more adequately appeared from the detailed description, accompanying drawings and appended claims as follow.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1A shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1B shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1C shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1D shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1E shows a cross-sectional view of substrate in accordance with the present invention.
  • FIG. 1F shows a cross-sectional view of substrate in accordance with the present invention.
  • FIGS. 2˜8 are cross-sectional views showing embodiments of electrical device in accordance with the present invention.
  • FIG. 9 shows a cross-sectional view of electrical device according to a prior art.
  • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • Embodiments of the present invention will be explained with reference to the drawings as follow.
  • FIG. 1A shows a substrate 10 comprising: an insulator 30, said insulator 30 having a first upper surface 31, a first lower surface 32 and a side wall 37; a plurality of first conductive elements 70 which are made of either copper, copper alloy, nickel, aluminum, titanium or metallic alloy, said first conductive elements 70 are substantially solid; said first conductive elements 70 having a first upper surface 71, a first lower surface 72 and a first side edge 73 respectively, each said first side edge 73 of the first conductive element 70 is encapsulated by the insulator 30, in this manner, each first conductive element 70 embedded in the insulator 30, wherein the first upper surface 71 of first conductive element 70 exposed to the first upper surface 31 of insulator 30 for external connection, and the first lower surface 72 of said first conductive element 70 exposed to the first lower surface 32 of insulator 30 for external connection too, wherein the first lower surface 72 of first conductive element 70 is protruding the first lower surface 32 of insulator 30; then there is a height “H” between the first lower surface 72 of first conductive element 70 and the first lower surface 32 of insulator 30, in this manner, the first lower surface 72 of first conductive element 70 and the first lower surface 32 of insulator 30 are not in the same horizontal level; a submember 80 serving as a heat spreader which having a first upper surface 81, a first lower surface 82, a first side edge 83, an extending portion 85 and a cavity 86, wherein the cavity 86 of submember 80 is employed as the receiving area of said substrate 10 for placing chip, conductive wires, encapsulant and adhesive means such as epoxy, glue etc., wherein said extending portion 85 is for enhancing heat dissipation of chip (not shown), Furthermore, due to the first side edge 83 of submember 80 encapsulated by the insulator 30, then the submember 80 embedded in the insulator 30, and the first upper, lower surfaces 81,82 of submember 80 exposed to the first upper, lower surfaces 31, 32 of insulator 30 respectively, wherein the first lower surface 82 of submember 80 also protruding the first lower surface 32 of insulator 30, and the submember 80 may be made of the same material of the first conductive element 70 as required; in addition, the submember 80 is optional; accordingly, (i.) due to there is not any through hole in the first conductive element 70, then the problem of crack will be avoided, and the reliability of substrate 10 enhanced, and (ii.) due to the first lower surface 72 of first conductive element 70 being protruded and exposed to the first lower surface 32 of insulator 30, it is convenient for the first conductive element 70 to electrically connect to outside, then the solder ball is not needed, the cost for manufacturing the substrate 10 decreased; and (iii.) due to the first conductive element 70 is made of metallic material such as copper and is substantially solid, consequently, even though the substrate 10 is heating up to 140˜300° C., the first conductive elements 70 will not become soft (because the melting temperature of the copper is about 1,083° C.), in this manner, it is hard enough for said first conductive elements 70 to be electrically connected to a conductive wire directly (refer to FIG. 2), then it is not necessary for the substrate 10 to be comprised of a conductive element (see the “7” in FIG. 9), and then cost is saved, moreover, the restriction of designing said substrate 10 is also decreased, and the reliability of said substrate 10 is enhanced.
  • FIG. 1B shows a substrate 10 comprising: an insulator 30 having a first upper surface 31, a first lower surface 32 and a side wall 37, wherein the first lower surface 32 of insulator 30 is not substantially flat (i.e. rough); a receiving area 14 is used for accommodating a chip(s), in order that a chip enables to be mounted on said substrate 10; a plurality of first conductive elements 70, each conductive element 70 having a first upper surface 71, a first lower surface 72, a first side edge 73 and an extending portion 75, wherein the extending portion 75 is coupled with the first upper surface 31 of insulator 30, and said extending portion 75 is common unitary with said first conductive element 70 (i.e. both said extending portion 75 and said first conductive element 70 are substantially unitary), meanwhile, the first side edge 73 of first conductive element 70 encapsulated by the insulator 30 and embedded therein, wherein, the first upper, lower surfaces 71,72 of first conductive element 70 protrude and expose the first upper, lower surfaces 31, 32 of insulator 30 for external connection respectively; Accordingly, due to the first conductive element 70 having an extending portion 75, then (i.) the surface of said first conductive element 70 contacted with the insulator 30 is increased (due to not only the first side edge 73 is encapsulated by the insulator 30 but the extending portion 75 is also coupled with said insulator 30), in this manner, said first conductive element 70 enables to be coupled with said insulator 30 more securely, and then the reliability of said substrate 10 can be enhanced; and (ii.) said extending portion 75 enables to be extending upon the first upper surface 31 of said insulator 30, then the restriction of designing said substrate 10 is decreased, it is good for the industry; In addition, the other more advantages of said extending portion 75 will be explained in FIG. 3.
  • FIG. 1C shows a substrate 10 comprising: an insulator 30 having a first upper surface 31, a first lower surface 32 and a through hole 15 which is serving as a receiving area of said substrate 10 for accommodating chip(s) therein; a plurality of first conductive elements 70, each first conductive element including a protruding portion 77 having an upper surface which is employ as the first upper surface 71 of said first conductive element 70, a first lower surface 72 and a first side edge 73; a plurality of second conductive elements 70 a including a first upper surface 71 a of said second conductive element 70 a, a first lower surface 72 a and a first side edge 73 a, wherein each first, second conductive element 70,70 a encapsulated by the insulator 30 and embedded therein, and each first upper, lower surface 71/71 a, 72/72 a of said first, second conductive elements 70, 70 a exposed to the first upper, lower surface 31, 32 of insulator 30 respectively, wherein the first upper surface 71 of first conductive element 70 is not protruded but exposed to the first upper surface 31 of insulator 30, meanwhile the first upper surface 71 a of second conductive element 70 a is below and exposed to the first upper surface 31 of insulator 30, wherein because said first conductive element 70 consists of the protruding portion 77, then (i.) the surface of said substrate 10 contacted with the encapsulant (see “40” in FIG. 2) is increased, then said substrate 10 enables to be encapsulated by the encapsulant more securely, in this manner, the reliability of electrical device can be enhanced (refer to the detailed description in FIG. 2); and (ii.) the surface of said first conductive element 70 contacted with a conductive bump of chip (see “65” in FIG. 5) is increased, then said first conductive element 70 enables to be electrically connected to the conductive bump (65) firmly (refer to the detailed description in FIG. 5).
  • FIG. 1D shows a substrate 12 which is formed by two substrates 10 in accordance with the present invention, and each structure of substrate 10 is substantially the same as each other, said substrates 10 are stacked, wherein said substrates 10 are electrically connected to each other through the solder paste 62, and wherein each submember 80 such as a heat spreader is connected to each other through said solder paste too, in this manner, the heat dissipation of the substrate 12 enables to be enhanced, and wherein each first conductive element 70 having a protruding portion 77 c (the advantages of said protruding portion 77 c being described in the detailed description of FIG. 1E), and each protruding portion 77 c having a lower surface which is employ as the first lower surface 72 of said first conductive element 70.
  • FIG. 1E shows a substrate 10 comprising: a plurality of first conductive element 70, 70 a having a first upper surface 71, 71 a, a first lower surface 72, 72 a, a first side edge 73, 73 a and a protruding portion 77 c, 77 ca respectively, In addition, said first conductive element 70 a further comprising an extending portion 75 a which is extended from the protruding portion 77 ca of first conductive element 70 a; an insulator 30 having a first upper surface 31, a first lower surface 32 and a side wall 37; each first conductive element 70, 70 a encapsulated by said insulator 30 and embedded therein respectively, wherein each first side edge 73, 73 a of said first conductive element 70, 70 a being encapsulated by said insulator 30, and wherein each protruding portion 77 c, 77 ca of first conductive element 70, 70 a being protruded and exposed to the first lower surface 32 of insulator 30, in this manner, each the first lower surface 72, 72 a of first conductive element 70,70 a being protruded and exposed to the first lower surface 32 of insulator 30 too; each first upper surface 71, 71 a of said first conductive element 70, 70 a exposed to said first upper surface 31 of said insulator 30 for being plated by (a) conductive material(s) such as nickel, palladium, silver, gold or the like for enhancing the quality of electrical connection, wherein each first upper surface 71, 71 a of each first conductive element 70, 70 a being below said first upper surface 31 of said insulator 30, therefore, a recess 301, 301 a being formed by each first conductive element 70, 70 a associated with said insulator 30 respectively, wherein the bottom of each recess 301, 301 a formed by each first upper surface 71, 71 a of first conductive element 70, 70 a, and wherein each recess 301, 301 a being for accommodating at least a conductive material; and a plurality of conductive materials 55, 55 a, wherein each first upper surface 71, 71 a of each conductive element 70, 70 a being plated by each corresponding conductive material 55, 55 a, and wherein said conductive material (55,55 a) being placed within said recess (301,301 a), and wherein each upper surface 551, 551 a of each conductive material 55, 55 a exposed to said first upper surface 31 of said insulator 30 respectively, In addition, the extending portion 75 a of first conductive element 70 a is common unitary with said protruding portion 77 ca of first conductive element 70 a and is coupled with the first lower surface 32 of insulator 30; Accordingly, (i.) due to the protruding portion (77 c,77 ca) of first conductive element (70, 70 a) being protruded and exposed to the first lower surface 32 of insulator 30, it is convenient for the first conductive element (70,70 a) to electrically connect to outside, then the solder ball is not needed, the cost for manufacturing the substrate 10 decreased; and (ii.) due to the first conductive element 70 a having an extending portion 75 a, then (a.) the surface of said first conductive element 70 a contacted with the insulator 30 is increased (due to not only the first side edge 73 a is encapsulated by the insulator 30 but the extending portion 75 a is also coupled with said insulator 30), in this manner, said first conductive element 70 a enables to be coupled with said insulator 30 more securely, and then the reliability of said substrate 10 can be enhanced; and (b.) said extending portion 75 a enables to be attached and extended upon the first lower surface 32 of said insulator 30, then the restriction of designing said substrate 10 is decreased, it is good for the industry.
  • FIG. 1F shows a substrate 10, wherein the structure of said substrate 10 shown in FIG. 1F is substantially the same as the structure of substrate 10 shown in FIG. 1B, the reason why illustrating said substrate 10 shown in FIG. 1F is: For better understanding the advantages of said substrate in accordance with the present invention; the detailed descriptions of said substrate 10 shown in FIG. 1F are as following:
  • said substrate 10 shown in FIG. 1F comprising: an insulator 30 having a first upper surface 31, a first lower surface 32 and a side wall 37; a plurality of first conductive element 70, wherein the structure of each first conductive element 70 is substantially the same as each other, said first conductive element 70 having a first upper surface 71, a first lower surface 72, a first side edge 73, a protruding portion 77 c, and an extending portion 75, wherein said extending portion 75 is common unitary with said protruding portion 77 c, and said protruding portion 77 c is common unitary with said first conductive element 70, in this manner, each said first conductive element associated with both said protruding portion and said extending portion is common unitary; meanwhile each said first conductive element 70 encapsulated by said insulator 30 and embedded therein respectively, wherein each first side edge 73 of said first conductive element 70 being encapsulated by said insulator 30, and wherein each protruding portion 77 c of first conductive element 70 being protruded and exposed to the first lower surface 32 of insulator 30, moreover, said extending portion 75 is extended from the protruding portion 77 c of first conductive element 70 and is coupled with the first lower surface 32 of insulator 30, in this manner, each the first lower surface 72 of first conductive element 70 is protruding the first lower surface 32 of insulator 30 too; furthermore, each first upper surface 71 of said first conductive element 70 is also protruding said first upper surface 31 of said insulator 30 for electrical connection; wherein due to each first upper surface 71 of first conductive element 70 is protruding said first upper surface 31 of said insulator 30, therefore, it is convenient for said first conductive element 70 to be electrically connected to the outside (e.g. a mother board), then the solder ball is not needed, as this result, the cost for manufacturing the substrate 10 decreased; Moreover, due to said extending portion 75 is common unitary with said protruding portion 77 c, and said protruding portion 77 c is common unitary with said first conductive element 70, that is to say said extending portion 75 associated with said protruding portion 77 c being common unitary with said first conductive element 70, in this manner, said first conductive element 70 associated with both said protruding portion 77 c and said extending portion 75 being common unitary, then the rigidity of said extending portion 75 associated with said protruding portion 77 c can be enhanced, as this result, it can prevent said extending portion 75 associated with said protruding portion 77 c from peeling off said first conductive element 70, therefore, the reliability of said substrate 10 enables to be enhanced (Because said first conductive element 70 associated with both said protruding portion 77 c and said extending portion 75 being unitary, in this manner, there is not any interface (not shown) among said extending portion 75, said protruding portion and/or said first conductive element 70, while manufacturing said first conductive element 70 (associated with both said extending portion 75 and said protruding portion 77 c), then it is not risky for said first conductive element 70 to be contaminated by dust, corrosion or the like, while manufacturing said first conductive element 70; For example: in case that there is an interface(s) among said extending portion 75, said protruding portion and/or said first conductive element 70, It is highly risky for said first conductive element 70 to be contaminated by dust, corrosion or the like, while manufacturing said first conductive element 70, Once there is an interface(s) mentioned-above contaminated by any dust and/or corrosion, then the rigidity of said first conductive element 70 becomes poor, in this manner, it is easy for said extending portion 75 associated with said protruding portion 77 c to be peeling off said first conductive element 70, then the reliability of said substrate 10 becomes poor); In addition, the first upper surface 71 of said first conductive element 70 can also be co-planar with the first upper surface 31 of said insulator 30 (refer to numerals “71”, “31” in FIG. 1A or FIG. 7); wherein due to said first upper surface 71 of first conductive element 70 can be either protruding or co-planar with said first upper surface 31 of insulator 30, then it is more convenient for said substrate 10 to be used in the electronic industries; Furthermore, said substrate 10 can further includes: (i). an another insulator (not shown) which is situated on the first lower surface 32 of insulator 30 is for protecting said substrate 10, wherein said another insulator can be coupled with a portion of said extending portion 75; and (ii). a further another insulator (not shown) which is situated on the first upper surface 31 of insulator 30 is for protecting said substrate 10 too.
  • The mentioned-above insulator of substrate may be made of glass, ceramics, silicon, adhesive means such as glue, epoxy or the like, meanwhile, by means of plating process, the portion of conductive element which is exposed to the insulator and the portion of submember which is also exposed to the insulator can be plated by at least a conductive material such as nickel, palladium, silver, gold or the like for enhancing the quality of electrical connection, moreover, both the conductive element and the submember enable to be formed by predetermined shapes (patterns), furthermore, the side edge of conductive element and the side edge of submember 80 may also be exposed to the side wall 37 of insulator 30 as required.
  • FIGS. 2˜8 show embodiments of electrical device, wherein the substrate of electrical device is in accordance with the present invention, detailed description as follow:
  • FIG. 2 shows an electrical device 90 comprising: a substrate 10 includes an insulator 30, a plurality of first conductive elements 70, and a submember 80 serving as a heat spreader, wherein said first conductive element 70 and submember 80 are embedded in the insulator 30, said first conductive element 70 having a protruding portion 77 which including an upper surface which is employed as the first upper surface of said first conductive element 70 and a first lower surface 72 which is protruding the first lower surface 32 of insulator 30 for external connection; said submember 80 having a cavity 86, wherein the cavity 86 is serving as the receiving area of substrate 10 for situating chip etc., and the first upper, lower surface 81, 82 of submember 80 exposed to the insulator 30 respectively; a chip 20 placed in the cavity 86 of submember 80; a plurality of conductive means (conductive wires) 60 electrically connected the chip 20 to the first conductive element 70 and the submember 80 respectively; an encapsulant 40 encapsulates the chip 20, conductive means 60 and the substrate 10; accordingly, due to a portion (first lower surface 72) of the first conductive element 70 protrudes and exposes the insulator 30 for electrical connection, in this manner, it is easy for the first conductive element 70 to be electrically connected to outside, then the solder ball is not needed, the cost for manufacturing the electrical device 90 is decreased, Besides, the conductive wire 60 enables to be electrically connected to the first conductive elements 70 directly, then it is not necessary for the substrate 10 to be comprised of a conductive element (see the “7” in FIG. 9), and then the restriction for designing the substrate 10 is decreased; furthermore due to the first conductive element 70 having a protruding portion 77, then the surface of said first conductive element 70 contacted with the encapsulant 40 is increased, in this manner, the substrate 10 enables to be encapsulated by the encapsulant 40 more securely in order to prevent from peeling-off problem, and then the reliability of electrical device 90 enhanced, meanwhile, due to the submember 80 of substrate 10 serving as a heat spreader, the heat dissipation of electrical device 90 enhanced too, in addition, the submember 80 of substrate 10 also serving as a conductive element, and then said submember 80 of substrate 10 enables to electrically connect to outside too, wherein another advantage of the protruding portion 77 of said first conductive element 70 will be explained in FIG. 5.
  • FIG. 3 shows an electrical device 90, wherein both the first conductive elements 70 and the second conductive elements 70 a are embedded in the insulator 30, the first upper surface 71 of said first conductive element 70 protrudes and exposes the first upper surface 31 of insulator 30, and the extending portion 75 of said first conductive element 70 situated on the first upper surface 31 of insulator 30, nevertheless, the first upper surface 71 a of the second conductive element 70 a is not protruded but exposed to the first upper surface 31 of insulator 30, in this manner, the first upper surface 71 and the first upper surface 71 a are not in the same horizontal level; a chip 20 mounted on the receiving area 14 of said substrate 10; accordingly, due to the first upper surface 71 of first conductive element 70 and the first upper surface 71 a of the second conductive element 70 a are not in the same horizontal level, in this manner, the gap “G” between the conductive mean (wire) 60 which is electrically connected to the first conductive element 70 and another conductive mean (wire) 60 which is electrically connected to the second conductive element 70 a enables to become wider, in order to prevent said conductive means (wires) 60 from causing short-circuit problem; meanwhile due to the extending portion 75 of first conductive element 70, the first conductive element 70 enables to be getting closer to the receiving area 14 of substrate 10, in this manner, the distance “D” between the chip 20 and the first conductive element 70 enables to be shortened, and then the conductive wire 60 which is electrically connected the chip 20 to the first conductive element 70 enables to be shortened, therefore, the material of conductive wire 60 saved, and the cost of manufacturing the electrical device 90 saved; in addition, the second side edge 74 of the first conductive element 70 exposed to the side wall (37; not shown) of the insulator 30.
  • FIG. 4 shows an electrical device 90, wherein the substrate 10 including a submembers 80 such as a heat spreaders, a second conductive element 70 a having a through hole 79 a which is serving as the receiving area (15) of substrate 10; the chip 20 placed in the through hole 79 a of said second conductive element 70 a, and said second conductive element 70 a surrounding said chip 20, wherein said second conductive element 70 may be serving as a power supply bus (e.g. positive supply bus and/or negative supply bus) in order to be electrically connected to a plurality of conductive wires 60; accordingly, due to the through hole 79 a of said second conductive element 70 a, the chip 20 enables to be placed therein, then the electrical device 90 thickness is thinner, moreover, due to the submembers 80 embedded in the insulator 30, in this manner, the heat dissipation of the chip 20 will be enhanced.
  • FIG. 5 shows an electrical device 90, wherein the first conductive element 70 having a plurality of protruding portions 77, 77 c which are opposite to each other, wherein said protruding portion 77 of the first conductive element 70 being protruded and exposed to said first upper surface 31 of the insulator 30, however said (another) protruding portion 77 c of the first conductive element 70 being not protruded but exposed to the first lower surface 32 of said insulator 30; a chip 20 situated on the receiving area 14 of substrate 10, wherein the active surface 21 of said chip 20 having a plurality of conductive means (bumps) 65, said conductive means (bumps) 65 electrically connected the chip 20 to the first conductive elements 70 of the substrate 10 respectively; an encapsulant 40 encapsulates the chip 20, conductive means 65 and the substrate 10; accordingly, due to the protruding portion 77 of said first conductive element 70, the first conductive element 70 surface contacted with the conductive bump 65 is increased, in this manner, the first conductive element 70 enables to be coupled with the conductive bump 65 more securely, in order to prevent the chip 20 from peeling off the substrate 10, and then the reliability of electrical device 90 enables to be enhanced; furthermore the inactive surface 22 of the chip 20 may also be encapsulated by the encapsulant 40 as required; in addition, the material of insulator 30 may be the same as the material of encapsulant 40 as required, and the chip 20 is employed as a flip chip.
  • FIG. 6 shows an electrical device 90, wherein, the extending portion 75 of first conductive element 70 disposed on the first upper surface 31 of insulator 30; a chip 20 mounted on the receiving area 14, meanwhile said chip 20 also coupled with the first upper surface 71 of the first conductive element 70, wherein the receiving area 14 also including a portion of first conductive element 70; accordingly, due to a portion of first conductive element 70 involved in the receiving area 14, in this manner, the size of said electrical device 90 enables to be shrunk, and it is good for the industry; in addition, a solder mask 46 attached onto the substrate 10 for protecting said substrate 10.
  • FIG. 7 shows an electrical device 90, wherein the extending portion 75 of first conductive element 70 coupled with the first lower surface 32 of insulator 30, the submember 80 having a through hole 88 serving as an opening of said substrate 10, in this manner, the substrate 10 having an opening (88); a chip 20, wherein the active surface 21 of said chip 20 is coupled with the first upper surface 31 of insulator 30, (i.e. the active surface 21 of said chip 20 is coupled with the surface of substrate 10), meanwhile a portion of active surface 21 of chip 20 exposed to the opening of the substrate 10; a plurality of conductive wires 60 pass through the opening of substrate 10 and electrically connect the chip 20 to either the first conductive elements 70 or the first lower surface 82 of submember 80 respectively; a plurality of encapsulant 40 encapsulate the chip 20, conductive wires 60 and the substrate 10; accordingly, due to both the first upper surface 71 and the first lower surface 72 of first conductive element 70 exposed to the insulator 30 respectively, in this manner, Not only the electrical device 90 enables to be electrically connected to outside by means of the solder ball 50 attached onto both the first upper surface 71 and the first lower surface 72 of first conductive element 70, but the electrical device 90 also enables to be electrically connected to another electrical device (not shown) and stacked thereon, in this manner, said electrical device 90 will become more useful.
  • FIG. 8 shows an electrical device 90, wherein the insulator 30 having a protruding portion(s) “P” which is (are) protruding the first upper surface 31 of insulator 30, wherein said protruding portion “P” is close to the periphery of the insulator 30; a chip 20 mounted on the receiving area 14; a plurality of conductive wires 60 electrically connect the chip 20 to the first conductive elements 70 respectively; a lid “C” situated on the protruding portion “P” of insulator 30, in this manner, a sealed area 17 is formed by both the lid “C” and the substrate 10, then the chip 20 and the conductive wires 60 are all hermetically sealed in the sealed area 17, wherein the chip 20 may be employed as an image sensor, optical chip or the like, and the lid “C” may be employed as a transparent plate as required; in addition, an encapsulant (not shown) may be filled into the sealed area 17 for encapsulating the chip 20, conductive wires 60 and the substrate 10, nevertheless the lid “C” may be employed as a heat spreader as required.
  • In accordance with the foregoing descriptions accompanying drawings, this invention has been described in terms of several preferred embodiments, various alternations and modifications can be made to become apparent to those skilled in the art; For examples: as shown in FIG. 1A, wherein said submember 80 may further include a through hole (refer to “88” in FIG. 7) as required; as shown in FIG. 5, wherein a heat spreader (not shown) may be mounted on the inactive surface 22 of said chip 20; furthermore, the first conductive element of substrate in accordance with the present invention enable to be predetermined shape as required; Accordingly, since many such various alterations and/or modifications can be made to the foregoing descriptions, it is to be understood that the scope of the invention is not limited to the disclosed embodiments but is defined by the appended claims.

Claims (12)

1. A substrate for electrical device, comprising:
at least a first conductive element having at least a first upper surface, a first lower surface, a first side edge, a protruding portion and an extending portion, wherein said extending portion being common unitary with said protruding portion, and said protruding portion being common unitary with said first conductive element, in this manner, said first conductive element associated with both said protruding portion and said extending portion being common unitary; and
at least an insulator having at least a first upper surface, a first lower surface and a side wall; said first conductive element encapsulated by said insulator and embedded therein, in this manner, said first side edge of said first conductive element being encapsulated by said insulator, wherein said protruding portion being protruded and exposed to the first lower surface of said insulator, said extending portion extended from said protruding portion and coupled with said first lower surface of insulator, in this manner, said first lower surface of said first conductive element being protruded and exposed to the first lower surface of said insulator too; and wherein said first upper surface of said first conductive element being protruded and exposed to said first upper surface of said insulator.
2. The substrate of claim 1, further comprising at least a conductive material, wherein at least a portion of said first conductive element being plated by said conductive material.
3. The substrate of claim 2, further comprising at least an another conductive material; wherein said conductive material being plated by said another conductive material.
4. The substrate of claim 1, wherein said insulator further comprising at least a through hole.
5. The substrate of claim 1, further comprising: at least an another insulator which is situated on the first lower surface of insulator.
6. The substrate of claim 5, wherein at least a portion of said extending portion of said first conductive element being coupled with said another insulator.
7. A substrate for electrical device, comprising:
at least a first conductive element having at least a first upper surface, a first lower surface, a first side edge, a protruding portion and an extending portion, wherein said extending portion being common unitary with said protruding portion, and said protruding portion being common unitary with said first conductive element, in this manner, said first conductive element associated with both said protruding portion and said extending portion being common unitary; and
at least an insulator having at least a first upper surface, a first lower surface and a side wall; said first conductive element encapsulated by said insulator and embedded therein, in this manner, said first side edge of said first conductive element being encapsulated by said insulator, wherein said protruding portion being protruded and exposed to the first lower surface of said insulator, said extending portion extended from said protruding portion and coupled with said first lower surface of insulator, in this manner, said first lower surface of said first conductive element being protruded and exposed to the first lower surface of said insulator too; and wherein said first upper surface of said first conductive element being co-planar with said first upper surface of said insulator.
8. The substrate of claim 7, further comprising at least a conductive material, wherein at least a portion of said first conductive element being plated by said conductive material.
9. The substrate of claim 8, further comprising at least an another conductive material; wherein said conductive material being plated by said another conductive material.
10. The substrate of claim 7, wherein said insulator further comprising at least a through hole.
11. The substrate of claim 7, further comprising: at least an another insulator which is situated on the first lower surface of insulator.
12. The substrate of claim 11, wherein at least a portion of said extending portion of said first conductive element being coupled with said another insulator.
US13/188,478 2004-11-10 2011-07-22 Substrate for an electrical device Abandoned US20110272178A1 (en)

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US13/188,478 US20110272178A1 (en) 2004-11-10 2011-07-22 Substrate for an electrical device

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TW093134190A TW200616522A (en) 2004-11-10 2004-11-10 Electrical device and substrate for electrical device
TW094106427A TW200633080A (en) 2005-03-03 2005-03-03 Substrate structure and the substrate for electrical devices
US11/268,702 US7786567B2 (en) 2004-11-10 2005-11-08 Substrate for electrical device and methods for making the same
US12/852,458 US7994633B2 (en) 2004-11-10 2010-08-07 Substrate for electrical device
US13/188,478 US20110272178A1 (en) 2004-11-10 2011-07-22 Substrate for an electrical device

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US7786567B2 (en) 2010-08-31
US20060097379A1 (en) 2006-05-11
US20100294542A1 (en) 2010-11-25
US7994633B2 (en) 2011-08-09

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