US20100182073A1

US20100182073A1 - Semiconductor Component with Annularly-Closed Contacting

Info

Publication number: US20100182073A1
Application number: US12/664,328
Authority: US
Inventors: Ingo Daumiller; Ertugrul Soenmez; Mike Kunze
Original assignee: Microgan GmbH
Current assignee: Microgan GmbH
Priority date: 2007-06-18
Filing date: 2008-06-16
Publication date: 2010-07-22
Also published as: WO2008155085A8; EP2165363A1; EP2162912B1; EP2162912A1; WO2008155086A1; JP5586025B2; EP2165363B1; US20100230727A1; US8748944B2; WO2008155085A1; JP2010530620A; JP2010530619A

Abstract

A semiconductor component includes a substrate, at least one oblong first electrode disposed on the substrate and at least one second electrode disposed on the substrate. The first and/or the second electrode respectively are closed in its longitudinal direction.

Description

The invention relates to a semiconductor component by means of which large currents can be conducted with low resistance in the case of a small surface. The invention relates in addition to a method for producing a semiconductor component, a semiconductor component according to the invention preferably being produced.
FIG. 1 shows a semiconductor component according to the state of the art. Two electrodes 1 and 2 are hereby disposed on a substrate 4. If a voltage 3 is applied between the electrodes 1 and 2, then a current 5 flows through the substrate 4. The current 5 hereby flows laterally from the electrode 2 to the electrode 1 parallel to the substrate surface. The substrate 4 here is a conductive layer or a semiconductor.
Within the electrodes 1 and 2 and also in the substrate 4, an electrical resistance is produced. In order to reduce this resistance, the electrodes 1 and 2, according to the state of the art, are divided over their entire width into a plurality of narrower individual components (1 a, 1 b, 1 c, 2 a, 2 b) which are then connected in parallel via a so-called bus (6, 7). Such an arrangement is shown in FIG. 2. In a plane of the substrate 4, individual components 1 a, 1 b, 1 c extend hereby from a bus 6 perpendicularly to a longitudinal direction of the bus and engage one in the other with individual components 2 a and 2 b of the electrode 2 which extend from the bus 7 perpendicularly to the longitudinal direction thereof. Via the widths of the individual components, i.e. those extensions in a direction parallel to the longitudinal direction of the bus 6 or 7, the undesired series resistance and also the maximum current carrying capacity of the electrodes 1 and 2 can be adjusted. In the device shown in FIG. 2, current, which is fed into the corresponding electrode via the point 8 or 9 furthest away from the associated bus 6 or 7, experiences the greatest series resistance.
The buses 6 and 7 guide the current which flows through the individual components 2 a, 2 b or 1 a, 1 b, 1 c together. The current carrying capacity of the buses 6 and 7 must respectively be so great that it corresponds to the sum of the current carrying capacities of the individual components 1 a, 1 b, 1 c or 2 a, 2 b. The current carrying capacity of the buses 6 and 7 can be increased for example by increasing the width of the buses. However, the buses 6 and 7 therewith increase the surface area of the total component without this surface area contributing to the supply of current. The additional spatial requirement hereby increases therefore with the current strength and the number of individual components to be supplied by the bus. The dotted regions 10 a, 10 b in FIG. 2 represent the surface area used for active structures.
The component can be connected via bonding wires at bonding spots 11 and 12. The bonding spots 11 and 12 must also be designed in the size thereof such that their current carrying capacity corresponds to the current carrying capacity of the buses 6 or 7 contacted by them. In the case of the bonding spot 12, the current carrying capacity thereof must therefore correspond to the sum of the current carrying capacities of the buses 6 and 6 a. However, increasing the bonding spots likewise increases the spatial requirement on the semiconductor disc, which is associated with increased costs. In turn, the spatial requirement increases in addition with the current which is intended to be conductable through the component to be connected.
A further problem in the arrangement shown in FIG. 2 is that, when the voltage applied between two electrodes 1 a, 1 b, 1 c and 2 a, 2 b in the semiconductor exceeds its critical electrical field strength, an electrical breakdown takes place which leads to destruction of the component. Such a breakdown begins in the component at that place at which the highest field excessive rise in the electrical field is present. In the shown arrangement, this is the case respectively at the ends of the component strips 1 a, 1 b, 1 c, 2 a, 2 b. The corresponding points, in the shown arrangement, are therefore particularly susceptible to destruction by an electrical breakdown.
It is therefore the object of the present invention to indicate a semiconductor component, the surface area of which required for contacting is less than in the state of the art, which has in addition smaller series resistances and is furthermore less susceptible to destruction as a result of electrical breakdowns. In addition, it is the object of the invention to indicate a method for producing a semiconductor component with which the mentioned advantages can be achieved.
These objects are achieved by the semiconductor component according to claim and the method for producing a contact according to claim 19. Advantageous developments of the semiconductor component according to the invention and of the method according to the invention are provided by the respective dependent claims.
A semiconductor component according to the invention has a substrate on which at least one oblong first electrode and at least one, preferably oblong, second electrode are disposed. Further correspondingly disposed electrodes with further polarities are possible. The substrate is preferably a conductive layer or a semiconductor layer.
At least one, preferably all of the electrodes, have an oblong form. This means that they extend along a line and, in one or two directions perpendicular to this line, have an essentially constant or only slightly varying extension over the length of the line. According to the invention, the electrodes are now closed in the longitudinal direction thereof, this means that the mentioned line, along which the electrodes extend, is a closed line for each electrode. Closed hereby means that the line or the electrodes merge into each other along their longitudinal direction, i.e. have no beginning and no end. The electrodes are therefore configured such that their surfaces surround a free region not covered by the corresponding electrode.
The electrodes can be closed respectively in the mentioned manner annularly, circularly, elliptically, rectangularly, squarely, triangularly, polygonally or in another manner. The electrode then hereby extends along the edges of the corresponding shape.
The electrodes are preferably disposed in their longitudinal direction parallel to the substrate and parallel to each other. A voltage can preferably be applied between the electrodes such that the at least one first electrode has a first polarity or pole and the at least second electrode has a second polarity or pole and/or such that the electrodes have at least two different functions in the semiconductor component. Parallelism implies here that the shortest spacing of the objects parallel to each other is constant and/or is the same on the total extension or length. There is understood here as polarity or pole preferably the sign of the potential on the corresponding electrode or also the relative potential of the electrodes to each other. Two electrodes, the potential of which has the same sign but different values, have therefore different polarities in this sense. The term function is used here analogously. There is understood by function also the function of the corresponding electrode in the component. If for example the component is a transistor, then the functions of the electrodes can be for example drain, source and gate or emitter, collector and base. In the case of a diode, the polarity or function for example for the one electrode can be the positive pole and, for the other, the negative pole. The same applies for other components.
The electrodes can be configured inter alia to form a semiconductor which is non-blocking as ohmic contact or blocking as Schottky contact.
It is preferred if the electrodes are disposed in a common plane. It is also preferred if the substrate is essentially extended in a planar manner, preferably in one plane. This means that two surfaces of the substrate situated one opposite the other are significantly larger than the other surfaces of the substrate. The electrodes then extend preferably in one or more planes which are situated parallel to those planes in which the substrate extends in a planar manner.
It is preferred that the electrodes are disposed concentrically about common points, such as for example a common centre.
It is possible due to the closed arrangement of the electrodes according to the invention to contact these at any point and thereby to half the undesired series resistance within the electrode relative to an unclosed arrangement. The resistance is halved in that, from each point of the electrode to a contacting externally, for example via a bus, there are two paths along the electrode which are connected to each other in parallel. The conductances of the two paths are added therefore to form a common conductance which is greater than the conductance of the individual paths. The conductance hereby is the inverse resistance.
Preferably, several or all of the first electrodes are now connected by a common bus and/or several or all of the second electrodes are connected by a common bus. Possible further electrodes with further polarities can be connected analogously by further buses.
Preferably, at least one of the buses is disposed in a plane which is parallel to that plane in which the substrate is extended in a planar manner and in which neither the substrate nor the electrodes are disposed. For particular preference, at least one of the buses, preferably all of the buses, is disposed on a side of the electrode orientated away from the substrate. In this case, firstly the electrodes can therefore be disposed on the substrate in a common plane and then, above the electrodes, the bus or buses.
Advantageously, the bus or buses are not disposed directly on the electrodes but at a spacing from the latter. At least one insulating layer is hereby disposed preferably between the buses and the electrodes. It is then preferred if at least one via contact is disposed between at least one of the buses and the electrodes connected by the corresponding bus, via which via contact the electrodes are connected electrically to the bus contacting them. The via contact therefore extends across the spacing between the electrodes and the buses.
The via contacts can extend in particular through holes in the insulating layer. Such holes or openings can be filled for this purpose with a conductive material, such as e.g. metal.
The insulating layer can have or comprise a dielectric and/or polymers.
The via contacts can be configured in the most varied of ways. They can be oblong and they can have inter alia a cuboid or cylindrical shape.
For specific applications, the structure of the insulating layers and via contacts can also be more complicated.
An insulating layer can firstly be applied for example on the electrodes, said layer having openings above the electrodes. One or more metal layers can be applied on this insulating layer which extends also into the openings and contacts the electrodes through them. A separate metal layer or a separate region of the metal layer can be provided here for each polarity.
For more than two polarities, at least one further insulating layer and also at least one further metal layer which has separate regions for different polarities can be applied correspondingly on the metal layers at least in regions, corresponding to what was described above for the other layers.
If electrodes of several poles or polarities are connected respectively via several buses, then the buses can be disposed in different planes or in a common plane. Since the electrodes are extended longitudinally, it is possible to dispose a plurality of buses such that all the electrodes extend in portions below each bus, the via contacts however being disposed only between a given bus and the electrodes contacted by said bus. The other electrodes extend without electrical contact to this bus along between the substrate and the bus. Preferably, at least one insulating layer is disposed between the electrodes and those buses which do not contact these electrodes.
It is possible, in particular in the above-mentioned constellation, that the buses are extended in a planar manner in the plane of their arrangement. They can hereby extend in a planar manner over a part of the surface area of the substrate. It is thereby advantageous to make the surface area of the buses as large as possible. It is therefore preferred if the buses together cover the surface of the substrate in large parts, preferably essentially completely.
It is particularly preferred to use the surface area of one or more supply buses as a bonding spot which serves to connect the semiconductor component via bonding wires. As a result, the contacting can be effected by means of bonding wires without additional semiconductor surface area being required for this purpose.
As a result of the described contacting of the electrodes by means of buses which are disposed vertically above the semiconductor component and the electrodes, the active surface can be used doubled by the active component. The supply bus therefore requires no additional semiconductor disc surface area.
Preferably, the via contacts extend longitudinally parallel to those electrodes which are connected by them to a bus. The via contacts can hereby extend along the electrodes in that region in which the electrodes extend below the buses contacting them.
The semiconductor component preferably has at least one transistor and/or one diode or is a transistor or a diode. Such a transistor is preferably a field effect transistor.
There are possible inter alia as semiconductor materials preferably those which contain or comprise at least one nitride of a main group III element. These materials are therefore inter alia GaN, AlN, InN, GaAlN, GaInN, AlInN and AlInGaN. Those can be particularly resistant to high temperatures, preferably greater than or equal to 100° C., particularly preferred greater than or equal to 300° C., particularly preferred greater than or equal to 500° C., particularly preferred greater than or equal to 700° C.

The invention is intended to be explained subsequently with reference to a few Figures, by way of example. The features shown in the Figures can be produced respectively also individually in the invention.

There are shown

FIG. 1 a section through a lateral component according to the state of the art,

FIG. 2 a semiconductor component according to the state of the art,

FIG. 3 a semiconductor component corresponding to the present invention,

FIG. 4 a section through a semiconductor component corresponding to the present invention, and

FIG. 5 a plan view on a semiconductor component according to the invention.

FIG. 3 shows a plan view on a semiconductor component according to the invention having a first electrode 1 and a second electrode 2 which are disposed on a common substrate 4. The electrodes 1 and 2 are oblong, annularly closed and disposed concentrically about a common centre. The first and the second electrode are closed in their longitudinal direction. The electrodes 1 and 2 extend parallel to the surface of the substrate 4 on which they are disposed in a common plane, and also at a spacing from each other and parallel to each other. The electrode 1 is hereby contacted by a contact 31 at a point 33. The electrode 2 is contacted via a contact 32 at a point 34. When applying a voltage, the first electrode then has a first polarity and the second electrode a second polarity different from the first. If now a current is fed for example into the electrode 1 at that point situated opposite the contacting point 33 relative to the centre, then this current can flow along both semicircles of the electrode to the contacting point 33. Such a current therefore experiences half the resistance relative to a current which would flow only through a semicircle of the electrode. The same applies for the electrode 2. The undesired series resistance is therefore halved by the closed arrangement of the electrodes 1 and 2.
FIG. 4 shows a section through a semiconductor component according to the invention with a large number of electrodes 1 a, 1 b, 1 c, which have a first polarity when a voltage is applied, and also with a large number of electrodes 2 a, 2 b which have a second polarity when a voltage is applied. The electrodes are disposed in one plane on a common substrate 4. On that side orientated away from the substrate 4, the electrodes 1 a, 1 b and 1 c are contacted by a bus 6. The electrodes 2 a and 2 b are contacted by a bus 7 which is disposed in a plane in which the electrodes 1 and 2 are not disposed. This plane is parallel to the substrate 4 and to the plane of the electrodes 1 and 2. The contacts 6 and 7 are disposed here in one plane. It should be noted that the illustrated component in the plane perpendicular to the drawing plane, as shown in FIG. 5, is annularly closed so that also the parts of the electrodes 1 a and 1 b disposed below the bus 7 are contacted by the bus 6.
The buses 6 and 7 are not disposed directly on the electrodes 1 a, 1 b, 1 c and 2 a, 2 b. Rather an insulating layer 43 is disposed between the electrodes and the buses 6 and 7. The electrical connection between the electrodes 2 a and 2 b to the bus 7 is hereby achieved by the via contacts 42 a or 42 b penetrating the insulating layer 43. Correspondingly, the electrodes 1 a, 1 b and 1 c are contacted with the bus 6 through via contacts 41 a, 41 b or 41 c. The via contacts 41 a, 41 b, 41 c and 42 a, 42 b can hereby have an oblong configuration in the direction perpendicular to the drawing plane.
The insulating material 43 is disposed respectively between the electrodes 1 a, 1 b, 1 c and the adjacent electrodes 2 a, 2 b. Furthermore, the insulating material 43 is disposed between the plane of the electrodes 1, 2 and the buses 6, 7 which is penetrated however by the via contacts 41 a, 41 b, 41 c, 42 a, 42 b.
FIG. 5 shows a plan view on a semiconductor component, as is shown in FIG. 4. The electrodes 1 a, 1 b and 1 c and also 2 a, 2 b are hereby disposed annularly-closed concentrically. The buses 6 and 7 are configured as essentially semicircular surfaces with an extension parallel to the substrate, which completely cover the semicircular surface of the substrate 4 covered by the electrodes apart from a narrow gap for insulating. The planar buses 6 and 7 here serve in addition as bonding spots for contacting the semiconductor component by means of bonding wires. The electrodes 1 a, 1 b, 1 c are hereby connected to the bus 6 via oblong via contacts 41 a, 41 b, 41 c which extend parallel to the electrodes. The electrodes 2 a, 2 b are connected to the bus 7 via oblong via contacts 42 a, 42 b which extend parallel to the electrodes. Respectively one bonding spot 11 or 12 can be disposed on or at the buses 6 and 7. The substrate 4, the electrodes 1 and 2 and/or the via contacts 41 a, 41 b, 41 c, 42 a, 42 b can have or comprise nitride of a main group III element.

Claims

1-21. (canceled)

22. A semiconductor component, comprising:

a substrate;

at least one oblong first electrode disposed on the substrate; and

at least one second electrode disposed on the substrate,

wherein at least one of the first electrode and the second electrode respectively is closed in a longitudinal direction.

23. The semiconductor component according to claim 22, wherein at least one of (a) the second electrode is oblong, (b) the first electrode and the second electrode extend parallel to a surface of the substrate on which they are disposed, (c) the first electrode and the second electrode are disposed parallel to each other, and (d) the first electrode and the second electrode are disposed in a common plane.

24. The semiconductor component according to claim 22, wherein at least one of (a) a voltage is applied between the first and second electrode such that the first electrode has a first polarity and the second electrode a second polarity different from the first polarity and (b) the first and second electrodes have at least two different functions.

25. The semiconductor component according to claim 24, wherein the first electrodes have a first function and the second electrodes have a second function.

26. The semiconductor component according to claim 22, wherein the first and second electrode respectively are closed respectively in their longitudinal direction one of annularly, circularly, elliptically, rectangularly, squarely, triangularly and polygonally.

27. The semiconductor component according to claim 22, wherein the first and second electrodes are disposed at a spacing from each other.

28. The semiconductor component according to claim 22, wherein at least one of the first and second electrodes is contacted by a contact in at least one plane in which the first and second electrodes are not disposed.

29. The semiconductor component according to claim 28, wherein all the contacts contacting electrodes are disposed on the same side of the electrodes.

30. The semiconductor component according to claim 28, wherein all the contacts contacting electrodes are disposed in the same plane.

31. The semiconductor component according to claim 22, wherein at least one of (a) at least two of the first electrodes are connected by at least one common bus, (b) at least two of the second electrodes are connected by the common bus and (c) all of the first and second electrodes with the same function are connected by the common bus.

32. The semiconductor component according to claim 31, wherein at least one of the at least one common bus is disposed in a plane parallel to a plane in which the substrate extends in a planar manner and in which neither the substrate nor the electrodes are disposed.

33. The semiconductor component according to claim 31, wherein at least one of the buses is disposed on a side of the electrodes orientated away from the substrate.

34. The semiconductor component according to claim 31, further comprising:

at least one via contact disposed between at least one of the buses and the first and second electrodes connected by the corresponding bus,

wherein the electrodes are contacted electrically with the corresponding bus via the via contacts.

35. The semiconductor component according to claim 34, wherein at least two of the via contacts have an oblong configuration with a longitudinal direction parallel to at least one of the first and second electrodes.

36. The semiconductor component according to claim 34, further comprising:

at least one insulating layer disposed between the buses and the first and second electrodes where no via contacts are disposed.

37. The semiconductor component according to claim 34, wherein at least one of the buses has a planar configuration with a surface parallel to the substrate.

38. The semiconductor component according to claim 34, further comprising:

at least one bonding spot disposed one of (a) on at least one of the buses and (b) at least one of the buses, the corresponding bus being contacted via the at least one bonding spot.

39. The semiconductor component according to claim 22, wherein the substrate is circular, the first and second electrodes being disposed annularly concentrically about a center of the substrate, the first and second bus being configured as sectors of a circular area.

40. The semiconductor component according to claim 22, wherein the substrate is circular, the first and second electrodes being disposed annularly concentrically about a center of the substrate, the first and second bus being configured as half sectors of a circular area.

41. The semiconductor component according to claim 22, further comprising:

at least one further electrode having at least one of (a) at least one further polarity and (b) at least one further function.

42. The semiconductor component according to claim 34, wherein at least one of (a) the first and second electrodes, (b) the via contacts and (c) the buses comprises a metal.

43. The semiconductor component according to claim 34, wherein at least one of (a) the first and second electrodes, (b) the via contacts and (c) the buses comprises at least two metal layers.

44. The semiconductor component according to claim 22, wherein at least one of (a) the substrate and (b) at least one of the via contacts comprises a nitride of a main group III element.

45. The semiconductor component according to claim 22, wherein at least one of (a) the substrate and (b) at least one of the via contacts comprises at least one of GaN, MN, InN, AlGaN, InGaN and AlGaInN.

46. The semiconductor component according to claim 22, further comprising at least one of:

at least one transistor; and

at least one diode.