US20050086517A1

US20050086517A1 - Page granular curtained memory via mapping control

Info

Publication number: US20050086517A1
Application number: US10/970,104
Authority: US
Inventors: Bryan Willman; Paul England
Original assignee: Microsoft Corp
Current assignee: Microsoft Technology Licensing LLC
Priority date: 2002-04-17
Filing date: 2004-10-21
Publication date: 2005-04-21
Also published as: US20030200405A1; US6986006B2

Abstract

Methods of providing and limiting access to trusted memory are provided. Trusted memory pages are not mapped with page map pages. When a central processor is operated in a page-mapping mode, access to the trusted memory is limited. In particular, without mapping information, software and hardware modules cannot access and modify the contents of trusted memory sections.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to the field of electronic data processing. More particularly, the invention provides methods and devices for restricting access to sections of memory modules.
2. Description of the Related Art
Modern computer operating systems are configured to allow users to easily install hardware and software. One drawback associated with such open operating systems that allow users to easily install hardware and software is that such operating systems are inherently untrustworthy. For example, operating systems that allow users to change data stored in kernel memory or system files are vulnerable to attacks by computer viruses. Moreover, operating systems that allow the modification of all of the content stored in a computer's memory can be damaged by improperly designed or installed software and hardware components.
Another drawback of open operating systems is that they limit the content that providers are willing to distribute to computer users. In particular, content providers are reluctant to distribute valuable audio, video or other content to computer devices that allow users to easily copy and redistribute the content.
Therefore, there exists a need in the art for operating systems and methods that provide trusted memory sections that are difficult or impossible to modify with computer virus, drivers or other hardware or software components. Moreover there exists a need in the art for operating systems and methods that provide application programs, stored in trusted memory, that limit a user's ability to copy and redistribute content.

BRIEF SUMMARY OF THE INVENTION

The present invention overcomes one or more of the limitations of the prior art by providing methods, systems and computer-executable components for controlling access to memory by controlling values that appear in page map pages. A computer operating system may be configured to operate in a page-mapping mode with trusted memory sections not mapped by page map pages. Without mapping information, software and hardware modules cannot access and modify the contents of trusted memory sections. Page map pages may be configured to be read-only. An attempt to edit a read-only page may be intercepted and filtered with a PTE edit module. The PTE-edit module allows modifications that maintain the trusted memory section. The PTE edit module also ensures that the page tables themselves are only mapped read-only, so that the PTE-module is invoked when the operating system or an adversary attempts to modify the mappings.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and not limited in the accompanying figures in which like reference numerals indicate similar elements and in which:
FIG. 1 is a block diagram of a general-purpose computer system capable of being used in conjunction with the present invention;
FIG. 2 illustrates a memory module partitioned into trusted and non-trusted sections in accordance with an embodiment of the invention;
FIG. 3 illustrates the mapping of a virtual address to a corresponding physical memory page;
FIG. 4 illustrates a method of storing data in accordance with an embodiment of the invention;
FIG. 5 illustrates a method of controlling access to trusted memory pages in accordance with an embodiment of the invention; and
FIG. 6 illustrates a hardware configuration that may be implemented to limit direct memory access to memory modules.

DETAILED DESCRIPTION OF THE INVENTION

Aspects of the present invention may be implemented with computer devices that have trusted memory sections implemented by page-tables or similar mapping constructs. Such computer devices may include personal computers, personal digital assistants, hand-held devices, multiprocessor systems, microprocessor-based or programmable consumer electronics, network PCS, minicomputers, mainframe computers, and the like. The operating systems of the computer devices may be configured to limit access and modification of page map pages to provide trusted memory sections.
Although not required, the invention will be described in the general context of computer-executable instructions, such as program modules, that are executed by computer devices. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. In distributed computing systems, tasks may be performed by remote computer devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.
FIG. 1 is a schematic diagram of a conventional general-purpose digital computing environment that can be used to implement various aspects of the invention. Computer 100 includes a processing unit 110, a system memory 120 and a system bus 130 that couples various system components including the system memory to the processing unit 110. System bus 130 may be any of several types of bus structures including a memory bus or memory controller, a peripheral bus, and a local bus using any of a variety of bus architectures. System memory 120 includes a read only memory (ROM) 140 and a random access memory (RAM) 150.
A basic input/output system (BIOS) 160 containing the basic routines that help to transfer information between elements within the computer 100, such as during start-up, is stored in ROM 140. Computer 100 also includes a hard disk drive 170 for reading from and writing to a hard disk (not shown), a magnetic disk drive 180 for reading from or writing to a removable magnetic disk 190, and an optical disk drive 191 for reading from or writing to a removable optical disk 192, such as a CD ROM or other optical media. Hard disk drive 170, magnetic disk drive 180, and optical disk drive 191 are respectively connected to the system bus 130 by a hard disk drive interface 192, a magnetic disk drive interface 193, and an optical disk drive interface 194. The drives and their associated computer-readable media provide nonvolatile storage of computer readable instructions, data structures, program modules and other data for personal computer 100. It will be appreciated by those skilled in the art that other types of computer readable media which can store data that is accessible by a computer, such as magnetic cassettes, flash memory cards, digital video disks, Bernoulli cartridges, random access memories (RAMs), read only memories (ROMs), and the like, may also be used in the exemplary operating environment.
A number of program modules can be stored on the hard disk, magnetic disk 190, optical disk 192, ROM 140 or RAM 150, including an operating system 195, one or more application programs 196, other program modules 197, and program data 198. A user can enter commands and information into computer 100 through input devices, such as a keyboard 101 and a pointing device 102. Other input devices (not shown) may include a microphone, joystick, game pad, satellite dish, scanner, or the like. These and other input devices are often connected to the processing unit 110 through a serial port interface 106 that is coupled to the system bus, but may be connected by other interfaces, such as a parallel port, a game port, a universal serial bus (USB) or through a PCI board. A monitor 107 or other type of display device is also connected to system bus 130 via an interface, such as a video adapter 108. In addition to the monitor, personal computers typically include other peripheral output devices (not shown), such as speakers and printers.
Computer 100 can operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 109. Remote computer 109 can be a server, a router, a network PC, a peer device or other common network node, and typically includes many or all of the elements described above relative to computer 100, although only a memory storage device 111 has been illustrated in FIG. 1. The logical connections depicted in FIG. 1 include a local area network (LAN) 112 and a wide area network (WAN) 113. Such networking environments are commonplace in offices, enterprise-wide computer networks, intranets and the Internet.
When used in a LAN networking environment, computer 100 is connected to local network 112 through a network interface or adapter 114. When used in a WAN networking environment, personal computer 100 typically includes a modem 115 or other means for establishing communications over wide area network 113, such as the Internet. Modem 115, which may be internal or external, is connected to system bus 130 via serial port interface 106. In a networked environment, program modules depicted relative to personal computer 100, or portions thereof, may be stored in the remote memory storage device.
It will be appreciated that the network connections shown are exemplary and other ways of establishing a communications link between the computers can be used. The existence of any of various well-known protocols, such as TCP/IP, Ethernet, FTP, HTTP and the like, is presumed, and the system can be operated in a client-server configuration to permit a user to retrieve web pages from a web-based server. Any of various conventional web browsers can be used to display and manipulate data on web pages.
FIG. 2 illustrates a memory module 200 partitioned in accordance with an embodiment of the invention. Memory module 200 is divided into a trusted section 202 and a non-trusted section 204. Memory module 200 is also divided into a user mode memory section and a kernel mode memory section. Page directory pages 206 and page table pages 208 may be stored in a read only section of non-trusted user mode memory. Page directory pages 206 and page table pages 208 may be used to map a virtual address to a physical memory page in the manner described below. One skilled in the art will appreciate that the present invention is not limited to embodiments that include both page directory pages and page table pages. As used herein, a “page map page” may include a page directory page, a page table page or any other data structure used to map a virtual address to a physical memory page.
The trusted user mode section of memory 200 may contain trusted applets 210. In one aspect of the invention, trusted applets 210 include program modules for presenting audio, visual or other content to users. Trusted applets 210 may be configured to limit the user's ability to distribute and/or copy the delivered content. One or more trusted applets 210 may be executed when a user of the computer device views or otherwise utilizes content that a content owner has configured to operate with the trusted applets. For example, a trusted applet may be a media player or an e-commerce application. In fact, trusted applets have a vast array of uses, basically any time one party wants to have confidence in what a different party did or not do with some data, be media, a document etc. They also allow for the enforcement of distributed rules systems.
An operating system 212 is stored in the kernel mode memory section of memory 200. Operating system 212 is divided into a main operating system 214 stored in non-trusted kernel mode memory and a nub operating system 216 stored in trusted kernel mode memory. Main operating system 214 may be configured to control the operation of software and hardware components in a conventional manner. Main operating system 214 has access to content stored in non-trusted memory section 202, but not to the trusted memory, 204. Nub operating system 216 may be a fully featured operating system, supporting memory, processes, threads, IO, and other common OS services, or may be a trusted security kernel providing a minimum set of services necessary to host simple applications or “trusted agents,” and using main operating system 214 and its devices and drivers for all non-security sensitive actions. Nub operating system 216 may access content stored in non-trusted memory section 202 and trusted memory section 204. In one implementation, nub operating system 216 can be started and stopped and be invoked several different times. For example, nub operating system 216 could be started as part of a boot operation, unloaded, and then started again to do ongoing restricted-access work.
Nub operating system 216 provides mechanisms to establish and maintain its security environment. Initial establishment of a security environment may utilize hardware assistance. The hardware may ensure that nub operating system 216 initialization code executes to completion without possible subversion by prior code executing on the machine, other processes, or other devices that have been programmed by an adversary.
Nub operating system 216 may include nub initialization code. Nub initialization code may use the platform security features to protect itself from potentially adversarial behavior of the main operating system, its devices, drivers, or applications. This may include configuring the chipset to deny DMA writes to any protected memory, and performing certain actions before transferring control back to the main operating system. Part of these actions may be to validate the page-map of the processor that will run when main operating system 214 is next scheduled to run.
Nub operating system 216 may also perform many conventional operating system functions. This may include establishing exception-handlers to process externally generated interrupts, and internally generated exceptions. Nub operating system 216 may also provide services to construct threads and processes, usually following instructions from main operating system 214. Moreover, nub operating system 216 may provide processes with a more trusted address space than a conventional operating system. For example, nub operating system 216 may be configured to not be debuggable by adversarial code. Cryptographic services may be provided by nub operating system 216 to its processes that allow nub operating system processes to keep secrets from adversarial code, and authenticate itself to remote parties.
In one embodiment of the invention, following nub operating system 216 initialization, the processor can switch backwards and forwards between normal and protected mode under the control of software. Nub operating system 216 can at any time relinquish trusted mode by issuing a suitable processor instruction. Typically, nub operating system 216 will save any register or other state that is considered sensitive to protected memory before initiating such a transition.
Similarly, in one embodiment, any suitably privileged code running in main operating system 214 can initiate a context switch into trusted mode; however, the platform will ensure that execution of nub operating system 216 always begins at a code location (or one of the code locations) of the choosing of nub operating system 216, and may ensure that no prior execution state, beyond that passed explicitly or implicitly as parameters, can effect the execution of nub operating system 216.
One skilled in the art will appreciate that additional software modules may also be stored in user mode memory and kernel mode memory. For example, drivers 218 may be stored in non-trusted kernel mode memory. A page table entry edit module 220 is stored in trusted kernel mode memory to control edits to page map pages. Page table entry edit module 220 may validate, add to and modify entries in page directory pages 206 and page table pages 208 when the computer device is operated in a trusted mode. In one implementation, a single page table entry edit module 220 may provide more than one trusted memory section to allow more than one nub operating system 216 to run at a time.
FIG. 3 illustrates the mapping of a virtual address 302 to a corresponding physical memory page 304. The conventional mapping of virtual addresses to physical memory pages is described in detail in many publicly available CPU manuals. The mapping uses a page directory page 306 and page table pages 308 a-308 c to locate page 304 of physical memory 310. Virtual address 302 includes a page directory offset value 302 a, a page table offset value 302 b and a memory offset value 302 c. Page directory offset value 302 a points to an entry in page directory page 306. The entry in page directory page 306 points to page table page 308 b. Page table offset 302 c points to a specific entry in page table page 308. Page table page 308 b points to a physical memory page 310. Memory offset 302 c points to page 304 within physical memory 310.
When an operating system is operated in a page-mapping mode, a software or hardware component must utilize page map pages, such as page directory 306 and/or page tables 308 a-308 c, to locate pages of physical memory 310. Memory 310 includes trusted sections 312, 314, 316 and 318, each marked with an asterisk for illustration purposes. Page directory page 306 and page table pages 308 a-308 b do not contain entries pointing to trusted memory sections 312, 314, 316 and 318. Therefore, hardware and software modules cannot utilize page directory 306 and/or page tables 308 a-308 c to locate and modify the contents of trusted memory pages.
Page directory page 306 and page table pages 308 a-308 c may be configured to prevent mapping of trusted memory sections 312, 314, 316 and 318 by storing the content of page directory page 306 and page table pages 308 a-308 c in read-only format when the computer device is operating in a non-trusted mode. An unauthorized attempt to write data may result in the declaration of an error or fault condition. In one implementation, when such a fault-condition occurs, the processor or software must initiate a context switch into PTE-edit control module 220 running in trusted mode where the edit or addition is examined by PTE-edit control module 220, and allowed, disallowed (resulting in an unrecoverable error condition), or modified. Edits and additions to page directory 306 and page tables 308 a-308 c are controlled by PTE-edit control module 220 stored in trusted memory section 204. As a result, edits and additions to page directory 306 and page tables 308 a-308 c can only be made when the computer device is operated in a trusted mode.
The precise behavior of PTE-edit control module 220 may depend on the characteristics of the physical page that is being mapped or being removed from the map. In the case that the properties of the page are being modified (for example, if a page is being switched from read-write to read-only) PTE-edit control module 220 may be configured to behave differently depending on the characteristics of the physical page being referenced. A page map page vector 320 (PMV) indicates whether or not memory pages are page map pages (page directories, page tables, or other paging structures for more complicated mapping architectures). As used herein, a “vector” is a representation of “sets”, and may be implemented with a bit vector, list of integers, list of addresses, or any other arbitrary representation of a set. A bit value of 1 may indicate that a page is a page map page. Page map vector 320 may be large enough to contain a bit value for every memory page and may be used by software or hardware to identify and limit access to page map pages, or be used by PTE-edit control module 220 to determine its actions in response to page edit-requests by main operating system 214.
A subset of page map vector 320 is those pages that are allowed as page-map roots. Page map roots are often called page directories. A root page vector, or RPV indicates these pages. In one aspect of the invention, pages identified as allowed root-pages are always included in page map page vector 320. PTE-edit control module 220 may arrange that all mappings to pages in page map page vector 320 are read-only when accessed by main operating system 214 or its applications. A read-only mapping ensures that untrusted code cannot directly change mapping data without the actions being validated, filtered, or modified, by PTE-edit control module 220.
A trusted page vector 322 may store access values indicating whether or not memory pages are trusted or restricted. For example, a bit value of 1 may indicate that a memory page is trusted and a bit value of 0 may indicate that a memory page is non-trusted. A trusted page is inaccessible if the processor is not in trusted mode. Nub operating system 216 may identify memory that is for its exclusive use with membership in trusted page vector 322. In one embodiment, PTE-edit control module 220 marks all pages that contain the PTE-EC data tables as members of trusted page vector 322. Trusted page vector 322 may also cover itself, i.e., contain an access value indicating that trusted page vector 322 is trusted.
FIG. 4 illustrates a method of storing data in accordance with an embodiment of the invention. First, in step 402, data is stored in a memory page. The memory page may be physical memory page 310 shown in FIG. 3. Next, in step 404, it is determined whether the data is trusted data. Data may be identified as trusted data by nub operating system 216. When the data is not trusted data, in step 406, the physical memory page is mapped with at least one page map page stored in non-trusted memory. Next, in step 408 the at least one page map page is identified as trusted in trusted page vector 320. When the data is identified as trusted data, in step 410, the physical memory page is mapped with at least one page map page stored in trusted memory, such as trusted pages 222 shown in FIG. 2. Next, in step 412, the physical memory page is identified as trusted in a trusted page vector. If the data is identified as protected by nub operating system 216, there exists no mapping that can be used by the main operating system to this data page. PTE-edit control module 220 may ensure that there is never a read or write mapping to the trusted page that can be used by main operating system 214. In one embodiment of the invention, nub operating system 216 has its own mappings exclusively for nub operating system 216, and for the trusted processes that nub operating system 216 hosts.
FIG. 5 illustrates a method of controlling access to trusted memory pages in accordance with an embodiment of the invention. First, in step 502, a processor is configured to operate in a page-mapping mode. While in the page-mapping mode, access to memory will be limited by controlling entries that will be included in the page map pages. In “multi-mode” machines (e.g. the ×86) the machine may be locked into one mode that works with nub operating system 216. For example, on a 64 bit ×86 machine, the machine may be locked into 64 bit mode. Or, the machine may be locked into 16 bit segment map mode and a segment map edit control nub operating system may be utilized. In step 504, it is determined whether or not there is an attempt to change the mode of operation of the processor to a mode in which the protections afforded by the page-mapping are bypassed. In particular, it may be determined whether or not there is an attempt to change the processor out of page-mapping or segment-mapping mode. When there is an attempt to change the mode of the processor, in step 506 a security violation is declared. Next, in step 508, the security violation causes a context switch into nub operating system 216 for further processing. One skilled in the art will appreciate that a security violation does not have to cause a context switch into nub operating system 216. For example, a write to a read-only page or the load of cr3 can just fault normally to some normal space fault handler, so long as the write or cr3 load does not actually occur. In one aspect of the invention, when a security violation is declared, nub operating system 216 treats the action as adversarial, or potentially adversarial, and clears all data from protected pages, and cause a blue screen or other audio or visual signal indicating a fatal error to be presented to the user.
When there is no attempt to change the mode of the processor, in step 510 it is determined whether or not there has been an attempt to map a trusted memory page. An attempt to map a trusted memory page will necessitate adding page map page entries that point to a trusted memory page. Since the page tables are maintained read-only by PTE-edit control module 220, the edits necessary to map a new page result in a “write to read-only page” fault by the main processor. When such actions occur, the main processor or main operating system 214 may transfer control to PTE-edit control module 220, which will examine the attempted write and allow it, modify it, or disallow it, based on the knowledge of the target page derived from its membership in trusted page vector 322, page map page vector 320 or the root page vector. If the target page is a member of trusted page vector 322, then the PTE-EC module may treat this action as adversarial, and clean all private state, and abort. PTE-edit control module 220 should edit the target page table entry to ensure that the mapping is read-only. This action ensures that all further attempts by the main OS to edit page tables always result in a “write to read-only page” fault, and ensures the continued integrity of the protection mappings.
If the target page is a normal page (not a member of trusted page vector 322 or the root page vector) then the write should be allowed without modification. In one embodiment, if the target page is not a member of trusted page vector 322, then PTE-edit control module 220 takes no action, but schedules main operating system 214 to handle the fault (this case indicates other uses for read-only pages).
PTE-edit control module 220 may also be invoked on writes to page tables that are made by main operating system 214 with the purpose of removing pages from the page map. These actions will not affect the integrity of the system and so can be allowed. However, PTE-edit control module 220 may include computer executable instructions to examine these actions in order to maintain the correctness of page map page vector 320. For example, an edit to a page directory that removes a link to a page table may indicate that the target page can be removed from trusted page vector 322, if there are no other links to this particular page.
PTE-edit control module 220 may also be invoked whenever a new page map is loaded by the processor. The first time a particular page map is used, PTE-edit control module 220 may recursively descend the page directory, and page tables to ensure that all mappings maintain the necessary invariant. To perform this, PTE-edit control module 220 may ensure that there is no mapping to a trusted page. If there is, then the mapping may be treated as a fatal error. If the page map provides read-write mappings to any page in page map page vector 320, then the mapping is made read-only. The pages that comprise the page map are added to trusted page vector 322. Furthermore, DMA exclusion vector 610 may be updated to protect the new pages added to trusted page vector 322. Finally, the page directory is added to the root page vector. Once these actions have been performed, main operating system 214 can be re-scheduled using the new page map.
In normal operation, processes are re-scheduled frequently. Once a page map has been checked according to the procedures just described and the root page has been added to the root page vector, subsequent attempts to load this page-map can occur without further checking. PTE-edit control module 220 may also be notified whenever a page map is no longer in use. This will typically be a consequence of a process being destroyed. When this happens, PTE-edit control module 220 recursively removes all page tables from trusted page vector 322 and the root from DMA exclusion vector 610.
PTE-edit control module 220 may also be invoked to add pages to the trusted page set, or remove pages from the trusted page set. These actions may be performed at the behest of the main operating system 214 or nub operating system 216. If a page is removed from the trusted page set, nub operating system 216 ensures that the page is actually a member of trusted page vector 322, clear it of any private data, and remove it from the trusted page vector 322 and a DMA exclusion vector 610 (shown in FIG. 6 and described below). If a page is added to the trusted page set, nub operating system 216 ensures that the page is not a member of trusted page vector 322 or page map page vector 320 and then adds it to trusted page vector 322 and DMA exclusion vector 610. Next, in step 512 it is determined whether there has been an attempt to write to a read-only memory in a page map page. Step 512 may include comparing the identification of a memory page to the values included in page map page vector 320. When there has been such an attempt, in step 506 a security violation is declared. Steps 504, 510 and 512 may be repeated several times to ensure that the integrity of the trusted memory has been maintained. One skilled in the art will appreciate that aspects of the present invention will work with any virtual-to-physical mapping scheme that utilize mapping all addresses through some mapping table.
Typical memory architectures allow other devices direct access to system memory. Such facilities are used by IO devices to perform data transfers to and from main memory. Many computer architectures allow IO devices to bypass the memory protections and rules provided by the virtual memory system, and hence read and write arbitrary physical memory. In one aspect of the invention, to prevent adversarial code from arbitrary modifications of trusted system memory, or the page tables, the memory controller or other hardware may be able to restrict access to certain pages of physical memory under the control of PTE-edit control module 220. A chipset of a memory subsystem is instructed which pages should be inaccessible to devices by setting bits in a DMA exclusion vector. If a particular page is marked as protected in the DMA exclusion vector, then no IO device can read or write to the indicated page. The DMA exclusion vector may be under the programmatic control of PTE-edit control module 220. PTE-edit control module 220 may protect members of trusted page vector 322 by setting appropriate bits in the DMA exclusion vector. Alternative embodiments may differentiate read from write access, and yet others may protect pages on a device-by-device basis (allowing certain privileged devices access to certain otherwise protected pages). Of course, PTE-edit control module 220 may also examine all attempted read and write operations to system and respond accordingly.
FIG. 6 illustrates a hardware configuration that may be implemented to limit direct memory access (DMA) to memory modules. In FIG. 6, a DMA chipset 602 is coupled between a central processor unit 604 and a memory module 606. DMA chipset 602 includes a restriction module 608 that is configured to analyze DMA requests and read data stored in a DMA exclusion vector 610. DMA exclusion vector 610 includes access values indicating whether or not physical memory pages of memory 606 are trusted or non-trusted pages. For example, a bit value of 1 may indicate that a given physical memory page is trusted and a bit value of 0 may indicate that the physical memory page is non-trusted.
DMA chipset 602 may be coupled to one or more ports 612, each of which may be coupled to one or more physical devices that have bus master access. When a device coupled to one of ports 612 attempts to read data from or write data to a memory page of memory 606, restriction module 608 retrieves access values from DMA exclusion vector 610 and determines whether the device is authorized to read data from or write data to the memory page. When the access value allows for the reading and writing of data to the memory page, the device operates in a conventional manner. However, when the access value in DMA exclusion vector 610 identifies the physical page as trusted, an error condition is declared.
There are several implementations of aspects of the invention that can preserve trust in low power and power loss states. In one implementation, any time a trust state is lost due to a power condition or other cause, the system memory is scrubbed or reset. For example, if a suspend power state causes the chipset to lose track of DMA exclusion vector 610, on power up, the system memory may be scrubbed. If the hardware is able to keep DMA exclusion vector 610, it may scrub only those pages for which DMA exclusion vector 610 has true entries. Alternatively, if the hardware cannot keep track of DMA exclusion vector 610, it may scrub all of the system memory.
The present invention allows for a wide range of hardware optimization. For example, the root page vector may be used to decide which cr3 loads should fault or not and hardware knowledge of the root page vector, page map page vector 320, trusted page vector 322 and DMA exclusion vector 610 to decide, in the hardware, which page map edits are legal or not, and let the legal ones occur without recourse to nub operating system 216. Nub operating system 216 may be notified of edits that link or unlink a page map page and edits that map or unmap a page. The present invention has been described herein with reference to specific exemplary embodiments thereof. It will be apparent to those skilled in the art, that a person understanding this invention may conceive of changes or other embodiments or variations, which utilize the principles of this invention without departing from the broader spirit and scope of the invention as set forth in the appended claims. All are considered within the sphere, spirit, and scope of the invention. The specification and drawings are, therefore, to be regarded in an illustrative rather than restrictive sense. Accordingly, it is not intended that the invention be limited except as may be necessary in view of the appended claims. For example, the present invention can be implemented using a single image multi-processor version of nub operating system 216, using multi-processor synchronization algorithms that are similar to what is used for multi-processor tlb shoot-down.

Claims

1. A method of restricting access to memory, the method comprising:

storing data in a memory location;

determining whether the data is trusted or non-trusted data;

if the data is non-trusted data, then mapping the memory location with at least one page map stored in a non-trusted memory section; and

if the data is trusted data, then mapping the memory location with said at least one page map that is stored in a trusted memory section, there being no page map that is stored in any non-trusted memory section that leads to said memory location when said memory location contains trusted data.

2. The method of claim 1, further comprising:

configuring a processor that controls access to the at least one page map page to run in a page-mapping mode.

3. The method of claim 2, further comprising:

declaring a security violation when the processor changes from the page-mapping mode.

4. The method of claim 2, further comprising:

declaring a security violation when the processor changes to another page-mapping mode.

5. The method of claim 1, further comprising:

configuring a processor that controls access to the at least one page map page to run in a segment-mapping mode.

6. The method of claim 5, further comprising:

declaring a security violation when the processor changes from the segment-mapping mode.

7-9. (canceled)

10. The method of claim 1 wherein the data is trusted data stored in a physical memory page and further comprising:

identifying the physical memory page as trusted memory in a trusted page vector; and

preventing a direct memory access device from accessing any page that is identified in said trusted page vector as being a trusted page.

11. A computer-readable medium contain computer-executable instructions for causing a computer device to perform the steps comprising:

storing data in a memory location;

determining whether the data is trusted or non-trusted data;

if the data is non-trusted data, then mapping the memory location with at least one page map page stored in a non-trusted memory section; and

12. The computer-readable medium of claim 11, further including computer-executable instructions for causing the computer device to perform the step comprising:

13. The computer-readable medium of claim 12, further including computer-executable instructions for causing the computer device to perform the step comprising:

14. The computer-readable medium of claim 12, further including computer-executable instructions for causing the computer device to perform the step comprising:

15-16. (canceled)

17. The computer-readable medium of claim 12, further including computer-executable instructions for causing the computer device to perform the step comprising:

identifying the physical memory page as trusted memory in a trusted page vector when the data is trusted data; and

18. A device for restricting direct memory access to a first memory, the device coupled to a central processing unit and comprising:

a second memory containing a direct memory access exclusion vector containing access values that identify physical memory pages that do not allow direct memory access;

a restriction module coupled to the central processing unit, the first memory and the second memory, the restriction module configured to perform the steps comprising:

receiving an identification of a physical memory page in the first memory;

comparing the identification to an access value for the physical memory page in the direct memory access exclusion vector; and

allowing direct memory access to the physical memory page, by a direct memory access device that accesses memory using a physical address and without using a virtual address, only when the access value allows direct memory access.

19. The device of claim 18, wherein the first memory and the second memory are implemented in the same memory module.

20. The device of claim 19, wherein the identification of the physical memory page is received from a peripheral device having bus master access.

21. The device of claim 18, further including:

a third memory that contains at least one page map page mapping only physical memory pages that are identified as non-trusted.

22. A computer device configured to limit access to memory, the computer device comprising:

a central processor unit configured to operate in a trusted mode and a non-trusted mode;

a first memory portion containing memory pages; and

a second memory portion containing at least one non-trusted page map page that only maps the physical memory pages that are identified as non-trusted, there being a set of pages that are designated for the storage of trusted data, and there not being any page map stored in memory pages that are not designated for the storage of trusted data that leads to said pages that are designated for the storage of trusted data.

23. The computer device of claim 20, wherein the central processor unit is operated in a page-mapping mode.

24. The method of claim 1, wherein there are a plurality of page maps and a register that identifies one of the plurality of page maps as being the page map that is currently used to translate virtual addresses by said register's containing the address of the page directly of said one of said plurality of page maps, there being a root page vector that identifies address of page directories for one or more page maps that are allowed to be used for translation of virtual addresses, and wherein the method further comprises:

if an attempt is made to load an address into said register that is not identified in said root page vector as being the address of a page directory for a page map that is allowed to be used for translation of addresses, then performing at least one of:

causing a new page map to be evaluated;

taking an action that leads to said new page map being evaluated; and

preventing the attempted address from being loaded into said register.

25. The method of claim 1, wherein said page map comprises one or more page tables and a page directory that points to said one or more page tables, and wherein the method further comprises:

evaluating an attempt to edit said page directory to ensure that any change effected by the editing of said page directory will not result in a valid, present link to a page table that would result in violation of a barrier between trusted and non-trusted data.

26. The computer-readable medium of claim 11, wherein there are a plurality of page maps and a register that identifies one of the plurality of page maps as being the page map that is currently used to translate virtual addresses by said register's containing the address of the page directly of said one of said plurality of page maps, there being a root page vector that identifies address of page directories for one or more page maps that are allowed to be used for translation of virtual addresses, and wherein the steps further comprise:

causing a new page map to be evaluated;

taking an action that leads to said new page map being evaluated; and

preventing the attempted address from being loaded into said register.

27. The computer-readable medium of claim 11, wherein said page map comprises one or more page tables and a page directory that points to said one or more page tables, and wherein the steps further comprise: