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US20040063244A1 - Leadframe-to-plastic lock for IC package - Google Patents

Leadframe-to-plastic lock for IC package Download PDF

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Publication number
US20040063244A1
US20040063244A1 US10/252,217 US25221702A US2004063244A1 US 20040063244 A1 US20040063244 A1 US 20040063244A1 US 25221702 A US25221702 A US 25221702A US 2004063244 A1 US2004063244 A1 US 2004063244A1
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United States
Prior art keywords
leadframe
package
niche
opposing
aperture
Prior art date
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Granted
Application number
US10/252,217
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US6794738B2 (en
Inventor
Richard Mahle
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Texas Instruments Inc
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Texas Instruments Inc
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Publication date
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Priority to US10/252,217 priority Critical patent/US6794738B2/en
Assigned to TEXAS INSTRUMENTS INCORPORATED reassignment TEXAS INSTRUMENTS INCORPORATED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MAHLE, RICHARD L.
Priority to US10/802,068 priority patent/US7078271B2/en
Publication of US20040063244A1 publication Critical patent/US20040063244A1/en
Application granted granted Critical
Publication of US6794738B2 publication Critical patent/US6794738B2/en
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the invention relates to an IC package mold lock and methods for making the same. More particularly, the invention relates to leadframe-to-plastic lock structures and methods for use in IC packages.
  • a method of making an IC package mold lock includes steps of providing a first niche in a leadframe surface and providing an opposing niche in an opposing leadframe surface.
  • the first niche and opposing niche partially intersect, defining an aperture in the leadframe.
  • the niches are arranged such that a key is defined by the intersecting and nonintersecting portions of the niches.
  • the key is encapsulated with mold compound to form a mold lock.
  • an IC package mold lock device includes a leadframe having at least one aperture.
  • the aperture has a key with mold compound disposed in the aperture and encapsulating the key forming a mold lock.
  • an IC package mold lock is provided with a key having a first niche in a surface of the leadframe axially unaligned with a partially intersecting opposing niche in an opposing surface of the leadframe.
  • the niches are of approximately identical same size and shape, the key structure resulting from their nonalignment.
  • an IC package mold lock is provided with a key including a first niche in a surface of the leadframe axially aligned with a partially intersecting opposing niche in an opposing surface of the leadframe.
  • the niches are aligned, but not identically shaped, the key structure resulting from their shape difference.
  • an IC package has a leadframe having a die pad and multiple of lead fingers. A number of apertures in the leadframe are provided, at least one of which has a key. Mold compound encapsulates the key to form a mold lock.
  • the invention provides technical advantages including but not limited to providing an IC package mold lock ensuring a secure mechanical bond between the leadframe and encapsulant of an IC package.
  • the invention may be used advantageously to provide improved bonds for lead fingers or die pads in DIP, QFN, SOP, or other semiconductor device packages.
  • FIG. 1 is a top view of an example of an IC leadframe demonstrating mold locks according to preferred embodiments of the invention
  • FIGS. 2A through 2C are sectional views of a portion of a leadframe as shown in the example of FIG. 1 illustrating various stages in a preferred method of making an IC package mold lock according to the invention
  • FIG. 2A is a sectional view of a portion of a leadframe prior to masking and etching
  • FIG. 2B is a sectional view of the portion of a leadframe of FIG. 2A having niches in one surface;
  • FIG. 2C is a sectional view of the portion of the leadframe of FIG. 1 taken along line C-C showing niches in one surface and opposing niches in an opposing surface;
  • FIG. 3 is a sectional view of the portion of a leadframe as in the example of FIG. 2C incorporated into a QFN IC package according to the invention
  • FIG. 4 is a sectional view of the portion of a leadframe as in the example of FIG. 2C incorporated into a DIP IC package according to the invention.
  • FIG. 5 is a process flow diagram illustrating steps according to one example of a preferred method of the invention.
  • the invention provides an IC package leadframe mold lock and methods for making the same.
  • FIG. 1 is a top view of an example of a leadframe 10 according to a preferred embodiment of the invention.
  • the leadframe 10 has a die pad 12 and numerous lead fingers 14 .
  • both the die pad 12 and each of the lead fingers 14 have perforating apertures 16 .
  • the invention may alternatively be implemented with various combinations of apertures 16 in either the die pad 12 , some or all of the lead fingers 14 , or both, as further described.
  • FIG. 2C which is a sectional view of the portion of the lead frame 10 of FIG. 1 taken along line C-C
  • the apertures 16 are located within the leadframe material and neither at the top 18 nor at the bottom 20 surfaces of the leadframe 10 .
  • the apertures are formed by partially etching opposed niches 22 , 24 in the leadframe surfaces 18 , 20 from either side. Understanding of the leadframe 10 shown in FIG. 1 and FIG. 2C and methods of manufacturing the leadframe lock of the invention will be enhanced with further reference to FIGS. 2A through 2C.
  • FIG. 2A a section of the leadframe 10 is shown.
  • a first surface 18 has an opposing surface 20 .
  • first niches 22 as illustrated in the section view of FIG. 2B are etched into the first surface 18 of the leadframe 10 .
  • Opposing niches 24 are also masked and etched into the opposing surface 20 of the leadframe 10 as depicted in FIG. 2C.
  • the first niches 22 and opposing niches 24 may be etched at the same time.
  • the depth of the first niches 22 and opposing niches 24 may be varied without departure from the invention as long as an aperture 16 is formed within the leadframe 10 .
  • each niche may extend approximately halfway through the leadframe from either surface.
  • one niche may extend approximately one-quarter of the way through and the opposing niche approximately three-quarters through the leadframe, or halfway and three-quarters respectively.
  • the exact configuration of the niches, techniques of their formation, and their depth are not crucial to the concept of the invention as long as an aperture 16 is provided by aligning or partially aligning the opposing niches and etching or stamping to depths sufficient to cause the opposing niches to intersect.
  • FIG. 3 a section view of an example of a completed IC package 26 with a preferred embodiment of a leadframe lock 28 of the invention is shown.
  • the leadframe 10 and niches 22 , 24 have a semiconductor die 30 attached to the die pad 12 and a wire 32 bonded to the die 30 and to the lead finger 18 in a manner known in the arts.
  • the package 26 has been completed by the addition of encapsulating dielectric material 34 , typically a form of hard-curing plastic or epoxy resin, generally referred to as plastic or mold compound.
  • the mold compound 34 encapsulates keys 36 (further discussed below) of the leadframe apertures 16 as shown.
  • the niches 22 , 24 need not necessarily be completely filled with mold compound 34 , so long as the key 36 is encapsulated, providing a mechanical bond.
  • FIG. 4 illustrates an example of an alternative embodiment of the invention in a DIP package.
  • the mold lock 28 is provided as described in combination with a DIP package made according to methods known in the arts.
  • the invention may also be used with other packages using a metallic leadframe or die pad, e.g.: SIP, SOIC, SSOP, TSSOP, TVSOP.
  • the aperture 16 completely perforates the leadframe 10 by the intersection of the niches 22 , 24 , preferably etched from the opposing leadframe 10 surfaces 18 , 20 .
  • the aperture 16 itself may be any size or shape found desirable for the particular manufacturing process, tooling, or application.
  • the aperture 16 provides fluid communication for uncured mold compound 34 to flow between the opposing niches 22 , 24 .
  • the non-intersecting niche surfaces each form one or more generally horizontal step 38 between the approximately vertical niche walls 40 , the horizontal steps 38 being adjacent to the aperture 16 .
  • step surfaces 38 adjoined by an aperture 16 are denominated “keys” 36 herein, referring to the mechanical key structure 36 formed by the junction of the two opposed niches 22 , 24 , regardless of shape or size.
  • This mechanical key structure 36 when encapsulated by mold compound 34 , form a lead lock 28 providing a secure bond enhancing resistance to sheer and the separation of the layers of the IC package 26 .
  • the relative size and shape of the opposing niches is not an essential feature of the invention.
  • the niches may be substantially identical in size and shape so long as they are not perfectly aligned along their central axes.
  • examples of cylindrical and oval niches of the same size, but offset from one another are shown at 42 .
  • the niches may be axially aligned, but of different size or shape, e.g.; as shown at 44 , a relatively larger cylindrical niche may be axially aligned with an opposing relatively smaller cylindrical niche, or a cylindrical niche may be used in opposing axial alignment with a rectangular niche 46 .
  • the lock structure may alternatively be located at an edge portion of the lead finger or die pad as shown at 48 .
  • Many alternative niche configurations and arrangements may be used without departure from the invention.
  • FIG. 5 is a process flow diagram illustrating steps in a preferred method of the invention.
  • steps 100 , and 102 a first niche and opposing second niche are masked at the desired location on the opposing leadframe surfaces.
  • the first niche and second niche are etched, steps 104 and 106 respectively, using processes known in the arts such that the aperture and key structure is formed.
  • the package key structure is encapsulated 108 to form a secure leadframe mold lock.
  • the masking steps, or etching steps may be combined. Additional steps commonly used in the manufacture of IC packages may also be used in implementing the invention.
  • a stamping step may be substituted for one etching step and associated masking step.
  • device packages such as DIP, SIP, SOIC, SSOP, TSSOP, TVSOP, and QFN packages, for example.
  • the invention provides leadframe locks, IC packages, and methods used in their construction, providing secure mechanical bonds resistant to separation and sheer. Numerous technical advantages are provided by the invention, including but not limited to improved package strength, resilience, longevity, manufacturability, and reliability. While the invention has been described with reference to certain illustrative embodiments, the description of the methods, systems, and devices described are not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the art upon reference to the description and claims.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

Disclosed is a method of making a mold lock for bonding leadframe-to-plastic in an IC package. Steps include providing niches from opposing sides of the leadframe. The opposing niches are arranged such that an aperture and a mechanical key are formed within the leadframe material by the partial intersection of the niches. The key is encapsulated with mold compound to form a lock. An IC package mold lock in a leadframe is also disclosed, the lock having an aperture, a key, and mold compound encapsulating the key. Additionally, an IC package employing the leadframe-to-plastic lock is disclosed.

Description

    TECHNICAL FIELD
  • The invention relates to an IC package mold lock and methods for making the same. More particularly, the invention relates to leadframe-to-plastic lock structures and methods for use in IC packages. [0001]
    • BACKGROUND OF THE INVENTION
  • It is well known to encapsulate IC devices in packages in order to protect the device and to provide connective leads for coupling the terminals of the IC to the outside world, such as a PC board. [0002]
  • Problems are encountered with packaged IC devices used in the arts both in the manufacturing stages and in testing and use. Among the problems, some of the most common and debilitating are the separation of layers of devices, lead fingers pulling out of the package, and open or short circuits caused by separation of materials or the ingress of moisture between separated materials. Attempts to improve the bond between leadframes and package materials have been made using stamped or etched vias in the leadframes, which are then filled with encapsulant. Although somewhat resistant to sheering, these efforts have enjoyed limited success. [0003]
  • Improved leadframe-to-plastic IC package locks would be useful and advantageous in the arts. Such leadframe locks would provide increased reistance to sheering and separating forces providing a more secure bond. [0004]
    • SUMMARY OF THE INVENTION
  • In carrying out the principles of the present invention, in accordance with an embodiment thereof, a method of making an IC package mold lock includes steps of providing a first niche in a leadframe surface and providing an opposing niche in an opposing leadframe surface. The first niche and opposing niche partially intersect, defining an aperture in the leadframe. The niches are arranged such that a key is defined by the intersecting and nonintersecting portions of the niches. The key is encapsulated with mold compound to form a mold lock. [0005]
  • According to one aspect of the invention, an IC package mold lock device includes a leadframe having at least one aperture. The aperture has a key with mold compound disposed in the aperture and encapsulating the key forming a mold lock. [0006]
  • According to another aspect of the invention, an IC package mold lock is provided with a key having a first niche in a surface of the leadframe axially unaligned with a partially intersecting opposing niche in an opposing surface of the leadframe. The niches are of approximately identical same size and shape, the key structure resulting from their nonalignment. [0007]
  • According to yet another aspect of the invention, an IC package mold lock is provided with a key including a first niche in a surface of the leadframe axially aligned with a partially intersecting opposing niche in an opposing surface of the leadframe. The niches are aligned, but not identically shaped, the key structure resulting from their shape difference. [0008]
  • According to still another aspect of the invention, an IC package has a leadframe having a die pad and multiple of lead fingers. A number of apertures in the leadframe are provided, at least one of which has a key. Mold compound encapsulates the key to form a mold lock. [0009]
  • The invention provides technical advantages including but not limited to providing an IC package mold lock ensuring a secure mechanical bond between the leadframe and encapsulant of an IC package. The invention may be used advantageously to provide improved bonds for lead fingers or die pads in DIP, QFN, SOP, or other semiconductor device packages. These and other features, advantages, and benefits of the present invention will become apparent to one of ordinary skill in the art upon careful consideration of the detailed description of representative embodiments of the invention in connection with the accompanying drawings.[0010]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention will be more clearly understood from consideration of the following detailed description and drawings in which: [0011]
  • FIG. 1 is a top view of an example of an IC leadframe demonstrating mold locks according to preferred embodiments of the invention; [0012]
  • FIGS. 2A through 2C are sectional views of a portion of a leadframe as shown in the example of FIG. 1 illustrating various stages in a preferred method of making an IC package mold lock according to the invention; [0013]
  • FIG. 2A is a sectional view of a portion of a leadframe prior to masking and etching; [0014]
  • FIG. 2B is a sectional view of the portion of a leadframe of FIG. 2A having niches in one surface; [0015]
  • FIG. 2C is a sectional view of the portion of the leadframe of FIG. 1 taken along line C-C showing niches in one surface and opposing niches in an opposing surface; [0016]
  • FIG. 3 is a sectional view of the portion of a leadframe as in the example of FIG. 2C incorporated into a QFN IC package according to the invention; [0017]
  • FIG. 4 is a sectional view of the portion of a leadframe as in the example of FIG. 2C incorporated into a DIP IC package according to the invention; and [0018]
  • FIG. 5 is a process flow diagram illustrating steps according to one example of a preferred method of the invention.[0019]
  • References in the detailed description correspond to like references in the figures unless otherwise noted. Like numerals refer to like parts throughout the various figures. Descriptive and directional terms used in the written description such as top, bottom, left, right, etc., refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale and some features of embodiments shown and discussed are simplified or exaggerated for illustrating the principles, features, and advantages of the invention. [0020]
    • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • In general, the invention provides an IC package leadframe mold lock and methods for making the same. Representatively illustrated in FIG. 1 is a top view of an example of a [0021] leadframe 10 according to a preferred embodiment of the invention. The leadframe 10 has a die pad 12 and numerous lead fingers 14. According to this exemplary embodiment both the die pad 12 and each of the lead fingers 14 have perforating apertures 16. It should be understood that the invention may alternatively be implemented with various combinations of apertures 16 in either the die pad 12, some or all of the lead fingers 14, or both, as further described.
  • As may be seen in FIG. 2C, which is a sectional view of the portion of the [0022] lead frame 10 of FIG. 1 taken along line C-C, the apertures 16 are located within the leadframe material and neither at the top 18 nor at the bottom 20 surfaces of the leadframe 10. Preferably the apertures are formed by partially etching opposed niches 22, 24 in the leadframe surfaces 18, 20 from either side. Understanding of the leadframe 10 shown in FIG. 1 and FIG. 2C and methods of manufacturing the leadframe lock of the invention will be enhanced with further reference to FIGS. 2A through 2C.
  • In FIG. 2A, a section of the [0023] leadframe 10 is shown. A first surface 18 has an opposing surface 20. Using appropriate masking and etching techniques known in the arts, first niches 22 as illustrated in the section view of FIG. 2B are etched into the first surface 18 of the leadframe 10. Opposing niches 24 are also masked and etched into the opposing surface 20 of the leadframe 10 as depicted in FIG. 2C. Preferably, the first niches 22 and opposing niches 24 may be etched at the same time. The depth of the first niches 22 and opposing niches 24 may be varied without departure from the invention as long as an aperture 16 is formed within the leadframe 10. For example, each niche may extend approximately halfway through the leadframe from either surface. Alternatively, one niche may extend approximately one-quarter of the way through and the opposing niche approximately three-quarters through the leadframe, or halfway and three-quarters respectively. The exact configuration of the niches, techniques of their formation, and their depth are not crucial to the concept of the invention as long as an aperture 16 is provided by aligning or partially aligning the opposing niches and etching or stamping to depths sufficient to cause the opposing niches to intersect.
  • Now referring primarily to FIG. 3 a section view of an example of a completed [0024] IC package 26 with a preferred embodiment of a leadframe lock 28 of the invention is shown. The leadframe 10 and niches 22, 24 have a semiconductor die 30 attached to the die pad 12 and a wire 32 bonded to the die 30 and to the lead finger 18 in a manner known in the arts. The package 26 has been completed by the addition of encapsulating dielectric material 34, typically a form of hard-curing plastic or epoxy resin, generally referred to as plastic or mold compound. The mold compound 34 encapsulates keys 36 (further discussed below) of the leadframe apertures 16 as shown. It should be appreciated that the niches 22, 24 need not necessarily be completely filled with mold compound 34, so long as the key 36 is encapsulated, providing a mechanical bond.
  • FIG. 4 illustrates an example of an alternative embodiment of the invention in a DIP package. The [0025] mold lock 28 is provided as described in combination with a DIP package made according to methods known in the arts. The invention may also be used with other packages using a metallic leadframe or die pad, e.g.: SIP, SOIC, SSOP, TSSOP, TVSOP.
  • It should be understood that the [0026] aperture 16 completely perforates the leadframe 10 by the intersection of the niches 22, 24, preferably etched from the opposing leadframe 10 surfaces 18, 20. The aperture 16 itself may be any size or shape found desirable for the particular manufacturing process, tooling, or application. The aperture 16 provides fluid communication for uncured mold compound 34 to flow between the opposing niches 22, 24. Thus, the non-intersecting niche surfaces each form one or more generally horizontal step 38 between the approximately vertical niche walls 40, the horizontal steps 38 being adjacent to the aperture 16. These step surfaces 38 adjoined by an aperture 16 are denominated “keys” 36 herein, referring to the mechanical key structure 36 formed by the junction of the two opposed niches 22, 24, regardless of shape or size. This mechanical key structure 36, when encapsulated by mold compound 34, form a lead lock 28 providing a secure bond enhancing resistance to sheer and the separation of the layers of the IC package 26.
  • It will be understood by those skilled in the arts that the relative size and shape of the opposing niches is not an essential feature of the invention. For example, the niches may be substantially identical in size and shape so long as they are not perfectly aligned along their central axes. Again referring to FIG. 1, examples of cylindrical and oval niches of the same size, but offset from one another are shown at [0027] 42. Alternatively, the niches may be axially aligned, but of different size or shape, e.g.; as shown at 44, a relatively larger cylindrical niche may be axially aligned with an opposing relatively smaller cylindrical niche, or a cylindrical niche may be used in opposing axial alignment with a rectangular niche 46. Of course, the lock structure may alternatively be located at an edge portion of the lead finger or die pad as shown at 48. Many alternative niche configurations and arrangements may be used without departure from the invention.
  • FIG. 5 is a process flow diagram illustrating steps in a preferred method of the invention. As shown in [0028] steps 100, and 102, a first niche and opposing second niche are masked at the desired location on the opposing leadframe surfaces. The first niche and second niche are etched, steps 104 and 106 respectively, using processes known in the arts such that the aperture and key structure is formed. The package key structure is encapsulated 108 to form a secure leadframe mold lock. Of course many variations are possible and some of the steps shown may be performed simultaneously according to known methods of manufacture. For example, the masking steps, or etching steps, may be combined. Additional steps commonly used in the manufacture of IC packages may also be used in implementing the invention. For example, a stamping step may be substituted for one etching step and associated masking step. It will be appreciated by those skilled in the arts that the invention may be used with various types of device packages, such as DIP, SIP, SOIC, SSOP, TSSOP, TVSOP, and QFN packages, for example.
  • Thus, the invention provides leadframe locks, IC packages, and methods used in their construction, providing secure mechanical bonds resistant to separation and sheer. Numerous technical advantages are provided by the invention, including but not limited to improved package strength, resilience, longevity, manufacturability, and reliability. While the invention has been described with reference to certain illustrative embodiments, the description of the methods, systems, and devices described are not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the art upon reference to the description and claims. [0029]

Claims (23)

I claim:
1. A method of making an IC package mold lock comprising the steps of:
providing a first niche in a leadframe surface;
providing an opposing niche in an opposing leadframe surface, the opposing niche partially intersecting with the first niche such that an aperture in the leadframe is defined by the intersecting portions, and such that a key is defined by the nonintersecting portions; and
encapsulating the key with mold compound to form a mold lock.
2. The method of claim 1 wherein the encapsulating step further comprises filling the first niche, opposing niche, and aperture with mold compound.
3. The method of claim 1 wherein the providing steps further comprise the steps of masking and etching the leadframe surfaces.
4. The method of claim 1 wherein the step of providing an opposing niche further comprises the step of providing an opposing niche axially unaligned with a first niche of approximately identical same size and shape.
5. The method of claim 1 wherein the step of providing an opposing niche further comprises the step of providng an opposing niche axially aligned with a first niche of nonidentical size and shape.
6. The method of claim 1 wherein the leadframe surfaces further comprise lead finger surfaces.
7. The method of claim 1 wherein the leadframe surfaces further comprise die pad surfaces.
8. An IC package mold lock comprising:
a leadframe having an aperture, the aperture having a key; and
mold compound disposed in the aperture and encapsulating the key for forming a mold lock.
9. An IC package mold lock according to claim 8 wherein the aperture is disposed in a lead finger of the leadframe.
10. An IC package mold lock according to claim 8 wherein the aperture is disposed in a die pad of the leadframe.
11. An IC package mold lock according to claim 8 wherein the IC package further comprises a QFN package.
12. An IC package mold lock according to claim 8 wherein the IC package further comprises a DIP package.
13. An IC package mold lock according to claim 8 wherein the mold compound fills the aperture.
14. An IC package mold lock according to claim 8 wherein the key further comprises a first niche in a surface of the leadframe axially unaligned with a partially intersecting opposing niche in an opposing surface of the leadframe, the niches being of approximately identical same size and shape.
15. An IC package mold lock according to claim 8 wherein the key further comprises a first niche in a surface of the leadframe axially aligned with a partially intersecting opposing niche in an opposing surface of the leadframe, the niches being of nonidentical size and shape.
16. An IC package comprising:
a leadframe having a die pad and a plurality of lead fingers;
a plurality of apertures in the leadframe, at least one of the apertures having a key; and
mold compound encapsulating the key forming a mold lock.
17. An IC package according to claim 16 wherein the at least one aperture having a key is disposed in a lead finger of the leadframe.
18. An IC package according to claim 16 wherein the at least one aperture having a key is disposed in a die pad of the leadframe.
19. An IC package according to claim 16 wherein the IC package further comprises a QFN package.
20. An IC package according to claim 16 wherein the IC package further comprises a DIP package.
21. An IC package according to claim 16 wherein the mold compound fills the at least one aperture.
22. An IC package according to claim 16 wherein the at least one aperture having a key further comprises a first niche in a surface of the leadframe axially unaligned with a partially intersecting opposing niche in an opposing surface of the leadframe, the niches being of approximately identical same size and shape.
23. An IC package according to claim 16 wherein the at least one aperture having a key further comprises a first niche in a surface of the leadframe axially aligned with a partially intersecting opposing niche in an opposing surface of the leadframe, the niches being of nonidentical size and shape.
US10/252,217 2002-09-23 2002-09-23 Leadframe-to-plastic lock for IC package Expired - Lifetime US6794738B2 (en)

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