TWI832742B - Boost converter for suppressing magnetic saturation - Google Patents
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Description
本發明係關於一種升壓轉換器,特別係關於一種可抑制磁飽和之升壓轉換器。The present invention relates to a boost converter, and in particular to a boost converter capable of suppressing magnetic saturation.
在升壓轉換器之設計領域中,升壓電感器為不可或缺之元件。然而,每種磁性元件都有其正常使用之磁滯曲線範圍。當升壓轉換器之操作電流過大時,升壓電感器可能會進入磁飽和之狀態,此將導致其磁化特性消失並引發安全性之問題。有鑑於此,勢必要提出一種全新之解決方案,以克服先前技術所面臨之困境。In the field of boost converter design, the boost inductor is an indispensable component. However, each magnetic component has its hysteresis curve range for normal use. When the operating current of the boost converter is too large, the boost inductor may enter a magnetic saturation state, which will cause its magnetization characteristics to disappear and cause safety issues. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by previous technologies.
在較佳實施例中,本發明提出一種抑制磁飽和之升壓轉換器,包括:一橋式整流器,根據一第一輸入電位和一第二輸入電位來產生一整流電位;一升壓電感器,接收該整流電位,其中一電感電流係流過該升壓電感器;一功率切換器,根據一驅動電位來選擇性地將該升壓電感器耦接至一接地電位;一輸出級電路,耦接至該升壓電感器,並產生一輸出電位;以及一偵測及控制電路,監控該升壓電感器,並根據該電感電流來產生該驅動電位;其中若該電感電流相對較小,則該驅動電位為具有一固定切換頻率之一脈波寬度調變(Pulse Width Modulation,PWM)電位;其中若該電感電流相對較大,則該驅動電位為具有一可變切換頻率之一脈波頻率調變(Pulse Frequency Modulation,PFM)電位。In a preferred embodiment, the present invention proposes a boost converter that suppresses magnetic saturation, including: a bridge rectifier that generates a rectified potential based on a first input potential and a second input potential; a boost inductor, Receive the rectified potential, in which an inductor current flows through the boost inductor; a power switch selectively couples the boost inductor to a ground potential according to a driving potential; an output stage circuit couples is connected to the boost inductor and generates an output potential; and a detection and control circuit monitors the boost inductor and generates the driving potential according to the inductor current; if the inductor current is relatively small, then The driving potential is a pulse width modulation (PWM) potential with a fixed switching frequency; if the inductor current is relatively large, the driving potential is a pulse frequency with a variable switching frequency. Modulation (Pulse Frequency Modulation, PFM) potential.
在一些實施例中,該升壓電感器係操作於一不連續電流模式、一邊界電流模式,或是一連續電流模式三者擇一。In some embodiments, the boost inductor operates in a discontinuous current mode, a boundary current mode, or a continuous current mode.
在一些實施例中,當該升壓電感器操作於該不連續電流模式或該邊界電流模式時,該驅動電位為具有該固定切換頻率之該脈波寬度調變電位,而當該升壓電感器操作於該連續電流模式時,該驅動電位為具有該可變切換頻率之該脈波頻率調變電位。In some embodiments, when the boost inductor operates in the discontinuous current mode or the boundary current mode, the driving potential is the pulse width modulation potential with the fixed switching frequency, and when the boost inductor operates in the discontinuous current mode or the boundary current mode, the driving potential is the pulse width modulation potential with the fixed switching frequency. When the inductor operates in the continuous current mode, the driving potential is the pulse frequency modulated potential with the variable switching frequency.
在一些實施例中,該橋式整流器包括:一第一二極體,具有一陽極和一陰極,其中該第一二極體之該陽極係耦接至一第一輸入節點以接收該第一輸入電位,而該第一二極體之該陰極係耦接至一第一節點以輸出該整流電位;一第二二極體,具有一陽極和一陰極,其中該第二二極體之該陽極係耦接至一第二輸入節點以接收該第二輸入電位,而該第二二極體之該陰極係耦接至該第一節點;一第三二極體,具有一陽極和一陰極,其中該第三二極體之該陽極係耦接至該接地電位,而該第三二極體之該陰極係耦接至該第一輸入節點;以及一第四二極體,具有一陽極和一陰極,其中該第四二極體之該陽極係耦接至該接地電位,而該第四二極體之該陰極係耦接至該第二輸入節點;其中該升壓電感器具有一第一端和一第二端,該升壓電感器之該第一端係耦接至該第一節點以接收該整流電位,而該升壓電感器之該第二端係耦接至一第二節點。In some embodiments, the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the cathode of the first diode is coupled to a first node to output the rectified potential; a second diode has an anode and a cathode, wherein the second diode The anode is coupled to a second input node to receive the second input potential, and the cathode of the second diode is coupled to the first node; a third diode has an anode and a cathode , wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; wherein the boost inductor has a first One end and a second end, the first end of the boost inductor is coupled to the first node to receive the rectified potential, and the second end of the boost inductor is coupled to a second node.
在一些實施例中,該功率切換器包括:一第一電晶體,具有一控制端、一第一端,以及一第二端,其中該第一電晶體之該控制端係用於接收該驅動電位,該第一電晶體之該第一端係耦接至該接地電位,而該第一電晶體之該第二端係耦接至一第三節點。In some embodiments, the power switch includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the drive potential, the first terminal of the first transistor is coupled to the ground potential, and the second terminal of the first transistor is coupled to a third node.
在一些實施例中,該輸出級電路包括:一第五二極體,具有一陽極和一陰極,其中該第五二極體之該陽極係耦接至該第三節點,而該第五二極體之該陰極係耦接至一輸出節點以輸出該輸出電位;以及一輸出電容器,具有一第一端和一第二端,其中該輸出電容器之該第一端係耦接至該輸出節點,而該輸出電容器之該第二端係耦接至一第四節點。In some embodiments, the output stage circuit includes: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the third node, and the fifth diode The cathode of the pole body is coupled to an output node to output the output potential; and an output capacitor has a first terminal and a second terminal, wherein the first terminal of the output capacitor is coupled to the output node , and the second terminal of the output capacitor is coupled to a fourth node.
在一些實施例中,該偵測及控制電路包括:一第一電阻器,具有一第一端和一第二端,其中該第一電阻器之該第一端係耦接至該第二節點,而該第一電阻器之該第二端係耦接至該第三節點,而其中該電感電流更流過該第一電阻器,使得該第二節點和該第三節點之間形成一電位差;一平均電路,計算該電位差之一平均值,以產生一平均電位;以及一第二電阻器,具有一第一端和一第二端,其中該第二電阻器之該第一端係耦接至該第四節點,而該第二電阻器之該第二端係耦接至該接地電位,而其中一輸出電流更流過該第二電阻器,使得該第二電阻器能於該第四節點處提供一感測電位。In some embodiments, the detection and control circuit includes: a first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the second node , and the second end of the first resistor is coupled to the third node, and the inductor current further flows through the first resistor, so that a potential difference is formed between the second node and the third node. ; An averaging circuit that calculates an average value of the potential difference to generate an average potential; and a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled is connected to the fourth node, and the second end of the second resistor is coupled to the ground potential, and one of the output currents flows through the second resistor, so that the second resistor can A sensing potential is provided at four nodes.
在一些實施例中,該偵測及控制電路更包括:一第三電阻器,具有一第一端和一第二端,其中該第三電阻器之該第一端用於接收該平均電位,而該第三電阻器之該第二端係耦接至一第五節點;以及一第二電晶體,具有一控制端、一第一端,以及一第二端,其中該第二電晶體之該控制端係耦接至該第五節點,該第二電晶體之該第一端係耦接至該接地電位,而該第二電晶體之該第二端係耦接至一第六節點。In some embodiments, the detection and control circuit further includes: a third resistor having a first terminal and a second terminal, wherein the first terminal of the third resistor is used to receive the average potential, The second terminal of the third resistor is coupled to a fifth node; and a second transistor has a control terminal, a first terminal, and a second terminal, wherein the second transistor The control terminal is coupled to the fifth node, the first terminal of the second transistor is coupled to the ground potential, and the second terminal of the second transistor is coupled to a sixth node.
在一些實施例中,該偵測及控制電路更包括:一第四電阻器,具有一第一端和一第二端,其中該第四電阻器之該第一端用於接收該感測電位,而該第四電阻器之該第二端係耦接至一第七節點;以及一第三電晶體,具有一控制端、一第一端,以及一第二端,其中該第三電晶體之該控制端係耦接至該第七節點,該第三電晶體之該第一端係耦接至該第六節點,而該第三電晶體之該第二端係耦接至一第八節點。In some embodiments, the detection and control circuit further includes: a fourth resistor having a first end and a second end, wherein the first end of the fourth resistor is used to receive the sensing potential. , and the second terminal of the fourth resistor is coupled to a seventh node; and a third transistor has a control terminal, a first terminal, and a second terminal, wherein the third transistor The control terminal is coupled to the seventh node, the first terminal of the third transistor is coupled to the sixth node, and the second terminal of the third transistor is coupled to an eighth node. node.
在一些實施例中,該偵測及控制電路更包括:一微控制器,產生一參考電位;以及一比較器,具有一正輸入端、一負輸入端,以及一輸出端,其中該比較器之該正輸入端係用於接收該參考電位,該比較器之該負輸入端係耦接至該第八節點,而該比較器之該輸出端係用於輸出一比較電位;其中該微控制器更根據該比較電位來產生及決定該驅動電位。In some embodiments, the detection and control circuit further includes: a microcontroller generating a reference potential; and a comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the comparator The positive input terminal is used to receive the reference potential, the negative input terminal of the comparator is coupled to the eighth node, and the output terminal of the comparator is used to output a comparison potential; wherein the microcontroller The device further generates and determines the driving potential based on the comparison potential.
為讓本發明之目的、特徵和優點能更明顯易懂,下文特舉出本發明之具體實施例,並配合所附圖式,作詳細說明如下。In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are listed below and described in detail with reference to the accompanying drawings.
在說明書及申請專利範圍當中使用了某些詞彙來指稱特定的元件。本領域技術人員應可理解,硬體製造商可能會用不同的名詞來稱呼同一個元件。本說明書及申請專利範圍並不以名稱的差異來作為區分元件的方式,而是以元件在功能上的差異來作為區分的準則。在通篇說明書及申請專利範圍當中所提及的「包含」及「包括」一詞為開放式的用語,故應解釋成「包含但不僅限定於」。「大致」一詞則是指在可接受的誤差範圍內,本領域技術人員能夠在一定誤差範圍內解決所述技術問題,達到所述基本之技術效果。此外,「耦接」一詞在本說明書中包含任何直接及間接的電性連接手段。因此,若文中描述一第一裝置耦接至一第二裝置,則代表該第一裝置可直接電性連接至該第二裝置,或經由其它裝置或連接手段而間接地電性連接至該第二裝置。Certain words are used in the specification and patent claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and the patent application do not use differences in names as a way to distinguish components, but differences in functions of components as a criterion for distinction. The words "include" and "include" mentioned throughout the specification and the scope of the patent application are open-ended terms, and therefore should be interpreted as "include but not limited to." The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem and achieve the basic technical effect within a certain error range. In addition, the word "coupling" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connections. Two devices.
第1圖係顯示根據本發明一實施例所述之升壓轉換器100之示意圖。例如,升壓轉換器100可應用於桌上型電腦、筆記型電腦,或一體成形電腦。如第1圖所示,升壓轉換器100包括:一橋式整流器110、一升壓電感器LU、一功率切換器120、一輸出級電路130,以及一偵測及控制電路150。必須注意的是,雖然未顯示於第1圖中,但升壓轉換器100更可包括其他元件,例如:一穩壓器或(且)一負回授電路。FIG. 1 is a schematic diagram of a
橋式整流器110可根據一第一輸入電位VIN1和一第二輸入電位VIN2來產生一整流電位VR,其中第一輸入電位VIN1和第二輸入電位VIN2之間可形成具有任意頻率和任意振幅之一交流電壓。例如,交流電壓之頻率可約為50Hz或60Hz,而交流電壓之方均根值可約由90V至264V,但亦不僅限於此。升壓電感器LU可接收整流電位VR,其中一電感電流IL可流過升壓電感器LU。功率切換器120可根據一驅動電位VG來選擇性地將升壓電感器LU耦接至一接地電位VSS(例如:0V)。例如,若驅動電位VG為一高邏輯位準(亦即,邏輯「1」),則功率切換器120可將升壓電感器LU耦接至接地電位VSS(亦即,功率切換器120可近似於一短路路徑);反之,若驅動電位VG為一低邏輯位準(亦即,邏輯「0」),則功率切換器120不會將升壓電感器LU耦接至接地電位VSS(亦即,功率切換器120可近似於一開路路徑)。輸出級電路130係耦接至升壓電感器LU,並可產生一輸出電位VOUT。例如,輸出電位VOUT可為一直流電位,其電位位準可約為400V,但亦不僅限於此。偵測及控制電路150可監控升壓電感器LU,並可根據其電感電流IL來產生驅動電位VG。大致而言,若電感電流IL相對較小(例如,電感電流IL之一平均值小於一臨界值),則驅動電位VG可為具有一固定切換頻率之一脈波寬度調變(Pulse Width Modulation,PWM)電位VW;反之,若電感電流IL相對較大(例如,電感電流IL之平均值大於或等於前述之臨界值),則驅動電位VG可為具有一可變切換頻率之一脈波頻率調變(Pulse Frequency Modulation,PFM)電位VF。根據實際量測結果,本發明所提之設計可有效避免升壓轉換器100之升壓電感器LU意外進入磁飽和之狀態,從可改善整體之操作安全性。The
以下實施例將介紹升壓轉換器100之詳細結構及操作方式。必須理解的是,這些圖式和敘述僅為舉例,而非用於限制本發明之範圍。The following embodiments will introduce the detailed structure and operation of the
第2圖係顯示根據本發明一實施例所述之升壓轉換器200之電路圖。在第2圖之實施例中,升壓轉換器200具有一第一輸入節點NIN1、一第二輸入節點NIN2,以及一輸出節點NOUT,並包括一橋式整流器210、一升壓電感器LU、一功率切換器220、一輸出級電路230,以及一偵測及控制電路250。升壓轉換器200之第一輸入節點NIN1和第二輸入節點NIN2可分別由一外部輸入電源(未顯示)處接收一第一輸入電位VIN1和一第二輸入電位VIN2。升壓轉換器200之輸出節點NOUT則可用於輸出一輸出電位VOUT至一電子裝置(未顯示)。Figure 2 is a circuit diagram of a
橋式整流器210包括一第一二極體D1、一第二二極體D2、一第三二極體D3,以及一第四二極體D4。第一二極體D1具有一陽極和一陰極,其中第一二極體D1之陽極係耦接至第一輸入節點NIN1,而第一二極體D1之陰極係耦接至一第一節點N1以輸出一整流電位VR。第二二極體D2具有一陽極和一陰極,其中第二二極體D2之陽極係耦接至第二輸入節點NIN2,而第二二極體D2之陰極係耦接至第一節點N1。第三二極體D3具有一陽極和一陰極,其中第三二極體D3之陽極係耦接至一接地電位VSS,而第三二極體D3之陰極係耦接至第一輸入節點NIN1。第四二極體D4具有一陽極和一陰極,其中第四二極體D4之陽極係耦接至接地電位VSS,而第四二極體D4之陰極係耦接至第二輸入節點NIN2。The
升壓電感器LU具有一第一端和一第二端,其中升壓電感器LU之第一端係耦接至第一節點N1以接收整流電位VR,而升壓電感器LU之第二端係耦接至一第二節點N2。在一些實施例中,一電感電流IL可流過升壓電感器LU,其將於後續詳細作說明。The boost inductor LU has a first terminal and a second terminal, wherein the first terminal of the boost inductor LU is coupled to the first node N1 to receive the rectified potential VR, and the second terminal of the boost inductor LU is coupled to a second node N2. In some embodiments, an inductor current IL may flow through the boost inductor LU, which will be described in detail later.
功率切換器220包括一第一電晶體M1。例如,第一電晶體M1可為一N型金氧半場效電晶體(N-type Metal-Oxide-Semiconductor Field-Effect Transistor,NMOSFET)。第一電晶體M1具有一控制端(例如:一閘極)、一第一端(例如:一源極),以及一第二端(例如:一汲極),其中第一電晶體M1之控制端係用於接收一驅動電位VG,第一電晶體M1之第一端係耦接至接地電位VSS,而第一電晶體M1之第二端係耦接至一第三節點N3。The
輸出級電路230包括一第五二極體D5和一輸出電容器CO。第五二極體D5具有一陽極和一陰極,其中第五二極體D5之陽極係耦接至第三節點N3,而第五二極體D5之陰極係耦接至輸出節點NOUT。輸出電容器CO具有一第一端和一第二端,其中輸出電容器CO之第一端係耦接至輸出節點NOUT,而輸出電容器CO之第二端係耦接至一第四節點N4。在一些實施例中,一輸出電流IOUT可流過輸出電容器CO,其將於後續詳細作說明。The
偵測及控制電路250包括:一平均電路252、一微控制器(Microcontroller Unit,MCU)254、一比較器256、一第二電晶體M2、一第三電晶體M3、一第一電阻器R1、一第二電阻器R2、一第三電阻器R3,以及一第四電阻器R4。例如,第二電晶體M2和第三電晶體M3可各自為一N型金氧半場效電晶體。The detection and
第一電阻器R1具有一第一端和一第二端,其中第一電阻器R1之第一端係耦接至第二節點N2,而第一電阻器R1之第二端係耦接至第三節點N3。前述之電感電流IL更可流過第一電阻器R1,使得第二節點N2和第三節點N3之間可形成一電位差VD。根據歐姆定律,此電位差VD將與電感電流IL兩者呈現正比關係。平均電路252可計算出此電位差VD於一段既定時間內之一平均值,以產生一平均電位VA。在一些實施例中,第一電阻器R1之電阻值非常小(例如:小於或等於10Ω),故其幾乎可視為一短路路徑。The first resistor R1 has a first terminal and a second terminal, wherein the first terminal of the first resistor R1 is coupled to the second node N2, and the second terminal of the first resistor R1 is coupled to the second node N2. Three nodes N3. The aforementioned inductor current IL can further flow through the first resistor R1, so that a potential difference VD can be formed between the second node N2 and the third node N3. According to Ohm's law, this potential difference VD will be proportional to the inductor current IL. The averaging
第二電阻器R2具有一第一端和一第二端,其中第二電阻器R2之第一端係耦接至第四節點N4,而第二電阻器R2之第二端係耦接至接地電位VSS。來自輸出級電路230之輸出電流IOUT更可流過第二電阻器R2,使得第二電阻器R2能於第四節點N4處提供一感測電位VS。根據歐姆定律,此感測電位VS將與輸出電流IOUT兩者呈現正比關係。在一些實施例中,第二電阻器R2之電阻值非常小(例如:小於或等於1Ω),故其幾乎可視為另一短路路徑。The second resistor R2 has a first terminal and a second terminal, wherein the first terminal of the second resistor R2 is coupled to the fourth node N4, and the second terminal of the second resistor R2 is coupled to the ground. Potential VSS. The output current IOUT from the
第三電阻器R3具有一第一端和一第二端,其中第三電阻器R3之第一端用於接收平均電位VA,而第三電阻器R3之第二端係耦接至一第五節點N5。第二電晶體M2具有一控制端(例如:一閘極)、一第一端(例如:一源極),以及一第二端(例如:一汲極),其中第二電晶體M2之控制端係耦接至第五節點N5,第二電晶體M2之第一端係耦接至接地電位VSS,而第二電晶體M2之第二端係耦接至一第六節點N6。The third resistor R3 has a first terminal and a second terminal, wherein the first terminal of the third resistor R3 is used to receive the average potential VA, and the second terminal of the third resistor R3 is coupled to a fifth Node N5. The second transistor M2 has a control terminal (for example, a gate), a first terminal (for example, a source), and a second terminal (for example, a drain), wherein the control terminal of the second transistor M2 The terminal is coupled to the fifth node N5, the first terminal of the second transistor M2 is coupled to the ground potential VSS, and the second terminal of the second transistor M2 is coupled to a sixth node N6.
第四電阻器R4具有一第一端和一第二端,其中第四電阻器R4之第一端用於接收感測電位VS,而第四電阻器R4之第二端係耦接至一第七節點N7。第三電晶體M3具有一控制端(例如:一閘極)、一第一端(例如:一源極),以及一第二端(例如:一汲極),其中第三電晶體M3之控制端係耦接至第七節點N7,第三電晶體M3之第一端係耦接至第六節點N6,而第三電晶體M3之第二端係耦接至一第八節點N8。The fourth resistor R4 has a first terminal and a second terminal, wherein the first terminal of the fourth resistor R4 is used to receive the sensing potential VS, and the second terminal of the fourth resistor R4 is coupled to a first terminal. Seven nodes N7. The third transistor M3 has a control terminal (for example: a gate), a first terminal (for example: a source), and a second terminal (for example: a drain), wherein the control terminal of the third transistor M3 The terminal is coupled to the seventh node N7, the first terminal of the third transistor M3 is coupled to the sixth node N6, and the second terminal of the third transistor M3 is coupled to an eighth node N8.
微控制器254可產生一參考電位VE。此參考電位VE可為一固定電位,例如:2.5V,但亦不僅限於此。比較器256具有一正輸入端、一負輸入端,以及一輸出端,其中比較器256之正輸入端係用於接收參考電位VE,比較器256之負輸入端係耦接至第八節點N8,而比較器256之輸出端係用於輸出一比較電位VB。另外,微控制器254還可根據此比較電位VB來產生及決定前述之驅動電位VG,使得驅動電位VG可為具有一固定切換頻率之一脈波寬度調變電位VW,抑或可為具有一可變切換頻率之一脈波頻率調變電位VF兩者擇一。The
第3圖係顯示根據本發明一實施例所述之升壓電感器LU之電感電流IL之波形圖。在一些實施例中,升壓電感器LU可操作於一不連續電流模式(Discontinuous Current Mode,DCM)、一邊界電流模式(Boundary Current Mode,BCM),或是一連續電流模式(Continuous Current Mode,CCM)三者擇一。舉例而言,在一第一時間區間T1內,升壓電感器LU係操作於不連續電流模式;在一第二時間區間T2內,升壓電感器LU係操作於邊界電流模式;而在一第三時間區間T3內,升壓電感器LU係操作於連續電流模式。Figure 3 is a waveform diagram showing the inductor current IL of the boost inductor LU according to an embodiment of the present invention. In some embodiments, the boost inductor LU can operate in a Discontinuous Current Mode (DCM), a Boundary Current Mode (BCM), or a Continuous Current Mode (Continuous Current Mode, CCM) Choose one of the three. For example, during a first time interval T1, the boost inductor LU operates in the discontinuous current mode; during a second time interval T2, the boost inductor LU operates in the boundary current mode; and during a second time interval T2, the boost inductor LU operates in the boundary current mode. During the third time interval T3, the boost inductor LU operates in the continuous current mode.
在一些實施例中,升壓轉換器200之操作原理可如下列所述。大致而言,偵測及控制電路250可根據平均電位VA或(且)感測電位VS來判斷升壓電感器LU之一操作模式。若升壓電感器LU操作於不連續電流模式或邊界電流模式,則電感電流IL和輸出電流IOUT皆相對較小,使得第二電晶體M2和第三電晶體M3皆維持於斷開狀態。反之,若升壓電感器LU操作於連續電流模式,則電感電流IL和輸出電流IOUT皆相對較大,使得平均電位VA足以導通第二電晶體M2且感測電位VS足以導通第三電晶體M3。In some embodiments, the operating principle of the
當升壓電感器LU操作於不連續電流模式或邊界電流模式時,第八節點N8將為浮接(Floating)狀態,故比較器256將不會輸出任何比較電位VB。因為沒有接收到比較電位VB,所以微控制器254將可決定驅動電位VG成為具有固定切換頻率之脈波寬度調變電位VW。When the boost inductor LU operates in the discontinuous current mode or the boundary current mode, the eighth node N8 will be in a floating state, so the
當升壓電感器LU操作於連續電流模式時,第八節點N8處之電位V8可由第二電晶體M2和第三電晶體M3幾乎下拉至接地電位VSS,故比較器256將輸出具有高邏輯位準之比較電位VB。回應於前述之比較電位VB,微控制器254將可決定驅動電位VG成為具有可變切換頻率之脈波頻率調變電位VF。When the boost inductor LU operates in the continuous current mode, the potential V8 at the eighth node N8 can be almost pulled down to the ground potential VSS by the second transistor M2 and the third transistor M3, so the
第4圖係顯示根據本發明一實施例所述之驅動電位VG和電感電流IL之波形圖。如第4圖所示,驅動電位VG之每一操作週期TT包括一高邏輯區間TN和一低邏輯區間TF。在第4圖之實施例中,驅動電位VG為具有固定切換頻率之脈波寬度調變電位VW。若升壓電感器LU操作於不連續電流模式,則驅動電位VG之低邏輯區間TF之長度將大於其高邏輯區間TN之長度。另外,若升壓電感器LU操作於邊界電流模式,則驅動電位VG之低邏輯區間TF之長度將恰等其高邏輯區間TN之長度。必須注意的是,無論是不連續電流模式或邊界電流模式,驅動電位VG之切換頻率皆不會改變。Figure 4 is a waveform diagram showing the driving potential VG and the inductor current IL according to an embodiment of the present invention. As shown in FIG. 4 , each operation period TT of the driving potential VG includes a high logic interval TN and a low logic interval TF. In the embodiment of FIG. 4 , the driving potential VG is a pulse width modulation potential VW with a fixed switching frequency. If the boost inductor LU operates in the discontinuous current mode, the length of the low logic interval TF of the driving potential VG will be greater than the length of its high logic interval TN. In addition, if the boost inductor LU operates in the boundary current mode, the length of the low logic interval TF of the driving potential VG will be exactly the same as the length of the high logic interval TN. It must be noted that whether it is discontinuous current mode or boundary current mode, the switching frequency of the driving potential VG will not change.
第5圖係顯示根據本發明另一實施例所述之驅動電位VG和電感電流IL之波形圖。在第5圖之實施例中,驅動電位VG為具有可變切換頻率之脈波頻率調變電位VF。若升壓電感器LU操作於連續電流模式,則微控制器254將會適當地調整驅動電位VG之切換頻率或(且)工作週期,同時迫使驅動電位VG之低邏輯區間TF之長度恰等其高邏輯區間TN之長度。根據實際量測結果,此種設計之脈波頻率調變電位VF可避免升壓電感器LU尚未完全放電就再次進行充電。是以,升壓電感器LU將不易因連續電流模式而意外進入磁飽和狀態。FIG. 5 shows a waveform diagram of the driving potential VG and the inductor current IL according to another embodiment of the present invention. In the embodiment of FIG. 5, the driving potential VG is a pulse frequency modulated potential VF with a variable switching frequency. If the boost inductor LU operates in the continuous current mode, the
本發明提出一種新穎之升壓轉換器,其能用於降低磁飽和之風險。根據實際量測結果,使用前述設計之升壓轉換器將可有效改善整體之操作安全性,故其很適合應用於各種各式之裝置當中。The present invention proposes a novel boost converter that can be used to reduce the risk of magnetic saturation. According to the actual measurement results, using the boost converter designed as mentioned above will effectively improve the overall operational safety, so it is very suitable for application in various types of devices.
值得注意的是,以上所述之電位、電流、電阻值、電感值、電容值,以及其餘元件參數均非為本發明之限制條件。設計者可以根據不同需要調整這些設定值。本發明之升壓轉換器並不僅限於第1-5圖所圖示之狀態。本發明可以僅包括第1-5圖之任何一或複數個實施例之任何一或複數項特徵。換言之,並非所有圖示之特徵均須同時實施於本發明之升壓轉換器當中。雖然本發明之實施例係使用金氧半場效電晶體為例,但本發明並不僅限於此,本技術領域人士可改用其他種類之電晶體,例如:接面場效電晶體,或是鰭式場效電晶體等等,而不致於影響本發明之效果。It is worth noting that the above-mentioned potential, current, resistance value, inductance value, capacitance value, and other component parameters are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The boost converter of the present invention is not limited to the state shown in Figures 1-5. The present invention may only include any one or multiple features of any one or multiple embodiments of Figures 1-5. In other words, not all features shown in the figures need to be implemented in the boost converter of the present invention at the same time. Although the embodiment of the present invention uses a metal oxide semi-field effect transistor as an example, the present invention is not limited thereto. Those skilled in the art can use other types of transistors, such as junction field effect transistors or fins. type field effect transistor, etc., without affecting the effect of the present invention.
在本說明書以及申請專利範圍中的序數,例如「第一」、「第二」、「第三」等等,彼此之間並沒有順序上的先後關係,其僅用於標示區分兩個具有相同名字之不同元件。The ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., have no sequential relationship with each other. They are only used to distinguish two items with the same Different components with names.
本發明雖以較佳實施例揭露如上,然其並非用以限定本發明的範圍,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可做些許的更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention is disclosed above in terms of preferred embodiments, they are not intended to limit the scope of the present invention. Anyone skilled in the art can make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the appended patent application scope.
100,200:升壓轉換器 110,210:橋式整流器 120,220:功率切換器 130,230:輸出級電路 150,250:偵測及控制電路 252:平均電路 254:微控制器 256:比較器 CO:輸出電容器 D1:第一二極體 D2:第二二極體 D3:第三二極體 D4:第四二極體 D5:第五二極體 IL:電感電流 IOUT:輸出電流 LU:升壓電感器 M1:第一電晶體 M2:第二電晶體 M3:第三電晶體 N1:第一節點 N2:第二節點 N3:第三節點 N4:第四節點 N5:第五節點 N6:第六節點 N7:第七節點 N8:第八節點 NIN1:第一輸入節點 NIN2:第二輸入節點 NOUT:輸出節點 R1:第一電阻器 R2:第二電阻器 R3:第三電阻器 R4:第四電阻器 T1:第一時間區間 T2:第二時間區間 T3:第三時間區間 TT:操作週期 TF:低邏輯區間 TN:高邏輯區間 V8:電位 VA:平均電位 VB:比較電位 VD:電位差 VE:參考電位 VF:脈波頻率調變電位 VG:驅動電位 VIN1:第一輸入電位 VIN2:第二輸入電位 VOUT:輸出電位 VR:整流電位 VS:感測電位 VSS:接地電位 VW:脈波寬度調變電位100,200:Boost converter 110,210: Bridge rectifier 120,220:Power switcher 130,230: Output stage circuit 150,250: Detection and control circuit 252:Averaging circuit 254:Microcontroller 256: Comparator CO: output capacitor D1: first diode D2: Second diode D3: The third diode D4: The fourth diode D5: The fifth diode IL: inductor current IOUT: output current LU: Boost inductor M1: the first transistor M2: Second transistor M3: The third transistor N1: first node N2: second node N3: The third node N4: fourth node N5: fifth node N6: The sixth node N7: The seventh node N8: The eighth node NIN1: first input node NIN2: second input node NOUT: output node R1: first resistor R2: second resistor R3: The third resistor R4: The fourth resistor T1: the first time interval T2: The second time interval T3: The third time interval TT: operating cycle TF: low logic range TN: high logic interval V8:potential VA: average potential VB: comparison potential VD: potential difference VE: reference potential VF: pulse frequency modulation potential VG: driving potential VIN1: first input potential VIN2: second input potential VOUT: output potential VR: rectifier potential VS: sensing potential VSS: ground potential VW: pulse width modulation potential
第1圖係顯示根據本發明一實施例所述之升壓轉換器之示意圖。 第2圖係顯示根據本發明一實施例所述之升壓轉換器之電路圖。 第3圖係顯示根據本發明一實施例所述之升壓電感器之電感電流之波形圖。 第4圖係顯示根據本發明一實施例所述之驅動電位和電感電流之波形圖。 第5圖係顯示根據本發明另一實施例所述之驅動電位和電感電流之波形圖。 Figure 1 is a schematic diagram of a boost converter according to an embodiment of the present invention. Figure 2 is a circuit diagram showing a boost converter according to an embodiment of the present invention. Figure 3 is a waveform diagram showing the inductor current of the boost inductor according to an embodiment of the present invention. FIG. 4 is a waveform diagram showing the driving potential and the inductor current according to an embodiment of the present invention. FIG. 5 is a waveform diagram showing the driving potential and the inductor current according to another embodiment of the present invention.
100:升壓轉換器 100:Boost converter
110:橋式整流器 110: Bridge rectifier
120:功率切換器 120:Power switcher
130:輸出級電路 130:Output stage circuit
150:偵測及控制電路 150: Detection and control circuit
IL:電感電流 IL: inductor current
LU:升壓電感器 LU: Boost inductor
VF:脈波頻率調變電位 VF: pulse frequency modulation potential
VG:驅動電位 VG: driving potential
VIN1:第一輸入電位 VIN1: first input potential
VIN2:第二輸入電位 VIN2: second input potential
VOUT:輸出電位 VOUT: output potential
VR:整流電位 VR: rectifier potential
VSS:接地電位 VSS: ground potential
VW:脈波寬度調變電位 VW: pulse width modulation potential
Claims (10)
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TW112112446A TWI832742B (en) | 2023-03-31 | 2023-03-31 | Boost converter for suppressing magnetic saturation |
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US7279876B2 (en) * | 2003-06-27 | 2007-10-09 | Stmicroelectronics S.R.L. | Device for the correction of the power factor in forced switching power supplies |
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US8624511B2 (en) * | 2012-03-24 | 2014-01-07 | Dialog Semiconductor Gmbh | Method for optimizing efficiency versus load current in an inductive boost converter for white LED driving |
US8665620B2 (en) * | 2011-07-28 | 2014-03-04 | Power Integrations, Inc. | Variable frequency timing circuit for a power supply control circuit |
TW201727625A (en) * | 2013-06-18 | 2017-08-01 | 英特希爾美國公司 | Audio frequency deadband system and method for switch mode regulators operating in discontinuous conduction mode |
TW201924199A (en) * | 2017-08-09 | 2019-06-16 | 美商微晶片科技公司 | Digital control of switched boundary mode power converter without current sensor |
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US7279876B2 (en) * | 2003-06-27 | 2007-10-09 | Stmicroelectronics S.R.L. | Device for the correction of the power factor in forced switching power supplies |
US7368897B2 (en) * | 2005-10-07 | 2008-05-06 | Intel Corporation | Load adaptive power converter |
US8665620B2 (en) * | 2011-07-28 | 2014-03-04 | Power Integrations, Inc. | Variable frequency timing circuit for a power supply control circuit |
US8624511B2 (en) * | 2012-03-24 | 2014-01-07 | Dialog Semiconductor Gmbh | Method for optimizing efficiency versus load current in an inductive boost converter for white LED driving |
TW201727625A (en) * | 2013-06-18 | 2017-08-01 | 英特希爾美國公司 | Audio frequency deadband system and method for switch mode regulators operating in discontinuous conduction mode |
TW201924199A (en) * | 2017-08-09 | 2019-06-16 | 美商微晶片科技公司 | Digital control of switched boundary mode power converter without current sensor |
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