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TWI850951B - Nano-twinned copper foil, electronic element and methods for manufacturing the same - Google Patents

Nano-twinned copper foil, electronic element and methods for manufacturing the same Download PDF

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TWI850951B
TWI850951B TW112100392A TW112100392A TWI850951B TW I850951 B TWI850951 B TW I850951B TW 112100392 A TW112100392 A TW 112100392A TW 112100392 A TW112100392 A TW 112100392A TW I850951 B TWI850951 B TW I850951B
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twin
nano
substrate
copper foil
layer
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TW202428386A (en
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陳智
沈冠佑
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國立陽明交通大學
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Priority to US18/456,923 priority patent/US20240229275A1/en
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • C25D1/04Wires; Strips; Foils
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • C25D5/50After-treatment of electroplated surfaces by heat-treatment
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/615Microstructure of the layers, e.g. mixed structure
    • C25D5/617Crystalline layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • C25D7/0614Strips or foils

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

A nano-twinned copper foil is provided, which comprises: plural twinned grains, wherein at least part of the plural twinned grains are formed by plural nano-twins stacking along a [111] crystal axis. The nano-twinned copper foil has a first surface and a second surface opposite to the first surface, and 80% or more of the areas of the first surface and the second surface respectively are the (111) surface of the nano-twins. In addition, the present invention further provides a method for manufacturing the aforesaid nano-twinned copper foil, an electronic element comprising the same, and a method for manufacturing the electronic element.

Description

奈米雙晶銅箔、包含其的電子元件及其製備方法Nano-twin-crystal copper foil, electronic component containing the same and preparation method thereof

本發明關於一種奈米雙晶銅箔、包含其的電子元件及其製備方法,尤指一種兩面均具有(111)優選方向的奈米雙晶銅箔、包含其的電子元件及其製備方法。The present invention relates to a nano-twin copper foil, an electronic component containing the same and a preparation method thereof, and in particular to a nano-twin copper foil having a (111) preferred direction on both sides, an electronic component containing the same and a preparation method thereof.

高功率元件於運作時會產生大量的熱,溫度甚至能超過攝氏300度,若無法及時散熱,容易導致元件失效或產生可靠度相關之問題。因此,目前發展出各種接著層以及熱界面材料,以期能夠解決此問題。然而,目前所發展出的接著層以及熱界面材料仍各自都存在缺點。High-power components generate a lot of heat during operation, and the temperature can even exceed 300 degrees Celsius. If the heat cannot be dissipated in time, it is easy to cause component failure or reliability-related problems. Therefore, various bonding layers and thermal interface materials are currently developed to solve this problem. However, the bonding layers and thermal interface materials currently developed still have their own shortcomings.

舉例來說,傳統之晶片接著層使用的材料為焊錫,但在隨著焊錫去鉛之需求,能承受300度高溫之焊錫變成一項挑戰,且介金屬 化合物造成的可靠度問題也是一大問題。此外,使用燒結的銅或銀當作接著層及熱界面材料,其多孔性的結構會導致熱阻上升,且高溫長時間的燒結以及高的材料價格都使得成本提升。再者,使用高分子聚合物當作接著層及熱界面材料,雖然接合可在低溫完成且較便宜,但其導熱較金屬低了約兩個數量級,且需克服耐高溫、熱膨脹係數差異過大等問題,散熱係數也較低。For example, the traditional chip bonding layer uses solder, but with the need to remove lead from solder, solder that can withstand 300-degree high temperatures has become a challenge, and the reliability problem caused by intermetallic compounds is also a major problem. In addition, the porous structure of sintered copper or silver as bonding layer and thermal interface material will lead to increased thermal resistance, and the high temperature and long-term sintering and high material prices will increase the cost. Furthermore, using high molecular polymer as bonding layer and thermal interface material, although the bonding can be completed at a low temperature and is cheaper, its thermal conductivity is about two orders of magnitude lower than that of metal, and it needs to overcome the problems of high temperature resistance and large difference in thermal expansion coefficient, and the heat dissipation coefficient is also lower.

因此,目前亟需發展出一種新穎的接著層及熱界面材料,以期能解決上述問題。Therefore, there is an urgent need to develop a novel bonding layer and thermal interface material in order to solve the above problems.

本發明的主要目的在於提供一種奈米雙晶銅箔,其兩面均具有(111)優選方向,而可應用於電子元件上的接合。The main purpose of the present invention is to provide a nano-bicrystalline copper foil, both sides of which have a (111) preferred direction, which can be applied to the bonding of electronic components.

本發明的奈米雙晶銅箔,包括:複數雙晶晶粒,其中至少部分的雙晶晶粒係由複數奈米雙晶沿著[111]晶軸方向堆疊而成;其中奈米雙晶銅箔具有一第一表面及與第一表面相對的一第二表面;且第一表面及第二表面的80%以上的面積分別顯露奈米雙晶之(111)面。除此之外,本發明的奈米雙晶銅箔的第一表面及第二表面更具有低粗糙度。The nano-twin copper foil of the present invention comprises: a plurality of twin crystal grains, wherein at least part of the twin crystal grains are formed by stacking a plurality of nano-twin crystals along the [111] crystal axis direction; wherein the nano-twin copper foil has a first surface and a second surface opposite to the first surface; and more than 80% of the area of the first surface and the second surface respectively expose the (111) plane of the nano-twin crystals. In addition, the first surface and the second surface of the nano-twin copper foil of the present invention have low roughness.

本發明的奈米雙晶銅箔除了保有奈米雙晶銅的良好機械強度及電性表現外,本發明的奈米雙晶銅箔的正反兩面皆為具有高度(111)優選方向的表面,甚至是正反兩面更具有低粗糙度。利用(111)面的高擴散速率特性,可使本發明的奈米雙晶銅箔類似一雙面膠的概念,得以在低溫及/或短時間下接合兩基材。相較於銅或銀的燒結接合,使用本發明的奈米雙晶銅箔進行接合,可使接合面產生較少的孔洞,而所得到的電子元件可擁有較低的電阻或熱阻。因此,本發明的奈米雙晶銅箔可以應用於高功率元件之晶背金屬層(Backside metallization)和直接覆銅(Direct copper bond, DCB)基板、DCB基板和散熱鰭片之間的黏合,亦可應用於熱界面材料以及散熱銅管之接合。In addition to retaining the good mechanical strength and electrical performance of nano-twin-crystal copper, the nano-twin-crystal copper foil of the present invention has surfaces with a highly (111) preferred direction on both sides, and even has low roughness on both sides. By utilizing the high diffusion rate characteristics of the (111) surface, the nano-twin-crystal copper foil of the present invention can be similar to the concept of a double-sided tape, and can be bonded to two substrates at low temperature and/or in a short time. Compared with the sintering bonding of copper or silver, the use of the nano-twin-crystal copper foil of the present invention for bonding can produce fewer holes on the bonding surface, and the resulting electronic components can have lower electrical resistance or thermal resistance. Therefore, the nano-bicrystalline copper foil of the present invention can be applied to the bonding between the backside metallization and direct copper bond (DCB) substrate of high-power components, the DCB substrate and the heat sink fin, and can also be applied to the bonding of thermal interface materials and heat sink copper tubes.

於一實施例中,奈米雙晶銅箔的第一表面及第二表面的粗糙度可分別小於或等於20 nm,例如可分別介於0.1 nm至20 nm、0.5 nm至20 nm、1 nm至20 nm、2 nm至20 nm、3 nm至20 nm、4 nm至20 nm或5 nm至20 nm。In one embodiment, the roughness of the first surface and the second surface of the nanobicrystalline copper foil may be less than or equal to 20 nm, for example, may be between 0.1 nm and 20 nm, 0.5 nm and 20 nm, 1 nm and 20 nm, 2 nm and 20 nm, 3 nm and 20 nm, 4 nm and 20 nm, or 5 nm and 20 nm, respectively.

於一實施例中,奈米雙晶銅箔之80%以上的體積可包括複數雙晶晶粒。於一實施例中,奈米雙晶銅箔之,例如80%至99%、80%至95%、85至95%或90%至95%的體積可包括複數雙晶晶粒;但本發明並不僅限於此。In one embodiment, more than 80% of the volume of the nano-twin copper foil may include a plurality of twin crystal grains. In one embodiment, for example, 80% to 99%, 80% to 95%, 85 to 95%, or 90% to 95% of the volume of the nano-twin copper foil may include a plurality of twin crystal grains; however, the present invention is not limited thereto.

於一實施例中,奈米雙晶銅箔之複數雙晶晶粒至少部分可為柱狀雙晶晶粒,其中柱狀雙晶晶粒可由複數奈米雙晶沿著[111]晶軸方向的±15度範圍內的方向堆疊而成,且至少部分的奈米雙晶的堆疊方向與奈米雙晶銅箔的厚度方向的夾角是介於0度至20度之間。於一實施例中,複數雙晶晶粒的80%以上,例如80%至99%、80%至95%、85至95%或90%至95%,為柱狀雙晶晶粒。當柱狀雙晶晶粒成長至奈米雙晶銅箔的表面時,奈米雙晶銅箔之表面之80%以上的面積可顯露奈米雙晶之(111)面;此時,奈米雙晶銅箔的表面可具有(111)的優選方向。In one embodiment, at least part of the plurality of twinned grains of the nano-twinned copper foil may be columnar twinned grains, wherein the columnar twinned grains may be formed by stacking a plurality of nano-twinned grains along a direction within a range of ±15 degrees along the [111] crystal axis direction, and the angle between the stacking direction of at least part of the nano-twinned grains and the thickness direction of the nano-twinned copper foil is between 0 degrees and 20 degrees. In one embodiment, more than 80% of the plurality of twinned grains, such as 80% to 99%, 80% to 95%, 85 to 95% or 90% to 95%, are columnar twinned grains. When the columnar twin crystal grains grow to the surface of the nano-twin copper foil, more than 80% of the surface area of the nano-twin copper foil can reveal the (111) plane of the nano-twin; at this time, the surface of the nano-twin copper foil can have a preferred direction of (111).

於一實施例中,奈米雙晶銅箔的第一表面及第二表面的80%以上的面積分別顯露奈米雙晶之(111)面。換言之,奈米雙晶銅箔的第一表面及第二表面可皆具有(111)的優選方向。於一實施例中,顯露於奈米雙晶銅箔的第一表面及第二表面的奈米雙晶之(111)面可分別佔奈米雙晶銅箔的第一表面及第二表面的總面積的,例如,80%至100%、85%至100%、90%至100%、90%至99.5%、90%至99%、95%至99%或97%至99%;但本發明並不僅限於此。在此,奈米雙晶銅箔的第一表面及第二表面的優選方向可以背向散射電子繞射儀(Electron Backscatter Diffraction, EBSD)來測量。In one embodiment, more than 80% of the area of the first surface and the second surface of the nano-twin copper foil respectively expose the (111) plane of the nano-twin. In other words, the first surface and the second surface of the nano-twin copper foil may both have a preferred direction of (111). In one embodiment, the (111) plane of the nano-twin exposed on the first surface and the second surface of the nano-twin copper foil may account for, for example, 80% to 100%, 85% to 100%, 90% to 100%, 90% to 99.5%, 90% to 99%, 95% to 99% or 97% to 99% of the total area of the first surface and the second surface of the nano-twin copper foil; but the present invention is not limited thereto. Here, the preferred directions of the first surface and the second surface of the nano-twin copper foil can be measured by an Electron Backscatter Diffraction (EBSD) instrument.

於一實施例中,當奈米雙晶銅箔的雙晶晶粒具有顯著的雙晶晶粒厚度及直徑比時,例如,厚度顯著大於直徑時,雙晶晶粒則為一柱狀雙晶晶粒。In one embodiment, when the bicrystalline grain of the nano bicrystalline copper foil has a significant bicrystalline grain thickness to diameter ratio, for example, when the thickness is significantly greater than the diameter, the bicrystalline grain is a columnar bicrystalline grain.

於一實施例中,至少部分的雙晶晶粒彼此間可互相連接,例如,50%、60%、70%、80%、90%或95%以上的雙晶晶粒彼此間可互相連接。In one embodiment, at least a portion of the bicrystalline dies may be connected to each other, for example, more than 50%, 60%, 70%, 80%, 90% or 95% of the bicrystalline dies may be connected to each other.

於一實施例中,奈米雙晶銅箔的厚度可依據需求進行調整。於一實施例中,奈米雙晶銅箔之厚度,例如,可介於10 μm至500 μm、10 μm至400 μm、10 μm至300 μm、10 μm至200 μm或10 μm至100 μm之間;但本發明並不僅限於此。In one embodiment, the thickness of the nano-twin-crystal copper foil can be adjusted as required. In one embodiment, the thickness of the nano-twin-crystal copper foil can be, for example, between 10 μm to 500 μm, 10 μm to 400 μm, 10 μm to 300 μm, 10 μm to 200 μm, or 10 μm to 100 μm; but the present invention is not limited thereto.

於一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的直徑可分別介於0.1 μm至50 μm之間。於本揭露的一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的直徑,例如,可介於0.1 μm至45 μm、0.1 μm至40 μm、0.1 μm至35 μm、0.5 μm至35 μm、0.5 μm至30 μm、1 μm至30 μm、1 μm至25 μm、1 μm至20 μm、1 μm至15 μm或1 μm至10 μm之間;但本發明並不僅限於此。於一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的直徑可為以與雙晶晶粒的雙晶方向實質上垂直的方向上所量測得到的長度;更詳細而言,雙晶晶粒(例如,柱狀雙晶晶粒)的直徑可為在與雙晶晶粒的雙晶面的堆疊方向實質上垂直的方向上(也就是,雙晶面延伸方向)所量測得到的長度(例如,最大長度)。In one embodiment, the diameter of the bicrystalline grains (e.g., columnar bicrystalline grains) may be between 0.1 μm and 50 μm. In one embodiment of the present disclosure, the diameter of the bicrystalline grains (e.g., columnar bicrystalline grains) may be between 0.1 μm and 45 μm, 0.1 μm and 40 μm, 0.1 μm and 35 μm, 0.5 μm and 35 μm, 0.5 μm and 30 μm, 1 μm and 30 μm, 1 μm and 25 μm, 1 μm and 20 μm, 1 μm and 15 μm, or 1 μm and 10 μm, but the present invention is not limited thereto. In one embodiment, the diameter of a bicrystalline grain (e.g., a columnar bicrystalline grain) may be a length measured in a direction substantially perpendicular to the bicrystalline direction of the bicrystalline grain; in more detail, the diameter of a bicrystalline grain (e.g., a columnar bicrystalline grain) may be a length (e.g., a maximum length) measured in a direction substantially perpendicular to the stacking direction of the bicrystalline planes of the bicrystalline grain (i.e., the direction in which the bicrystalline planes extend).

於一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的厚度可分別介於0.1 μm至500 μm之間。於一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的厚度,例如,可介於0.1 μm至500 μm、0.1 μm至400 μm、0.1 μm至300 μm、0.1 μm至200 μm、0.1 μm至100 μm、0.1 μm至80 μm、0.1 μm至50 μm、1 μm至50 μm、2 μm至50 μm、3 μm至50 μm、4 μm至50 μm、5 μm至50 μm、5 μm至40 μm、5 μm至35 μm、5 μm至30 μm或5 μm至25 μm之間。於一實施例中,雙晶晶粒(例如,柱狀雙晶晶粒)的厚度可為以在雙晶晶粒的雙晶方向的方向上所量測得到的厚度;更詳細而言,雙晶晶粒(例如,柱狀雙晶晶粒)的厚度可為在雙晶晶粒的雙晶面的堆疊方向上所量測得到的厚度(例如,最大厚度)。In one embodiment, the thickness of the bicrystalline grains (e.g., columnar bicrystalline grains) may be between 0.1 μm and 500 μm, respectively. In one embodiment, the thickness of the bicrystalline grains (e.g., columnar bicrystalline grains) may be, for example, between 0.1 μm and 500 μm, 0.1 μm and 400 μm, 0.1 μm and 300 μm, 0.1 μm and 200 μm, 0.1 μm and 100 μm, 0.1 μm and 80 μm, 0.1 μm and 50 μm, 1 μm and 50 μm, 2 μm and 50 μm, 3 μm and 50 μm, 4 μm and 50 μm, 5 μm and 50 μm, 5 μm and 40 μm, 5 μm and 35 μm, 5 μm and 30 μm, or 5 μm and 25 μm. In one embodiment, the thickness of a bicrystalline grain (e.g., a columnar bicrystalline grain) may be a thickness measured in the bicrystalline direction of the bicrystalline grain; more specifically, the thickness of a bicrystalline grain (e.g., a columnar bicrystalline grain) may be a thickness (e.g., a maximum thickness) measured in the stacking direction of the bicrystalline planes of the bicrystalline grain.

於本發明中,所謂的「雙晶晶粒的雙晶方向」是指雙晶晶粒中的雙晶面的堆疊方向。其中,雙晶晶粒的雙晶面可與雙晶面的堆疊方向實質上垂直。In the present invention, the so-called "twin direction of a twin grain" refers to the stacking direction of twin planes in the twin grain. The twin planes of the twin grain may be substantially perpendicular to the stacking direction of the twin planes.

於本發明中,可以奈米雙晶銅箔的一剖面,來測量雙晶晶粒的雙晶方向與奈米雙晶銅箔的厚度方向間的夾角。相似的,也可以奈米雙晶銅箔的一剖面,來量測奈米雙晶銅箔的厚度、雙晶晶粒的直徑及厚度等特徵。或者,也可以奈米雙晶銅箔的表面(例如第一表面或第二表面)來測量雙晶晶粒的直徑及厚度等。於本發明中,量測方法並無特殊限制,可以掃描電子顯微鏡(Scanning electron microscope, SEM)、穿透式電子顯微鏡(Transmission electron microscope, TEM)、聚焦離子束系統(Focus ion beam,FIB)或其他適合手段來進行量測。In the present invention, a cross section of a nano-twin copper foil can be used to measure the angle between the twin crystal direction of the twin crystal grains and the thickness direction of the nano-twin copper foil. Similarly, a cross section of a nano-twin copper foil can be used to measure the thickness of the nano-twin copper foil, the diameter and thickness of the twin crystal grains, and other characteristics. Alternatively, the diameter and thickness of the twin crystal grains can also be measured on the surface (e.g., the first surface or the second surface) of the nano-twin copper foil. In the present invention, there is no special limitation on the measurement method, and the measurement can be performed using a scanning electron microscope (SEM), a transmission electron microscope (TEM), a focused ion beam system (FIB), or other suitable means.

除了前述奈米雙晶銅箔外,本發明更提供前述奈米雙晶銅箔的製備方法,包括下列步驟:提供一電鍍裝置,包括一陽極、一陰極、一電鍍液、以及一電力供應源,其中電力供應源分別與陽極及陰極連接,且陽極及陰極係浸泡於電鍍液中﹔使用電力供應源提供電力進行電鍍,以形成一奈米雙晶銅層於陰極上﹔以及移除陰極且對奈米雙晶銅層的一表面(下表面)進行拋光,以得到前述的奈米雙晶銅箔,其中表面為移除陰極前奈米雙晶銅層與陰極接觸的表面。In addition to the aforementioned nano twin-crystal copper foil, the present invention further provides a method for preparing the aforementioned nano twin-crystal copper foil, comprising the following steps: providing an electroplating device, comprising an anode, a cathode, an electroplating solution, and an electric power source, wherein the electric power source is connected to the anode and the cathode respectively, and the anode and the cathode are immersed in the electroplating solution. in a plating solution; using a power supply source to provide power for electroplating to form a nano-twin-crystal copper layer on a cathode; and removing the cathode and polishing a surface (lower surface) of the nano-twin-crystal copper layer to obtain the aforementioned nano-twin-crystal copper foil, wherein the surface is the surface of the nano-twin-crystal copper layer in contact with the cathode before removing the cathode.

於一實施例中,陰極可包括:一基板;以及一鈦鎢接著層,設置於基板上,其中奈米雙晶銅層係形成於鈦鎢接著層上。其中,基板可為一矽基板、一玻璃基板、一石英基板、一金屬基板、一塑膠基板、一印刷電路板、一三五族材料基板或其層疊基板;且基板可具有單層或多層結構。In one embodiment, the cathode may include: a substrate; and a titanium-tungsten bonding layer disposed on the substrate, wherein the nano-bicrystalline copper layer is formed on the titanium-tungsten bonding layer. The substrate may be a silicon substrate, a glass substrate, a quartz substrate, a metal substrate, a plastic substrate, a printed circuit board, a III-V material substrate or a laminated substrate thereof; and the substrate may have a single-layer or multi-layer structure.

於一實施例中,鈦鎢接著層可包括一如下式(I)所示的鈦鎢合金: Ti xW 100-x(I) 其中x介於5至20之間。於一實施例中,鈦鎢合金為Ti 10W 90。當使用如式(I)所示的鈦鎢合金作為鈦鎢接著層時,可有效的將奈米雙晶銅層與陰極(包括基板及鈦鎢接著層)分離;反觀使用鈦接著層時,則無法有效將奈米雙晶銅層與陰極(包括基板及鈦鎢接著層)分離。於一實施例中,可以撕除陰極的方式將奈米雙晶銅層與陰極(包括基板及鈦鎢接著層)分離,而可得到奈米雙晶銅箔。 In one embodiment, the titanium-tungsten bonding layer may include a titanium-tungsten alloy as shown in the following formula (I): Ti x W 100-x (I) wherein x is between 5 and 20. In one embodiment, the titanium-tungsten alloy is Ti 10 W 90 . When the titanium-tungsten alloy as shown in formula (I) is used as the titanium-tungsten bonding layer, the nano-tungsten twin-crystal copper layer and the cathode (including the substrate and the titanium-tungsten bonding layer) can be effectively separated; on the other hand, when the titanium bonding layer is used, the nano-tungsten twin-crystal copper layer and the cathode (including the substrate and the titanium-tungsten bonding layer) cannot be effectively separated. In one embodiment, the nano-twin-crystal copper layer can be separated from the cathode (including the substrate and the titanium-tungsten bonding layer) by tearing off the cathode to obtain the nano-twin-crystal copper foil.

於一實施例中,鈦鎢接著層的厚度可介於100 nm至200 nm之間。當鈦鎢接著層的厚度小於100 nm時,不易於成長出具有(111)優選方向的雙晶晶粒。當鈦鎢接著層的厚度超過200 nm時,不易將奈米雙晶銅層與陰極(包括基板及鈦鎢接著層)分離。In one embodiment, the thickness of the TiT bonding layer may be between 100 nm and 200 nm. When the thickness of the TiT bonding layer is less than 100 nm, it is difficult to grow twin crystal grains with a (111) preferred orientation. When the thickness of the TiT bonding layer exceeds 200 nm, it is difficult to separate the nano twin crystal copper layer from the cathode (including the substrate and the TiT bonding layer).

於一實施例中,於移除陰極之前,可更包括一步驟:對奈米雙晶銅層遠離陰極的另一表面(上表面)進行拋光。In one embodiment, before removing the cathode, a further step may be included: polishing the other surface (upper surface) of the nano-twin crystal copper layer away from the cathode.

於一實施例中,於移除陰極前、或移除陰極後且對奈米雙晶銅層的表面(下表面)進行拋光前,可更包括一步驟:對奈米雙晶銅層遠離陰極的另一表面(上表面)形成一保護層。待對奈米雙晶銅層的表面(下表面)拋光後,再移除保護層。In one embodiment, before removing the cathode, or after removing the cathode and before polishing the surface (lower surface) of the nano-twin-crystal copper layer, a step may be further included: forming a protective layer on the other surface (upper surface) of the nano-twin-crystal copper layer away from the cathode. After polishing the surface (lower surface) of the nano-twin-crystal copper layer, the protective layer is removed.

於一實施例中,奈米雙晶銅層的兩表面(即,上下表面)的拋光也可於同一拋光製程中進行。In one embodiment, polishing of both surfaces (ie, upper and lower surfaces) of the nano bi-crystalline copper layer can also be performed in the same polishing process.

於一實施例中,電鍍液可包括一銅的鹽類及一酸。電鍍液中的銅的鹽類的例子可包括,但不限於,硫酸銅、甲基磺酸銅或其組合;電鍍液中的酸的例子可包括,但不限於,鹽酸、硫酸、甲基磺酸或其組合。此外,電鍍液也可更包括一添加物,例如,明膠、介面活性劑、晶格修整劑或其組合。In one embodiment, the plating solution may include a copper salt and an acid. Examples of the copper salt in the plating solution may include, but are not limited to, copper sulfate, copper methanesulfonate, or a combination thereof; examples of the acid in the plating solution may include, but are not limited to, hydrochloric acid, sulfuric acid, methanesulfonic acid, or a combination thereof. In addition, the plating solution may further include an additive, such as gelatin, a surfactant, a lattice modifier, or a combination thereof.

於一實施例中,可採用直流電鍍、脈衝電鍍、或直流電鍍與脈衝電鍍二者交互使用為之,以形成奈米雙晶銅層。In one embodiment, direct current plating, pulse plating, or a combination of direct current plating and pulse plating can be used to form the nano-bicrystalline copper layer.

於一實施例中,可採用直流電鍍來製奈米雙晶銅層。其中,直流電鍍的電流密度可介於,例如0.5 ASD至30 ASD、1 ASD至30 ASD、2 ASD至30 ASD、2 ASD至25 ASD、2 ASD至20 ASD、2 ASD至15 ASD或2 ASD至10 ASD;但本發明並不僅限於此。In one embodiment, direct current plating may be used to form the nano bicrystalline copper layer, wherein the current density of the direct current plating may be, for example, 0.5 ASD to 30 ASD, 1 ASD to 30 ASD, 2 ASD to 30 ASD, 2 ASD to 25 ASD, 2 ASD to 20 ASD, 2 ASD to 15 ASD, or 2 ASD to 10 ASD; however, the present invention is not limited thereto.

除了前述奈米雙晶銅箔外,本發明更提供前述奈米雙晶銅箔於電子元件上的應用及其製備方法。In addition to the aforementioned nano twin-crystal copper foil, the present invention further provides the application of the aforementioned nano twin-crystal copper foil in electronic components and a preparation method thereof.

本發明的電子元件,包括:一第一基板;一第二基板;以及一接合單元,設置於第一基板與第二基板間,其中接合單元為前述的奈米雙晶銅箔。The electronic element of the present invention comprises: a first substrate; a second substrate; and a bonding unit disposed between the first substrate and the second substrate, wherein the bonding unit is the aforementioned nano-twin crystal copper foil.

本發明的電子元件的製備方法,包括下列步驟:提供一第一基板及一第二基板;將一接合單元設置於第一基板與第二基板間,並將第一基板及第二基板以接合單元接合,以形成一電子元件,其中接合單元為前述的奈米雙晶銅箔。The method for preparing an electronic component of the present invention comprises the following steps: providing a first substrate and a second substrate; arranging a bonding unit between the first substrate and the second substrate, and bonding the first substrate and the second substrate by the bonding unit to form an electronic component, wherein the bonding unit is the aforementioned nano-twin-crystal copper foil.

於本發明的電子元件中,當使用本發明所提供的奈米雙晶銅箔進行第一基板與第二基板的接合時,由於本發明的奈米雙晶銅箔兩表面具有高度(111)優選方向及低粗糙度,而可在低溫及短時間的接合下,達到幾乎無縫隙的優良接合品質。In the electronic component of the present invention, when the nano-twin copper foil provided by the present invention is used to bond the first substrate and the second substrate, since the two surfaces of the nano-twin copper foil of the present invention have a highly (111) preferred direction and low roughness, excellent bonding quality with almost no gaps can be achieved under low temperature and short bonding time.

於一實施例中,第一基板及第二基板可分別為一金屬基板,其材料可包括至少一選自由銅、銀、金、鈀、鎳及鉑所組成之群組。In one embodiment, the first substrate and the second substrate may be a metal substrate, respectively, and the material thereof may include at least one selected from the group consisting of copper, silver, gold, palladium, nickel, and platinum.

於一實施例中,第一基板及第二基板可分別為一上方形成有金屬層的基板,其中基板可為矽基板、玻璃基板、石英基板、塑膠基板、陶瓷基板或電路板,而金屬層的材料可包括至少一選自由銅、銀、金、鈀、鎳及鉑所組成之群組。In one embodiment, the first substrate and the second substrate may be a substrate having a metal layer formed thereon, wherein the substrate may be a silicon substrate, a glass substrate, a quartz substrate, a plastic substrate, a ceramic substrate or a circuit board, and the material of the metal layer may include at least one selected from the group consisting of copper, silver, gold, palladium, nickel and platinum.

於一實施例中,進行接合之裝置並無特殊限制,例如,可以夾具進行接合。此外,若需要,更可選擇性的透過加壓方式進行接合。其中,加壓之壓力並無特殊限制,較佳為低壓力,如約5 MPa至50 MPa的壓力下進行接合。In one embodiment, there is no particular limitation on the device for bonding, for example, a clamp can be used for bonding. In addition, if necessary, bonding can be selectively performed by pressurization. The pressure of pressurization is not particularly limited, and preferably low pressure, such as bonding at a pressure of about 5 MPa to 50 MPa.

於一實施例中,可於升溫下進行接合,其中接合溫度並無特殊限制,只要可在不影響第一基板及第二基板的結構下達到接合目的即可,例如可於150°C至400°C、150°C至350°C或200°C至350°C之低溫下進行接合。此外,接合時間並無特殊限制,只要可將第一基板與第二基板完成接合即可,例如可約0.5小時5小時、0.5小時至4小時、0.5小時至3小時、0.5小時至2小時或0.5小時至1小時。In one embodiment, the bonding can be performed at an elevated temperature, wherein the bonding temperature is not particularly limited, as long as the bonding purpose can be achieved without affecting the structures of the first substrate and the second substrate, for example, the bonding can be performed at a low temperature of 150°C to 400°C, 150°C to 350°C, or 200°C to 350°C. In addition, the bonding time is not particularly limited, as long as the first substrate and the second substrate can be bonded, for example, about 0.5 hours to 5 hours, 0.5 hours to 4 hours, 0.5 hours to 3 hours, 0.5 hours to 2 hours, or 0.5 hours to 1 hour.

下文將配合圖式並詳細說明,使本揭露的特徵更明顯。The following will be accompanied by drawings and detailed descriptions to make the features of the present disclosure more obvious.

以下提供本揭露的不同實施例。這些實施例是用於說明本揭露的技術內容,而非用於限制本揭露的權利範圍。一實施例的一特徵可透過合適的修飾、置換、組合、分離以應用於其他實施例。The following provides different embodiments of the present disclosure. These embodiments are used to illustrate the technical content of the present disclosure, but are not used to limit the scope of the present disclosure. A feature of an embodiment can be applied to other embodiments through appropriate modification, replacement, combination, and separation.

應注意的是,在本文中,除了特別指明者之外,具備「一」元件不限於具備單一的該元件,而可具備一或更多的該元件。It should be noted that, in this document, unless otherwise specified, “a” element is not limited to a single element but may include one or more elements.

在本文中,除了特別指明者之外,所謂的特徵甲「或」或「及/或」特徵乙,是指甲單獨存在、乙單獨存在、或甲與乙同時存在;所謂的特徵甲「及」或「與」或「且」特徵乙,是指甲與乙同時存在;所謂的「包括」、「包含」、「具有」、「含有」,是指包括但不限於此。In this document, unless otherwise specified, the so-called feature A "or" or "and/or" feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" or "and" or "and" feature B means that A and B exist at the same time; the so-called "include", "comprise", "have" and "contain" mean including but not limited to these.

此外,在本文中,除了特別指明者之外,「一元件在另一元件上」或類似敘述不必然表示該元件接觸該另一元件。Furthermore, herein, unless specifically stated otherwise, “an element is on another element” or similar descriptions do not necessarily mean that the element contacts the other element.

此外,在本文中,除了特別指明者之外,一數值可涵蓋該數值的±10%的範圍,特別是該數值±5%的範圍。除了特別指明者之外,一數值範圍是由較小端點數、較小四分位數、中位數、較大四分位數、及較大端點數所定義的多個子範圍所組成。In addition, in this document, unless otherwise specified, a numerical value may include a range of ±10% of the numerical value, in particular, a range of ±5% of the numerical value. Unless otherwise specified, a numerical range is composed of multiple sub-ranges defined by a lower endpoint, a lower quartile, a median, an upper quartile, and a higher endpoint.

實施例1 – 製備奈米雙晶銅箔Example 1 - Preparation of Nano-twin Crystal Copper Foil

圖1A至圖1B為本實施例的製備奈米雙晶銅箔的剖面示意圖。如圖1A所示,本實施例是將上方形成有鈦鎢接著層12的矽基板11作為陰極,其中,鈦鎢接著層12包括Ti 10W 90,且厚度為100 nm。 Figures 1A and 1B are schematic cross-sectional views of the preparation of nano bicrystalline copper foil in this embodiment. As shown in Figure 1A, in this embodiment, a silicon substrate 11 with a titanium tungsten bonding layer 12 formed thereon is used as a cathode, wherein the titanium tungsten bonding layer 12 includes Ti 10 W 90 and has a thickness of 100 nm.

本實施例所使用的電鍍液是由五水硫酸銅晶體配製而成。使用五水硫酸銅(含銅離子50 g/L)共196.54 g,並添加 1.5 ml的添加劑,添加100 g的硫酸(96%),最後再加入鹽酸(12N) 0.1 ml到電鍍液中,並利用磁石攪拌直至五水硫酸銅均勻混和於1公升的溶液中。電鍍槽底部的磁石以每分鐘1200轉以維持離子濃度的均勻度,並在一大氣壓下室溫中進行電鍍。其中,電鍍液中所添加的鹽酸,可使電鍍槽中的銅靶(作為陽極)正常溶解,以平衡電鍍液銅離子濃度。在此,以電腦操控電源供應器(Keithley 2400),並採用直流電流電鍍,設定正向電流密度為6 ASD (A/dm 2),電鍍大約20分鐘後,可於鈦鎢接著層12上形成厚度約 20 µm之奈米雙晶銅金屬層13。 The electroplating solution used in this embodiment is prepared from copper sulfate pentahydrate crystals. A total of 196.54 g of copper sulfate pentahydrate (containing 50 g/L of copper ions) is used, and 1.5 ml of additives, 100 g of sulfuric acid (96%) are added, and finally 0.1 ml of hydrochloric acid (12N) is added to the electroplating solution, and a magnet is used to stir until the copper sulfate pentahydrate is evenly mixed in 1 liter of the solution. The magnet at the bottom of the electroplating tank rotates at 1200 revolutions per minute to maintain the uniformity of the ion concentration, and the electroplating is performed at room temperature under atmospheric pressure. The hydrochloric acid added to the electroplating solution can make the copper target (as the anode) in the electroplating tank dissolve normally to balance the copper ion concentration in the electroplating solution. Here, a power supply (Keithley 2400) is controlled by a computer, and direct current electroplating is used. The forward current density is set to 6 ASD (A/dm 2 ). After electroplating for about 20 minutes, a nano-twin copper metal layer 13 with a thickness of about 20 µm can be formed on the titanium-tungsten bonding layer 12.

而後,對奈米雙晶銅金屬層13的上表面13a進行拋光,其中電解拋光液的成分為100 ml之磷酸加上1 ml之醋酸以及1 ml之甘油。此時將欲電解拋光之試片夾至陽極,施以1.75 V之電壓10分鐘來達到電解拋光之效果。電解拋光後的試片厚度約為17 µm,而奈米雙晶銅金屬層13的上表面13a的粗糙度可降至20 nm以下。Then, the upper surface 13a of the nano-twin copper metal layer 13 is polished, wherein the composition of the electrolytic polishing liquid is 100 ml of phosphoric acid plus 1 ml of acetic acid and 1 ml of glycerol. At this time, the sample to be electrolytically polished is clamped to the anode and a voltage of 1.75 V is applied for 10 minutes to achieve the effect of electrolytic polishing. The thickness of the sample after electrolytic polishing is about 17 µm, and the roughness of the upper surface 13a of the nano-twin copper metal layer 13 can be reduced to less than 20 nm.

奈米雙晶銅金屬層13的上表面13a拋光後,於奈米雙晶銅金屬層13的上表面13a上形成一保護層(圖未示);在此,保護層可為高分子層。而後,如圖1B所示,移除矽基板11及鈦鎢接著層12,並對奈米雙晶銅金屬層13的下表面13b進行拋光,以去除銅晶種層及過渡層。在此,可使用奈米雙晶銅金屬層13的上表面13a的電解拋光製程對奈米雙晶銅金屬層13的下表面13b進行拋光。電解拋光後的試片厚度約為10 µm,而奈米雙晶銅金屬層13的下表面13b的粗糙度可降至20 nm以下。After the upper surface 13a of the nano-twin copper metal layer 13 is polished, a protective layer (not shown) is formed on the upper surface 13a of the nano-twin copper metal layer 13; here, the protective layer can be a polymer layer. Then, as shown in FIG. 1B, the silicon substrate 11 and the titanium tungsten connecting layer 12 are removed, and the lower surface 13b of the nano-twin copper metal layer 13 is polished to remove the copper seed layer and the transition layer. Here, the electrolytic polishing process of the upper surface 13a of the nano-twin copper metal layer 13 can be used to polish the lower surface 13b of the nano-twin copper metal layer 13. The thickness of the sample after electrolytic polishing is about 10 µm, and the roughness of the lower surface 13b of the nano-twin-crystal copper metal layer 13 can be reduced to less than 20 nm.

經由上述製程,可得到本實施例的奈米雙晶銅箔。將本實施例的奈米雙晶銅箔進行背向散射電子繞射儀(EBSD)、聚焦離子束(FIB)及原子力顯微鏡(Atomic Force Microscope, AFM)來分別分析表面優選方向和微結構。Through the above process, the nano-twin copper foil of this embodiment can be obtained. The nano-twin copper foil of this embodiment is subjected to backscattered electron diffraction (EBSD), focused ion beam (FIB) and atomic force microscope (AFM) to analyze the surface preferred direction and microstructure respectively.

圖2為本實施例的奈米雙晶銅箔的聚焦離子束影像圖。圖3A及圖3B分別為本實施例的奈米雙晶銅箔的上表面及下表面的背向散射電子繞射儀的繞射圖。圖4A及圖4B分別為本實施例的奈米雙晶銅箔的上表面及下表面的原子力顯微鏡影像圖。FIG2 is a focused ion beam image of the nano-twin copper foil of the present embodiment. FIG3A and FIG3B are diffraction images of the upper and lower surfaces of the nano-twin copper foil of the present embodiment respectively by a backscattered electron diffraction instrument. FIG4A and FIG4B are atomic force microscope images of the upper and lower surfaces of the nano-twin copper foil of the present embodiment respectively.

如圖2所示,聚焦離子束的測量結果顯示,奈米雙晶銅箔中大部分的晶粒都有很密的雙晶。奈米雙晶銅箔的95%以上的體積包括柱狀雙晶晶粒。95%以上的雙晶晶粒的雙晶方向與奈米雙晶銅箔的厚度方向夾角約為0度至10度之間,且95%以上的雙晶晶粒的雙晶方向與基板的表面夾角約為80度至90度之間,代表雙晶晶粒的雙晶面與基板的表面實質上平行。此外,奈米雙晶銅箔中95%以上的雙晶晶粒的厚度約介於1 μm至10 μm之間。再者,奈米雙晶銅箔底部並沒有看到過渡層(transition layer),可確認過渡層已被去除,留下具高(111)優選方向之奈米雙晶結構。As shown in Figure 2, the measurement results of the focused ion beam show that most of the grains in the nano-twin copper foil have very dense twin crystals. More than 95% of the volume of the nano-twin copper foil includes columnar twin crystal grains. The twin crystal direction of more than 95% of the twin crystal grains is about 0 degrees to 10 degrees with the thickness direction of the nano-twin copper foil, and the twin crystal direction of more than 95% of the twin crystal grains is about 80 degrees to 90 degrees with the surface of the substrate, which means that the twin crystal plane of the twin crystal grain is substantially parallel to the surface of the substrate. In addition, the thickness of more than 95% of the twin crystal grains in the nano-twin copper foil is about 1 μm to 10 μm. Furthermore, no transition layer was observed at the bottom of the nanotwin copper foil, confirming that the transition layer had been removed, leaving behind a nanotwin structure with a high (111) preferred orientation.

如圖3A及圖3B所示,背向散射電子繞射儀的測量結果顯示,本實施例所製得奈米雙晶銅箔,幾乎所有體積(95%以上的體積)均為彼此相互連接的柱狀雙晶晶粒,且柱狀雙晶晶粒的直徑約為0.5 μm至3 μm的範圍內。此外,雙晶晶粒是由奈米雙晶沿著[111]晶軸方向堆疊,且奈米雙晶的雙晶面與陰極表面實質上平行(即,奈米雙晶的堆疊方向與奈米雙晶銅箔的厚度方向實質上平行)。此外,經過計算後,奈米雙晶銅箔上表面及下表面的奈米雙晶之(111)面的比例分別為100%以及99.6%,代表本實施例的奈米雙晶銅箔的上下表面均具有(111)的優選方向。As shown in FIG. 3A and FIG. 3B , the measurement results of the backscattered electron diffraction instrument show that the nano-twin copper foil prepared in this embodiment has almost all volume (more than 95% of the volume) of columnar twin crystal grains connected to each other, and the diameter of the columnar twin crystal grains is in the range of about 0.5 μm to 3 μm. In addition, the twin crystal grains are stacked along the [111] crystal axis direction of the nano-twin crystals, and the twin crystal planes of the nano-twin crystals are substantially parallel to the cathode surface (i.e., the stacking direction of the nano-twin crystals is substantially parallel to the thickness direction of the nano-twin copper foil). In addition, after calculation, the proportions of the (111) planes of the nanotwins on the upper and lower surfaces of the nanotwin copper foil are 100% and 99.6%, respectively, indicating that the upper and lower surfaces of the nanotwin copper foil of this embodiment both have a preferred direction of (111).

如圖4A及圖4B所示,原子力顯微鏡的測量結果顯示,本實施例所製得奈米雙晶銅箔,上下表面的粗糙度分別為18.9 nm以及7.7 nm,代表本實施例的奈米雙晶銅箔具有極低的粗糙度。As shown in FIG. 4A and FIG. 4B , the measurement results of the atomic force microscope show that the roughness of the upper and lower surfaces of the nano-twin-crystal copper foil prepared in this embodiment is 18.9 nm and 7.7 nm, respectively, indicating that the nano-twin-crystal copper foil of this embodiment has an extremely low roughness.

上述的實驗結果顯示,本實施例的奈米雙晶銅箔的上下表面均具有(111)的優選方向及低於20 nm以下的粗糙度,代表本實施例的奈米雙晶銅箔有利於後續的電子元件的接合上。The above experimental results show that the upper and lower surfaces of the nano-twin copper foil of this embodiment have a preferred direction of (111) and a roughness of less than 20 nm, which means that the nano-twin copper foil of this embodiment is beneficial to the subsequent bonding of electronic components.

實施例2 – 製備電子元件Example 2 - Preparation of electronic components

圖5A至圖5B為本實施例的製備電子元件的剖面示意圖。如圖5A所示,提供一第一基板21及一第二基板22;將一接合單元23設置於第一基板21與第二基板22間,並將第一基板21及第二基板22以接合單元23接合,以形成本實施例的電子元件,如圖5B所示。5A and 5B are cross-sectional schematic diagrams of the preparation of the electronic component of this embodiment. As shown in FIG5A, a first substrate 21 and a second substrate 22 are provided; a bonding unit 23 is disposed between the first substrate 21 and the second substrate 22, and the first substrate 21 and the second substrate 22 are bonded by the bonding unit 23 to form the electronic component of this embodiment, as shown in FIG5B.

於本實施例中,第一基板21及第二基板22分別為上方設置有銅晶種層之矽基板,其表面具有3.1 nm的粗糙度以及接近100%的(111)比例;而接合單元23為實施例1所製備的的奈米雙晶銅箔。在此,是以銅晶種層那一側與接合單元23進行接合。此外,於本實施例中,是在250度且35 MPa下進行接合1小時。接合後所得到的電子元件的聚焦離子束的離子與電子影像分別如圖6A及圖6B所示。In this embodiment, the first substrate 21 and the second substrate 22 are respectively silicon substrates with copper seed layers disposed thereon, and the surfaces thereof have a roughness of 3.1 nm and a (111) ratio close to 100%; and the bonding unit 23 is the nano-twin copper foil prepared in Embodiment 1. Here, the bonding is performed with the copper seed layer side to the bonding unit 23. In addition, in this embodiment, the bonding is performed at 250 degrees and 35 MPa for 1 hour. The ion and electron images of the focused ion beam of the electronic component obtained after bonding are shown in FIG6A and FIG6B , respectively.

如圖6A及圖6B所示,接合單元23與第一基板上的銅晶種層211及第二基板上的銅晶種層221接合良好,且接合單元23的上下兩個接合面(如箭號所標示處)都幾乎沒有縫隙。As shown in FIG. 6A and FIG. 6B , the bonding unit 23 is well bonded to the copper seed layer 211 on the first substrate and the copper seed layer 221 on the second substrate, and there is almost no gap between the upper and lower bonding surfaces (as indicated by arrows) of the bonding unit 23 .

實施例3 – 製備電子元件Example 3 - Preparation of electronic components

本實施例的電子元件的製備方法與實施例2相同,除了本實施例所使用的第一基板21及第二基板22分別為銅基板,其表面具有48 nm的粗糙度以及2.7%極低的(111)比例;並在300度且30 MPa下進行接合30分鐘。接合後所得到的電子元件的聚焦離子束的離子與電子影像分別如圖7A及圖7B所示。The preparation method of the electronic component of this embodiment is the same as that of embodiment 2, except that the first substrate 21 and the second substrate 22 used in this embodiment are copper substrates, respectively, with a surface roughness of 48 nm and an extremely low (111) ratio of 2.7%; and the bonding is performed at 300 degrees and 30 MPa for 30 minutes. The ion and electron images of the focused ion beam of the electronic component obtained after bonding are shown in Figures 7A and 7B, respectively.

如圖7A及圖7B所示,由於第一基板21及第二基板22所使用的銅基板粗糙度較大且(111)比例極低,故在低溫短時間的接合條件下,接合單元23的上下兩個接合面(如箭號所標示處)上難免有一些小裂縫,但大部分接合仍保持無縫隙之優良接合品質。As shown in FIG. 7A and FIG. 7B , since the copper substrates used for the first substrate 21 and the second substrate 22 have a relatively large roughness and an extremely low (111) ratio, under low temperature and short-time bonding conditions, some small cracks are unavoidable on the upper and lower bonding surfaces of the bonding unit 23 (as indicated by the arrows), but most of the bonding still maintains a seamless and excellent bonding quality.

實施例2及實施例3的結果顯示,當使用實施例1所製備的的奈米雙晶銅箔進行接合,無論所接合的基板的接合面是否具有低粗糙度或高(111)比例,均可得到良好的接合品質。The results of Examples 2 and 3 show that when the nano-bicrystalline copper foil prepared in Example 1 is used for bonding, good bonding quality can be obtained regardless of whether the bonding surface of the bonded substrates has a low roughness or a high (111) ratio.

綜上所述,本發明所提供奈米雙晶銅箔,因兩面的80%以上的面積分別顯露奈米雙晶之(111)面,甚至具有低於20 nm的粗糙度,故可應用於高功率元件之接著及熱界面材料以及散熱管之接合,並降低製程熱預算。In summary, the nano-twin copper foil provided by the present invention can be applied to the bonding of high-power components and the bonding of thermal interface materials and heat sinks, and can reduce the thermal budget of the process, because more than 80% of the area of both sides respectively expose the (111) surface of the nano-twin, and even have a roughness of less than 20 nm.

11                 矽基板 12                 鈦鎢接著層 13                 奈米雙晶銅金屬層 13a               上表面 13b               下表面 21                 第一基板 211, 221       銅晶種層 22                 第二基板 23                 接合單元 11                 Silicon substrate 12                 Titanium tungsten bonding layer 13                 Nano bicrystalline copper metal layer 13a               Upper surface 13b               Lower surface 21                 First substrate 211, 221       Copper seed layer 22                 Second substrate 23                 Bonding unit

圖1A至圖1B為本發明實施例1的製備奈米雙晶銅箔的剖面示意圖。 圖2為本發明實施例1的奈米雙晶銅箔的聚焦離子束影像圖。 圖3A及圖3B分別為本發明實施例1的奈米雙晶銅箔的上表面及下表面的背向散射電子繞射儀的繞射圖。 圖4A及圖4B分別為本發明實施例1的奈米雙晶銅箔的上表面及下表面的原子力顯微鏡影像圖。 圖5A至圖5B為本發明實施例2的製備電子元件的剖面示意圖。 圖6A至圖6B分別為本發明實施例2的電子元件的聚焦離子束的離子與電子影像。 圖7A至圖7B分別為本發明實施例3的電子元件的聚焦離子束的離子與電子影像。 Figures 1A and 1B are schematic cross-sectional views of the nano-twin copper foil prepared in Example 1 of the present invention. Figure 2 is a focused ion beam image of the nano-twin copper foil in Example 1 of the present invention. Figures 3A and 3B are diffraction images of the upper and lower surfaces of the nano-twin copper foil in Example 1 of the present invention, respectively, by a backscattered electron diffraction device. Figures 4A and 4B are atomic force microscope images of the upper and lower surfaces of the nano-twin copper foil in Example 1 of the present invention, respectively. Figures 5A and 5B are schematic cross-sectional views of the electronic component prepared in Example 2 of the present invention. Figures 6A and 6B are ion and electron images of the electronic component in Example 2 of the present invention, respectively. Figures 7A and 7B are respectively the ion and electron images of the focused ion beam of the electronic component of Example 3 of the present invention.

無。without.

13                 奈米雙晶銅金屬層 13a               上表面 13b               下表面 13                 Nanocrystalline copper metal layer 13a               Upper surface 13b               Lower surface

Claims (17)

一種奈米雙晶銅箔,包括:複數雙晶晶粒,其中至少部分的該複數雙晶晶粒係由複數奈米雙晶沿著[111]晶軸方向堆疊而成;其中該奈米雙晶銅箔具有一第一表面及與該第一表面相對的一第二表面;且該第一表面及該第二表面的80%以上的面積分別顯露奈米雙晶之(111)面;其中該第一表面及該第二表面的粗糙度分別小於或等於20nm。 A nano-twin copper foil comprises: a plurality of twin crystal grains, wherein at least a portion of the plurality of twin crystal grains are formed by stacking a plurality of nano-twin crystals along the [111] crystal axis direction; wherein the nano-twin copper foil has a first surface and a second surface opposite to the first surface; and more than 80% of the area of the first surface and the second surface respectively expose the (111) surface of the nano-twin crystal; wherein the roughness of the first surface and the second surface is less than or equal to 20nm respectively. 如請求項1所述的奈米雙晶銅箔,其中該奈米雙晶銅箔之80%以上的體積包括該複數雙晶晶粒。 The nano-twin copper foil as described in claim 1, wherein more than 80% of the volume of the nano-twin copper foil comprises the plurality of twin crystal grains. 如請求項2所述的奈米雙晶銅箔,其中至少部分的該複數雙晶晶粒為柱狀雙晶晶粒。 The nano-twin copper foil as described in claim 2, wherein at least part of the plurality of twin crystal grains are columnar twin crystal grains. 如請求項2所述的奈米雙晶銅箔,其中該複數雙晶晶粒的直徑分別介於0.1μm至50μm之間。 The nano-twin copper foil as described in claim 2, wherein the diameters of the plurality of twin crystal grains are respectively between 0.1 μm and 50 μm. 如請求項2所述的奈米雙晶銅箔,其中該複數雙晶晶粒的厚度分別介於0.1μm至500μm之間。 The nano-twin copper foil as described in claim 2, wherein the thickness of the plurality of twin crystal grains is between 0.1 μm and 500 μm. 如請求項2所述的奈米雙晶銅箔,其中至少部分的該複數雙晶晶粒彼此間互相連接。 The nano-twin copper foil as described in claim 2, wherein at least a portion of the plurality of twin crystal grains are interconnected. 如請求項1所述的奈米雙晶銅箔,其中該複數奈米雙晶的堆疊方向與該奈米雙晶銅箔的厚度方向的夾角是介於0度至20度之間。 The nano-twin copper foil as described in claim 1, wherein the angle between the stacking direction of the plurality of nano-twins and the thickness direction of the nano-twin copper foil is between 0 degrees and 20 degrees. 如請求項1所述的奈米雙晶銅箔,其中該奈米雙晶銅箔之厚度介於10μm至500μm之間。 The nano-twin copper foil as described in claim 1, wherein the thickness of the nano-twin copper foil is between 10μm and 500μm. 一種奈米雙晶銅箔的製備方法,包括下列步驟: 提供一電鍍裝置,包括一陽極、一陰極、一電鍍液、以及一電力供應源,其中該電力供應源分別與該陽極及該陰極連接,且該陽極及該陰極係浸泡於該電鍍液中;其中該陰極包括:一基板;以及一鈦鎢接著層,設置於該基板上,其中該奈米雙晶銅層係形成於該鈦鎢接著層上;使用該電力供應源提供電力進行電鍍,以形成一奈米雙晶銅層於該陰極的該鈦鎢接著層上;以及移除該陰極且對該奈米雙晶銅層的一表面進行拋光,以得到如請求項1至8任一項所述的奈米雙晶銅箔,其中該表面為移除該陰極前該奈米雙晶銅層與該陰極接觸的表面。 A method for preparing nano-twin copper foil comprises the following steps: Providing an electroplating device, comprising an anode, a cathode, an electroplating solution, and a power supply source, wherein the power supply source is connected to the anode and the cathode respectively, and the anode and the cathode are immersed in the electroplating solution; wherein the cathode comprises: a substrate; and a titanium tungsten contact layer disposed on the substrate, wherein the nano-twin copper A layer is formed on the titanium-tungsten contact layer; the power supply source is used to provide power for electroplating to form a nano-twin-crystal copper layer on the titanium-tungsten contact layer of the cathode; and the cathode is removed and a surface of the nano-twin-crystal copper layer is polished to obtain a nano-twin-crystal copper foil as described in any one of claims 1 to 8, wherein the surface is the surface of the nano-twin-crystal copper layer in contact with the cathode before the cathode is removed. 如請求項9所述的製備方法,其中該鈦鎢接著層包括一如下式(I)所示的鈦鎢合金:TixW100-x(I)其中x介於5至20之間。 The preparation method as described in claim 9, wherein the titanium-tungsten bonding layer comprises a titanium-tungsten alloy represented by the following formula (I): Ti x W 100-x (I) wherein x is between 5 and 20. 如請求項9所述的製備方法,其中該鈦鎢接著層的厚度介於100nm至200nm之間。 The preparation method as described in claim 9, wherein the thickness of the titanium tungsten bonding layer is between 100nm and 200nm. 如請求項9所述的製備方法,其中該基板為一矽基板。 The preparation method as described in claim 9, wherein the substrate is a silicon substrate. 如請求項9所述的製備方法,其中於移除該陰極之前,更包括一步驟:對該奈米雙晶銅層遠離該陰極的另一表面進行拋光。 The preparation method as described in claim 9 further includes a step of polishing the other surface of the nano-twin-crystal copper layer away from the cathode before removing the cathode. 一種電子元件,包括:一第一基板;一第二基板;以及 一接合單元,設置於該第一基板與該第二基板間,其中該接合單元為如請求項1至8任一項所述的奈米雙晶銅箔。 An electronic component comprises: a first substrate; a second substrate; and a bonding unit disposed between the first substrate and the second substrate, wherein the bonding unit is a nano-twin copper foil as described in any one of claims 1 to 8. 如請求項14所述的電子元件,其中該第一基板及該第二基板分別為一金屬基板或為一上方形成有金屬層的基板,其中該金屬基板或該金屬層的材料包括至少一選自由銅、銀、金、鈀、鎳及鉑所組成之群組。 The electronic component as described in claim 14, wherein the first substrate and the second substrate are respectively a metal substrate or a substrate with a metal layer formed thereon, wherein the material of the metal substrate or the metal layer includes at least one selected from the group consisting of copper, silver, gold, palladium, nickel and platinum. 一種電子元件的製備方法,包括下列步驟:提供一第一基板及一第二基板;將一接合單元設置於該第一基板與該第二基板間,並將該第一基板及該第二基板以該接合單元接合,以形成一電子元件,其中該接合單元為如請求項1至8任一項所述的奈米雙晶銅箔。 A method for preparing an electronic component includes the following steps: providing a first substrate and a second substrate; placing a bonding unit between the first substrate and the second substrate, and bonding the first substrate and the second substrate with the bonding unit to form an electronic component, wherein the bonding unit is a nano-twin copper foil as described in any one of claims 1 to 8. 如請求項16所述的製備方法,其中該第一基板及該第二基板分別為一金屬基板或為一上方形成有金屬層的基板,其中該金屬基板或該金屬層的材料包括至少一選自由銅、銀、金、鈀、鎳及鉑所組成之群組。A preparation method as described in claim 16, wherein the first substrate and the second substrate are respectively a metal substrate or a substrate with a metal layer formed thereon, wherein the material of the metal substrate or the metal layer includes at least one selected from the group consisting of copper, silver, gold, palladium, nickel and platinum.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI490962B (en) * 2013-02-07 2015-07-01 Univ Nat Chiao Tung Electrical connecting element and method for manufacturing the same
TWI686518B (en) * 2019-07-19 2020-03-01 國立交通大學 Electrical connecting structure having nano-twins copper and method of forming the same
TWI709667B (en) * 2019-12-06 2020-11-11 添鴻科技股份有限公司 Nano-twinned copper layer, method for manufacturing the same, and substrate comprising the same
TWI746383B (en) * 2021-03-05 2021-11-11 國立陽明交通大學 Nano-twinned copper layer with doped metal element, substrate comprising the same and method for manufacturing the same
US11384446B2 (en) * 2020-08-28 2022-07-12 Macdermid Enthone Inc. Compositions and methods for the electrodeposition of nanotwinned copper

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI490962B (en) * 2013-02-07 2015-07-01 Univ Nat Chiao Tung Electrical connecting element and method for manufacturing the same
TWI686518B (en) * 2019-07-19 2020-03-01 國立交通大學 Electrical connecting structure having nano-twins copper and method of forming the same
TWI709667B (en) * 2019-12-06 2020-11-11 添鴻科技股份有限公司 Nano-twinned copper layer, method for manufacturing the same, and substrate comprising the same
US11384446B2 (en) * 2020-08-28 2022-07-12 Macdermid Enthone Inc. Compositions and methods for the electrodeposition of nanotwinned copper
TWI746383B (en) * 2021-03-05 2021-11-11 國立陽明交通大學 Nano-twinned copper layer with doped metal element, substrate comprising the same and method for manufacturing the same

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