TWI848629B - 電子封裝件及其製法 - Google Patents
電子封裝件及其製法 Download PDFInfo
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Abstract
一種電子封裝件及其製法,主要於承載結構上設置電子結構與一環繞該電子結構之牆結構,且將導熱層設於該電子結構上,再以散熱件遮蓋該牆結構與該導熱層,故藉由該牆結構之配置,以有效分散熱應力,致能有效控制該電子結構及散熱體之翹曲量。
Description
本發明係有關一種封裝結構,尤指一種具散熱件之電子封裝件及其製法。
隨著電子產品在功能及處理速度之需求的提升,作為電子產品之核心組件的半導體晶片需具有更高密度之電子元件(Electronic Components)及電子電路(Electronic Circuits),故半導體晶片在運作時將隨之產生更大量的熱能。再者,由於傳統包覆該半導體晶片之封裝膠體係為一種導熱係數僅0.8(單位W.m-1.k-1)之不良傳熱材質(即熱量之逸散效率不佳),因而若不能有效逸散半導體晶片所產生之熱量,將會造成半導體晶片之損害與產品信賴性問題。
因此,為了迅速將熱能散逸至外部,業界通常在半導體封裝件中配置散熱片(Heat Sink或Heat Spreader),該散熱片通常藉由散熱膠,如導熱介面材(Thermal Interface Material,簡稱TIM),結合至半導體晶片背面,且通常令散熱片之頂面外露出封裝膠體或直接外露於大氣中,以藉散熱膠與散熱片逸散出半導體晶片所產生之熱量。
如圖1所示,習知半導體封裝件1之製法係先將一半導體晶片11以其作用面11a利用覆晶接合方式(即透過導電凸塊110與底膠111)設於一封裝基板10上,再將一散熱件13以其頂片130藉由TIM層12結合於該半導體晶片11之非作用面11b上,且該散熱件13之支撐腳131透過黏著層14架設於該封裝基板10上。接著,進行封裝壓模作業,以供封裝膠體(圖略)包覆該半導體晶片11及散熱件13,並使該散熱件13之頂片130外露出封裝膠體。
於運作時,該半導體晶片11所產生之熱能係經由該非作用面11b、TIM層12而傳導至該散熱件13之頂片130以散熱至該半導體封裝件1之外部。
再者,習知半導體封裝件1之製程中,通常將該黏著層14加熱上膠於該封裝基板10上後,就直接黏貼該散熱件13之支撐腳131,待該黏著層14冷卻後產生黏著力,使該封裝基板10及散熱件13相黏固。
惟,習知半導體封裝件1中,於薄化需求及板面增大需求下,該散熱件13與TIM層12之間因為熱膨脹係數差異(CTE Mismatch)導致變形的情況(即翹曲程度)更加明顯,而當變形量過大時,該散熱件13之頂片130與該TIM層12(或與該半導體晶片11)之間容易發生脫層,不僅造成導熱效果下降,且會造成該半導體封裝件1外觀上的不良,甚而嚴重影響產品之信賴性。
因此,如何克服上述習知技術之種種問題,實已成為目前業界亟待克服之難題。
鑑於上述習知技術之種種缺失,本發明提供一種電子封裝件,係包括:承載結構;電子結構,係設於該承載結構上;牆結構,係設於該承載結構上;導熱層,係設於該電子結構上;以及散熱件,係設於該承載結構上,以遮蓋該電子結構、該牆結構與該導熱層,其中,該散熱件係具有一結合該導熱層與該牆結構之散熱體、及複數設於該散熱體上以結合該承載結構之支撐腳,使該牆結構位於該支撐腳與該電子結構之間。
本發明亦提供一種電子封裝件之製法,係包括:將電子結構與牆結構設於一承載結構上;形成導熱層於該電子結構上;以及設置散熱件於該承載結構上,以令該散熱件遮蓋該電子結構、該牆結構與該導熱層,其中,該散熱件係具有一結合該導熱層與該牆結構之散熱體、及複數設於該散熱體上以結合該承載結構之支撐腳,使該牆結構位於該支撐腳與該電子結構之間。
前述之電子封裝件及其製法中,該牆結構係為框體,其圍繞該電子結構。
前述之電子封裝件及其製法中,該牆結構係為膠材結構。
前述之電子封裝件及其製法中,該牆結構係於對應該電子結構之側形成有凸載台。例如,該凸載台係抵靠該電子結構。或者,該凸載台與該散熱體之間係形成有空氣空間。亦或,該凸載台上設有多孔結構。
前述之電子封裝件及其製法中,該電子結構係為電子模組規格或電子元件規格。
前述之電子封裝件及其製法中,該導熱層為液態金屬。
前述之電子封裝件及其製法中,復包括形成散熱層於該導熱層與該散熱體之間。
由上可知,本發明之電子封裝件及其製法,主要藉由該牆結構之配置,以有效分散熱應力,致能有效控制該電子結構及/或散熱體之變形量(翹曲量),故相較於習知技術,本發明之電子封裝件不僅能滿足薄化需求及板面增大需求,且能防止該電子結構或散熱件發生應力集中而過度翹曲之問題,以避免該電子結構(及/或散熱體)與該牆結構之間發生脫層之問題。
1:半導體封裝件
10:封裝基板
11:半導體晶片
11a,21a:作用面
11b,21b:非作用面
110,210:導電凸塊
111,202,211:底膠
12:TIM層
13,23:散熱件
130:頂片
131,231:支撐腳
14,24:黏著層
2:電子封裝件
2a,5a:電子結構
20:承載結構
200:導電體
201:載板
21,26:電子元件
22:封裝層
22a:第一表面
22b:第二表面
230:散熱體
232:強化部
25:導電元件
3a:導熱組件
30:導熱層
31:牆結構
310:凸載台
32:多孔結構
320:網孔
33:散熱層
P:空氣空間
F:散熱路徑
圖1係為習知半導體封裝件之剖視示意圖。
圖2A至圖2E係為本發明之電子封裝件之製法之剖視示意圖。
圖2F係為圖2E之局部上視示意圖。
圖3係為圖2B之局部立體示意圖。
圖4係為圖2E之局部放大示意圖。
圖5係為本發明之電子封裝件之另一實施例之剖視示意圖。
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。
圖2A至圖2E係為本發明之電子封裝件2之製法之剖面示意圖。
如圖2A所示,將一電子結構2a設於一承載結構20上,其中,該電子結構2a係為電子模組規格,其包含有一載板201、複數電子元件21及封裝層22,且該些電子元件21係相互分離地配置於該載板201上,使該封裝層22形成於該載板201上以包覆該些電子元件21。
於本實施例中,該承載結構20透過複數導電體200(可由底膠202包覆)電性堆疊電子結構2a之載板201。該承載結構20例如為具有核心層與線路結構之封裝基板、無核心層(coreless)形式線路結構之封裝基板、具導電矽穿孔(Through-silicon via,簡稱TSV)之矽中介板(Through Silicon interposer,簡稱TSI)或其它板型,其包含至少一絕緣層及至少一結合該絕緣層之線路層,如至少一扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。應可理解地,該承載結構20亦可為其
它承載晶片之板材,如導線架(lead frame)、晶圓(wafer)、或其它具有金屬佈線(routing)之板體等,並不限於上述。
再者,該載板201例如為具有核心層與線路結構之封裝基板、無核心層(coreless)形式線路結構之封裝基板、具導電矽穿孔(Through-silicon via,簡稱TSV)之矽中介板(Through Silicon interposer,簡稱TSI)或其它板型,其包含至少一絕緣層及至少一結合該絕緣層之線路層,如至少一扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。應可理解地,該載板201亦可為其它承載晶片之板材,如導線架(lead frame)、晶圓(wafer)、或其它具有金屬佈線(routing)之板體等,並不限於上述。
又,該電子元件21係為主動元件、被動元件或其組合者,其中,該主動元件係例如半導體晶片,而該被動元件係例如電阻、電容及電感。於本實施例中,該電子元件21係為半導體晶片,其具有相對之作用面21a與非作用面21b,並使該作用面21a藉由複數如銲錫材料、金屬柱(pillar)或其它等之導電凸塊210以覆晶方式設於該載板201之線路層上並電性連接該線路層,且以底膠211包覆該些導電凸塊210;或者,該電子元件21可藉由複數銲線(圖未示)以打線方式電性連接該載板201之線路層;亦或,該電子元件21可直接接觸該載板201之線路層。應可理解地,該承載結構20上亦可配置如被動元件之電子元件26。因此,可於該承載結構20上接置所需類型及數量之電子元件,以提升其電性功能。
另外,該封裝層22係具有相對之第一表面22a與第二表面22b,並以該第一表面22a結合該載板201,且該電子元件21之非作用面21b齊平該封裝層22之第二表面22b,以令該些電子元件21之非作用面21b外露
於該封裝層22之第二表面22b。例如,形成該封裝層22之材質係為絕緣材,如聚醯亞胺(PI)、環氧樹脂(epoxy)之封裝膠體或封裝材,其可用模壓(molding)、壓合(lamination)或塗佈(coating)之方式形成之。
應可理解地,有關電子結構之態樣繁多,如圖5所示之電子結構5a採用電子元件規格,即尺寸較大之半導體晶片,並無特別限制。
如圖2B所示,設置一牆結構31於該承載結構20上,使該牆結構31環繞該電子結構2a,以外露該電子元件21之非作用面21b與該封裝層22之第二表面22b,其中,該牆結構31於對應該電子結構2a之側形成有一抵靠該封裝層22之凸載台310,且於該凸載台310上形成有多孔結構32。
於本實施例中,該牆結構31係為耐熱膠體。例如,該牆結構31係為矽膠材或如壓克力材之紫外線(UV)膠,其包含金屬顆粒、石墨材或其它適當充填物。較佳地,該牆結構31可選用高延展性之矽膠材。
於本實施例中,該牆結構31亦可為一耐高溫高分子薄膜,可以是PI、聚對苯二甲酸乙二酯(Polyethylene Terephthalate,簡稱PET)、鐵氟龍或其它等耐溫工程塑膠材。
再者,該多孔結構32係為網格形(mesh),形成有複數如圖3所示之網孔320。例如,形成該多孔結構32之材質係為鎵、銦、鎳、金、銀、銅或其它金屬材;或者,該多孔結構32之多孔材料可以是玻璃纖維、多孔石墨、銅網、網狀PET、網狀鐵氟龍或其它等。
如圖2C所示,形成一導熱層30於該電子結構2a上,且該導熱層30接觸該多孔結構32,以令該導熱層30、牆結構31與該多孔結構32作為導熱組件3a。
於本實施例中,該導熱層30係作為導熱介面材(Thermal Interface Material,簡稱TIM)。例如,該導熱層30可為液態金屬,其具有高導熱係數。進一步,且該液態金屬係為純質,其不包含膠材,如銲錫材料。應可理解地,該導熱層30亦可為固態金屬。
再者,該導熱層30係接觸結合該電子元件21與該封裝層22,且該導熱層30之上表面與該牆結構31之上表面係齊平。
又,該牆結構31係用以限制該導熱層30(液態金屬)之流動範圍,以防止該液態金屬溢流。進一步,該導熱層30(液態金屬)液態金屬可流入該多孔結構32之網孔320中,如圖4所示,以藉由該多孔結構32緩衝該導熱層30(液態金屬)之流動。
另外,當該液態金屬未填滿該多孔結構32之所有網孔320時,該多孔結構32之部分網孔320可作為空氣空間。應可理解地,若該牆結構31之凸載台310上未設置該多孔結構32時,該凸載台310處將形成空氣空間P,如圖5所示。
如圖2D至圖2E所示,將一散熱件23設於該承載結構20上,以遮蓋該電子結構2a、電子元件26、牆結構31與該導熱層30。之後,可於該承載結構20下側設置複數導電元件25,以供後續製程藉由該些導電元件25接置一如電路板之電子裝置(圖略)。
於本實施例中,該散熱件23係具有一結合該導熱層30與該牆結構31之散熱體230與複數自該散熱體230邊緣向下延伸以結合該承載結構20之支撐腳231,使該牆結構31位於該支撐腳231與該電子結構2a之間,且該散熱體230係為散熱片型式,其下側壓合該牆結構31與導熱層30
(即液態金屬),以令該導熱層30(即液態金屬)位於該散熱體230與該電子結構2a之間。進一步,該散熱件23可自該散熱體230邊緣向下延伸形成至少一強化部232,如圖2F所示之框體,以抵靠該牆結構31,使該牆結構31不會偏位。
再者,該支撐腳231係藉由黏著層24結合於該承載結構20上。例如,先以點膠方式形成黏著層24於該承載結構20上,如圖2D所示,以令該黏著層24位於該電子元件26之外圍,再將該支撐腳231黏接於該黏著層24上,以將該散熱件23固定於該承載結構20上。
又,該導熱組件3a可依需求於該散熱體230與該牆結構31(及/或該導熱層30)之間形成一散熱層33,其亦作為導熱介面材(Thermal Interface Material,簡稱TIM)。例如,該散熱層33係為金屬層,如金材,其塗佈於該牆結構31與該導熱層30上。應可理解地,該散熱層33亦可塗佈於該散熱體230上。
另外,該些導電元件25係配置於該承載結構20之下側,且該導電元件25可為如銅柱之金屬柱、包覆有絕緣塊之金屬凸塊、銲球(solder ball)、具有核心銅球(Cu core ball)之銲球或其它導電構造等。
因此,本發明之電子封裝件2,5之製法主要藉由該牆結構31之配置,以有效分散熱應力,進而控制該電子結構2a,5a及/或散熱體230之變形量(翹曲量),故相較於習知技術,本發明之電子封裝件2,5不僅能滿足薄化需求及板面增大需求,且能防止該電子結構2a,5a或散熱件23發生應力集中而過度翹曲之問題,以避免該電子結構2a,5a(及/或散熱體230)與該牆結構31之間發生脫層之問題。
再者,當該導熱層30為液態金屬時,其高熱導係數可提高該導熱組件3a之整體熱傳效率,並藉由該液態金屬之表面張力大之特性,使該牆結構31能拘束該液態金屬於該電子結構2a,5a之表面(如該非作用面21b與第二表面22b)上之流動,令該液態金屬附著於該電子結構2a,5a上,故相較於習知技術,本發明之電子封裝件2,5之導熱組件3a具有更好的散熱效果。
又,藉由該空氣空間P(或該多孔結構32)之設計,以於升溫時,該導熱層30之液態金屬之體積會膨脹而能流入該空氣空間P(或該多孔結構32)中,因而緩衝該液態金屬之流動,故能避免該液態金屬受壓迫而從該牆結構31與該電子結構2a,5a(或該散熱件23)之間的界面洩漏。
另外,藉由該散熱層33之設計,以加速散熱速率,如圖4所示之散熱路徑F,使該電子封裝件2,5符合高散熱之需求,其中,該散熱路徑F係自該電子元件21(或電子結構2a,5a)依序經由該導熱層30、散熱層33及散熱體230而至外界環境。
本發明復提供一種電子封裝件2,5,係包括:一承載結構20、至少一設於該承載結構20上之電子結構2a,5a、至少一設於該承載結構20上之牆結構31、一設於該電子結構2a,5a上之導熱層30以及一設於該承載結構20上之散熱件23。
所述之散熱件23係遮蓋該電子結構2a,5a、該牆結構31與該導熱層30,其中,該散熱件23係具有一結合該導熱層30與該牆結構31之散熱體230、及複數設於該散熱體230上以結合該承載結構20之支撐腳231,使該牆結構31位於該支撐腳231與該電子結構2a,5a之間。
於一實施例中,該牆結構31係為框體,其圍繞該電子結構2a,5a。
於一實施例中,該牆結構31係為膠材結構。
於一實施例中,該牆結構31係於對應該電子結構2a,5a之側形成有凸載台310。例如,該凸載台310係抵靠該電子結構2a,5a。或者,該凸載台310與該散熱體230之間係形成有空氣空間P。亦或,該凸載台310上設有多孔結構32。
於一實施例中,該電子結構2a係為電子模組規格。
於一實施例中,該電子結構5a係為電子元件規格。
於一實施例中,所述之電子封裝件2,5復包括一形成於該導熱層30與該散熱體230之間的散熱層33。
綜上所述,本發明之電子封裝件及其製法,係藉由該牆結構之配置,以有效分散熱應力,致能有效控制該電子結構及/或散熱體之變形量(翹曲量),故本發明之電子封裝件不僅能滿足薄化需求及板面增大需求,且能防止該電子結構或散熱件發生應力集中而過度翹曲之問題,以避免該電子結構(及/或散熱體)與該牆結構之間發生脫層之問題。
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。
2:電子封裝件
2a:電子結構
20:承載結構
23:散熱件
230:散熱體
231:支撐腳
232:強化部
24:黏著層
25:導電元件
26:電子元件
30:導熱層
31:牆結構
310:凸載台
32:多孔結構
33:散熱層
Claims (20)
- 一種電子封裝件,係包括:承載結構;電子結構,係設於該承載結構上;牆結構,係設於該承載結構上,且不覆蓋該電子結構;導熱層,係設於該電子結構上;以及散熱件,係設於該承載結構上,以遮蓋該電子結構、該牆結構與該導熱層,其中,該散熱件係具有一結合該導熱層與該牆結構之散熱體及複數設於該散熱體上以結合該承載結構之支撐腳,使該牆結構位於該支撐腳與該電子結構之間。
- 如請求項1所述之電子封裝件,其中,該牆結構係為框體,其圍繞該電子結構。
- 如請求項1所述之電子封裝件,其中,該牆結構係為膠材結構。
- 如請求項1所述之電子封裝件,其中,該牆結構係於對應該電子結構之側形成有凸載台。
- 如請求項4所述之電子封裝件,其中,該凸載台係抵靠該電子結構。
- 如請求項4所述之電子封裝件,其中,該凸載台與該散熱體之間係形成有空氣空間。
- 如請求項4所述之電子封裝件,其中,該凸載台上設有多孔結構。
- 如請求項1所述之電子封裝件,其中,該電子結構係為電子模組規格或電子元件規格。
- 如請求項1所述之電子封裝件,其中,該導熱層為液態金屬。
- 如請求項1所述之電子封裝件,復包括一形成於該導熱層與該散熱體之間的散熱層。
- 一種電子封裝件之製法,係包括:將電子結構與牆結構設於一承載結構上,且該牆結構不覆蓋該電子結構;形成導熱層於該電子結構上;以及設置散熱件於該承載結構上,以令該散熱件遮蓋該電子結構、該牆結構與該導熱層,其中,該散熱件係具有一結合該導熱層與該牆結構之散熱體及複數設於該散熱體上以結合該承載結構之支撐腳,使該牆結構位於該支撐腳與該電子結構之間。
- 如請求項11所述之電子封裝件之製法,其中,該牆結構係為框體,其圍繞該電子結構。
- 如請求項11所述之電子封裝件之製法,其中,該牆結構係為膠材結構。
- 如請求項11所述之電子封裝件之製法,其中,該牆結構係於對應該電子結構之側形成有凸載台。
- 如請求項14所述之電子封裝件之製法,其中,該凸載台係抵靠該電子結構。
- 如請求項14所述之電子封裝件之製法,其中,該凸載台與該散熱體之間係形成有空氣空間。
- 如請求項14所述之電子封裝件之製法,其中,該凸載台上設有多孔結構。
- 如請求項11所述之電子封裝件之製法,其中,該電子結構係為電子模組規格或電子元件規格。
- 如請求項11所述之電子封裝件之製法,其中,該導熱層為液態金屬。
- 如請求項11所述之電子封裝件之製法,復包括形成散熱層於該導熱層與該散熱體之間。
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TW112110737A TWI848629B (zh) | 2023-03-22 | 2023-03-22 | 電子封裝件及其製法 |
CN202310313535.3A CN118692998A (zh) | 2023-03-22 | 2023-03-28 | 电子封装件及其制法 |
US18/350,839 US20240321672A1 (en) | 2023-03-22 | 2023-07-12 | Electronic package and manufacturing method thereof |
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