TWI738590B - Display panel - Google Patents

Abstract

A display panel including a first substrate, a pixel unit, a second substrate and a display medium layer is provided. The second substrate is disposed on the first substrate. The display medium layer is disposed between the first substrate and the second substrate. The pixel unit is arranged on the first substrate. The pixel unit includes a pixel electrode. The pixel electrode has a first slit and a second slit. The first slit extends in a first direction. The second slit extends in a second direction. The first direction is not parallel to the second direction. One end of the first slit is connected to one end of the second slit.

Description

Display panel

The present invention relates to an electronic device, and particularly relates to a display panel.

As the display technology continues to evolve, the pixel structure in the display device is also continuously improved. With regard to the currently widely used liquid crystal display devices, how the pixel structure achieves high transmittance has always been a topic of concern in the industry.

The present invention provides a display panel, which has a better display effect.

The display panel of the present invention includes a first substrate, a pixel unit, a second substrate, and a display medium layer. The second substrate is located on the first substrate. The display medium layer is located between the first substrate and the second substrate. The pixel unit is arranged on the first substrate. The pixel unit includes pixel electrodes. The pixel electrode has a first slit and a second slit. The first slit extends in the first direction. The second slit extends in the second direction. The first direction is not parallel to the second direction. One end of the first slit is connected to one end of the second slit.

Based on the above, the present invention can enable the display panel to have a better display effect through the pattern design of the pixel electrodes having the first slit and the second slit.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present invention.

In the drawings, the thickness of each element and the like are exaggerated for clarity. Throughout the specification, the same reference numerals denote the same elements. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being “on”, “connected to,” or “overlapped on another element”, it may be directly on the other element. On or connected to another element, or intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connected" can refer to physical and/or electrical connections.

It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and/or parts, these elements, components, regions, and/or Or part should not be restricted by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the “first element,” “component,” “region,” “layer,” or “portion” discussed below may be referred to as a second element, component, region, layer or section without departing from the teachings herein.

The terminology used here is only for the purpose of describing specific embodiments and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms, including "at least one." "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the related listed items. It should also be understood that when used in this specification, the terms "including" and/or "including" designate the presence of the features, regions, wholes, steps, operations, elements, and/or components, but do not exclude one or more The existence or addition of other features, regions as a whole, steps, operations, elements, components, and/or combinations thereof.

In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship between one element and another element, as shown in the figure. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is turned over, elements described as being on the "lower" side of other elements will be oriented on the "upper" side of the other elements. Therefore, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the specific orientation of the drawing. Similarly, if the device in one figure is turned over, elements described as "below" or "beneath" other elements will be oriented "above" the other elements. Thus, the exemplary terms "below" or "below" can include an orientation of above and below.

As used herein, "substantially" or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value determined by a person of ordinary skill in the art, taking into account the measurement in question and the measurement related The specific amount of error (ie, the limit of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of related technologies and the present invention, and will not be interpreted as idealized or excessive The formal meaning, unless explicitly defined as such in this article.

The exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Therefore, a change in the shape of the diagram as a result of, for example, manufacturing technology and/or tolerances can be expected. Therefore, the embodiments described herein should not be interpreted as being limited to the specific shape of the area as shown herein, but include, for example, shape deviations caused by manufacturing. For example, regions shown or described as flat may generally have rough and/or non-linear characteristics. In addition, the acute angles shown may be rounded. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the precise shape of the regions, and are not intended to limit the scope of the claims.

1A to 1D are schematic partial top views of a display panel according to the first embodiment of the present invention. FIG. 1E is a schematic partial cross-sectional view of a display panel according to the first embodiment of the present invention. For example, FIG. 1A may show a schematic top view of a pixel unit PU1 and its surrounding area in the panel 100; or, a schematic top view of a part of the film layer corresponding to the area R1 in FIG. 1E. FIG. 1B may be a schematic top view corresponding to a film layer (eg, the first patterned conductive layer M1) in FIG. 1A. FIG. 1C may be a schematic top view corresponding to a film layer (eg, the second patterned conductive layer M2) in FIG. 1A. FIG. 1D may be a schematic top view corresponding to a film layer (eg, the third patterned conductive layer M3) in FIG. 1A.

1A and 1E, the display panel 100 includes a first substrate 181, a pixel unit PU1, a display medium layer 183, and a second substrate 182. The first substrate 181 and the second substrate 182 can be assembled up and down to sandwich the display medium layer 183 between the first substrate 181 and the second substrate 182. The pixel unit PU1 may be disposed on the surface 181a of the first substrate 181. For example, an element layer 184 may be provided on the surface 181a of the first substrate 181. The aforementioned element layer 184 may include corresponding conductive layers (the number of layers is not limited; for example: the first patterned conductive layer M1 shown in FIG. 1B, the second patterned conductive layer M2 shown in FIG. 1B, and/ Or the third patterned conductive layer M3 shown in FIG. 1C), an insulating layer (the number of layers is not limited; for example, the insulating layer between the aforementioned conductive layers), and/or the semiconductor layer (the number of layers is not limited). The aforementioned conductive layer, the aforementioned insulating layer and/or the aforementioned semiconductor layer can be formed by a commonly used semiconductor manufacturing process, so it will not be repeated here. The pixel unit PU1 may be composed of at least a part of at least one of the aforementioned conductive layers, at least a part of at least one of the aforementioned insulating layers, and/or at least a part of at least one of the aforementioned semiconductor layers. The pixel unit PU1 can be used to form a driving electric field to drive the display medium layer 183 sandwiched between the first substrate 181 and the second substrate 182 to display a picture.

In one embodiment, the film layer on the surface 181a of the first substrate 181 may constitute the corresponding active element 140 (e.g., transistor), passive element (e.g., capacitor) and/or corresponding wire, but the present invention does not Limited to this. In an embodiment, the first substrate 181 (or; further including a film layer on it) may be referred to as an array substrate, but the present invention is not limited thereto.

In an embodiment, the second substrate 182 may include a corresponding optical film or optical sheet. That is, the second substrate 182 may include a corresponding base material and a corresponding film layer on the base material. For example, the second substrate 182 has a red filter film (not shown), a green filter film (not shown), a blue filter film (not shown), and a corresponding light-shielding layer (not shown). ), the corresponding polarizer (not shown) and the corresponding color filter of the light shielding layer (not shown). In an embodiment, the pixel unit 100 can have a corresponding light emission color in the area corresponding to the pixel unit PU1 by using a filter film of a corresponding color. In an embodiment, the second substrate 182 may be similar to a color filter substrate commonly used in general display devices, but the present invention is not limited thereto. In an embodiment, the second substrate 182 may include a corresponding light-transmissive conductive film. In an embodiment, at least a part of the light-transmissive conductive film included in the second substrate 182 may serve as an electrode.

In this embodiment, the display medium layer 183 may include liquid crystal, but the present invention is not limited thereto. In an embodiment, in the thickness direction D3, the display medium layer 183 may have a first thickness 183h. In an embodiment, the first thickness 183h of the display medium layer 183 may approximately correspond to the first substrate 181 (or; further including the film layer plated thereon) and the second substrate 182 (or; further including the film layer plated thereon). The distance between the film layer on it). In an embodiment, if the display panel 100 is a liquid crystal display panel, the first thickness 183h of the display medium layer 183 may be referred to as a liquid crystal cell gap (Liquid Crystal Cell Gap). In one embodiment, the first thickness 183h is about 2.4 μm to 3.8 μm, but the invention is not limited thereto.

The pixel unit PU1 may include a first signal line 151, a second signal line 152, an active device 140, a pixel electrode 110, and an alignment electrode 120. The first signal line 151 may extend substantially along the first direction D1. The second signal line 152 may extend substantially along the second direction D2. The first direction D1 is not parallel to the second direction D2. The active device 140 includes a source 141, a drain 142, a gate 143 and a channel 144. The first signal line 151 is electrically connected to the gate electrode 143. The second signal line 152 is electrically connected to the source 141. The pixel electrode 110 may be electrically connected to the drain electrode 142 through a conductive via VIA. When the active element 140 is controlled by the electrical signal of the first signal line 151 to be turned on, the active element 140 can allow the signal transmission between the source 141 and the drain 142, so the electrical signal on the second signal line 152 can pass through the source The 141 and the drain 142 are input to the pixel electrode 110, so that the pixel electrode 110 generates a required electric field.

In an embodiment, the first signal line 151 may be called a scan line, and the second signal line 152 may be called a data line, but the invention is not limited thereto.

In an embodiment, the first direction D1 may be substantially perpendicular to the second direction D2, but the invention is not limited thereto.

In this embodiment, the gate electrode 143 and the first signal line 151 may be the same conductive layer (for example, the first patterned conductive layer M1), but the invention is not limited thereto. In an embodiment, based on the consideration of conductivity, the material of the first patterned conductive layer M1 may include metal, but the present invention is not limited thereto.

In this embodiment, the source 141, the drain 142, and the second signal line 152 may be the same conductive layer (for example, the second patterned conductive layer M2), but the invention is not limited thereto. In an embodiment, based on the consideration of conductivity, the material of the second patterned conductive layer M2 may include metal, but the present invention is not limited thereto.

In the thickness direction D3 (e.g., parallel to the plane view direction shown in FIGS. 1A to 1E; or, a direction perpendicular to the surface 181a of the first substrate 181), the alignment electrode 120 is substantially along the pixel electrode At least one edge configuration of 110. The alignment electrode 120 is physically separated from the pixel electrode 110.

1D, the outline of the pixel electrode 110 may be at least surrounded by a first side S1, a second side S2, a third side S3, and a fourth side S4. Here, the first side S1, the second side S2, the third side S3, and the fourth side S4 are sequentially arranged in a counterclockwise direction, for example. The first side S1 and/or the third side S3 may substantially extend along the second direction D2. The second side S2 and/or the fourth side S4 may extend substantially along the first direction D1. Compared with the fourth side S4, the second side S2 is closer to the active device 140 electrically connected to the pixel electrode 110.

In this embodiment, the size of the first side S1 and/or the size of the third side S3 is larger than the size of the second side S2 and/or the size of the fourth side S4. In one embodiment, the pixel electrode 110 is substantially the same or similar to a rectangular pattern, but the invention is not limited to this.

The pixel electrode 110 has a first slit 111 and a second slit 112. The first slit 111 extends substantially along the second direction D2. In the second direction D2, the first slit 111 has a first end 111a and a third end 111b opposite to each other. The second slit 112 extends substantially along the first direction D1. In the first direction D1, the second slit 112 has a second end 112a and a fourth end 112b opposite to each other. The first end 111 a of the first slit 111 is connected to the second end 112 a of the second slit 112. In other words, the opening area formed by the first slit 111 and the second slit 112 is substantially L-shaped.

In this embodiment, the first slit 111 and/or the second slit 112 may be elongated openings. In other words, the first slit 111 and the second slit 112 can basically form an L-shaped slit. In one embodiment, by adjusting the orientation of the aforementioned L-shaped slit, the liquid crystal material can have a corresponding alignment direction.

In this embodiment, the first slit 111 is closer to the first side S1 and farther from the third side S3, but the invention is not limited to this.

In this embodiment, the first end 111a of the first slit 111 is closer to the second side S2 and farther from the fourth side S4, but the invention is not limited to this.

In this embodiment, the second slit 112 is closer to the second side S2 and farther from the fourth side S4, but the invention is not limited to this.

In this embodiment, the second end 112a of the second slit 112 is closer to the first side S1 and farther from the third side S3, but the invention is not limited to this.

In this embodiment, the fourth end 112b of the second slit 112 is not located on the third side S3. In other words, there is a corresponding distance between the fourth end 112b of the second slit 112 and the third side S3.

In this embodiment, the second end 112a of the first slit 111 is not located on the fourth side S4. In other words, there is a corresponding distance between the first end 111a of the first slit 111 and the fourth side S4.

In this embodiment, the pixel electrode 110 only has a first slit 111 and a second slit 112. In other words, the opening area in the range surrounded by the first side S1, the second side S2, the third side S3, and the fourth side S4 may only be constituted by the first slit 111 and the second slit 112.

1D, the alignment electrode 120 may include a first alignment portion 121, a second alignment portion 122, a third alignment portion 123, and a fourth alignment portion 124. The first alignment portion 121 of the alignment electrode 120 corresponds to the first side S1 of the pixel electrode 110. The second alignment portion 122 of the alignment electrode 120 corresponds to the second side S2 of the pixel electrode 110. The third alignment portion 123 of the alignment electrode 120 corresponds to the third side S3 of the pixel electrode 110. The fourth alignment portion 124 of the alignment electrode 120 corresponds to the fourth side S4 of the pixel electrode 110.

In this embodiment, when the pixel unit PU1 is applied to a liquid crystal display device, the alignment of an electrode 120 can be used to define the alignment of the liquid crystal material. For example, an electrode on the second substrate 182 and the alignment electrode 120 may be respectively input with corresponding voltages (the voltage difference may be referred to as: Curing Voltage), and an electrode on the second substrate 182 An electric field is generated between the alignment electrode 120 and the liquid crystal material substantially along the orientation direction (orientation direction) to present a specific arrangement and/or tilt (tilt). When the liquid crystal material exhibits a specific arrangement and/or tilt, a suitable curing procedure (such as light curing and/or thermal curing) can be performed to cure the alignment material on the periphery of the liquid crystal layer. In this way, when the liquid crystal layer is subsequently driven for display, it can be tilted and arranged under the alignment effect of the alignment layer, so as to achieve a corresponding display effect. Taking FIG. 1A as an example, the projection of the liquid crystal material on the surface 181a in the direction in which the liquid crystal material is arranged and/or inclined is substantially parallel to the alignment direction DA. The alignment direction DA is substantially away from the connection between the first slit 111 and the second slit 112 (eg: the first end 111a of the first slit 111 and/or the second end 112a of the second slit 112) The direction of the aforementioned connection extends. For another example, the pixel electrode 110 and the alignment electrode 120 may also be used to define the alignment of the liquid crystal material.

In this embodiment, the pixel electrode 110 and the alignment electrode 120 may be the same conductive layer (for example, the third patterned conductive layer M3), but the invention is not limited to this. In one embodiment, based on the consideration of conductivity and light transmittance, the material of the third patterned conductive layer M3 may include zinc oxide (ZnO), tin oxide (SnO), indium-zinc oxide (IZO), Gallium-Zinc Oxide (GZO), Zinc-Tin Oxide (ZTO) or Indium-Tin Oxide (ITO), a combination or stack of the above, or other suitable light-transmissive conductive Material, but the present invention is not limited to this.

In this embodiment, in the second direction D2, there is a fourth distance L4 between the side of the pixel electrode 110 farther from the second slit 112 and the alignment electrode 120. For example, in the second direction D2, there is a fourth distance L4 between the fourth side S4 of the pixel electrode 110 and the fourth alignment portion 124 of the alignment electrode 120. The fourth pitch may be greater than or equal to 3.5 microns and less than or equal to 4.5 microns. In one embodiment, by the above-mentioned method, the electric field generated between the alignment electrode 120 and the pixel electrode 110 can have better quality (such as intensity and/or uniformity in direction).

In this embodiment, in the first direction D1, there is a first distance L1 between the side of the pixel electrode 110 closer to the first slit 111 and the alignment electrode 120. For example, in the first direction D1, there is a first distance L1 between the first side S1 of the pixel electrode 110 and the first alignment portion 121 of the alignment electrode 120. The first distance is greater than or equal to 5 microns. In one embodiment, by the above-mentioned method, the electric field generated between the alignment electrode 120 and the pixel electrode 110 can have better quality (such as intensity and/or uniformity in direction).

In this embodiment, in the first direction D1, there is a third distance L3 between the side of the pixel electrode 110 farther from the first slit 111 and the alignment electrode 120. For example, in the first direction D1, there is a third distance L3 between the third side S3 of the pixel electrode 110 and the third alignment portion 123 of the alignment electrode 120. The third distance L3 is greater than or equal to 1.5 micrometers and less than or equal to 2.5 micrometers. In one embodiment, by the above-mentioned method, the electric field generated between the alignment electrode 120 and the pixel electrode 110 can have better quality (such as intensity and/or uniformity in direction).

In this embodiment, in the first direction D1, the distance between the side of the pixel electrode 110 farther from the first slit 111 and the alignment electrode 120 may be greater than that of the pixel electrode 110 closer to the first slit 111 The distance between the side of φ and the alignment electrode 120. For example, the first distance L1 may be greater than the third distance L3. In one embodiment, by the above-mentioned method, the electric field generated between the alignment electrode 120 and the pixel electrode 110 can have better quality (such as intensity and/or uniformity in direction).

In this embodiment, in the first direction D1, the first slit 111 has a first width 111w; and in the second direction D2, the second slit 112 has a second width 112w. The ratio of the first width 111w to the first thickness 183h (ie: the first width 111w/first thickness 183h) may be greater than or equal to 0.75 and less than or equal to 0.4; and/or the ratio of the second width 112w to the first thickness 183h (Ie: second width 112w/first thickness 183h) can be greater than or equal to 0.75 and less than or equal to 0.4. In one embodiment, by the above-mentioned method, the electric field generated between the alignment electrode 120 and the pixel electrode 110 can have better quality (such as intensity and/or uniformity in direction).

In this embodiment, the pixel unit PU1 may further include a common electrode 130. In the thickness direction D3, the common electrode 130 may overlap the drain electrode 142, the conductive via VIA, and/or the pixel electrode 110 to form a required storage capacitor. In an embodiment, the storage capacitor between the common electrode 130 and the pixel electrode 110 and/or between the common electrode 130 and the drain electrode 142 can be used to stabilize the display effect of the pixel structure.

For example, referring to FIG. 1B, the common electrode 130 may include a first common portion 131, a second common portion 132, and a third common portion 133. The second common portion 132 of the common electrode 130 may overlap the drain 142 and/or the conductive via VIA. The first common portion 131 and/or the third common portion 133 extend substantially along the second direction D2. The first common portion 131 and/or the third common portion of the common electrode 130 may overlap the pixel electrode 110.

In an embodiment, viewed in the thickness direction D3, part of the common electrode 130 may be substantially located between the pixel electrode 110 and the second signal line 152. For example, when viewed in the thickness direction D3, at least part of the first common portion 131 of the common electrode 130 may be located between the first side S1 of the pixel electrode 110 and the second signal line 152 capable of driving the pixel electrode 110. In this way, it may be possible to reduce the electrical signal interference between the pixel electrode 110 and the second signal line 152, but the present invention is not limited to this.

In an embodiment, viewed in the thickness direction D3, a part of the common electrode 130 may be substantially located between the pixel electrode 110 and the first signal line 151. For example, when viewed in the thickness direction D3, at least part of the second common portion 132 of the common electrode 130 may be located between the first side S2 of the pixel electrode 110 and the first signal line 151 capable of driving the pixel electrode 110. In this way, it may be possible to reduce the electrical signal interference between the pixel electrode 110 and the first signal line 151, but the present invention is not limited to this.

In this embodiment, the common electrode 130, the gate electrode 143, and the first signal line 151 may be the same conductive layer (eg, the first patterned conductive layer M1), but the invention is not limited to this.

Taking the display medium layer 183 using liquid crystal as an example, FIG. 1F is a simulation diagram of the liquid crystal effect when the pixel unit PU1 of FIG. 1A is used to perform an alignment procedure on the display medium layer. 1A and 1F, when the electrodes on the second substrate 182 and the alignment electrodes 120 are respectively applied with alignment voltages, the liquid crystal molecules will be aligned and/or tilted with the action of the electric field. Nodes and/or dark lines are generated at locations where the liquid crystals are arranged and/or tilted unevenly and/or at the junctions, and these nodes and/or dark lines cannot normally provide a display function. It can be seen from FIG. 1F that through the pattern design of the pixel electrode 110 with the first slit 111 and the second slit 112 and the corresponding alignment electrode 120, the nodes are generally located outside the area of the pixel electrode 110, and/or The dark lines in the area of the pixel electrode 110 are not obvious. In other words, most of the area corresponding to the area of the pixel electrode 110 can basically provide an effective display effect. Therefore, such a design helps to increase the display transmittance and achieve a better display effect.

2A and 2B are schematic partial top views of a display panel according to a second embodiment of the present invention. For example, FIG. 2B may be a schematic top view corresponding to a film layer (such as the third patterned conductive layer M3) in FIG. 2A. The display panel 200 of this embodiment is similar to the display panel 100 of the first embodiment, and similar components thereof are denoted by the same reference numerals, and have similar functions, materials, or formation methods, and descriptions are omitted.

2A and 2B, the display panel 200 may include a first substrate (not shown, which may be the same as or similar to the first substrate 181 of the previous embodiment), a pixel unit PU2, a display medium layer (not shown, may The same or similar to the display medium layer 183 in the foregoing embodiment) and the second substrate (not shown, and may be the same or similar to the second substrate 182 in the foregoing embodiment). The pixel unit PU2 may be similar to the pixel unit PU1 of the previous embodiment.

The pixel unit PU2 may include a first signal line 151, a second signal line 152, an active device 140, a pixel electrode 210, and an alignment electrode 120. The contour of the pixel electrode 210 may be at least surrounded by the first side S1, the second side S2, the third side S3, and the fourth side S4. The pixel electrode 210 has a first slit 111 and a second slit 112. The first slit 111 is closer to the third side S3 and farther from the first side S1, and the second slit 112 is closer to the fourth side S4 than to the fourth side S1. Away from the second side S2.

In this embodiment, compared to the second side S2, the fourth side S4 may be closer to the active element 140 electrically connected to the pixel electrode 110, but the invention is not limited to this.

3A to 3C are schematic partial top views of a display panel according to a third embodiment of the present invention. For example, FIG. 3B may be a schematic top view corresponding to a film layer (eg, the first patterned conductive layer M1) in FIG. 3A. For example, FIG. 3C may be a schematic top view corresponding to a film layer (such as the third patterned conductive layer M3) in FIG. 3A. The display panel 300 of this embodiment is similar to the display panel 200 of the second embodiment, and similar components thereof are denoted by the same reference numerals, and have similar functions, materials, or formation methods, and descriptions are omitted.

3A and 3B, the display panel 100 may include a first substrate (not shown, which may be the same as or similar to the first substrate 181 of the previous embodiment), a pixel unit PU3, and a display medium layer (not shown, may be The same or similar to the display medium layer 183 in the foregoing embodiment) and the second substrate (not shown, and may be the same or similar to the second substrate 182 in the foregoing embodiment). The pixel unit PU3 may be similar to the pixel unit PU2 of the previous embodiment.

The pixel unit PU3 may include a first signal line 151, a second signal line 152, an active device 140, a pixel electrode 210, and an alignment electrode 320. The alignment electrode 320 may include a first alignment portion 321 and a second alignment portion 322. The first alignment portion 321 of the alignment electrode 320 corresponds to the first side S1 of the pixel electrode 210. The second alignment portion 322 of the alignment electrode 320 corresponds to the second side S2 of the pixel electrode 210.

In this embodiment, the alignment electrode 320, the gate electrode 143, and the first signal line 151 may be the same conductive layer (eg, the first patterned conductive layer M1), but the invention is not limited thereto.

4 is a schematic partial top view of a display panel 100 according to a fourth embodiment of the present invention. The display panel 100 of this embodiment is similar to the display panel 100 of the first embodiment, and similar components thereof are denoted by the same reference numerals, and have similar functions, materials, or formation methods, and the description is omitted.

4, the display panel 400 may include a first substrate (not shown, which may be the same as or similar to the first substrate 181 of the previous embodiment), a plurality of pixel units PU, and a display medium layer (not shown, may be the same Or similar to the display medium layer 183 of the foregoing embodiment) and the second substrate (not shown, and may be the same or similar to the second substrate 182 of the foregoing embodiment). In this embodiment, the plurality of pixel units PU may include a plurality of first pixel units PUR, a plurality of second pixel units PUG, and a plurality of third pixel units PUB. Multiple pixel units PU may be arranged in an array arrangement. The first pixel unit PUR, the second pixel unit PUG, and/or the third pixel unit PUB may be the same or similar to the pixel unit PU1 of the foregoing embodiment, so it will not be repeated here. For example, each pixel unit PU may have an L-shaped slit SL similar to the first slit 111 and the second slit 112.

In this embodiment, the area corresponding to the first pixel unit PUR, the area corresponding to the second pixel unit PUG, and the area corresponding to the third pixel unit PUB may have different colors. In an embodiment, the area corresponding to the first pixel unit PUR may be red, the area corresponding to the second pixel unit PUG may be green, and the area corresponding to the third pixel unit PUB may be blue. However, the present invention is not limited to this.

In this embodiment, the first pixel unit PUR may include a first pixel unit PUR1, a first pixel unit PUR2, a first pixel unit PUR3, and a first pixel unit PUR4. The first pixel unit PUR1 has an alignment direction DAR1, the first pixel unit PUR2 has an alignment direction DAR2, the first pixel unit PUR3 has an alignment direction DAR3, and the first pixel unit PUR4 has an alignment direction DAR4.

In this embodiment, the second pixel unit PUG may include a second pixel unit PUG1, a second pixel unit PUG2, a second pixel unit PUG3, and a second pixel unit PUG4. The second pixel unit PUG1 has an alignment direction DAG1, the second pixel unit PUG2 has an alignment direction DAG2, the second pixel unit PUG3 has an alignment direction DAG3, and the second pixel unit PUG4 has an alignment direction DAG4.

In this embodiment, the third pixel unit PUB may include a third pixel unit PUB1, a third pixel unit PUB2, a third pixel unit PUB3, and a third pixel unit PUB4. The third pixel unit PUB1 has an alignment direction DAB1, the third pixel unit PUB2 has an alignment direction DAB2, the third pixel unit PUB3 has an alignment direction DAB3, and the third pixel unit PUB4 has an alignment direction DAB4.

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units PU have different alignment directions.

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units with the same color (such as two adjacent first pixel units PUR, adjacent The two second pixel units (PUG or two adjacent third pixel units PUB) have different alignment directions.

FIG. 5 is a schematic partial top view of a display panel according to a fifth embodiment of the present invention. The display panel 500 of this embodiment is similar to the display panel 400 of the fourth embodiment, and similar components are denoted by the same reference numerals, and have similar functions, materials, or formation methods, and descriptions are omitted.

5, the display panel 500 may include a first substrate (not shown, which may be the same as or similar to the first substrate 181 of the previous embodiment), a plurality of pixel units PU, and a display medium layer (not shown, may be the same Or similar to the display medium layer 183 of the foregoing embodiment) and the second substrate (not shown, and may be the same or similar to the second substrate 182 of the foregoing embodiment).

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units PU have different alignment directions.

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units with the same color (such as two adjacent first pixel units PUR, adjacent The two second pixel units (PUG or two adjacent third pixel units PUB) have different alignment directions.

FIG. 6 is a schematic partial top view of a display panel 100 according to a sixth embodiment of the present invention. The display panel 600 of this embodiment is similar to the display panel 400 of the fourth embodiment, and similar components are denoted by the same reference numerals, and have similar functions, materials, or formation methods, and descriptions are omitted.

Referring to FIG. 6, the display panel 600 may include a first substrate (not shown, which may be the same or similar to the first substrate 181 of the previous embodiment), a plurality of pixel units PU, and a display medium layer (not shown, but may be the same Or similar to the display medium layer 183 of the foregoing embodiment) and the second substrate (not shown, and may be the same or similar to the second substrate 182 of the foregoing embodiment).

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units PU have different alignment directions.

In this embodiment, in the first direction D1 and/or the second direction D2, two adjacent pixel units with the same color (such as two adjacent first pixel units PUR, adjacent The two second pixel units (PUG or two adjacent third pixel units PUB) have different alignment directions.

In the foregoing embodiments, the conductive layer may have a single-layer or multi-layer structure. If it is a conductive layer with a multi-layer structure, the aforementioned multi-layer structure may not have an insulating material between them.

In the foregoing embodiments, the insulating layer may have a single-layer or multi-layer structure. If it is an insulating layer with a multi-layer structure, the aforementioned multi-layer structure may not have conductive materials between them.

In summary, the present invention can make the display panel have a better display effect through the pattern design of the pixel electrodes with the first slit and the second slit.

100, 200, 300, 400, 500, 600: display panel PU1, PU2, PU3, PUR, PUR1, PUR2, PUR3, PUR4, PUG, PUG1, PUG2, PUG3, PUG4, PUB, PUB1, PUB2, PUB3, PUB4: pixel unit 110, 210: pixel electrode 111: first slit 111a: first end 111b: third end 111w: first width 112: second slit 112a: second end 112b: Fourth end 112w: second width S1: First side S2: second side S3: Third side S4: Fourth side 120, 320: Alignment electrode 121, 321: first alignment part 122, 322: second alignment part 123: The third alignment part 124: The fourth alignment part 130: common electrode 131: The first shared part 132: The second common part 133: The third common part 140: active component 141: Source 142: Drain 143: Gate 144: Channel 151: The first signal line 152: second signal line 182: second substrate 184: component layer 183: display medium layer 183h: first thickness 181: first substrate 181a: Surface D1: First direction D2: second direction D3: thickness direction L1: first pitch L3: third spacing L4: fourth spacing M1: the first patterned conductive layer M2: second patterned conductive layer M3: third patterned conductive layer VIA: Conductive via DA, DAR1, DAR2, DAR3, DAR4, DAG1, DAG2, DAG3, DAG4, DAB1, DAB2, DAB3, DAB4: alignment direction SL: slit R1: area

1A to 1D are schematic partial top views of a display panel according to the first embodiment of the present invention. FIG. 1E is a schematic partial cross-sectional view of a display panel according to the first embodiment of the present invention. FIG. 1F is a simulation diagram of the effect when a display panel of the first embodiment of the present invention is used to perform an alignment procedure. 2A and 2B are schematic partial top views of a display panel according to a second embodiment of the present invention. 3A to 3C are schematic partial top views of a display panel according to a third embodiment of the present invention. 4 is a schematic partial top view of a display panel according to a fourth embodiment of the invention. FIG. 5 is a schematic partial top view of a display panel according to a fifth embodiment of the present invention. FIG. 6 is a schematic partial top view of a display panel according to a sixth embodiment of the present invention.

100: display panel

PU1: pixel unit

110: Pixel electrode

111: first slit

112: second slit

120: Alignment electrode

140: active component

141: Source

142: Drain

143: Gate

144: Channel

151: The first signal line

152: second signal line

D1: First direction

D2: second direction

D3: thickness direction

VIA: Conductive via

DA: Orientation direction

Claims (9)

A display panel includes: a first substrate; a pixel unit arranged on the first substrate, and the pixel unit includes: a pixel electrode having a first slit and a second slit, wherein the second A slit extends in a first direction, and a second slit extends in a second direction, the first direction is not parallel to the second direction, and one end of the first slit is connected to the second slit One end of the slit; a second substrate located on the first substrate; and a display medium layer located between the first substrate and the second substrate. The display panel according to claim 1, wherein the pixel electrode only has the first slit and the second slit. The display panel according to claim 1, wherein the pixel unit further includes: an active device including a source electrode, a drain electrode, and a gate electrode, wherein the pixel electrode is electrically connected to the drain electrode; a first signal A wire extending substantially in the first direction and electrically connected to the gate; and a second signal wire extending substantially in the second direction and electrically connected to the source. The display panel according to claim 3, wherein the pixel unit further includes: The alignment electrode, the alignment electrode and the gate electrode have the same film layer. The display panel according to claim 1, wherein the pixel unit further includes an alignment electrode, and the pixel electrode and the alignment electrode are the same film layer. The display panel according to claim 5, wherein the pixel unit further includes: an active device including a source electrode, a drain electrode, and a gate electrode, wherein the pixel electrode is electrically connected to the drain electrode; a first signal A line extending substantially in the first direction and electrically connected to the gate; a second signal line extending substantially in the second direction and electrically connected to the source; and a common electrode, and The gate electrode is the same film layer. The display panel according to claim 5, wherein in the second direction, there is a first distance between the pixel electrode and the alignment electrode, wherein the first distance is greater than or equal to 3.5 microns and less than or Equal to 4.5 microns. The display panel according to claim 5, wherein in the first direction, there is a second distance between the pixel electrode and the alignment electrode, wherein the second distance is greater than or equal to 5 microns. The display panel according to claim 1, wherein: the first slit or the second slit has a slit width; the display medium layer has a first thickness; and The ratio of the width of the slit to the thickness is greater than or equal to 0.75 and less than or equal to 0.4.

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