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TWI704361B - An automated circuit board test system and a method thereof - Google Patents

An automated circuit board test system and a method thereof Download PDF

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TWI704361B
TWI704361B TW108127412A TW108127412A TWI704361B TW I704361 B TWI704361 B TW I704361B TW 108127412 A TW108127412 A TW 108127412A TW 108127412 A TW108127412 A TW 108127412A TW I704361 B TWI704361 B TW I704361B
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test
signal
module
control
board
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TW108127412A
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TW202107105A (en
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政 李
羅盛捷
朱建杭
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正崴精密工業股份有限公司
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Abstract

An automated circuit board test system and a method thereof which are applied in the environment of a device under test (DUT). The automated circuit board test system provides test signals to the object under test of the electronic product for measurement of relevant parameters. During the process that the automated circuit board test system of the present invention is used to perform an automated circuit board test method, first, the test processing module transfer a control signal to a switch module of test board. The switch module of test board switches a plurality of relays to switch the signal path, and converts the control signal into a sequence control signal. Then, the sequence control signal is transmitted to the test board for testing. In the process of returning, the switch module of test board switches the signal path again, and the result data is transmitted back to the test processing module. Thereby, the system can test multiple electronic products at one time by switching the signal path of the switch module of test board.

Description

自動化電路板測試系統及其方法Automatic circuit board testing system and method

本發明涉及一種自動化測試系統,尤指一種針對訊號切換的自動化電路板測試系統及其方法。The invention relates to an automated test system, in particular to an automated circuit board test system and method for signal switching.

自動化測試系統(Automatic Test Equipment,ATE)係利用自動化的機制對半導體產品、電子電路裝置及印刷電路板等進行測試。其中,測量單元為自動化測試系統常見的一個重要元件。測量單元的功用主要提供測試信號給待測裝置(Device Under Test,DUT),以便進行相關參數的量測。常見的模式如偽隨機二進位序列(Pseudo-Randon Binary Sequence,PRBS),用以測試DUT回饋的誤碼率。Automatic Test Equipment (ATE) uses automated mechanisms to test semiconductor products, electronic circuit devices, and printed circuit boards. Among them, the measurement unit is an important component commonly seen in automated test systems. The function of the measurement unit is mainly to provide test signals to the device under test (DUT) for the measurement of related parameters. Common patterns such as Pseudo-Randon Binary Sequence (PRBS) are used to test the bit error rate of the DUT feedback.

目前市面上的自動化測試系統在對待測裝置進行PRBS的測試時,測試人員僅需依照測試需求輸入所需之資料與其所需測試的參數,以及操作使用者介面(GUI)變更測試程序,並且因為不同的測試程序需要更換及拔插DUT上的線路,整個測試達到多個步驟。When the automated test system currently on the market performs the PRBS test of the device under test, the tester only needs to input the required data and the required test parameters according to the test requirements, and operate the user interface (GUI) to change the test program, and because Different test procedures need to replace and unplug the circuit on the DUT, the whole test reaches multiple steps.

台灣公開/公告號I479957「用以摘取於受測裝置與自動化測試設備間交換之信號的概念」係揭露,一種用以摘取在一受測試裝置與一自動化測試設備間交換的信號之印刷電路板。該印刷電路板包含多個第一端子、多個第二端子、多條傳輸線及一摘取電路。該等多個第一端子係經組配來接觸該受測裝置的一插槽之端子。該等多個第二端子係經組配來接觸該自動化測試設備之一測試固定構件的端子,該等端子係適用以接觸該受測裝置的插槽的該等端子。該等多條傳輸線係經組配來連接該等多個第一端子及該等多個第二端子。該摘取電路係電器耦接至該等多條傳輸線中之一者,且係經組配來摘取透過該一條傳輸線在該受測裝置與該自動化測試設備間交換的信號以提供一摘取信號,其中該摘取電路係包含一電阻器或一電阻器網絡,其中因該印刷電路板之存在所致而加在透過該一條傳輸線在該受測裝置與該自動化測試間交換的信號上之一損耗係小於6分貝。Taiwan Public/Announcement No. I479957 "The concept of extracting signals exchanged between a device under test and automated test equipment" is a type of printing used to extract signals exchanged between a device under test and an automated test equipment Circuit board. The printed circuit board includes a plurality of first terminals, a plurality of second terminals, a plurality of transmission lines and an extraction circuit. The plurality of first terminals are assembled to contact terminals of a slot of the device under test. The plurality of second terminals are assembled to contact the terminals of a test fixing member of the automated test equipment, and the terminals are adapted to contact the terminals of the slot of the device under test. The multiple transmission lines are assembled to connect the multiple first terminals and the multiple second terminals. The extraction circuit is an electrical appliance coupled to one of the plurality of transmission lines, and is configured to extract signals exchanged between the device under test and the automated test equipment through the one transmission line to provide an extraction Signal, wherein the extraction circuit includes a resistor or a resistor network, and the presence of the printed circuit board adds to the signal exchanged between the device under test and the automated test through the transmission line A loss is less than 6 decibels.

台灣公開/公告號I561839「積體電路測試介面及自動測試設備」係揭露,一種可升級一自動測試設備的積體電路測試介面,以測試一待測元件,該積體電路測試介面包含有至少一引腳,用來接收或傳送至少一測試訊號至該自動測試設備之一測試機;複數個數化器,耦接於該至少一引腳,以產生一數位訊號;一處理器,耦接於該複數個數化器,用來進行該數位訊號的處理;以及一連接件,用來連接該處理器與一電腦設備,以將該處理器之一輸出訊號傳送至該電腦設備;其中,該積體電路測試介面設置於該自動測試設備之該測試機與一針測機之間。Taiwan Public/Announcement No. I561839 "Integrated Circuit Test Interface and Automatic Test Equipment" discloses an integrated circuit test interface that can upgrade an automatic test device to test a component under test. The integrated circuit test interface contains at least A pin is used to receive or transmit at least one test signal to a test machine of the automatic test equipment; a plurality of digitizers are coupled to the at least one pin to generate a digital signal; a processor is coupled The plurality of digitizers are used to process the digital signal; and a connector is used to connect the processor and a computer device to transmit one of the output signals of the processor to the computer device; wherein, The integrated circuit test interface is arranged between the test machine and a probe test machine of the automatic test equipment.

就目前而言,習知自動化測試系統,所存在的一問題是在於,在測試系統上,一次只能測試一個待測物,例如,一待測物A及一待測物B,該測試系統連接該待測物A執行測試動作,測試完後必須取下該待測物A,並且再連接該待測物B執行測試動作。本發明之自動化電路板測試系統解決前述問題,可以一次連接多個待測物,藉由訊號路經切換達到測試多個待測物。At present, one of the problems in the conventional automated test system is that on the test system, only one DUT can be tested at a time, for example, one DUT A and one DUT B. The test system Connect the DUT A to perform the test action. After the test, the DUT A must be removed, and then the DUT B must be connected to perform the test action. The automated circuit board testing system of the present invention solves the aforementioned problems, can connect multiple DUTs at one time, and test multiple DUTs by switching the signal path.

然而,由於待測物越來越多樣化,其運作也越來越精密,相對的就需要功能更強大的自動測試系統與方法來應日益複雜的測試需求,提供更有彈性且更有效率的自動化測試系統,其簡化測試流程和縮短測試時間,則為研發人員應解決的問題之一。However, as the DUT is becoming more and more diversified and its operation is becoming more and more sophisticated, more powerful automatic test systems and methods are needed to meet the increasingly complex test requirements and provide more flexible and efficient Automated test system, which simplifies the test process and shortens the test time, is one of the problems that R&D personnel should solve.

本發明之主要目的便是在於提供一種自動化電路板測試系統及其方法,其係能於測試系統連接待測試板開關模組和控制模組再連接到測試板,並透過控制模組控制待測試板開關模組快速地切換繼電器達到訊號路徑的切換,使該測試系統一次可以連接並且測試多個待測物,進一步使該測試系統達到減少人力資源、縮短測試時間、全程自動化、可記錄以及在測試處理模組中執行分析,並將分析結果顯示在使用者介面上。The main purpose of the present invention is to provide an automated circuit board testing system and method, which can connect the switch module and the control module of the board to be tested to the test board, and control the board to be tested through the control module The board switch module quickly switches the relay to switch the signal path, so that the test system can connect and test multiple DUTs at a time, and further enable the test system to reduce human resources, shorten the test time, fully automated, recordable, and The analysis is performed in the test processing module, and the analysis result is displayed on the user interface.

為了達到前述目的及其他目的,本發明之一目的係提供一種自動化電路板測試系統,其係包含:至少一待測試板開關模組,該待測試開關模組係連接一測試板,該測試板包含:一第一訊號接口、一第二訊號接口、一第三訊號接口及一中繼器,該第二訊號接口及該第三訊號接口以一訊號線互相連接,該第一訊號接口連接該中繼器,該待測試板開關模組分別連接該第二訊號接口及該第三訊號接口,該待測試板開關模組係包含複數個繼電器;一控制模組,其係以一控制介接匯流排連接該待測試板開關模組,該控制模組控制該待測試板開關模組;以及一測試處理模組,其係接收該測試板測試出的加密結果資料,該測試處理模組以至少二序列埠匯流排各別連接該控制模組及該第一訊號接口。In order to achieve the foregoing and other objectives, one object of the present invention is to provide an automated circuit board testing system, which includes: at least one switch module to be tested, the switch module to be tested is connected to a test board, the test board Including: a first signal interface, a second signal interface, a third signal interface and a repeater, the second signal interface and the third signal interface are connected to each other by a signal line, and the first signal interface is connected to the Repeater, the switch module of the board to be tested is respectively connected to the second signal interface and the third signal interface, the switch module of the board to be tested includes a plurality of relays; a control module, which is connected with a control interface The bus bar is connected to the switch module of the board to be tested, the control module controls the switch module of the board to be tested; and a test processing module that receives the encrypted result data tested by the test board, and the test processing module uses At least two serial port buses are respectively connected to the control module and the first signal interface.

其中,該測試處理模組傳送一控制訊號給該控制模組,該控制模組轉換該控制訊號為一序列控制訊號,該控制模組再傳送該序列控制訊號給該待測試板開關組,並且控制該待測試板開關模組的繼電器切換訊號路徑,該測試板回傳結果資料給該待測試板開關模組,該待測試板開關模組經由一序列回傳訊號傳送該結果資料給控制模組,該控制模組轉換該序列回傳訊號為一回傳訊號,並且經由該回傳訊號傳送該加密結果資料給該測試處理模組。Wherein, the test processing module transmits a control signal to the control module, the control module converts the control signal into a serial control signal, and the control module transmits the serial control signal to the switch group of the board to be tested, and Control the relay switching signal path of the switch module of the board to be tested, the test board returns result data to the switch module of the board to be tested, and the switch module of the board to be tested transmits the result data to the control module via a sequence of return signals Group, the control module converts the serial return signal into a return signal, and transmits the encrypted result data to the test processing module through the return signal.

較佳地,其中,該待測試板開關模組包含:至少二待測試板、至少一繼電器模組及一軟件保護器,該等待測試板分別連接該第二訊號接口及該第三訊號接口,該等待測試板各別連接該繼電器模組,該繼電器模組係以該控制介接匯流排連接該控制模組,該軟件保護器係以一軟件介接匯流排連接該繼電器模組,該軟件保護器加密該繼電器模組回傳的資料,該序列埠匯流排數量為三條,該等序列埠匯流排各別連接該第一訊號接口、該控制模組及該軟件保護器,並且連接至該測試處理模組。Preferably, the switch module of the board to be tested includes: at least two boards to be tested, at least one relay module and a software protector, and the test board is connected to the second signal interface and the third signal interface, respectively, The waiting test boards are individually connected to the relay module, the relay module is connected to the control module by the control interface bus, and the software protector is connected to the relay module by a software interface bus. The software The protector encrypts the data returned by the relay module. The number of serial port buses is three. The serial port buses are respectively connected to the first signal interface, the control module and the software protector, and are connected to the Test processing module.

較佳地,其中,該繼電器模組係以該序列控制訊號控制該繼電器模組的一擴充晶片的輸出接腳,使該等繼電器的開關達到訊號路徑切換。Preferably, the relay module uses the sequence control signal to control an output pin of an expansion chip of the relay module, so that the switches of the relays achieve signal path switching.

較佳地,其中,該加密結果資料包含:測試日期時間、工單資訊、測試站別、測試流程、測試項目及測試結果,該加密結果資料係儲存在該測試處理模組中。Preferably, the encrypted result data includes: test date and time, work order information, test site, test process, test item, and test result, and the encrypted result data is stored in the test processing module.

較佳地,其中,該測試結果包括複數個測試結果細項。Preferably, the test result includes a plurality of test result details.

較佳地,其中,該控制模組的振盪頻率為24MHz。Preferably, wherein the oscillation frequency of the control module is 24 MHz.

較佳地,其中,該控制模組包含一控制電源晶片,該控制電源晶片係提供3.3V直流電壓給該控制模組的微控制器,該繼電器模組包含一繼電器電源晶片,該繼電器電源晶片係提供3.3V直流電壓給該擴充晶片。Preferably, wherein the control module includes a control power chip, the control power chip provides a 3.3V DC voltage to the microcontroller of the control module, the relay module includes a relay power chip, the relay power chip It provides 3.3V DC voltage to the expansion chip.

較佳地,其中,該擴充晶片具有積體電路介接匯流排的介面及複數個接腳。Preferably, the expansion chip has an integrated circuit interface interface and a plurality of pins.

較佳地,其中,該測試系統的總測試時間介於0~200秒之間。Preferably, the total test time of the test system is between 0 and 200 seconds.

為了達到前述目的及其他目的,本發明之另一目的係提供一自動化電路板測試系統的測試方法,包括下列步驟:一設定步驟,該測試處理模組透過該第一訊號接口設定該中繼器進入測試模式;一發送測試訊號步驟,其係由該測試處理模組發送該控制訊號給該控制模組;一轉換訊號步驟,該控制模組接收到該控制訊號,將該控制訊號傳送至該控制模組的微控制器並且轉換該控制訊號為該序列控制訊號;一資料比對步驟,將該序列控制訊號傳送至一記憶體中,並且在該記憶體中執行資料比對,再將該序列控制訊號回傳到該控制晶片中,該控制晶片傳送該序列控制訊號至該繼電器模組中;一訊號路徑切換步驟,該繼電器模組接受到該序列控制訊號,並且控制該等繼電器切換路徑,接著該繼電器模組傳送該序列控制訊號給該測試板;一測試步驟,該測試板接受到該序列控制訊號,並在該測試板中執行測試動作;一接收結果資料步驟,該繼電器模組接收到該結果資料,接著經由該序列回傳訊號傳送該結果資料給軟件保護器;一封包步驟,該軟件保護器接收到該結果資料,將該結果資料做封包動作並形成該加密結果資料,再將該序列回傳訊號轉換成該回傳訊號,接著經由該回傳訊號傳送該加密結果資料給該測試處理模組;以及一儲存步驟,該測試處理模組接收到該加密結果資料,並將該加密結果資料儲存在該測試處理模組中。In order to achieve the foregoing and other objectives, another object of the present invention is to provide a test method for an automated circuit board test system, which includes the following steps: a setting step, the test processing module sets the repeater through the first signal interface Enter the test mode; a step of sending a test signal, the test processing module sends the control signal to the control module; a step of converting a signal, the control module receives the control signal, and transmits the control signal to the The microcontroller of the control module converts the control signal into the sequence control signal; a data comparison step is to send the sequence control signal to a memory, and perform data comparison in the memory, and then the The sequence control signal is returned to the control chip, and the control chip transmits the sequence control signal to the relay module; a signal path switching step, the relay module receives the sequence control signal and controls the relay switching paths , Then the relay module transmits the sequence control signal to the test board; a test step, the test board receives the sequence control signal, and performs a test action in the test board; a step of receiving result data, the relay module After receiving the result data, send the result data to the software protector via the serial return signal; in a packet step, the software protector receives the result data, performs a packet action on the result data and forms the encrypted result data, Then convert the serial return signal into the return signal, and then send the encrypted result data to the test processing module via the return signal; and a storage step in which the test processing module receives the encrypted result data, and The encryption result data is stored in the test processing module.

本發明所提供之自動化電路板測試系統及其方法,主要利用自動化電路板測試系統,並搭配自動化電路板測試方法,達到切換該待測試板開關模組中的該等繼電器,更達到快速地切換訊號路徑,可同時測試多個該待測試板,有效的簡化測試流程及縮短測試時間。The automated circuit board testing system and method provided by the present invention mainly use the automated circuit board testing system and the automated circuit board testing method to switch the relays in the switch module of the board to be tested and achieve faster switching The signal path can test multiple boards to be tested at the same time, effectively simplifying the test process and shortening the test time.

請參閱圖1所示,圖1為本發明一較佳實施例的自動化電路板測試系統的示意圖。根據本發明的一個實施例之自動化電路板測試系統100,其係包含:至少一待測試板開關模組10、一控制模組20以及一測試處理模組30。Please refer to FIG. 1. FIG. 1 is a schematic diagram of an automated circuit board testing system according to a preferred embodiment of the present invention. According to an embodiment of the present invention, the automated circuit board testing system 100 includes: at least one switch module 10 of the board to be tested, a control module 20 and a test processing module 30.

如圖1及圖3所示,該待測試板開關模組10(DUT Switch Circuit),該待測試開關模組10係連接一測試板40(Test board),該測試板40包含:一第一訊號接口42c(MDIO0)、一第二訊號接口42a(MDIO1)、一第三訊號接口42b(MDIO2)及一中繼器41(Retimer),該第二訊號接口42a(MDIO1)及該第三訊號接口42b(MDIO2)以一訊號線43(Cable)互相連接,該第一訊號接口42c(MDIO0)連接該中繼器41,該待測試板開關模組10分別連接該第二訊號接口42a(MDIO1)及該第三訊號接口42b(MDIO2),如圖4所示,該待測試板開關模組10係包含複數個繼電器111a、111b(Relay)。在本實施例中,該訊號線43為一對一的測試線,並連接該第二訊號接口42a(MDIO1)及該第三訊號接口42b(MDIO2)。,在另一實施例中,具有MDIO1至MDIO5的訊號接口,該訊號線43可使用一對四的測試線,該訊號接口的數量對應使用不同的該訊號線43的款式。As shown in FIGS. 1 and 3, the switch module 10 (DUT Switch Circuit) to be tested is connected to a test board 40 (Test board), and the test board 40 includes: a first Signal interface 42c (MDIO0), a second signal interface 42a (MDIO1), a third signal interface 42b (MDIO2) and a repeater 41 (Retimer), the second signal interface 42a (MDIO1) and the third signal The interface 42b (MDIO2) is connected to each other by a signal line 43 (Cable), the first signal interface 42c (MDIO0) is connected to the repeater 41, and the board switch module 10 to be tested is respectively connected to the second signal interface 42a (MDIO1 ) And the third signal interface 42b (MDIO2), as shown in FIG. 4, the switch module 10 of the board to be tested includes a plurality of relays 111a, 111b (Relay). In this embodiment, the signal line 43 is a one-to-one test line, and is connected to the second signal interface 42a (MDIO1) and the third signal interface 42b (MDIO2). In another embodiment, there are signal interfaces MDIO1 to MDIO5, the signal line 43 can use one-to-four test lines, and the number of signal interfaces corresponds to the use of different styles of the signal line 43.

該控制模組20(Control board)係以一控制介接匯流排21(I2C)連接該待測試板開關模組10,該控制模組20控制該待測試板開關模組10。在本實施例中,該控制模組20的振盪頻率為24MHz,但本發明不以此為限制,其係依照設計者設計電路而有所改變。The control module 20 (Control board) is connected to the switch module 10 of the board under test through a control interface bus 21 (I2C), and the control module 20 controls the switch module 10 of the board under test. In this embodiment, the oscillation frequency of the control module 20 is 24 MHz, but the present invention is not limited to this, and it is changed according to the circuit designed by the designer.

該測試處理模組30(GUI-PC)係接收該測試板40測試出的加密結果資料32,該測試處理模組30以二序列埠匯流排31b、31c(圖未示)(USB2、3)各別連接該控制模組20及該第一訊號接口42c(MDIO0)(圖未示)。The test processing module 30 (GUI-PC) receives the encrypted result data 32 tested by the test board 40. The test processing module 30 uses two serial port buses 31b, 31c (not shown) (USB2, 3) The control module 20 and the first signal interface 42c (MDIO0) are respectively connected (not shown).

需進一步說明的是,該測試處理模組30傳送一控制訊號(USB訊號)給該控制模組20,該控制模組20轉換該控制訊號(USB訊號)為一序列控制訊號(I2C訊號),該控制模組20再傳送該序列控制訊號(I2C訊號)給該待測試板開關組10,並且控制該待測試板開關模組10的該等繼電器111a、111b切換訊號路徑,該測試板40回傳結果資料給該待測試板開關模組10,該待測試板開關10模組經由一序列回傳訊號(I2C回傳訊號)傳送該結果資料給該控制模組20,該控制模組20轉換該序列回傳訊號(I2C回傳訊號)為一回傳訊號(USB回傳訊號),並且經由該回傳訊號(USB回傳訊號)傳送該加密結果資料32給該測試處理模組30。It should be further explained that the test processing module 30 transmits a control signal (USB signal) to the control module 20, and the control module 20 converts the control signal (USB signal) into a serial control signal (I2C signal), The control module 20 then transmits the sequence control signal (I2C signal) to the switch group 10 of the board to be tested, and controls the relays 111a, 111b of the switch module 10 to switch the signal path, and the test board 40 returns The result data is transmitted to the switch module 10 of the board to be tested, and the switch 10 module of the board to be tested transmits the result data to the control module 20 via a serial return signal (I2C return signal), and the control module 20 converts The serial return signal (I2C return signal) is a return signal (USB return signal), and the encrypted result data 32 is transmitted to the test processing module 30 via the return signal (USB return signal).

請參閱圖2所示,圖2為本發明一較佳實施例的自動化電路板測試方法的流程圖。可進行以下步驟:Please refer to FIG. 2, which is a flowchart of an automated circuit board testing method according to a preferred embodiment of the present invention. The following steps can be performed:

首先,一設定步驟S1,該測試處理模組30透過該序列埠匯流排31c(USB3)連接該第一訊號接口42c(MDIO0),並且設定該中繼器41(Retimer)進入測試模式(圖未示);First, in a setting step S1, the test processing module 30 is connected to the first signal interface 42c (MDIO0) through the serial port bus 31c (USB3), and the repeater 41 (Retimer) is set to enter the test mode (not shown in the figure) Show);

接著,一發送測試訊號步驟S2,其係由該測試處理模組30發送該控制訊號(USB訊號)給該控制模組20;Then, a step S2 of sending a test signal, in which the test processing module 30 sends the control signal (USB signal) to the control module 20;

接著,一訊號路徑切換步驟S3,該待測試開關模組10接受到該序列控制訊號(I2C訊號),並且控制該等繼電器111a、111b切換路徑,接著該待測試開關模組10傳送該序列控制訊號(I2C訊號)給該測試板40;Then, a signal path switching step S3, the switch module under test 10 receives the sequence control signal (I2C signal) and controls the relays 111a, 111b to switch paths, and then the switch module under test 10 transmits the sequence control Signal (I2C signal) to the test board 40;

接著,一測試步驟S4,該測試板40接受到該序列控制訊號(I2C訊號),並在該測試板40中執行測試動作;Then, in a test step S4, the test board 40 receives the serial control signal (I2C signal), and performs a test action on the test board 40;

接著,一接收結果資料步驟S5,該待測試開關模組10接收到該結果資料,將該結果資料做封包動作並形成該加密結果資料32,接著經由該序列回傳訊號(I2C回傳訊號)傳送該結果資料給該控制模組20;Next, in a step S5 of receiving result data, the switch module under test 10 receives the result data, performs a packet operation on the result data to form the encrypted result data 32, and then returns a signal through the sequence (I2C return signal) Send the result data to the control module 20;

最後的,一儲存步驟S6,該測試處理模組30接收到該加密結果資料32,並將該加密結果資料32儲存在該測試處理模組30中。Finally, in a storage step S6, the test processing module 30 receives the encrypted result data 32 and stores the encrypted result data 32 in the test processing module 30.

為供進一步瞭解本發明構造特徵、運用技術手段及所預期達成之功效,茲將本發明使用方式加以敘述,相信當可由此而對本發明有更深入且具體瞭解。In order to further understand the structural features of the present invention, the technical means used and the expected effects, the use of the present invention is described, and it is believed that a deeper and specific understanding of the present invention can be obtained from this.

請參閱圖1及圖3所示,圖3為本發明一較佳實施例的自動化電路板測試系統的示意圖。本發明的待測試板開關模組10包含:至少二待測試板13a、13b(DUT)、至少一繼電器模組11(Relay board)及一軟件保護器12(Dongle),該等待測試板13a、13b分別連接該第二訊號接口42a(MDIO1)及該第三訊號接口42b(MDIO2),該等待測試板13a、13b各別連接該繼電器模組11,該繼電器模組11係以該控制介接匯流排21(I2C)連接該控制模組20,該軟件保護器12係以一軟件介接匯流排121(I2C)連接該繼電器模組11,該軟件保護器12加密該繼電器模組11回傳的資料。Please refer to FIG. 1 and FIG. 3. FIG. 3 is a schematic diagram of an automated circuit board testing system according to a preferred embodiment of the present invention. The board switch module 10 of the present invention includes: at least two boards to be tested 13a, 13b (DUT), at least one relay module 11 (Relay board), and a software protector 12 (Dongle). 13b is respectively connected to the second signal interface 42a (MDIO1) and the third signal interface 42b (MDIO2), the waiting test boards 13a, 13b are respectively connected to the relay module 11, and the relay module 11 is connected to the control interface The bus 21 (I2C) is connected to the control module 20, the software protector 12 is connected to the relay module 11 through a software interface bus 121 (I2C), and the software protector 12 encrypts the relay module 11 to send back data of.

需進一步說明的是,該序列埠匯流排數量為三條,該等序列埠匯流排31a、31b、31c(USB1~3)各別連接該第一訊號接口42c(MDIO0)、該控制模組20及該軟件保護器12,並且連接至該測試處理模組30。該待測試板13a、13b (DUT)的數量可依據使用者之需求設置為複數個,亦即本發明可測試多片的待測試板13a、13b。It should be further explained that the number of serial port buses is three, and the serial port buses 31a, 31b, 31c (USB1~3) are respectively connected to the first signal interface 42c (MDIO0), the control module 20 and The software protector 12 is connected to the test processing module 30. The number of the test boards 13a, 13b (DUT) can be set to a plurality according to the user's needs, that is, the present invention can test multiple test boards 13a, 13b.

請參閱圖4所示,圖4為本發明一較佳實施例的控制模組及繼電器模組連接示意圖。該繼電器模組11係以該序列控制訊號(I2C訊號)控制該繼電器模組11的一擴充晶片114(Expander IC)的輸出接腳,使該等繼電器111a、111b的開關達到訊號路徑切換。該擴充晶片114具有積體電路介接匯流排的介面(I2C介面)及複數個接腳(GPIO)。Please refer to FIG. 4, which is a schematic diagram of the connection between the control module and the relay module according to a preferred embodiment of the present invention. The relay module 11 uses the serial control signal (I2C signal) to control the output pins of an expansion chip 114 (Expander IC) of the relay module 11, so that the switches of the relays 111a and 111b achieve signal path switching. The expansion chip 114 has an IC interface (I2C interface) and a plurality of pins (GPIO).

如圖4所示,該控制模組20包含一控制電源晶片24,該控制電源晶片24係用以提供3.3V直流電壓給該控制模組20的微控制器22,該繼電器模組11包含一繼電器電源晶片112,該繼電器電源晶片112係用以提供3.3V直流電壓給該擴充晶片114。As shown in FIG. 4, the control module 20 includes a control power chip 24. The control power chip 24 is used to provide a 3.3V DC voltage to the microcontroller 22 of the control module 20. The relay module 11 includes a The relay power chip 112 is used to provide a 3.3V DC voltage to the expansion chip 114.

如圖4所示,該控制模組20藉由該序列埠匯流排31b提供5V直流電壓給該控制電源晶片24,該控制電源晶片24轉換成3.3V直流電壓給該控制模組20的微控制器22,該繼電器模組11還包含一電源供應件113,該電源供應件113提供5V直流電壓給該繼電器電源晶片112,該繼電器電源晶片112轉換3.3V直流電壓給該擴充晶片114。As shown in FIG. 4, the control module 20 provides a 5V DC voltage to the control power chip 24 through the serial port bus 31b, and the control power chip 24 converts a 3.3V DC voltage to the micro control of the control module 20 The relay module 11 further includes a power supply unit 113. The power supply unit 113 provides a 5V DC voltage to the relay power chip 112, and the relay power chip 112 converts a 3.3V DC voltage to the expansion chip 114.

請再繼續參閱圖5及圖6所示,圖5為本發明一較佳實施例的加密結果資料示意圖,圖6為本發明一較佳實施例的測試結果細項示意圖。該加密結果資料32包含:測試日期時間321、工單資訊322、測試站別323、測試流程324、測試項目325及測試結果326,其係分別儲存在該測試處理模組30中,其中,該測試結果326包括複數個測試結果細項3261。Please continue to refer to FIG. 5 and FIG. 6. FIG. 5 is a schematic diagram of the encrypted result data of a preferred embodiment of the present invention, and FIG. 6 is a schematic diagram of the test result details of a preferred embodiment of the present invention. The encrypted result data 32 includes: test date and time 321, work order information 322, test station type 323, test process 324, test item 325, and test result 326, which are stored in the test processing module 30 respectively, where the The test result 326 includes a plurality of test result details 3261.

如圖5所示,該測試項目中的Connect Test0至Connect Test2,其測試內容為各個模組及元件的連接狀況,進一步檢視該測試系統的環境設置。該測試流程係顯示各個測試項目的流程,並且條列式的顯示測試結果。As shown in Figure 5, Connect Test0 to Connect Test2 in the test project, the test content is the connection status of each module and component, and further examine the environmental settings of the test system. The test process is to display the process of each test item, and the test results are displayed in a list.

請參閱圖7所示,並搭配圖3及圖4所示,圖7為本發明一較佳實施例的自動化電路板測試方法的流程圖。本發明藉由上述自動化電路板測試系統100為運作核心基礎,並進行以下實際測試步驟:Please refer to FIG. 7 in conjunction with FIG. 3 and FIG. 4. FIG. 7 is a flowchart of an automated circuit board testing method according to a preferred embodiment of the present invention. The present invention uses the above-mentioned automated circuit board testing system 100 as the core basis of operation, and performs the following actual test steps:

首先,該設定步驟S1,如圖3所示,該測試處理模組30透過該序列埠匯流排31c(USB3)連接該第一訊號接口42c(MDIO0),並且設定該中繼器41(Retimer)進入測試模式。First, in the setting step S1, as shown in FIG. 3, the test processing module 30 connects to the first signal interface 42c (MDIO0) through the serial port bus 31c (USB3), and sets the repeater 41 (Retimer) Enter the test mode.

接著,該發送測試訊號步驟S2,如圖3所示,其係由該測試處理模組30發送該控制訊號(USB訊號)給該控制模組20,在本實施例中,該測試處理模組30透過該序列埠匯流排31b(USB2)下達指令給該控制模組20;Next, the sending test signal step S2, as shown in FIG. 3, is that the test processing module 30 sends the control signal (USB signal) to the control module 20. In this embodiment, the test processing module 30 issues commands to the control module 20 through the serial port bus 31b (USB2);

繼而,一轉換訊號步驟S21,如圖3所示,該控制模組20接收到該控制訊號(USB訊號),將該控制訊號(USB訊號)傳送至該控制模組20的微控制器22(MCU)並且轉換該控制訊號(USB訊號)為該序列控制訊號(I2C訊號)。Then, a signal conversion step S21, as shown in FIG. 3, the control module 20 receives the control signal (USB signal), and transmits the control signal (USB signal) to the microcontroller 22 of the control module 20 ( MCU) and convert the control signal (USB signal) into the serial control signal (I2C signal).

於本實施例中,該微控制器22可以為可程式邏輯閘陣列(Field Programmable Gate Array,FPGA)、中央處理器(Central Processing Unit,CPU)。In this embodiment, the microcontroller 22 may be a Field Programmable Gate Array (FPGA) or a Central Processing Unit (CPU).

此時,一資料比對步驟S22,如圖4所示,將該序列控制訊號傳送至一記憶體23(EEPROM)中,並且在該記憶體23中執行資料比對,再將該序列控制訊號(I2C訊號)回傳到該微控制器22中,該微控制器22傳送該序列控制訊號(I2C訊號)至該繼電器模組11中。At this time, a data comparison step S22, as shown in FIG. 4, transmits the sequence control signal to a memory 23 (EEPROM), and performs data comparison in the memory 23, and then the sequence control signal (I2C signal) is sent back to the microcontroller 22, and the microcontroller 22 sends the sequence control signal (I2C signal) to the relay module 11.

於資料比對步驟S22中需進一步說明的是,該記憶體23可以為可程式化唯讀記憶體(Programmable Read-Only Memory,PROM)、可擦可程式化唯讀記憶體(Erasable Programmable Read-Only Memory,EPROM)、快閃記憶體(Flash Memory)等非揮發性記憶體(Non-Volatile Memory),或者是可以為動態隨機存取記憶體(Dynamic Rand Access Memory,DRAM)、靜態隨機存取記憶體(Static Rand Access Memory,SRAM)等揮發性記憶體(Volatile Memory)。It should be further explained in the data comparison step S22 that the memory 23 can be Programmable Read-Only Memory (PROM) or Erasable Programmable Read-Only Memory (Erasable Programmable Read-Only Memory). Only Memory (EPROM), Flash Memory (Flash Memory) and other non-volatile memory (Non-Volatile Memory), or it can be dynamic random access memory (Dynamic Rand Access Memory, DRAM), static random access Volatile Memory such as Static Rand Access Memory (SRAM).

接著,該訊號路徑切換步驟S3,如圖3及圖4所示,該繼電器模組11接受到該序列控制訊號(I2C訊號),並且控制該等繼電器111a、111b切換路徑,接著該繼電器模組11傳送該序列控制訊號(I2C訊號)給該測試板40,在本實施例中,該繼電器模組11切換該等繼電器111a、111b使該軟件保護器12連接至該第二訊號接口42a(MDIO1)。Then, the signal path switching step S3, as shown in FIGS. 3 and 4, the relay module 11 receives the sequence control signal (I2C signal) and controls the relays 111a, 111b to switch paths, and then the relay module 11 transmits the sequence control signal (I2C signal) to the test board 40. In this embodiment, the relay module 11 switches the relays 111a and 111b so that the software protector 12 is connected to the second signal interface 42a (MDIO1 ).

接著,該測試步驟S4,該測試板40接受到該序列控制訊號(I2C訊號),並在該測試板40中執行測試動作,在本實施例中,如圖3所示,該測試處理模組30透過該序列埠匯流排31a(USB1)經過該軟件保護器12對該第二訊號接口42a(MDIO1)的該待測試板13a(DUT)進行測試。Then, in the test step S4, the test board 40 receives the sequence control signal (I2C signal) and executes the test action in the test board 40. In this embodiment, as shown in FIG. 3, the test processing module 30 through the serial port bus 31a (USB1) through the software protector 12 to test the board under test 13a (DUT) of the second signal interface 42a (MDIO1).

接著,該接收結果資料步驟S5,該繼電器模組11接收到該結果資料,接著經由該序列回傳訊號(I2C回傳訊號)傳送該結果資料給該軟件保護器12,在本實施例中,如圖3所示,該繼電器模組11切換該等繼電器111a、111b使該軟件保護器12連接至該第二訊號接口42a(MDIO1)。Then, the receiving result data step S5, the relay module 11 receives the result data, and then transmits the result data to the software protector 12 via the serial return signal (I2C return signal). In this embodiment, As shown in FIG. 3, the relay module 11 switches the relays 111a and 111b to connect the software protector 12 to the second signal interface 42a (MDIO1).

繼而,一封包步驟S51,如圖3所示,該軟件保護器12接收到該結果資料,將該結果資料做封包動作並形成該加密結果資料32,再將該序列回傳訊號(I2C回傳訊號)轉換成該回傳訊號(USB回傳訊號),接著經由該回傳訊號(USB回傳訊號)傳送該加密結果資料32給該測試處理模組30。Then, a packet step S51, as shown in FIG. 3, the software protector 12 receives the result data, performs a packet action on the result data to form the encrypted result data 32, and then sends the sequence back to the signal (I2C return Signal) is converted into the return signal (USB return signal), and then the encrypted result data 32 is transmitted to the test processing module 30 via the return signal (USB return signal).

最後的,該儲存步驟S6,該測試處理模組30接收到該加密結果資料32,並將該加密結果資料32儲存在該測試處理模組30中。Finally, in the storing step S6, the test processing module 30 receives the encrypted result data 32 and stores the encrypted result data 32 in the test processing module 30.

承接上述,該等步驟是以該第二訊號接口42a(MDIO1)的設定、傳送指令、切換訊號、測試及回傳資料為例的執行步驟,若為該第二訊號接口42a(MDIO1)及該第三訊號接口42b(MDIO2)同時測試時,其係重複執行上述等步驟,不同特徵在於,該繼電器模組11切換訊號路徑,使該軟件保護器12連接該第二訊號接口42a(MDIO1)或第三訊號接口42b(MDIO2),並下達測試指令或回傳該加密結果資料32。Continuing the above, the steps are the execution steps of the second signal interface 42a (MDIO1) setting, sending instructions, switching signals, testing and returning data as an example. If the second signal interface 42a (MDIO1) and the When the third signal interface 42b (MDIO2) is tested at the same time, the above steps are repeated. The difference is that the relay module 11 switches the signal path so that the software protector 12 is connected to the second signal interface 42a (MDIO1) or The third signal interface 42b (MDIO2) issues a test command or returns the encrypted result data 32.

在另一實施例中,包含五個該訊號接口(MDIO1至MDIO5),並且連接五個該待測試板,該訊號路徑切換步驟S3需要重複五次,而該接收結果資料步驟S5也需要重複五次,依照該訊號接口的數量對應該訊號線43的款式,而該訊號路徑切換步驟S3及該接收結果資料步驟S5也隨著該訊號接口的數量變更執行次數。In another embodiment, five of the signal interfaces (MDIO1 to MDIO5) are included and five boards to be tested are connected. The signal path switching step S3 needs to be repeated five times, and the receiving result data step S5 also needs to be repeated five times. Secondly, according to the number of the signal interface corresponding to the style of the signal line 43, the signal path switching step S3 and the receiving result data step S5 also change the number of executions according to the number of the signal interface.

茲,再將本發明之特徵及其可達成之預期功效陳述如下:Hereby, the characteristics of the present invention and the expected effects that can be achieved are stated as follows:

本發明之自動化電路板測試系統及其方法,主要係藉由自動化電路板測試系統及自動化電路板測試方法,可進一步得知該待測試板開關模組10於運作狀態時,可以快速地切換該等繼電器111a、111b達到切換訊號路徑,並且連接該等待測試板13a、13b,使在整個測試的過程中,不需要人工拔換該訊號線43或是更換該等待測試板13a、13b,全程自動化,並且減少測試時間。The automated circuit board testing system and method of the present invention mainly use the automated circuit board testing system and the automated circuit board testing method to further know that the switch module 10 of the board to be tested can quickly switch the Wait for the relays 111a, 111b to reach the switching signal path, and connect the waiting test boards 13a, 13b, so that during the entire test process, there is no need to manually replace the signal line 43 or replace the waiting test boards 13a, 13b, and the whole process is automated , And reduce test time.

藉此,本發明係具有以下實施功效及技術功效:Therefore, the present invention has the following implementation effects and technical effects:

其一,本發明透過切換該待測試板開關模組10上的該等繼電器111a、111b,使該測試系統100達到切換訊號路徑,不需要人工拔換該訊號線43或是更換該等待測試板13a、13b,並且減少人力資源。First, the present invention enables the test system 100 to reach the switching signal path by switching the relays 111a, 111b on the switch module 10 of the board to be tested, without the need to manually change the signal line 43 or replace the test board. 13a, 13b, and reduce human resources.

其二,本發明透過該測試處理模組30儲存該加密結果資料32,使該測試系統100不需要人工記錄整個結果資料,防止記錄人員記錄錯誤,達到減少測試結果的錯誤率。Second, the present invention stores the encrypted result data 32 through the test processing module 30, so that the test system 100 does not need to manually record the entire result data, preventing recorders from recording errors, and reducing the error rate of test results.

其三,本發明透過該測試處理模組30解析該加密結果資料32,並且將解析後的該加密結果資料32顯示在該使用者介面上,供測試人員觀看測試結果,不需要工程師背景的人員判斷,使該測試系統100達到即時顯示數據,減少測試時間及減少人力成本。Third, the present invention parses the encrypted result data 32 through the test processing module 30, and displays the parsed encrypted result data 32 on the user interface for testers to view the test results, and does not require personnel with an engineer background Judging, the test system 100 can display data in real time, reducing test time and labor cost.

其四,本發明實施例之自動化電路板測試系統及其方法可以縮短整個測試時間,總測試時間可縮短至150秒,進一步的簡化操作流程,十分具有實用性。Fourth, the automated circuit board test system and method of the embodiment of the present invention can shorten the entire test time, and the total test time can be shortened to 150 seconds, which further simplifies the operation process and is very practical.

藉由特定的具體實施例說明本發明之實施方式,熟悉此技術之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。本發明亦可藉由其他不同的具體實例加以施行或應用,本發明說明書中的各項細節亦可基於不同觀點與應用在不悖離本發明之精神下進行各種修飾與變更。Specific examples are used to illustrate the implementation of the present invention, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific examples, and various details in the specification of the present invention can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention.

須知,本說明書所附圖式繪示之結構、比例、大小、元件數量等,均僅用以配合說明書所揭示之內容,以供熟悉此技術之人士瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小調整,在不影響本發明所能產生之功效及所能達成之目的下,均應落在本發明所揭示之技術內容得能涵蓋之範圍內。It should be noted that the structure, ratio, size, number of components, etc. shown in the accompanying drawings in this specification are only used to match the content disclosed in the specification for the understanding and reading of those familiar with this technology, and are not intended to limit the scope of the present invention. The limited conditions of implementation do not have any technical significance. Any structural modification, proportional relationship change, or size adjustment should fall within the present invention without affecting the effects and objectives that can be achieved by the present invention. The technical content disclosed must be within the scope.

100:自動化電路板測試系統 10:待測試板開關模組 11:繼電器模組 111a、111b:繼電器 112:繼電器電源晶片 113:電源供應件 114:擴充晶片 12:軟件保護器 121:軟件介接匯流排 13a、13b:待測試板 20:控制模組 21:控制介接匯流排 22:微控制器 23:記憶體 24:控制電源晶片 30:測試處理模組 31a、31b、31c:序列埠匯流排 32:加密結果資料 321:測試日期時間 322:工單資訊 323:測試站別 324:測試流程 325:測試項目 326:測試結果 3261:測試結果細項 40:測試板 41:中繼器 42a:第二訊號接口 42b:第三訊號接口 42c:第一訊號接口 43:訊號線 S1:設定步驟 S2:發送訊號步驟 S21:轉換訊號步驟 S22:資料比對步驟 S3:訊號路徑切換步驟 S4:測試步驟 S5:接收結果資料步驟 S51:封包步驟 S6:儲存步驟 100: Automated circuit board test system 10: Switch module of the board to be tested 11: Relay module 111a, 111b: Relay 112: Relay power chip 113: power supply 114: Expansion chip 12: Software protector 121: software interface bus 13a, 13b: boards to be tested 20: Control module 21: Control interface bus 22: Microcontroller 23: Memory 24: control power chip 30: Test processing module 31a, 31b, 31c: serial port bus 32: Encrypted result data 321: Test date and time 322: Ticket Information 323: test station 324: Test Process 325: test item 326: test result 3261: Test result details 40: test board 41: Repeater 42a: The second signal interface 42b: third signal interface 42c: The first signal interface 43: signal line S1: Setting steps S2: Steps to send signal S21: Conversion signal steps S22: Data comparison steps S3: Signal path switching steps S4: Test steps S5: Steps for receiving result data S51: Packet Step S6: Storage steps

圖1為本發明一較佳實施例的自動化電路板測試系統的示意圖。 圖2為本發明一較佳實施例的自動化電路板測試方法的流程圖。 圖3為本發明一較佳實施例的自動化電路板測試系統的示意圖。 圖4為本發明一較佳實施例的控制模組及繼電器模組連接示意圖。 圖5為本發明一較佳實施例的加密結果資料示意圖。 圖6為本發明一較佳實施例的測試結果細項示意圖。 圖7為本發明一較佳實施例的自動化電路板測試方法的流程圖。 FIG. 1 is a schematic diagram of an automated circuit board testing system according to a preferred embodiment of the present invention. Fig. 2 is a flowchart of an automated circuit board testing method according to a preferred embodiment of the present invention. FIG. 3 is a schematic diagram of an automated circuit board testing system according to a preferred embodiment of the present invention. 4 is a schematic diagram of the connection between the control module and the relay module according to a preferred embodiment of the present invention. FIG. 5 is a schematic diagram of encrypted result data according to a preferred embodiment of the present invention. FIG. 6 is a schematic diagram of the test results of a preferred embodiment of the present invention. FIG. 7 is a flowchart of an automated circuit board testing method according to a preferred embodiment of the present invention.

100:自動化電路板測試系統 100: Automated circuit board test system

10:待測試板開關模組 10: Switch module of the board to be tested

20:控制模組 20: Control module

21:控制介接匯流排 21: Control interface bus

30:測試處理模組 30: Test processing module

31b:序列埠匯流排 31b: Serial port bus

Claims (9)

一種自動化電路板測試系統,其係包含:至少一待測試板開關模組,該待測試開關模組係連接一測試板,該測試板包含:一第一訊號接口、一第二訊號接口、一第三訊號接口及一中繼器,該第二訊號接口及該第三訊號接口以一訊號線互相連接,該第一訊號接口連接該中繼器,該待測試板開關模組分別連接該第二訊號接口及該第三訊號接口,該待測試板開關模組係包含複數個繼電器;一控制模組,其係以一控制介接匯流排連接該待測試板開關模組,該控制模組控制該待測試板開關模組;以及一測試處理模組,其係接收該測試板測試出的加密結果資料,該測試處理模組以至少二序列埠匯流排各別連接該控制模組及該第一訊號接口;其中,該待測試板開關模組包含:至少二待測試板、至少一繼電器模組及一軟件保護器,該等待測試板分別連接該第二訊號接口及該第三訊號接口,該等待測試板各別連接該繼電器模組,該繼電器模組係以該控制介接匯流排連接該控制模組,該軟件保護器係以一軟件介接匯流排連接該繼電器模組,該軟件保護器加密該繼電器模組回傳的資料,該序列埠匯流排數量為三條,該等序列埠匯流排各別連接該第一訊號接口、該控制模組及該軟件保護器,並且連接至該測試處理模組; 其中,該測試處理模組傳送一控制訊號給該控制模組,該控制模組轉換該控制訊號為一序列控制訊號,該控制模組再傳送該序列控制訊號給該待測試板開關組,並且控制該待測試板開關模組的繼電器切換訊號路徑,該測試板回傳結果資料給該待測試板開關模組,該待測試板開關模組經由一序列回傳訊號傳送該結果資料給控制模組,該控制模組轉換該序列回傳訊號為一回傳訊號,並且經由該回傳訊號傳送該加密結果資料給該測試處理模組。 An automated circuit board testing system, comprising: at least one switch module to be tested, the switch module to be tested is connected to a test board, the test board includes: a first signal interface, a second signal interface, a The third signal interface and a repeater, the second signal interface and the third signal interface are connected to each other by a signal line, the first signal interface is connected to the repeater, and the switch module of the board to be tested is connected to the first The second signal interface and the third signal interface, the switch module of the board to be tested includes a plurality of relays; a control module, which is connected to the switch module of the board to be tested by a control interface bus, the control module Control the switch module of the board to be tested; and a test processing module, which receives the encrypted result data tested by the test board, and the test processing module connects the control module and the control module with at least two serial port buses respectively The first signal interface; wherein the switch module of the board to be tested includes: at least two boards to be tested, at least one relay module, and a software protector, and the test board is connected to the second signal interface and the third signal interface, respectively , The waiting test board is individually connected to the relay module, the relay module is connected to the control module by the control interface bus, the software protector is connected to the relay module by a software interface bus, the The software protector encrypts the data returned by the relay module. The number of serial port buses is three. The serial port buses are respectively connected to the first signal interface, the control module and the software protector, and are connected to The test processing module; Wherein, the test processing module transmits a control signal to the control module, the control module converts the control signal into a serial control signal, and the control module transmits the serial control signal to the switch group of the board to be tested, and Control the relay switching signal path of the switch module of the board to be tested, the test board returns result data to the switch module of the board to be tested, and the switch module of the board to be tested transmits the result data to the control module via a sequence of return signals Group, the control module converts the serial return signal into a return signal, and transmits the encrypted result data to the test processing module through the return signal. 如申請專利範圍第1項所述的自動化電路板測試系統,其中,該繼電器模組係以該序列控制訊號控制該繼電器模組的一擴充晶片的輸出接腳,使該等繼電器的開關達到訊號路徑切換。 For example, the automated circuit board test system described in the first item of the scope of patent application, wherein the relay module uses the sequence control signal to control the output pin of an expansion chip of the relay module, so that the switching of the relays reaches the signal Path switching. 如申請專利範圍第1項所述的自動化電路板測試系統,其中,該加密結果資料包含:測試日期時間、工單資訊、測試站別、測試流程、測試項目及測試結果,該加密結果資料係儲存在該測試處理模組中。 For example, the automated circuit board test system described in item 1 of the scope of patent application, wherein the encrypted result data includes: test date and time, work order information, test station, test process, test items, and test results. The encrypted result data is Stored in the test processing module. 如申請專利範圍第3項所述的自動化電路板測試系統,其中,該測試結果包括複數個測試結果細項。 The automated circuit board testing system described in item 3 of the scope of patent application, wherein the test result includes a plurality of test result details. 如申請專利範圍第1項所述的自動化電路板測試系統,其中,該控制模組的振盪頻率為24MHz。 The automated circuit board test system described in item 1 of the scope of patent application, wherein the oscillation frequency of the control module is 24 MHz. 如申請專利範圍第2項所述的自動化電路板測試系統,其中,該控制模組包含一控制電源晶片,該控制電源晶片係提供3.3V 直流電壓給該控制模組的微控制器,該繼電器模組包含一繼電器電源晶片,該繼電器電源晶片係提供3.3V直流電壓給該擴充晶片。 The automated circuit board testing system described in item 2 of the scope of patent application, wherein the control module includes a control power chip, and the control power chip provides 3.3V The DC voltage is applied to the microcontroller of the control module, the relay module includes a relay power chip, and the relay power chip provides a 3.3V DC voltage to the expansion chip. 如申請專利範圍第2項所述的自動化電路板測試系統,其中,該擴充晶片具有積體電路介接匯流排的介面及複數個接腳。 According to the automatic circuit board testing system described in item 2 of the scope of patent application, the expansion chip has an interface for an integrated circuit to interface with a bus and a plurality of pins. 如申請專利範圍第1項所述的自動化電路板測試系統,其中,該測試系統的總測試時間介於0~200秒之間。 The automated circuit board test system described in item 1 of the scope of patent application, wherein the total test time of the test system is between 0 and 200 seconds. 一種自動化電路板測試系統的測試方法,包括下列步驟:一設定步驟,該測試處理模組透過該第一訊號接口設定該中繼器進入測試模式;一發送測試訊號步驟,其係由該測試處理模組發送該控制訊號給該控制模組;一轉換訊號步驟,該控制模組接收到該控制訊號,將該控制訊號傳送至該控制模組的微控制器並且轉換該控制訊號為該序列控制訊號;一資料比對步驟,將該序列控制訊號傳送至一記憶體中,並且在該記憶體中執行資料比對,再將該序列控制訊號回傳到該控制晶片中,該控制晶片傳送該序列控制訊號至該繼電器模組中;一訊號路徑切換步驟,該繼電器模組接受到該序列控制訊號,並且控制該等繼電器切換路徑,接著該繼電器模組傳送該序列控制訊號給該測試板;一測試步驟,該測試板接受到該序列控制訊號,並在該測試板中執行測試動作; 一接收結果資料步驟,該繼電器模組接收到該結果資料,接著經由該序列回傳訊號傳送該結果資料給軟件保護器;一封包步驟,該軟件保護器接收到該結果資料,將該結果資料做封包動作並形成該加密結果資料,再將該序列回傳訊號轉換成該回傳訊號,接著經由該回傳訊號傳送該加密結果資料給該測試處理模組;以及一儲存步驟,該測試處理模組接收到該加密結果資料,並將該加密結果資料儲存在該測試處理模組中。 A test method for an automated circuit board test system includes the following steps: a setting step, the test processing module sets the repeater to enter the test mode through the first signal interface; a sending test signal step, which is processed by the test The module sends the control signal to the control module; in a signal conversion step, the control module receives the control signal, transmits the control signal to the microcontroller of the control module, and converts the control signal to the serial control Signal; a data comparison step, the sequence control signal is sent to a memory, and the data comparison is performed in the memory, and then the sequence control signal is returned to the control chip, and the control chip sends the The sequence control signal is sent to the relay module; a signal path switching step, the relay module receives the sequence control signal and controls the relay switching paths, and then the relay module transmits the sequence control signal to the test board; In a test step, the test board receives the sequence control signal and executes a test action on the test board; In a step of receiving result data, the relay module receives the result data, and then transmits the result data to the software protector via the serial return signal; in a packet step, the software protector receives the result data, and the result data Perform a packet action to form the encrypted result data, then convert the sequence of return signals into the return signal, and then send the encrypted result data to the test processing module via the return signal; and a storage step, the test processing The module receives the encryption result data and stores the encryption result data in the test processing module.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040193990A1 (en) * 2003-03-31 2004-09-30 Seiji Ichiyoshi Test apparatus and test method
TW200525130A (en) * 2003-11-26 2005-08-01 Advantest Corp Testing apparatus
TW200643433A (en) * 2005-01-31 2006-12-16 Formfactor Inc Programmable devices to route signals on probe cards
TW200807427A (en) * 2006-06-13 2008-02-01 Formfactor Inc Method of designing an application specific probe card test system
TW201350886A (en) * 2012-06-04 2013-12-16 Advantest Corp Test program

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040193990A1 (en) * 2003-03-31 2004-09-30 Seiji Ichiyoshi Test apparatus and test method
US20040255216A1 (en) * 2003-03-31 2004-12-16 Seiji Ichiyoshi Test apparatus and test method
TW200525130A (en) * 2003-11-26 2005-08-01 Advantest Corp Testing apparatus
TW200643433A (en) * 2005-01-31 2006-12-16 Formfactor Inc Programmable devices to route signals on probe cards
TW200807427A (en) * 2006-06-13 2008-02-01 Formfactor Inc Method of designing an application specific probe card test system
TW201350886A (en) * 2012-06-04 2013-12-16 Advantest Corp Test program

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