TWI632835B - Circuit board structure and manufacturing method thereof - Google Patents

Abstract

A circuit board structure comprising a substrate, a line, and a separate metal pad. The substrate includes a first plate surface and a second plate surface on opposite sides. The circuit and the independent metal pad are disposed on the first board surface of the substrate, and the independent metal pads are spaced apart from the line and electrically isolated from each other. The independent metal pad includes a joint portion disposed on the first plate surface and a hard gold layer formed on the joint portion. Thereby, the present invention provides a circuit board structure having a separate metal pad. In addition, the present invention further provides a method of fabricating a circuit board structure.

Description

Circuit board structure and manufacturing method thereof

The present invention relates to a circuit board, and more particularly to a circuit board having a separate metal pad and a method of fabricating the same.

The existing circuit board structure generally follows the steps shown in FIG. 1 to FIG. 3 when forming a gold finger, as described below. As shown in FIG. 1, a metal layer 2a is formed on a substrate 1a, and the metal layer 2a includes a gold-plated region 21a and a non-gold-plated region 22a, and the non-gold-plated regions 22a on both sides of the gold-plated region 21a are covered with a solder resist layer 3a. . As shown in Fig. 2, a gold layer 4a is formed on the gold-plated region 21a of the metal layer 2a, and the gold layer 4a includes a functional block 41a and an ineffective block 42a. As shown in FIG. 3, the partial inactive block 42a and the non-gold plated area 22a on the upper side of the functional block 41a are removed.

According to the above, the existing circuit board structure 100a is left on the opposite sides of the functional block 41a of the gold layer 4a, and there are also connected ineffective blocks 42a (as shown in FIG. 3), and the existing circuit board structure 100a is in FIG. It is also necessary to remove the blocks that have been completely plated in the step. Therefore, the existing circuit board structure 100a apparently generates a lot of unnecessary precious metal (e.g., gold) waste.

Accordingly, the inventors believe that the above-mentioned defects can be improved, and that the invention has been studied with great interest and with the use of scientific principles, and finally proposes a present invention which is rational in design and effective in improving the above-mentioned defects.

The embodiment of the invention discloses a circuit board structure and a manufacturing method thereof for effectively improving the defects that may occur in the existing circuit board structure.

The embodiment of the invention discloses a circuit board structure, comprising: a substrate comprising a first board surface and a second board surface on opposite sides; a line disposed on the first board surface of the substrate; a separate metal pad disposed on the first board surface of the substrate, the independent metal pad being spaced apart from the line and electrically isolated from each other; wherein the independent metal pad includes a first metal pad a joint portion of a plate surface and a hard gold layer formed on the joint portion.

Preferably, the joint portion includes a copper layer disposed on the first plate surface and a nickel layer connecting the copper layer and the hard gold layer, the copper layer having the same height as the line .

Preferably, the sidewall of the copper layer is not covered by the hard gold layer, and the width of the copper layer is gradually reduced from adjacent to the first board surface away from the first board surface.

Preferably, an outer portion of the hard gold layer protrudes from the copper layer.

Preferably, the circuit board structure further includes a solder resist layer disposed on the first board surface, the solder resist layer surrounding the outer side of the independent metal pad, and the line is at least partially embedded in the a solder resist layer, and the separate metal pads are not in contact with the solder resist layer.

Preferably, the height of the hard gold layer compared to the first plate surface is not less than the height of the solder resist layer compared to the first plate surface.

The embodiment of the invention also discloses a method for manufacturing a circuit board structure, comprising: providing a substrate and a conductive layer disposed on the substrate; wherein the substrate comprises a first plate surface and a second surface on opposite sides a plate surface, the conductive layer is disposed on the first plate surface; a bonding layer and a hard gold layer disposed on the bonding layer are formed on a predetermined block of the conductive layer; The conductive layer is etched into the predetermined block and a line separated from the predetermined block; wherein the predetermined block, the bonding layer, and the hard gold layer are collectively referred to as a separate metal pad.

Preferably, a patterned layer is disposed on the conductive layer; wherein the patterned layer has a pattern hole to expose the predetermined block of the conductive layer; the predetermined block in the graphic hole Forming the bonding layer and the hard gold layer sequentially, and The pattern layer is then removed.

Preferably, a shielding layer is formed on a predetermined line block of the hard gold layer and the conductive layer, and the conductive layer portion not covered by the shielding layer is etched to form the conductive layer The predetermined block and the line are removed, and then the shielding layer is removed.

Preferably, the circuit board manufacturing method further comprises: forming a solder resist layer on the first board surface, and surrounding the solder resist layer around the independent metal pad and embedding at least part of the line Within it.

In summary, the circuit board structure and the manufacturing method thereof disclosed in the embodiments of the present invention can form a separate metal pad without removing any hard gold layer, and the independent metal pad does not connect any invalid blocks to avoid The board structure creates unnecessary waste of precious metals (eg gold).

Moreover, since the circuit board structure of the embodiment does not need to be a non-gold plating area as a guide for the gold plating area as in the process of forming the independent metal pad, the circuit board structure of the embodiment can be on the substrate. Separate metal pads are formed at any position, so that the shape, size, position, and density of the independent metal pads on the substrate are not limited, thereby effectively promoting the development of the circuit board structure.

For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying claims limit.

[Prior technology]

100a‧‧‧ Existing board structure

1a‧‧‧Substrate

2a‧‧‧metal layer

21a‧‧‧Gold-plated area

22a‧‧‧Non-plated area

3a‧‧‧ solder mask

4a‧‧‧ gold layer

41a‧‧‧ functional block

42a‧‧‧ Invalid block

[Embodiment of the Invention]

100‧‧‧Circuit board structure

1‧‧‧Substrate

11‧‧‧ first board

12‧‧‧ second board

13‧‧‧Tongkong

2’‧‧‧ Scheduled Line Blocks

2‧‧‧ lines

3‧‧‧Independent metal mat

31’‧‧‧Predetermined block

31‧‧‧ copper layer

32‧‧‧ Bonding layer (nickel layer)

33‧‧‧ hard gold layer

34‧‧‧ joints

4‧‧‧ solder mask

41‧‧‧Opening

10‧‧‧ Conductive layer

20‧‧‧pattern layer

201‧‧‧graphic hole

30‧‧‧Shielding layer

H1, H2‧‧‧ height

FIG. 1 is a manufacturing step (1) of a conventional circuit board structure.

2 is a manufacturing step (2) of a conventional circuit board structure.

FIG. 3 is a manufacturing step (3) of the conventional circuit board structure.

4A is a schematic diagram of step S110 of the method for fabricating a circuit board structure of the present invention.

4B is a cross-sectional view of FIG. 4A taken along line IVB-IVB.

FIG. 5A is a schematic diagram of steps S120 and S130 of the method for manufacturing a circuit board structure according to the present invention.

Figure 5B is a cross-sectional view taken along line VB-VB of Figure 5A.

FIG. 6A is a schematic diagram of step S140 of the method for fabricating a circuit board structure according to the present invention.

Figure 6B is a cross-sectional view taken along line VIB-VIB of Figure 6A.

FIG. 7A is a schematic diagram of step S150 of the method for fabricating a circuit board structure according to the present invention.

Figure 7B is a cross-sectional view taken along line VIIB-VIIB of Figure 7A.

FIG. 8A is a schematic diagram of step S160 of the method for fabricating a circuit board structure according to the present invention.

Figure 8B is a cross-sectional view taken along line VIIIB-VIIIB of Figure 8A.

Fig. 8C is a partially enlarged schematic view showing the portion VIIIC of Fig. 8B.

Please refer to FIG. 4A to FIG. 8C, which are the embodiments of the present invention. It should be noted that the related embodiments and the appearances mentioned in the drawings are only used to specifically describe the embodiments of the present invention. It is to be understood that the scope of the invention is not intended to limit the scope of the invention.

The embodiment provides a circuit board structure 100 and a manufacturing method thereof. The circuit board structure 100 is applied to a server or a semiconductor test, for example, but the invention is not limited thereto. Furthermore, in order to facilitate the understanding of the present embodiment, various steps of the circuit board structure manufacturing method (for example, steps S110 to S160) will be briefly described below, and then the structural features of the circuit board structure 100 will be described later. In the description of the various steps of the method of manufacturing the circuit board structure, the drawings are only illustrated by local blocks, which are not intended to limit the scope and implementation scope of the present invention.

Step S110: Referring to FIG. 4A and FIG. 4B, a substrate 1 and a conductive layer 10 disposed on the substrate 1 are provided. The substrate 1 includes a first board surface 11 on the opposite side (such as the top surface of the substrate 1 in FIG. 4B) and a second board surface 12 (such as the bottom surface of the substrate 1 in FIG. 4B), and the The conductive layer 10 is provided on the first plate surface 11 of the substrate 1 described above.

Further, the conductive layer 10 of the present embodiment is formed by copper plating. The entire first plate surface 11 of the substrate, but the invention is not limited thereto. For example, in an embodiment not shown, the conductive layer 10 may also be formed on the first board surface 11 of the substrate 1 by a copper foil pressing method.

Furthermore, the substrate 1 of the present embodiment may be formed with a plurality of through holes 13 penetrating from the first plate surface 11 to the second plate surface 12, and connected to the through holes 13 in the through holes 13 A conductive material (not shown) of the conductive layer 10, but the invention is not limited thereto.

Step S120: Referring to FIG. 5A and FIG. 5B, a patterned layer 20 is disposed on the conductive layer 10. The pattern layer 20 has a pattern hole 201 to expose a predetermined block 31' of the conductive layer 10.

Further, the pattern layer 20 of the present embodiment has a dry film attached to the conductive layer 10, and then the dry film is formed into a pattern hole 201 having a specific shape by exposure and development, so that the pattern hole 201 can be exposed to the designer. A predetermined block 31' of a particular shape is desired. Among them, in the forming process of the pattern layer 20, the preferable environmental conditions are a temperature of 20 ° C to 24 ° C and a humidity of 50% to 60%. Therefore, the step S120 employed in the embodiment can realize the predetermined block 31' of various shapes according to the different needs of the designer, thereby jumping away from the long strip limit of the conventional gold finger.

Step S130: Referring to FIG. 5A and FIG. 5B, a bonding layer 32 and a hard gold layer 33 are sequentially formed on the predetermined block 31' in the pattern hole 201, and further, The bonding layer 32 and the hard gold layer 33 disposed on the bonding layer 32 are deposited on the predetermined block 31' of the conductive layer 10 by, for example, electroplating; and then the pattern layer 20 is removed.

In this embodiment, the bonding layer 32 and the hard gold layer 33 substantially fill the pattern hole 201, that is, the outer surface of the hard gold layer 33 is substantially flush with the outer surface of the pattern layer 20, but The invention is not limited thereto.

Furthermore, it is difficult to be between the hard gold layer 33 and the conductive layer 10 made of copper. The bonding is firmly performed, so in the present embodiment, the hard gold layer 33 can be firmly attached to the conductive layer 10 by the bonding layer 32. In more detail, the bonding layer 32 of the present embodiment is a nickel layer 32, and the nickel layer 32 can be bonded to the hard gold layer 33 and the copper-clad conductive layer 10, respectively.

Step S140: Referring to FIG. 6A and FIG. 6B, a masking layer 30 is formed on the hard gold layer 33 and a predetermined line block 2' of the conductive layer 10. That is, the designer can cover the predetermined line block 2' of the conductive layer 10 through the masking layer 30 of the specific pattern to form the desired line pattern. The predetermined line block 2 ′ and the predetermined block block ′′ are two locations separated from each other in the conductive layer 10 , and the predetermined line block 2 ′ of the embodiment may be disposed on the substrate 1 and provided with the through hole 13 . On the part, but not limited to this.

Further, the shielding layer 30 of the present embodiment is first attached with a dry film on the hard gold layer 33 and the conductive layer 10, and then the dry film on the conductive layer 10 is formed into a shielding layer 30 having a specific shape by exposure and development. Thereby, the shielding layer 30 can cover a predetermined line block 2' of a specific shape required by the designer. Among them, in the forming process of the shielding layer 30, the preferable environmental conditions are a temperature of 20 ° C to 24 ° C and a humidity of 50% to 60%. Therefore, the step S140 employed in the embodiment can realize the predetermined line block 2' of various shapes according to different needs of the designer.

Step S150: Referring to FIG. 7A and FIG. 7B, the conductive layer 10 is formed by etching the portion of the conductive layer 10 covered by the unmasked layer 30 to form (or leave) the copper layer 31 (ie, a predetermined block). 31') and at least one line 2 (i.e., predetermined line block 2'), and then the masking layer 30 is removed. That is, the conductive layer 10 is etched into a copper layer 31 and at least one line 2 separated from the copper layer 31. The copper layer 31 (i.e., the predetermined block 31'), the bonding layer 32, and the hard gold layer 33 are collectively referred to as a separate metal pad 3 in this embodiment.

Wherein, the above "etching" is performed by chemical etching in the embodiment, and Moreover, the above chemical etching is preferably an etching liquid which does not erode the hard gold layer 33, whereby the hard gold layer 33 of the individual metal pad 3 can maintain the appearance predetermined by the designer, but the invention is not limited thereto.

Furthermore, the hard gold layer 33 of the independent metal pad 3 is suitable for the contact connection in the embodiment, whereby the communication is formed by touching the external component, and is applied to the servo or semiconductor test, etc., but the present invention does not This is limited to this.

Step S160: Referring to FIG. 8A and FIG. 8B, a solder resist layer 4 is formed on the first board surface 11 of the substrate 1, and the solder resist layer 4 is surrounded by the outside of the independent metal pad 3 and At least a portion of the line 2 is embedded therein. Further, the solder resist layer 4 can be provided with at least one opening 41 for exposing part of the line 2, so that the portion of the line 2 exposed through the opening 41 can be connected (eg, soldered or plugged, etc.) External components.

Moreover, in the process of forming the solder resist layer 4, it is preferable that the solder resist layer 4 is not in contact with the independent metal pad 3, and the height H1 of the hard gold layer 33 is not smaller than the height H1 of the first board surface 11. The solder resist layer 4 is higher than the height H2 of the first plate surface 11, but the invention is not limited thereto.

Accordingly, after the above steps S110 to S160 are performed, the circuit board structure 100 of the present embodiment can be manufactured, but the above steps S110 to S160 can be replaced, changed or replaced in a reasonable manner without being used in practice. Limited to the present embodiment. For example, the first plate surface 11 and the second plate surface 12 of the substrate 1 may be formed with a separate metal pad 3, or one of the first plate surface 11 and the second plate surface 12 may be formed separately. Metal pad 3.

Furthermore, in the present embodiment, the structural features of the circuit board structure 100 completed by the steps S110 to S160 will be described below, but the circuit board structure 100 of the present invention is not limited to the steps S110 to S160.

Referring to FIG. 8A to FIG. 8C , the circuit board structure 100 includes a substrate 1 , a line 2 and a separate metal pad 3 disposed on the substrate 1 and separated from each other, and a solder mask disposed on the substrate 1 . Layer 4. The substrate 1 includes a first board surface 11 and a second board surface 12 on opposite sides, and the circuit 2, the independent metal pad 3, and the solder resist layer 4 are disposed on the first board of the substrate 1. Face 11.

Furthermore, the independent metal pads 3 are spaced apart from each other and electrically isolated from each other, and the independent metal pads 3 include a joint portion 34 disposed on the first plate surface 11 and formed on the joint portion 34. A hard gold layer 33.

In more detail, the bonding portion 34 includes a copper layer 31 disposed on the first board surface 11 of the substrate 1 and a nickel layer 32 connecting the copper layer 31 and the hard gold layer 33. Also, the copper layer 31 and the wiring 2 in this embodiment are manufactured by the same conductive layer 10 to have the same height. It should be noted that the bonding portion 34 of the present embodiment is exemplified by the copper layer 31 and the nickel layer 32. However, the bonding portion 34 of the present invention does not exclude the replacement of the copper layer 31 and the nickel layer 32 by other structures or materials.

Further, the sidewall of the copper layer 31 is not covered by the hard gold layer 33 and the nickel layer 32, and the width of the copper layer 31 is from the adjacent first board surface 11 away from the first board surface 11 (as shown in FIG. 8B). The bottom-up direction gradually shrinks. The hard gold layer 33 and the nickel layer 32 have substantially the same width, and the outer portions of the hard gold layer 33 and the nickel layer 32 protrude from the copper layer 3, and the hard gold layer 33 is compared to the first plate. The height H1 of the face 11 is not less than (e.g., greater than) the height H2 of the solder resist layer 4 compared to the first plate face 11.

In addition, the solder resist layer 4 surrounds the outside of the individual metal pad 3, and the line 2 is at least partially embedded in the solder resist layer 4. Wherein, the independent metal pad 3 is preferably not in contact with the solder resist layer 4.

In summary, the circuit board structure and the manufacturing method thereof disclosed in the embodiments of the present invention can form the independent metal pad 3 without removing any hard gold layer 33, and the independent metal pad 3 does not connect any invalid blocks. To avoid the need for the board structure 100 to be generated The precious metal is wasted.

Furthermore, since the circuit board structure 100 of the present embodiment does not need to use a non-gold plating area as a guide for the gold plating area (see FIG. 1) in the process of forming the independent metal pad 3, the circuit of the embodiment The board structure 100 can be formed with a separate metal pad 3 at any position on the substrate 1, so that the appearance, size, position, and density of the independent metal pad 3 on the substrate 1 are not limited, thereby effectively promoting the circuit. The development of the board structure 100.

The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. The equivalents and modifications made by the scope of the present invention should fall within the scope of the claims of the present invention. .

Claims (10)

A circuit board structure comprising: a substrate comprising a first board surface and a second board surface on opposite sides; a line disposed on the first board surface of the substrate; and a separate metal pad, Provided on the first board surface of the substrate, the independent metal pads are spaced apart from the line and electrically isolated from each other; wherein the independent metal pad includes a first surface disposed on the first board surface a joint portion and a hard gold layer formed on the joint portion; wherein the hard gold layer of the separate metal pad is used for a contact connection to form a communication by touching an external member. The circuit board structure of claim 1, wherein the bonding portion comprises a copper layer disposed on the first board surface and a nickel layer connecting the copper layer and the hard gold layer, The copper layer has the same height as the line. A circuit board structure comprising: a substrate comprising a first board surface and a second board surface on opposite sides; a line disposed on the first board surface of the substrate; and a separate metal pad, Provided on the first board surface of the substrate, the independent metal pads are spaced apart from the line and electrically isolated from each other; wherein the independent metal pad includes a first surface disposed on the first board surface And a joint of the copper layer and the hard gold layer a nickel layer, the sidewall of the copper layer is not covered by the hard gold layer, and a width of the copper layer is gradually reduced from adjacent to the first board surface toward away from the first board surface. The circuit board structure of claim 3, wherein an outer portion of the hard gold layer protrudes from the copper layer. A circuit board structure comprising: a substrate comprising a first plate surface and a second plate surface on opposite sides; a circuit disposed on the first board surface of the substrate; a separate metal pad disposed on the first board surface of the substrate, the independent metal pads being spaced apart from the line and electrically connected to each other Isolating; wherein the independent metal pad comprises a joint portion disposed on the first plate surface and a hard gold layer formed on the joint portion; and a solder resist layer disposed on the first plate The solder mask surrounds the outer side of the separate metal pad, and the line is at least partially embedded in the solder resist layer, and the separate metal pad is not in contact with the solder resist layer. The circuit board structure of claim 5, wherein a height of the hard gold layer compared to the first board surface is not less than a height of the solder resist layer compared to the first board surface. A circuit board structure manufacturing method includes: providing a substrate and a conductive layer disposed on the substrate; wherein the substrate includes a first plate surface and a second plate surface on opposite sides, the conductive a layer is disposed on the first board surface; a bonding layer and a hard gold layer disposed on the bonding layer are formed on a predetermined block of the conductive layer; and the conductive layer is etched into the a predetermined block and a line separated from the predetermined block; wherein the predetermined block, the bonding layer, and the hard gold layer are collectively referred to as a separate metal pad. The method of manufacturing a circuit board structure according to claim 7, wherein a pattern layer is disposed on the conductive layer; wherein the pattern layer has a pattern hole to expose the predetermined block of the conductive layer; The bonding layer and the hard gold layer are sequentially formed on the predetermined block in the pattern hole, and then the pattern layer is removed. The method of manufacturing a circuit board structure according to claim 7, wherein a shielding layer is formed on a predetermined line block of the hard gold layer and the conductive layer, and the portion not covered by the shielding layer is etched. The conductive layer portion is formed such that the conductive layer is shaped into the predetermined block and the line, and then the shielding layer is removed. The method of manufacturing a circuit board structure according to any one of claims 7 to 9, further comprising: forming a solder resist layer on the first board surface, and surrounding the solder resist layer around the independent metal pad The outside and at least a portion of the line are buried therein.