TWI523412B - Adjustable gain amplifier - Google Patents

Description

Adjustable gain amplifier

The invention relates to an adjustable gain amplifier which can adjust the current according to the gain mode and can effectively reduce the energy consumed by the adjustable gain amplifier.

Please refer to Figure 1 for a schematic diagram of the circuit of a conventional amplifier. The conventional amplifier 10 can be used to amplify the signal, and mainly includes a first field effect transistor M1, a second field effect transistor M2, and a DC power source 11, wherein the first field effect transistor M1 and the second field effect transistor M2 The source is connected to the DC power source 11, and the gates of the first field effect transistor M1 and the second field effect transistor M2 are respectively connected to a first control voltage Vc1 and a second control voltage Vc2.

The first field effect transistor M1 and the second field effect transistor M2 form a differential pair. In practical applications, the first control voltage Vc1 and the second control voltage Vc2 input by the gate can be adjusted to change the first The first current I1 on the field effect transistor M1 and the second current I2 on the second field effect transistor M2, thereby achieving the purpose of adjusting the gain of the amplifier 10.

Although the gain of the amplifier 10 can be adjusted in the above manner, the sum of the first current I1 and the second current I2 does not change during the adjustment. In other words, during the process of adjusting or boosting the gain of the amplifier 10, the energy consumed by the amplifier 10 is not reduced.

It is an object of the present invention to provide an adjustable gain amplifier in which an amplification block is connected to a current input block and a mode adjustment block is connected to an amplification block and a current input block. The mode adjustment block adjusts the current supplied by the current input block to the amplifying block, thereby reducing the energy consumed by the adjustable gain amplifier

It is an object of the present invention to provide an adjustable gain amplifier in which an amplification block is connected to a current input block and a mode adjustment block is connected to an amplification block and a current input block. When the adjustable gain amplifier and/or the amplifying block operate in a smaller gain section, the current output block can be adjusted by the mode adjustment block to reduce the current consumed by the adjustable gain amplifier.

It is an object of the present invention to provide an adjustable gain amplifier in which an amplification block is connected to a current input block and a mode adjustment block is connected to an amplification block and a current input block. The mode adjustment block includes one or more mode adjustment units, and can change the current of the current input block and the gain of the amplification block by turning the mode adjustment unit on or off.

To achieve the above object, the present invention provides an adjustable gain amplifier comprising: an amplifying block comprising a first control end and a second control end; a current input block connecting the amplifying block and amplifying the block Providing a current; a mode adjusting block, connecting the amplifying block and the current input block, wherein the mode adjusting unit comprises one or more mode switching ends, and adjusting the current supplied by the current input block to the amplifying block through the mode switching end .

In an embodiment of the adjustable gain amplifier of the present invention, the amplifying block comprises a signal input end and a signal output end.

In an embodiment of the adjustable gain amplifier of the present invention, an impedance adjusting unit is further connected to the signal input end, and is used for adjusting the input impedance of the signal input end.

In an embodiment of the adjustable gain amplifier of the present invention, the mode adjustment block includes one or more mode adjustment units, and one or more mode switching ends are respectively connected to one or more mode adjustment units, and are switched by the mode switching end. Connected mode adjustment unit.

In an embodiment of the adjustable gain amplifier of the present invention, one or more mode adjustment units respectively comprise two or more field effect transistors connected in series.

In an embodiment of the adjustable gain amplifier of the present invention, one of the field effect transistors of one or more mode adjustment units has a gate mode switching end, and the gate of the other field effect transistor is connected to the signal input terminal and the current. Enter the block.

In an embodiment of the adjustable gain amplifier of the present invention, one or more switching signals are respectively connected to one or more mode switching terminals, and one or more mode adjusting units are turned on or off by one or more switching signals.

In an embodiment of the adjustable gain amplifier of the present invention, wherein the amplification block is a current steering circuit.

In an embodiment of the adjustable gain amplifier of the present invention, the first control voltage is connected to the first control terminal, and the second control voltage is connected to the second control terminal, and the first control voltage and the second control voltage are adjusted and amplified. The gain of the block.

In an embodiment of the adjustable gain amplifier of the present invention, wherein the current input block is a field effect transistor or a current mirror.

10‧‧‧Amplifier
11‧‧‧DC power supply
20‧‧‧Adjustable Gain Amplifier
21‧‧‧Amplified block
211‧‧‧ first control end
213‧‧‧Second console
214‧‧‧Signal input
215‧‧‧ signal output
23‧‧‧ Current input block
25‧‧‧ mode adjustment block
251‧‧‧ mode switch end
30‧‧‧Adjustable Gain Amplifier
300‧‧‧Adjustable Gain Amplifier
31‧‧‧Enlarged block
314‧‧‧Signal input
315‧‧‧ signal output
33‧‧‧ Current input block
330‧‧‧current input block
331‧‧‧Reference current source
35‧‧‧Mode adjustment block
350‧‧‧ mode adjustment block
351‧‧‧ mode switch end
40‧‧‧Adjustable Gain Amplifier
41‧‧‧Enlarged block
411‧‧‧Impedance adjustment unit
414‧‧‧Signal input
415‧‧‧ signal output
43‧‧‧ Current input block
431‧‧‧Reference current source
50‧‧‧Adjustable Gain Amplifier
55‧‧‧Mode adjustment block
551‧‧‧First mode adjustment unit
552‧‧‧ first mode switch end
553‧‧‧Second mode adjustment unit
554‧‧‧Second mode switch end
60‧‧‧Adjustable Gain Amplifier
65‧‧‧Mode adjustment block
651‧‧‧First mode adjustment unit
652‧‧‧ first mode switch end
657‧‧‧nth mode adjustment unit
658‧‧‧nth mode switch end

Figure 1: Schematic diagram of a circuit for a conventional amplifier;
2 is a block diagram showing an adjustable gain amplifier according to an embodiment of the present invention;
3 is a circuit diagram of an adjustable gain amplifier according to an embodiment of the present invention;
4 is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention;
Figure 5 is a circuit diagram showing an adjustable gain amplifier according to still another embodiment of the present invention;
6 is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention; and FIG. 7 is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention.
While the invention has been described by way of illustrations in the drawings The drawings and the detailed description of the present invention are intended to be in a singular, and the detailed description is only a limitation of the specific form and is not a limitation of the invention. And their permutations are within the scope of the invention.

Please refer to FIG. 2, which is a block diagram of an adjustable gain amplifier according to an embodiment of the present invention. As shown, the adjustable gain amplifier 20 includes an amplification block 21, a current input block 23, and a mode adjustment block 25, wherein the current input block 23 is connected to the amplification block 21 and is used to the amplification block 21. The current is supplied, and the mode adjustment block 25 is connected to the amplification block 21 and/or the current input block 23, and is used to adjust the magnitude of the current supplied by the current input block 23 to the amplification block 21.

In an embodiment of the present invention, the amplifying block 21 can be a current steering type gain control, and includes a first control terminal 211 and a second control terminal 213, wherein the first control terminal 211 and the The second control terminal 213 is respectively connected to a first control voltage Vc1 and a second control voltage Vc2. In actual application, the gain of the amplification block 21 can be changed by adjusting the first control voltage Vc1 and the second control voltage Vc2. In addition, the amplifying block 21 further includes a signal input end 214 and a signal output end 215. The signal input end 214 is configured to receive a signal to be amplified (such as an AC signal), and the input signal is amplified by the amplifying block 21 and input by the signal input terminal 214. The signal is outputted by the signal output terminal 215.

The mode adjustment block 25 includes at least one mode switching terminal 251, and adjusts the current supplied from the current output block 23 to the amplification block 21 through the mode switching terminal 251. In actual application, the mode switching terminal 251 can be connected to a switching signal V1, and the switching signal V1 can be used to switch the mode of the mode adjusting block 25, and further adjust the magnitude of the current supplied by the current input block 23 to the amplifying block 21.

The magnitude of the current supplied to the amplifying block 21 by the current input block 23 is adjusted by the mode adjusting block 25, and the gain of the amplifying block 21 can be further adjusted. In other words, the adjustable gain amplifier 20 of the present invention can not only adjust the gain through the first control voltage Vc1 and the second control voltage Vc2, but also change the amplification region through the current supplied to the amplification block 21 by the current input block 23. The gain or gain mode of block 21 and/or adjustable gain amplifier 20. In addition, by varying the magnitude of the current provided by the current input block 23, the energy consumed by the adjustable gain amplifier 20 can be further reduced.

In the above embodiment of the present invention, the mode adjustment block 25 is mainly used to adjust the magnitude of the current supplied from the current input block 23 to the amplifying block 21, thereby switching the gain mode of the adjustable gain amplifier 20. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 25 may also be part of the amplifying circuit, and cooperate with the amplifying block 21 to amplify the signal (such as an alternating current signal).

Please refer to FIG. 3, which is a circuit diagram of an adjustable gain amplifier according to an embodiment of the invention. As shown, the adjustable gain amplifier 30 includes an amplification block 31, a current input block 33, and a mode adjustment block 35. The current input block 33 is connected to the amplification block 31 and used to the amplification block 31. The current I is supplied, and the mode adjustment block 35 is connected to the amplification block 31 and the current input block 33, and is used to adjust the magnitude of the current I supplied to the amplification block 31 by the current input block 33.

The amplifying block 31 of the present invention may be a current steering type gain control. In an embodiment of the invention, the amplifying block 31 includes a first field effect transistor M1 and a second field. The effect transistor M2 and a third field effect transistor M3, wherein the gates of the first field effect transistor M1 and the second field effect transistor M2 are respectively connected to the first control voltage Vc1 and the second control voltage Vc2; The sources of the first field effect transistor M1 and the second field effect transistor M2 are connected to each other and connected to the third field effect transistor M3, for example, a drain connected to the third field effect transistor M3. The drains of the first field effect transistor M1 and the second field effect transistor M2 are respectively connected to the supply voltage VCC through the first resistor R1 and the second resistor R2. In addition, the amplifying block 31 can also include a signal input terminal 314 and a signal output terminal 315, and the signal input terminal 314 inputs the signal to be amplified (the alternating current signal), and the signal output terminal 315 outputs the amplified signal (the alternating current signal). For example, the signal input terminal 314 can be connected to the gate of the third field effect transistor M3, and the signal output terminal 315 can be connected to the drain of the second field effect transistor M2.

The gates of the first field effect transistor M1 and the second field effect transistor M2 according to the embodiments of the present invention may be the first control terminal 211 and the second control terminal 213 shown in FIG. 2, respectively. a control voltage Vc1 and a second control voltage Vc2 bias the gates of the first field effect transistor M1 and the second field effect transistor M2, respectively, thereby adjusting the magnitudes of the first current I1 and the second current I2, and The gain of the amplification block 31 is further changed.

In an embodiment of the invention, the current input block 33 includes a fourth field effect transistor M4. For example, the gate and the drain of the fourth field effect transistor M4 can be connected to the gate of the third field effect transistor M3 of the amplification block 31, so that the third field effect transistor M3 can be not only the amplification block 31. The first stage can also form a current mirror with the fourth field effect transistor M4.

The current input block 33 can also include a reference current source 331. The current input block 33 will supply a current I to the amplifying block 31 according to the reference current source 331. For example, the reference current source 331 can be connected to the fourth field effect transistor M4. pole. The mode adjustment block 35 of the present invention includes a fifth field effect transistor M5 and a sixth field effect transistor M6, wherein the fifth field effect transistor M5 is connected in series (series) to the sixth field effect transistor M6, For example, the source of the fifth field effect transistor M5 is connected to the drain of the sixth field effect transistor M6, and the drain of the fifth field effect transistor M5 is connected to the supply voltage VCC through the second resistor R2, and the sixth field effect is The gate of the crystal M6 is connected to the gate of the third field effect transistor M3 of the amplification block 31, the signal input terminal 314, and the gate and/or drain of the fourth field effect transistor M4 of the current input block 33.

The gate of the fifth field effect transistor M5 can be a mode switching terminal 351, wherein the mode switching terminal 351 is connected to the switching signal V1. In practical applications, the fifth field effect transistor M5 can be biased by the switching signal V1, and the fifth field effect transistor M5 can be switched.

For example, the adjustable gain amplifier 30 of the embodiment of the present invention can change the current I supplied to the amplifying block 31 by the current input block 33 through the switching signal V1, and switch the gain mode of the adjustable gain amplifier 30. For example, when the switching signal V1 is at a high voltage, the fifth field effect transistor M5 will be turned on, and the current I supplied to the amplifying block 31 by the current input block 33 will increase, so that the amplifying block 31 has a larger gain. On the contrary, when the switching signal V1 is a low voltage, the fifth field effect transistor M5 will not be turned on, and the current I supplied to the amplifying block 31 by the current input block 33 is reduced, so that the amplification block 31 is The gain is reduced.

The adjustable gain amplifier 30 of the present invention can adjust the magnitude of the current I supplied to the amplifying block 31 by the current input block 33 according to the required gain, and reduce the energy consumed by the adjustable gain amplifier 30. For example, when the adjustable gain amplifier 30 operates in a smaller gain section, the adjustable down current input block 33 provides a current I to the amplification block 31 to reduce the energy consumed by the adjustable gain amplifier 30.

In the above embodiment of the present invention, the mode adjustment block 35 is mainly used to adjust the magnitude of the current supplied from the current input block 33 to the amplification block 31, thereby switching the gain mode of the adjustable gain amplifier 30. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 35 may also be part of the amplifying circuit, and cooperate with the amplifying block 31 to amplify the signal (such as an alternating current signal).

Please refer to FIG. 4, which is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention. As shown, the adjustable gain amplifier 300 includes an amplification block 31, a current input block 330, and a mode adjustment block 350. The current input block 330 is connected to the amplification block 31 and used to the amplification block 31. The current I is supplied, and the mode adjustment block 350 is connected to the amplification block 31 and the current input block 330, and is used to adjust the magnitude of the current I supplied by the current input block 330 to the amplification block 31.

In an embodiment of the invention, the current input block 330 is a current mirror and includes a fourth field effect transistor M4 and a fifth field effect transistor M5, such as a fourth field effect transistor M4 and a fifth field. The gate of the effect transistor M5 is connected; the gate and the drain of the fourth field effect transistor M4 are also connected; and the drain of the fifth field effect transistor M5 is connected to the amplification block 31.

In an embodiment of the invention, the mode adjustment block 350 includes a sixth field effect transistor M6, a seventh field effect transistor M7, and a eighth field effect transistor M8, wherein the sixth field effect The drain of the transistor M6 is connected to the amplification block 31 and connected to the signal output terminal 315; the gate of the seventh field effect transistor M7 is connected to the gate of the third field effect transistor M3 of the amplification block 31, and is connected to the signal input. The terminal 314; and the gate of the eighth field effect transistor is connected to the gates of the fourth field effect transistor M4 and the fifth field effect transistor M5 of the current input block 330.

In the above embodiment of the present invention, the mode adjustment block 350 is mainly used to adjust the magnitude of the current supplied from the current input block 330 to the amplification block 31, thereby switching the gain mode of the adjustable gain amplifier 300. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 350 may also be part of the amplifying circuit, and cooperate with the amplifying block 31 to amplify the signal (such as an alternating current signal).

Please refer to FIG. 5, which is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention. As shown, the adjustable gain amplifier 40 includes an amplification block 41, a current input block 43 and a mode adjustment block 35. The current input block 43 is connected to the amplification block 41 and used to the amplification block 41. The current I is supplied, and the mode adjustment block 35 is connected to the amplification block 41 and the current input block 43 and is used to adjust the magnitude of the current I supplied to the amplification block 41 by the current input block 43.

In an embodiment of the invention, the amplification block 41 includes a first field effect transistor M1, a second field effect transistor M2, and a third field effect transistor M34. In addition, the amplifying block 41 can also include a signal input terminal 414 and a signal output terminal 415. For example, the signal input terminal 414 can be connected to the gate of the third field effect transistor M3, and the signal output terminal 415 can be connected to the second field effect. The drain of the transistor M2.

The current input block 43 of the embodiment of the present invention includes a fourth field effect transistor M4, wherein the signal input terminal 414, the gate of the third field effect transistor M3 of the amplification block 41, and the mode adjustment block 35 can be The gate of the fourth field effect transistor M4 is connected through the resistor R.

In an embodiment of the invention, the current input block 43 further includes a reference current source 431 connected to the drain of the fourth field effect transistor M4, wherein the reference current source 431 is a variable current source, and the current input block 43 The current I is supplied to the amplification block 41 according to the reference current source 431.

The mode adjustment block 35 of the present invention includes a fifth field effect transistor M5 and a sixth field effect transistor M6, wherein the fifth field effect transistor M5 is connected in series (series) to the sixth field effect transistor M6, The gate of the fifth field effect transistor M5 is connected to the switching signal V1. In the actual application, the fifth field effect transistor M5 can be switched by the switching signal V1 to adjust the magnitude of the current I supplied to the amplification block 41 by the current input block 43, and further adjust the gain of the amplification block 41.

When the mode adjustment block 35 is switched by switching the signal V1, the input impedance of the signal input terminal 414 is changed. To this end, in a preferred embodiment of the present invention, the gate of the signal input terminal 414 and/or the third field effect transistor M3 may also be connected to an impedance adjusting unit 411. In actual application, the size of the impedance adjusting unit 411 can be adjusted according to the mode switched by the mode switching unit 35 to maintain the input impedance of the signal input terminal 414. For example, the impedance adjusting unit 411 can be at least one variable capacitor and/or at least one variable inductor, and is connected to the gate and/or source of the third field effect transistor M3.

In the above embodiment of the present invention, the mode adjustment block 35 is mainly used to adjust the magnitude of the current supplied from the current input block 43 to the amplification block 41, thereby switching the gain mode of the adjustable gain amplifier 40. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 35 may also be part of the amplifying circuit, and cooperate with the amplifying block 41 to amplify the signal (such as an alternating current signal).

Please refer to FIG. 6 , which is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention. As shown, the adjustable gain amplifier 50 includes an amplification block 41, a current input block 43 and a mode adjustment block 55. The current input block 43 is connected to the amplification block 41 and used to the amplification block 41. The current I is supplied, and the mode adjustment block 55 is connected to the amplification block 41 and the current input block 43 and is used to adjust the magnitude of the current I supplied to the amplification block 41 by the current input block 43.

The mode adjustment block 55 includes one or more mode adjustment units, and the one or more mode adjustment units are respectively connected to the one or more mode switching terminals, and the connected mode adjustment unit is switched through the mode switching end.

In the embodiment of the present invention, the number of the mode adjustment unit and the mode switching end are both, wherein the first mode adjusting unit 551 is connected to a first mode switching end 552, and the second mode adjusting unit 553 is connected to a second mode switching. End 554. In the actual application, the first mode switching end 551 is connected to the first switching signal V1, and the second mode switching end 553 is connected to the second switching signal V2, and can switch the first switching signal V1 and the second switching signal V2 respectively. The mode adjustment unit 551 and the second mode adjustment unit 553, for example, turn on or off the first mode adjustment unit 551 and the second mode adjustment unit 553.

In an embodiment of the invention, the first mode adjusting unit 551 includes a fifth field effect transistor M5 and a sixth field effect transistor M6, wherein the fifth field effect transistor M5 is connected in series (series) to the sixth field effect. Transistor M6. The second mode adjusting unit 553 includes a seventh field effect transistor M7 and an eighth field effect transistor M8, wherein the seventh field effect transistor M7 is connected in series (series) to the eighth field effect transistor M8. For example, the source of the fifth field effect transistor M5 is connected to the drain of the sixth field effect transistor M6, and the source of the seventh field effect transistor M7 is connected to the drain of the eighth field effect transistor M8, and the sixth field effect The gates of the transistor M6 and the eighth field effect transistor M8 are connected to the signal input terminal (Input 414), the fourth field effect transistor M4 of the current input block 43 and/or the gate of the third field effect transistor M3. .

In the actual application, the fifth field effect transistor M5 and the seventh field effect transistor M7 can be switched respectively through the first switching signal V1 and the second switching signal V2 to adjust the current supplied by the current input block 43 to the amplifying block 41. The size of I is further adjusted by the gain of the adjustable gain amplifier 50 and/or the amplification block 41.

For example, the adjustable gain amplifier 50 of the embodiment of the present invention can change the current I supplied to the amplifying block 41 by the current input block 43 through the first switching signal V1 and/or the second switching signal V2. The gain mode of the adjustable gain amplifier 50 is switched. For example, when the first switching signal V1 and the second switching signal V2 are both high voltages, the fifth field effect transistor M5 and the seventh field effect transistor M7 are turned on, and the current input block 43 is supplied to the amplification block 41. The current I will increase so that the amplification block 41 has a larger gain. When the first switching signal V1 is high voltage and the second switching signal V2 is low voltage, the fifth field effect transistor M5 will be turned on, and the seventh field effect transistor M7 will not be turned on, at this time, the current input block The current I supplied to the amplifying block 41 will be reduced, so that the gain of the amplifying block 41 is lowered. When the first switching signal V1 is low voltage and the second switching signal V2 is high voltage, the fifth field effect transistor M5 will not be turned on, and the seventh field effect transistor M7 will be turned on, at this time, the current input block The current I supplied to the amplifying block 41 is also reduced, so that the gain of the amplifying block 41 is lowered. When both the first switching signal V1 and the second switching signal V2 are low voltage, the fifth field effect transistor M5 and the seventh field effect transistor M7 are not turned on, and the current input block 43 is supplied to the amplification block 41. The current I is reduced so that the gain of the amplification block 41 drops again.

The adjustable gain amplifier 50 of the present invention can adjust the magnitude of the current I supplied to the amplifying block 41 by the current input block 43 according to the required gain, and reduce the energy consumed by the adjustable gain amplifier 50. Further in the embodiment of the present invention, the adjustable gain amplifier 50 has a multi-segment gain switching function, such as a three- or four-segment gain switching function.

In the above embodiment of the present invention, the mode adjustment block 55 is mainly used to adjust the magnitude of the current supplied from the current input block 43 to the amplification block 41, thereby switching the gain mode of the adjustable gain amplifier 50. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 55 may also be part of the amplifying circuit, and cooperate with the amplifying block 41 to amplify the signal (such as an alternating current signal).

Please refer to FIG. 7 , which is a circuit diagram of an adjustable gain amplifier according to still another embodiment of the present invention. As shown, the adjustable gain amplifier 60 includes an amplification block 41, a current input block 43 and a mode adjustment block 65. The current input block 43 is connected to the amplification block 41 and used to the amplification block 41. The current I is supplied, and the mode adjustment block 65 is connected to the current input block 23 and is used to adjust the magnitude of the current I supplied to the amplification block 41 by the current input block 43.

The mode adjustment block 65 of the embodiment of the present invention includes a plurality of mode adjustment units, wherein each mode adjustment unit includes a series connection (series) of two field effect transistors, and each mode adjustment unit is respectively connected to one or more The mode switching end can switch the connected mode adjusting unit through the mode switching end.

In an embodiment of the invention, the mode adjustment unit includes a first mode adjustment unit 651, . . . and an nth mode adjustment unit 657, and the mode switching end includes a first mode switching end 652, . . . and an nth mode switching end 658. The first mode switching end 652, . . . and the nth mode switching end 658 are respectively connected to the first mode adjusting unit 651, . . . and the nth mode adjusting unit 657.

In the actual application, the first switching signal V1 can be input to the first mode switching end 651, ... and the nth switching signal Vn can be input to the nth mode switching end 658, and the first switching signal V1... and the nth switching signal can be transmitted. Vn turns on or off the first mode adjusting unit 651, ... and the nth mode adjusting unit 657 such that the adjustable gain amplifier 60 and/or the amplifying block 41 have a plurality of gain modes. In addition, the gain mode of the adjustable gain amplifier 60 and/or the amplification block 41 can be adjusted according to the required gain section during use, thereby reducing the operating current of the adjustable gain amplifier 60 and/or the amplification block 41 and The energy consumed.

In the above embodiment of the present invention, the mode adjustment block 65 is mainly used to adjust the magnitude of the current supplied from the current input block 43 to the amplification block 41, thereby switching the gain mode of the adjustable gain amplifier 60. However, in the process of actually amplifying the signal (such as an alternating current signal), the mode adjustment block 65 may also be part of the amplifying circuit, and cooperate with the amplifying block 41 to amplify the signal (such as an alternating current signal).

A connection as referred to in the present invention refers to a direct connection or an indirect connection between one or more objects or members, for example one or more intermediate connections may be present between one or more objects or members.

The words "may," and "changes" described in the system of the specification are not limitations of the invention. The technical terms used in the specification are mainly for the description of specific embodiments and are not intended to be limiting. The single quantifiers (such as one and the one) used in the specification may also be plural, unless explicitly stated in the contents of the specification. For example, a device referred to in the specification may include a combination of two or more devices, and one of the materials mentioned in the specification may include a mixture of a plurality of substances.

The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the variations, modifications, and modifications of the shapes, structures, features, and spirits described in the claims of the present invention. All should be included in the scope of the patent application of the present invention.

20‧‧‧Adjustable Gain Amplifier

21‧‧‧Amplified block

211‧‧‧ first control end

213‧‧‧Second console

214‧‧‧Signal input

215‧‧‧ signal output

23‧‧‧ Current input block

25‧‧‧ mode adjustment block

251‧‧‧ mode switch end

Claims (9)

An adjustable gain amplifier includes: an amplifying block, comprising a first control end and a second control end, wherein the first control end and the second control end are respectively configured to receive a first control voltage and a first Controlling the voltage, and adjusting the gain of the amplifying block through the first control voltage and the second control voltage; a current input block connecting the amplifying block and providing a current to the amplifying block; and a mode Adjusting a block, connecting the amplifying block and the current input block, wherein the mode adjusting unit comprises one or more mode switching ends, and adjusting a current supplied by the current input block to the amplifying block through the mode switching end . The adjustable gain amplifier of claim 1, wherein the amplifying block comprises a signal input end and a signal output end. The adjustable gain amplifier of claim 2, further comprising an impedance adjusting unit connected to the signal input terminal for adjusting an input impedance of the signal input end. The adjustable gain amplifier of claim 2, wherein the mode adjustment block comprises one or more mode adjustment units, and the one or more mode switching ends are respectively connected to the one or more mode adjustment units, And switching the connected mode adjustment unit through the mode switching end. The adjustable gain amplifier of claim 4, wherein the one or more mode adjustment units respectively comprise two or more field effect transistors connected in series. The adjustable gain amplifier of claim 5, wherein the gate of one of the field effect transistors of the one or more mode adjustment units is substantially switched The gate of the other field effect transistor is connected to the signal input terminal and the current input block. The adjustable gain amplifier of claim 4, further comprising one or more switching signals respectively connected to the one or more mode switching ends, and turning on or off the one or more through the one or more switching signals Mode adjustment unit. The adjustable gain amplifier of claim 1, wherein the amplifying block is a current guiding circuit. The adjustable gain amplifier of claim 1, wherein the current input block is a field effect transistor or a current mirror.