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TWI506738B - 封裝結構及其製法 - Google Patents

封裝結構及其製法 Download PDF

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Publication number
TWI506738B
TWI506738B TW100120095A TW100120095A TWI506738B TW I506738 B TWI506738 B TW I506738B TW 100120095 A TW100120095 A TW 100120095A TW 100120095 A TW100120095 A TW 100120095A TW I506738 B TWI506738 B TW I506738B
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buried
pad
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TW100120095A
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TW201250943A (en
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Shih Lian Cheng
Tsung Yuan Chen
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Unimicron Technology Corp
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Priority to TW100120095A priority Critical patent/TWI506738B/zh
Priority to US13/241,285 priority patent/US20120313240A1/en
Publication of TW201250943A publication Critical patent/TW201250943A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
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    • H01L2224/13139—Silver [Ag] as principal constituent
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

封裝結構及其製法
本發明是有關於一種封裝結構及其製法，且特別是有關於一種採用凹陷焊墊基板的封裝結構及其製法。
在現今的封裝技術中，高效電子元件常利用焊錫球(solder balls)或是焊錫凸塊(solder bumps)來達到彼此之間電性和機械性連接的目的。舉例來說，IC晶片通常是利用焊錫球或焊錫凸塊與一封裝基板相連接。這種連接技術又稱為覆晶接合(flip-chip,FC)，其屬於面積陣列式(area array)的接合，因此適合應用於高密度的封裝連線製程。
簡單來說，覆晶接合的觀念係先在IC晶片的接墊上形成焊錫球或焊錫凸塊，再將IC晶片倒置放到封裝基板上，完成接墊對位後，再以回焊(reflow)處理配合焊錫熔融時之表面張力效應使焊錫成球，進而完成IC晶片與封裝基板之接合。上錫球可以利用墊上印錫(SOP)、微錫球(micro-ball)植球機、墊上鍍錫(solder-plating on pad,SPO)等方式。然而，不論以上述何種方式上錫球，IC晶片均須透過防焊層中的防焊開口(SRO)與暴露出的焊墊接合，換句話說，過去防焊開口的製程能力(目前是60±10μm)限制了上錫球的製程能力。
此外，針對極細線路(fine pitch)的產品，因對位精度的要求與接墊間的間隙過小，使得上錫球的困難度大幅增加，或許利用墊上鍍錫技術可解決對位精度的要求，但是接墊間的間隙過小仍然會有爬錫現象，造成基板製程良率損失。即使可以解決基板製程上的問題，然而，因為錫是鍍在凸出於基材表面的接墊上，這使得鍍錫在封裝廠進行回焊時，接墊間的間隙過小仍有可能因為焊錫溢流爬過接墊間微縫，導致接墊之間短路。
本發明之主要目的在提出一種具有凹陷焊墊之基板、採用該基板之封裝結構以及製作方法，以解決上述先前技藝之不足與缺點。
本發明提供一種具有凹陷焊墊之基板，包含有一核心層、一介電層、一第二線路圖案以及一防焊層。核心層表面設有一第一線路圖案。介電層位於核心層的表面上且覆蓋第一線路圖案。第二線路圖案嵌入在介電層的一上表面，其中第二線路圖案包含有至少一埋入式細線路以及一第一凹陷焊墊。一預焊錫層，設於該埋入式第一凹陷焊墊上。一防焊層覆蓋住一覆晶接合區域以外之一線路區域，其中埋入式細線路位於線路區域內，第一凹陷式焊墊位於覆晶接合區域內。
本發明另提供一種封裝結構，包含有一基板、一晶片以及一底膠。基板包含有一覆晶接合面，且覆晶接合面具有一覆晶接合區域，於覆晶接合區域內設有複數個凹陷焊墊。另外，基板另包含一防焊層，覆蓋住覆晶接合區域以外之線路區域。晶片主動面包含有複數個金屬凸塊，以覆晶方式分別與覆晶接合區域內的複數個凹陷焊墊接合。一預焊錫層，設於各該凹陷焊墊上。底膠(underfill)填入於基板與晶片之間的覆晶接合區域內。
本發明另提供一種封裝結構，包含有一基板、一晶片以及一底膠。基板包含有一覆晶接合面，且覆晶接合面具有一覆晶接合區域，於覆晶接合區域內設有複數個凹陷焊墊。另外，基板另包含一防焊層，覆蓋住覆晶接合區域以外之線路區域。晶片主動面包含有複數個錫球，以覆晶方式分別與覆晶接合區域內的複數個凹陷焊墊接合。一預焊錫層，設於各該凹陷焊墊上。底膠填入於基板與晶片之間的覆晶接合區域內。
本發明另提供一種具有凹陷焊墊之基板的製法。首先，提供一核心層，其表面具有一第一線路圖案。接著，於核心層上壓合一介電層，覆蓋住第一線路圖案。接續，於介電層的一上表面形成至少一細線路溝槽以及至少一焊墊溝槽。續之，於細線路溝槽以及焊墊溝槽填入金屬，俾分別形成一埋入式細線路以及一凹陷焊墊。繼之，於該凹陷焊墊形成一預焊錫層。最後，於介電層的上表面覆蓋一防焊層，使防焊層覆蓋埋入式細線路，但曝露出凹陷焊墊。
為讓本發明之上述目的、特徵及優點能更明顯易懂，下文特舉較佳實施方式，並配合所附圖式，作詳細說明如下。然而如下之較佳實施方式與圖式僅供參考與說明用，並非用來對本發明加以限制者。
第1圖係為依據本發明一較佳實施例所繪示的具有凹陷焊墊之基板100之剖面示意圖。基板100係以一核心層110為基礎，在其上、下兩面利用加層法或半加層法逐步形成多層線路。以下為簡化說明，文中實施例僅以基板100的上半部份(連接晶片端的部分)加以說明，且雖然基板100以四層板為例，但熟習該項技藝者應能理解本發明亦能被應用在其它多層板場合中。
此外，為更明確且清晰闡述本發明，於文中提及之凹陷焊墊、焊墊凹槽、細線路凹槽、線路圖案或金屬凸塊等的元件個數為能清楚揭示本發明之最少個數，然本發明之該等元件個數並非以此為限，其個數在實際應用上可為一個以上之任意個數。
詳細來說，如第1圖所示，基板100至少包含有核心層110、一第一線路層112、一介電層120、一第二線路圖案130以及一防焊層140。第一線路圖案112設於核心層110的表面S1。其中核心層110可例如為一玻纖預浸絕緣材或其它絕緣材料，第一線路圖案112可例如為銅等導電材質，但本發明並不限於此。
更進一步來說，核心層110可更包含複數個導電通孔(未繪示)以電性連接位於其相對二表面之線路圖案，而導電通孔(未繪示)可以利用例如雷射鑽孔、機械鑽孔或其它方法形成。前述之介電層120壓合於核心層110的表面S1上並覆蓋第一線路圖案112，其中介電層120的材質例如是味之素樹脂(Ajinomoto Bond Film,ABF)，但亦可為其他絕緣材質。
第二線路圖案130係為一內埋線路圖案，嵌入在介電層120的一上表面S2中。第二線路圖案130可包含至少一埋入式細線路以及至少一凹陷焊墊，例如在本實施例中，第二線路圖案130包含有二相鄰之埋入式細線路132a、132b、二相鄰之凹陷焊墊134a、134b。舉例來說，第二線路圖案130的製程，可先以雷射蝕刻技術形成至少一溝渠或通孔，接著再以電鍍製程填入例如銅等導電材質，而形成一雷射埋線圖案(laser embedded circuit)，但本發明不以此為限。
在一較佳的實施態樣下，第二線路圖案130的埋入式細線路132a、132b、凹陷焊墊134a、134b係位於同一水平面，而埋入式細線路132a、132b、凹陷焊墊134a、134b係與介電層120的上表面S2齊平。另外，防焊層140覆蓋埋入式細線路132a、132b，但曝露出凹陷焊墊134a、134b。在一較佳的實施例中，凹陷焊墊134a、134b均位於一覆晶接合區域A1內，而防焊層140係位於覆晶接合區域A1以外的線路區域A2，是以防焊層140不會覆蓋凹陷焊墊134a、134b。
更進一步來說，凹陷焊墊134a、134b可例如為銅墊，但本發明不以此為限，其具有一凹陷區域A，被一凸出的外圍防溢(peripheral barrier)結構B所圍繞。一預焊錫層150，例如，化鍍錫(ImSn)層，其可利用化鍍等方式形成於凹陷區域A上，而外圍防溢結構B將化鍍錫限制於凹陷區域A內。在此強調，由於本發明之凹陷焊墊134a、134b具有凹陷區域A以及外圍防溢結構B，故可經由控制凹陷焊墊134a、134b的凹陷深度以及預焊錫層150的厚度，來有效防止預焊錫層150溢流，因此不論是凹陷式的預焊錫層150或者是平/凸式的預焊錫層150，具有中央凹陷的凹陷焊墊134a、134b都可避免回焊(reflow)熱處理時預焊錫層150溢流的問題。
再者，由於本發明之凹陷焊墊134a、134b的位置及尺寸係以雷射埋線技術在介電層120的上表面S2上所形成的溝渠或通孔所定義，故本發明之凹陷焊墊134a、134b是為一非防焊層定義(Non-Solder Mask Defined,NSMD)焊墊。由於採用雷射埋線技術，相較於習知之蝕刻微影製程定義防焊開口技術，可形成尺寸以及間距更小的焊墊。
具體來說，由雷射蝕刻技術所形成之埋入式細線路132a、132b之線寬S可達到小於或等於10微米(μm)，而凹陷焊墊134a、134b之直徑可小於或等於40微米，凹陷焊墊134a、134b之間距(pitch)可小於或等於80微米。又在一較佳的實施環境下，埋入式細線路132a、132b之線寬L/線距S比可達到10/10，而凹陷焊墊134a、134b之直徑Φ/間距P比可達到30/60。
第2A圖係為依據本發明一較佳實施例所繪示的封裝結構之剖面示意圖。如第2A圖所示，一覆晶晶片200接合於前述之基板100的覆晶接合面上構成一封裝結構300。前述基板100的覆晶接合面包括覆晶接合區域A1，其內設有凹陷焊墊134a、134b。基板100另包含一防焊層140，覆蓋住覆晶接合區域A1以外之線路區域A2。
晶片200的主動面S3包含有金屬凸塊210a、210b，以覆晶方式分別與基板100的凹陷焊墊134a、134b接合，其中金屬凸塊210a、210b例如為鎳、金、銀、銅及其組合。底膠(underfill)310則填入於基板100與晶片200之間的覆晶接合區域A1內，以將基板100與晶片200緊密接合。
根據本發明之另一實施例，晶片200與基板100的凹陷焊墊134a、134b之間亦可以透過錫球連結，如第2B圖所示，晶片200的主動面S3包含有錫球410a、410b，以覆晶方式分別與基板100的凹陷焊墊134a、134b接合，再以回焊處理。接著，將底膠310填入於基板100與晶片200之間的覆晶接合區域A1內，形成一封裝結構300’。
第3-8圖係為依據本發明一較佳實施例所繪示的具有凹陷焊墊之基板之製作流程圖。為簡化說明，文中實施例僅以基板100的上半部份(連接晶片端的部分)加以說明，且雖然基板100以四層板為例，但熟習該項技藝者應能理解本發明亦能被應用在其它多層板場合中。
首先，如第3圖所示，提供一核心層110，其表面S1具有一第一線路圖案112，其中核心層110例如為一玻纖預浸絕緣材且更可包含複數個導電通孔(未繪示)，第一線路圖案112可例如為銅等導電材質，但本發明並不限於此。接著，如第4圖所示，一介電層120，例如是味之素樹脂(ABF)，壓合於核心層110上，並覆蓋第一線路圖案112。
繼之，如第5圖所示，以例如雷射蝕刻技術先於介電層120的上表面S2上形成焊墊溝槽R1、R2以及細線路溝槽T1、T2。接著，如第6圖所示，再以雷射於焊墊溝槽R1的底面形成一孔洞V連通至第一線路圖案112，如此於介電層120的上表面S2中形成細線路溝槽T1、T2以及焊墊溝槽R1、R2。當然，細線路溝槽T1、T2，以及焊墊溝槽R1、R2的數量不受限於圖中所示，其可依實際需求而定。
如第7圖所示，電鍍一金屬層130’於介電層120的上表面S2上。如圖所示，金屬層130’亦會電鍍於細線路溝槽T1、T2以及焊墊溝槽R1、R2中，且由於焊墊溝槽R1、R2具有相對較大凹陷，故電鍍於焊墊溝槽R1、R2上之金屬層130’具有較明顯之凹陷。在本實施例中，電鍍的金屬可例如為銅，但在其他實施例中亦可為其他材質。
如第8圖所示，蝕刻金屬層130’，俾分別形成埋入式細線路132a、132b以及凹陷焊墊134a、134b。詳細而言，由於焊墊溝槽R1、R2的寬度大於細線路溝槽T1、T2的線寬，故在蝕刻後當金屬填滿細線路溝槽T1、T2時，焊墊溝槽R1、R2未被填滿而於溝槽中央自然產生凹陷區域A，其被凸出的外圍防溢結構B所圍繞。
如第9圖所示，再以例如浸鍍錫等化學鍍方法形成一預焊錫層150於凹陷區域A中。如第10圖所示，在介電層120的上表面S2上覆蓋防焊層140，以使防焊層140覆蓋埋入式細線路132a、132b，但曝露出凹陷焊墊134a、134b。此時，根據本發明之實施例，凹陷焊墊134a、134b的上表面低於介電層120的上表面。
最後，如第11圖所示，將晶片200的金屬凸塊210a、210b，以覆晶方式分別與基板100的凹陷焊墊134a、134b對位並回焊處理後接合，而形成一封裝結構300，金屬凸塊210a、210b例如錫、銅。綜上所示，本發明提供一種具有凹陷焊墊之基板、採用此基板之封裝結構及此基板之製作方法。此具有凹陷焊墊之基板係先由雷射蝕刻技術形成其焊墊溝槽及細線路溝槽，再同時將金屬填入焊墊溝槽及細線路溝槽中。如此，以雷射蝕刻技術所形成的焊墊溝槽及細線路溝槽可具有更小的尺寸，用以形成更精密的基板，其具有更精細的焊墊及細線路的線寬及間距。
此外，焊墊的凹陷區域被突出的外圍防溢結構所圍繞，如此一來，具有外圍防溢結構的凹陷焊墊可防止形成於其凹陷區域上之化鍍錫或者錫球溢流，避免造成短路。而在以錫球替換金屬凸塊的例子中(如第2B圖)，本發明因具有凹陷焊墊所以相較於習知技術另具有封裝後整體厚度減小、錫球間接觸的機率減少等優點。
本發明的優點還包括：(1)可經由控制凹陷焊墊的凹陷深度以及化鍍錫層的厚度，來有效防止化鍍錫層溢流，不論是凹陷式的化鍍錫層或者是平/凸式的化鍍錫層，具有中央凹陷的凹陷焊墊都可避免回焊處理時化鍍錫層溢流的問題。(2)採用雷射蝕刻及埋線技術，相較於習知之蝕刻微影製程定義防焊開口技術，可形成尺寸以及間距更小的焊墊。
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。
100．．．基板
110．．．核心層
112．．．第一線路圖案
120．．．介電層
130．．．第二線路圖案
130’．．．金屬層
132a、132b．．．埋入式細線路
134a、134b．．．凹陷焊墊
140．．．防焊層
150．．．預焊錫層
200．．．晶片
210a、210b．．．金屬凸塊
410a、410b．．．錫球
300．．．封裝結構
300’．．．封裝結構
310．．．底膠
A．．．凹陷區域
B．．．外圍防溢結構
A1．．．覆晶接合區域
A2．．．線路區域
L．．．線距
R1、R2．．．焊墊溝槽
S．．．線寬
S1．．．表面
S2．．．上表面
S3．．．主動面
T1、T2．．．細線路溝槽
V．．．孔洞
第1圖係為依據本發明一較佳實施例所繪示的具有凹陷焊墊之基板之剖面示意圖。
第2A圖係為依據本發明一較佳實施例所繪示的封裝結構之剖面示意圖。
第2B圖係為依據本發明另一較佳實施例所繪示的封裝結構之剖面示意圖。
第3-11圖例示本發明具有凹陷焊墊之基板之製作流程圖。
100．．．基板
110．．．核心層
112．．．第一線路圖案
120．．．介電層
130．．．第二線路圖案
132a、132b．．．埋入式細線路
134a、134b．．．凹陷焊墊
140．．．防焊層
150．．．預焊錫層
A．．．凹陷區域
B．．．外圍防溢結構
A1．．．覆晶接合區域
A2．．．線路區域
L．．．線距
S．．．線寬
S1．．．表面
S2．．．上表面

Claims (15)

  1. 一種具有凹陷焊墊之基板，包含有：一核心層，其表面設有一第一線路圖案；一介電層，位於該核心層的該表面上，且覆蓋該第一線路圖案；一第二線路圖案，嵌入在該介電層的一上表面，該第二線路圖案包含有複數條埋入式細線路以及複數個具有外圍防溢結構的埋入式凹陷焊墊，其中該些埋入式凹陷焊墊位於一覆晶接合區域內；一預焊錫層，設於各該埋入式凹陷焊墊上，其中該預焊錫層的頂面低於該埋入式凹陷焊墊的外圍防溢結構；以及一防焊層，位於該覆晶接合區域之外，使得該些埋入式凹陷焊墊於該覆晶接合區域被曝露出來。
  2. 如申請專利範圍第1項所述之具有凹陷焊墊之基板，其中該些埋入式細線路與該些埋入式凹陷焊墊係位於同一水平面，且該水平面係平行於該介電層的該上表面。
  3. 如申請專利範圍第1項所述之具有凹陷焊墊之基板，其中各該埋入式凹陷焊墊具有一凹陷區域。
  4. 如申請專利範圍第1項所述之具有凹陷焊墊之基板，其中該預焊錫層包含有一化鍍錫(ImSn)層。
  5. 一種封裝結構，包含有： 一基板，包含有一覆晶接合區域，於該覆晶接合區域內設有複數個具有外圍防溢結構的埋入式凹陷焊墊，且該基板另包含一防焊層，位於該覆晶接合區域之外，使得該些埋入式凹陷焊墊於該覆晶接合區域被曝露出來；一晶片，其主動面具有複數個金屬凸塊，以覆晶方式分別與該覆晶接合區域內的該些埋入式凹陷焊墊接合；一預焊錫層，設於各該些埋入式凹陷焊墊上，其中該預焊錫層的頂面低於該埋入式凹陷焊墊的外圍防溢結構；一底膠(underfill)，填入於該基板與該晶片之間的該覆晶接合區域內。
  6. 如申請專利範圍第5項所述之封裝結構，其中該基板另包含有複數條埋入式細線路，位於被該防焊層覆蓋住的該線路區域內。
  7. 申請專利範圍第6項所述之封裝結構，其中該些埋入式凹陷焊墊與該些埋入式細線路均埋入於該基板上的一介電層中，該些埋入式凹陷焊墊與該些埋入式細線路均位於同一水平面，且該水平面係平行於該介電層的一上表面。
  8. 如申請專利範圍第5項所述之封裝結構，其中該預焊錫層包含有一化鍍錫層。
  9. 一種具有凹陷焊墊之基板的製法，包含有： 提供一核心層，其表面具有一第一線路圖案；於該核心層上壓合一介電層，覆蓋住該第一線路圖案；於該介電層的一上表面形成複數條細線路溝槽以及複數個焊墊溝槽；於該些細線路溝槽以及該些焊墊溝槽填入金屬，俾分別形成複數條埋入式細線路以及複數個具有外圍防溢結構的埋入式凹陷焊墊，其中該些埋入式凹陷焊墊位於一覆晶接合區域內；於該些凹陷焊墊上各形成一預焊錫層，其中該預焊錫層的頂面低於該埋入式凹陷焊墊的外圍防溢結構；以及於該介電層的該上表面覆蓋一防焊層，該防焊層位於該覆晶結合區域之外，使得該些埋入式凹陷焊墊於該覆晶接合區域被曝露出來。
  10. 如申請專利範圍第9項所述之具有凹陷焊墊之基板的製法，其中在形成該焊墊溝槽之後，另包含：於該焊墊溝槽內形成一孔洞，連通至該第一線路圖案。
  11. 如申請專利範圍第9項所述之具有凹陷焊墊之基板的製法，其中該些細線路溝槽以及該些焊墊溝槽係以雷射蝕刻技術形成。
  12. 一種封裝結構，包含有：一基板，包含有一覆晶接合區域，於該覆晶接合區域內設有複數個具有外圍防溢結構的埋入式凹陷焊墊，且該基板另包含一防焊層，位於該覆晶接合區域之外，使得該些埋入式凹陷焊墊於該覆晶 接合區域被曝露出來；一晶片，其主動面具有複數個錫球，以覆晶方式分別與該覆晶接合區域內的該些埋入式凹陷焊墊接合；一預焊錫層，設於各該些埋入式凹陷焊墊上，其中該預焊錫層的頂面低於該埋入式凹陷焊墊的外圍防溢結構；以及一底膠，填入於該基板與該晶片之間的該覆晶接合區域內。
  13. 如申請專利範圍第12項所述之封裝結構，其中該基板另包含有複數條埋入式細線路，位於被該防焊層覆蓋住的該線路區域內。
  14. 申請專利範圍第13項所述之封裝結構，其中該些埋入式凹陷焊墊與該些埋入式細線路均埋入於該基板上的一介電層中，該些埋入式凹陷焊墊與該些埋入式細線路均位於同一水平面，且該水平面係平行於該介電層的一上表面。
  15. 如申請專利範圍第12項所述之封裝結構，其中該預焊錫層包含有一化鍍錫層。
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