TWI586092B - Single-stage ac-to-dc converter - Google Patents
Single-stage ac-to-dc converter Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Description
本發明是有關於電源轉換技術,特別是指一種單級交流至直流轉換器。 The present invention relates to power conversion techniques, and more particularly to a single stage AC to DC converter.
交流至直流轉換器可以採用單級架構或多級架構來將一個交流的輸入電壓轉換成一個直流的輸出電壓。與多級交流至直流轉換器相比,單級交流至直流轉換器具有較高的轉換效率、較簡單的控制邏輯、較少的元件及較低的成本。對於單級交流至直流轉換器而言,如何同時達到輸入電壓具有較寬的範圍及輸出電壓具有較低的漣波是一個重要的課題。 The AC to DC converter can use a single-stage architecture or a multi-stage architecture to convert an AC input voltage into a DC output voltage. Single-stage AC to DC converters have higher conversion efficiency, simpler control logic, fewer components, and lower cost than multi-level AC to DC converters. For a single-stage AC to DC converter, how to achieve a wide range of input voltages at the same time and a low chopping of the output voltage is an important issue.
因此,本發明之目的即在提供一種單級交流至直流轉換器,可以同時達到輸入電壓具有較寬的範圍及輸出電壓具有較低的漣波。 Accordingly, it is an object of the present invention to provide a single stage AC to DC converter that achieves a wide range of input voltages and a low chopping of the output voltage.
於是,本發明單級交流至直流轉換器包含一個總線電容、一個功率因數校正模組、一個諧振轉換模組及一個控制模組。該功率因數校正模組耦接到該總線電容, 適用於接收一個交流的輸入電壓,還接收一個第一控制信號及一個第二控制信號,且根據該輸入電壓、該第一控制信號及該第二控制信號,產生一個橫跨該總線電容且為直流的總線電壓,及一個在該總線電壓及零之間切換的中間電壓。該諧振轉換模組耦接到該功率因數校正模組以接收該中間電壓,且根據該中間電壓產生一個直流的輸出電壓。該控制模組耦接到該總線電容以接收該總線電壓,且根據該總線電壓產生給該功率因數校正模組的該第一控制信號及該第二控制信號。該第一控制信號及該第二控制信號中的每一個在一個有效狀態及一個非有效狀態之間切換,且其工作比關聯於該總線電壓。 Thus, the single-stage AC to DC converter of the present invention includes a bus capacitor, a power factor correction module, a resonant converter module, and a control module. The power factor correction module is coupled to the bus capacitor, Suitable for receiving an AC input voltage, further receiving a first control signal and a second control signal, and generating a voltage across the bus according to the input voltage, the first control signal and the second control signal The DC bus voltage and an intermediate voltage that switches between the bus voltage and zero. The resonant converter module is coupled to the power factor correction module to receive the intermediate voltage, and generates a DC output voltage according to the intermediate voltage. The control module is coupled to the bus capacitor to receive the bus voltage, and generates the first control signal and the second control signal to the power factor correction module according to the bus voltage. Each of the first control signal and the second control signal switches between an active state and an inactive state, and a ratio of its operation is associated with the bus voltage.
本發明之功效在於:藉由該控制模組根據該總線電壓調整該第一控制信號及該第二控制信號中的每一個的工作比,該輸入電壓可以具有較寬的範圍;且藉由該總線電容充當電源轉換的中繼站,該輸出電壓可以具有較低的漣波。 The effect of the present invention is that the control module adjusts the working ratio of each of the first control signal and the second control signal according to the bus voltage, and the input voltage can have a wider range; The bus capacitor acts as a relay for power conversion, which can have low chopping.
1‧‧‧電壓源 1‧‧‧voltage source
2‧‧‧負載 2‧‧‧load
3‧‧‧總線電容 3‧‧‧Bus Capacitor
4‧‧‧功率因數校正模組 4‧‧‧Power Factor Correction Module
41‧‧‧整流電路 41‧‧‧Rectifier circuit
42‧‧‧第一開關 42‧‧‧First switch
421‧‧‧本質二極體 421‧‧‧ Essential Dipole
422‧‧‧寄生電容 422‧‧‧Parasitic capacitance
43‧‧‧第二開關 43‧‧‧Second switch
431‧‧‧本質二極體 431‧‧‧ Essential Diode
432‧‧‧寄生電容 432‧‧‧Parasitic capacitance
44‧‧‧升壓電感 44‧‧‧Boost Inductance
45‧‧‧第三開關 45‧‧‧third switch
5‧‧‧諧振轉換模組 5‧‧‧Resonance conversion module
51‧‧‧變壓器 51‧‧‧Transformers
511‧‧‧一次繞組 511‧‧‧First winding
512‧‧‧二次繞組 512‧‧‧second winding
531‧‧‧第四開關 531‧‧‧fourth switch
532‧‧‧輸出電容 532‧‧‧ output capacitor
54‧‧‧諧振電感 54‧‧‧Resonant inductance
6‧‧‧控制模組 6‧‧‧Control module
iD2‧‧‧流過第四開關的電流 iD2‧‧‧current flowing through the fourth switch
iLb‧‧‧流過升壓電感的電流 iLb‧‧‧current flowing through the boost inductor
iLm‧‧‧流過激磁電感的電流 iLm‧‧‧current flowing through the magnetizing inductor
iLr‧‧‧流過漏電感的電流 iLr‧‧‧current flowing through the leakage inductance
t‧‧‧時間 t‧‧‧Time
t0-t6‧‧‧時點 T0-t6‧‧‧
Td‧‧‧死區時段的長度 Length of the Td‧‧‧ dead zone
Ta1‧‧‧第一控制信號的有效時 段的長度 Ta1‧‧‧ When the first control signal is valid Length of the segment
Ta2‧‧‧第二控制信號的有效時 段的長度 When the Ta2‧‧‧ second control signal is valid Length of the segment
Ts‧‧‧切換週期的長度 Length of Ts‧‧‧ switching cycle
Vbus‧‧‧總線電壓 Vbus‧‧‧ bus voltage
513‧‧‧激磁電感 513‧‧‧Magnetic inductance
514‧‧‧漏電感 514‧‧‧Leakage inductance
52‧‧‧諧振電容 52‧‧‧Resonant capacitor
53‧‧‧整流濾波電路 53‧‧‧Rectifier filter circuit
Vgs1‧‧‧第一控制信號 Vgs1‧‧‧ first control signal
Vgs2‧‧‧第二控制信號 Vgs2‧‧‧ second control signal
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
Vout‧‧‧輸出電壓 Vout‧‧‧ output voltage
本發明之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:圖1是一個電路方塊圖,說明本發明單級交流至直流轉換器的實施例;圖2是一個時序圖,說明實施例的一個第一控制信號及一個第二控制信號; 圖3是一個時序圖,說明實施例的操作;圖4至圖9是等效電路圖,分別說明實施例操作在第一模式至第六模式時的情況;及圖10是一個電路方塊圖,說明實施例的一個變形。 Other features and advantages of the present invention will be apparent from the embodiments of the present invention, wherein: FIG. 1 is a circuit block diagram illustrating an embodiment of a single-stage AC to DC converter of the present invention; a timing diagram illustrating a first control signal and a second control signal of the embodiment; 3 is a timing chart illustrating the operation of the embodiment; FIGS. 4 to 9 are equivalent circuit diagrams respectively illustrating the case where the embodiment operates in the first mode to the sixth mode; and FIG. 10 is a circuit block diagram illustrating A variation of the embodiment.
參閱圖1,本發明單級交流至直流轉換器的實施例適用於從一個電壓源1接收一個交流的輸入電壓Vin,將輸入電壓Vin轉換成一個直流的輸出電壓Vout,且適用於將輸出電壓Vout輸出到一個負載2。本實施例的單級交流至直流轉換器包括一個總線電容3、一個功率因數校正模組4、一個諧振轉換模組5及一個控制模組6。 Referring to FIG. 1, an embodiment of the single-stage AC to DC converter of the present invention is adapted to receive an AC input voltage Vin from a voltage source 1, convert the input voltage Vin into a DC output voltage Vout, and apply the output voltage. Vout is output to a load of 2. The single-stage AC to DC converter of this embodiment includes a bus capacitor 3, a power factor correction module 4, a resonant converter module 5, and a control module 6.
總線電容3具有一個第一端及一個第二端。 The bus capacitor 3 has a first end and a second end.
功率因數校正模組4耦接到總線電容3,適用於耦接到電壓源1以接收輸入電壓Vin,還接收一個第一控制信號Vgs1及一個第二控制信號Vgs2,且根據輸入電壓Vin、第一控制信號Vgs1及第二控制信號Vgs2,產生一個橫跨總線電容3且為直流的總線電壓Vbus,及一個在總線電壓Vbus及零之間切換的中間電壓。 The power factor correction module 4 is coupled to the bus capacitor 3, and is adapted to be coupled to the voltage source 1 to receive the input voltage Vin, and further receives a first control signal Vgs1 and a second control signal Vgs2, and according to the input voltage Vin, A control signal Vgs1 and a second control signal Vgs2 generate a bus voltage Vbus across the bus capacitor 3 and being DC, and an intermediate voltage switching between the bus voltages Vbus and zero.
在本實施例中,總線電壓Vbus大於輸入電壓Vin的振幅,且功率因數校正模組4包括一個整流電路41、一個第一開關42、一個第二開關43、一個升壓電感44及一個第三開關45。整流電路41具有適用於耦接到電壓源1以接收輸入電壓Vin的一個第一輸入端及一個第 二輸入端。整流電路41還具有一個第一輸出端,及一個耦接到總線電容3的第二端的第二輸出端。第一開關42具有一個耦接到總線電容3的第一端的第一端,一個第二端,及一個接收第一控制信號Vgs1的控制端。第二開關43具有一個耦接到第一開關42的第二端的第一端,一個耦接到整流電路41的第二輸出端的第二端,及一個接收第二控制信號Vgs2的控制端。第二開關43的跨壓充當中間電壓。升壓電感44與第三開關45在整流電路41的第一輸出端及第一開關42的第二端之間串聯。 In this embodiment, the bus voltage Vbus is greater than the amplitude of the input voltage Vin, and the power factor correction module 4 includes a rectifier circuit 41, a first switch 42, a second switch 43, a boost inductor 44, and a third Switch 45. The rectifier circuit 41 has a first input terminal adapted to be coupled to the voltage source 1 to receive the input voltage Vin and a first Two inputs. The rectifier circuit 41 also has a first output and a second output coupled to the second end of the bus capacitor 3. The first switch 42 has a first end coupled to the first end of the bus capacitor 3, a second end, and a control terminal receiving the first control signal Vgs1. The second switch 43 has a first end coupled to the second end of the first switch 42, a second end coupled to the second output of the rectifier circuit 41, and a control terminal receiving the second control signal Vgs2. The voltage across the second switch 43 acts as an intermediate voltage. The boost inductor 44 and the third switch 45 are connected in series between the first output of the rectifier circuit 41 and the second terminal of the first switch 42.
在本實施例中,整流電路41是一個包括四個開關(例如四個二極體)的全橋整流電路。第一開關42是一個N型金氧半場效電晶體,且此N型金氧半場效電晶體具有一個充當第一開關42的第一端的汲極、一個充當第一開關42的第二端的源極,及一個充當第一開關42的控制端的閘極。第二開關43是一個N型金氧半場效電晶體,且此N型金氧半場效電晶體具有一個充當第二開關43的第一端的汲極、一個充當第二開關43的第二端的源極,及一個充當第二開關43的控制端的閘極。升壓電感44具有一個耦接到整流電路41的第一輸出端的第一端,及一個第二端。第三開關45是一個二極體,且此二極體具有一個耦接到升壓電感44的第二端的陽極,及一個耦接到第一開關42的第二端的陰極。 In the present embodiment, the rectifier circuit 41 is a full bridge rectifier circuit including four switches (for example, four diodes). The first switch 42 is an N-type MOS field effect transistor, and the N-type MOSFET has a drain serving as a first end of the first switch 42 and a second end serving as the first switch 42. a source, and a gate serving as a control terminal of the first switch 42. The second switch 43 is an N-type MOS field effect transistor, and the N-type MOSFET has a drain serving as a first end of the second switch 43 and a second end serving as a second switch 43. a source, and a gate serving as a control terminal of the second switch 43. The boost inductor 44 has a first end coupled to the first output of the rectifier circuit 41 and a second end. The third switch 45 is a diode having an anode coupled to the second end of the boost inductor 44 and a cathode coupled to the second end of the first switch 42.
諧振轉換模組5耦接到功率因數校正模組4以接收中間電壓,適用於耦接到負載2,且根據中間電壓產 生給負載2的輸出電壓Vout。 The resonant converter module 5 is coupled to the power factor correction module 4 to receive an intermediate voltage, is adapted to be coupled to the load 2, and is produced according to the intermediate voltage The output voltage Vout is given to the load 2.
在本實施例中,輸出電壓Vout小於總線電壓Vbus,且諧振轉換模組5包括一個變壓器51、一個諧振電容52及一個整流濾波電路53。變壓器51包括一個一次繞組511及一個二次繞組512,且一次繞組511的匝數大於二次繞組512的匝數。諧振電容52與一次繞組511在第二開關43的兩端之間串聯,以接收中間電壓。整流濾波電路53耦接到二次繞組512,且適用於耦接到負載2以提供輸出電壓Vout。 In this embodiment, the output voltage Vout is smaller than the bus voltage Vbus, and the resonant converter module 5 includes a transformer 51, a resonant capacitor 52, and a rectifying filter circuit 53. The transformer 51 includes a primary winding 511 and a secondary winding 512, and the number of turns of the primary winding 511 is greater than the number of turns of the secondary winding 512. The resonant capacitor 52 and the primary winding 511 are connected in series between both ends of the second switch 43 to receive an intermediate voltage. Rectifier filter circuit 53 is coupled to secondary winding 512 and is adapted to be coupled to load 2 to provide an output voltage Vout.
在本實施例中,一次繞組511及二次繞組512中的每一個具有一個第一端及一個第二端,一次繞組511的第一端及二次繞組512的第一端具有相同的電壓極性,且一次繞組511的第二端耦接到第二開關43的第二端。諧振電容52耦接在第二開關43的第一端及一次繞組511的第一端之間。整流濾波電路53包括一個用於整流的第四開關531及一個用於濾波的輸出電容532。輸出電容532並聯於負載2,且第四開關531及並聯的輸出電容532與負載2在二次繞組512的兩端之間串聯。輸出電容532具有一個第一端,及一個耦接到二次繞組512的第一端的第二端,且其跨壓充當輸出電壓Vout。第四開關531是一個二極體,且此二極體具有一個耦接到二次繞組512的第二端的陽極,及一個耦接到輸出電容532的第一端的陰極。 In the present embodiment, each of the primary winding 511 and the secondary winding 512 has a first end and a second end, and the first end of the primary winding 511 and the first end of the secondary winding 512 have the same voltage polarity. And the second end of the primary winding 511 is coupled to the second end of the second switch 43. The resonant capacitor 52 is coupled between the first end of the second switch 43 and the first end of the primary winding 511. The rectifying filter circuit 53 includes a fourth switch 531 for rectification and an output capacitor 532 for filtering. The output capacitor 532 is connected in parallel to the load 2, and the fourth switch 531 and the parallel output capacitor 532 are connected in series with the load 2 between the two ends of the secondary winding 512. The output capacitor 532 has a first end and a second end coupled to the first end of the secondary winding 512, and its voltage across the voltage acts as an output voltage Vout. The fourth switch 531 is a diode having an anode coupled to the second end of the secondary winding 512 and a cathode coupled to the first end of the output capacitor 532.
參閱圖1與圖2,控制模組6耦接到總線電容 3及輸出電容532以分別接收總線電壓Vbus及輸出電壓Vout,還耦接到第一開關42的控制端及第二開關43的控制端,且根據總線電壓Vbus及輸出電壓Vout產生分別給第一開關42及第二開關43的第一控制信號Vgs1及第二控制信號Vgs2。第一控制信號Vgs1及第二控制信號Vgs2中的每一個在一個有效狀態(例如邏輯高準位,且對應到第一開關42及第二開關43中的相對應者導通)及一個非有效狀態(例如邏輯低準位,且對應到第一開關42及第二開關43中的相對應者不導通)之間切換,且其工作比及其切換週期分別關聯於總線電壓Vbus及輸出電壓Vout。 Referring to FIG. 1 and FIG. 2, the control module 6 is coupled to the bus capacitor. 3 and the output capacitor 532 to receive the bus voltage Vbus and the output voltage Vout respectively, and is also coupled to the control end of the first switch 42 and the control end of the second switch 43, and respectively generate the first according to the bus voltage Vbus and the output voltage Vout The first control signal Vgs1 and the second control signal Vgs2 of the switch 42 and the second switch 43. Each of the first control signal Vgs1 and the second control signal Vgs2 is in an active state (eg, a logic high level, and corresponds to a corresponding one of the first switch 42 and the second switch 43) and an inactive state (for example, a logic low level, and corresponding to the corresponding one of the first switch 42 and the second switch 43 is not turned on), and its duty ratio and its switching period are respectively associated with the bus voltage Vbus and the output voltage Vout.
在本實施例中,第一控制信號Vgs1及第二控制信號Vgs2具有相同的切換週期(其長度為Ts),且交替地在有效狀態。當第一控制信號Vgs1及第二控制信號Vgs2中的一個在有效狀態時,第一控制信號Vgs1及第二控制信號Vgs2中的另一個在非有效狀態。在從第一控制信號Vgs1及第二控制信號Vgs2中的一個切換到非有效狀態的每一個時點起算的一個預設的死區時段(其長度為Td)之後,第一控制信號Vgs1及第二控制信號Vgs2中的另一個才切換到有效狀態。 In the present embodiment, the first control signal Vgs1 and the second control signal Vgs2 have the same switching period (the length of which is Ts) and are alternately in an active state. When one of the first control signal Vgs1 and the second control signal Vgs2 is in an active state, the other of the first control signal Vgs1 and the second control signal Vgs2 is in an inactive state. After a predetermined dead zone period (the length of which is Td) from one of the first control signal Vgs1 and the second control signal Vgs2 to the inactive state, the first control signal Vgs1 and the second The other of the control signals Vgs2 is switched to the active state.
在本實施例中,控制模組6在總線電壓Vbus大於一個預設的第一目標電壓時,增加第一控制信號Vgs1的工作比,且減少第二控制信號Vgs2的工作比,而在總線電壓Vbus小於第一目標電壓時,減少第一控制 信號Vgs1的工作比,且增加第二控制信號Vgs2的工作比,以將總線電壓Vbus穩定在第一目標電壓。控制模組6還在輸出電壓Vout大於一個預設的第二目標電壓時,減少第一控制信號Vgs1及第二控制信號Vgs2中的每一個的切換週期,而在輸出電壓Vout小於第二目標電壓時,增加第一控制信號Vgs1及第二控制信號Vgs2中的每一個的切換週期,以將輸出電壓Vout穩定在第二目標電壓。因此,對於第一控制信號Vgs1而言,其有效時段(其長度為Ta1)由其切換週期及其工作比決定,且對於第二控制信號Vgs2而言,其有效時段(其長度為Ta2)由其切換週期及其工作比決定。 In this embodiment, when the bus voltage Vbus is greater than a preset first target voltage, the control module 6 increases the working ratio of the first control signal Vgs1 and reduces the working ratio of the second control signal Vgs2, and the bus voltage Reduce the first control when Vbus is less than the first target voltage The duty ratio of the signal Vgs1 is increased and the duty ratio of the second control signal Vgs2 is increased to stabilize the bus voltage Vbus at the first target voltage. The control module 6 also reduces the switching period of each of the first control signal Vgs1 and the second control signal Vgs2 when the output voltage Vout is greater than a preset second target voltage, and the output voltage Vout is smaller than the second target voltage. At this time, a switching period of each of the first control signal Vgs1 and the second control signal Vgs2 is increased to stabilize the output voltage Vout at the second target voltage. Therefore, for the first control signal Vgs1, its effective period (the length of which is Ta1) is determined by its switching period and its operating ratio, and for the second control signal Vgs2, its effective period (the length of which is Ta2) is Its switching period and its work ratio are determined.
在本實施例中,在控制模組6的控制下,功率因數校正模組4操作在不連續導通模式,以允許電壓源1所提供的電流的相位追隨其所提供的輸入電壓Vin的相位,藉此得到高的功率因數。 In the present embodiment, under the control of the control module 6, the power factor correction module 4 operates in a discontinuous conduction mode to allow the phase of the current supplied by the voltage source 1 to follow the phase of the input voltage Vin provided by it. Thereby a high power factor is obtained.
參閱圖3至圖9,本實施例的單級交流至直流轉換器循環地操作在第一模式至第六模式。在圖4至圖9中,第一開關42及第二開關43中的每一個的一個本質二極體421、431及一個寄生電容422、432被畫出,用於模擬變壓器51的非理想特性的一個假想的激磁電感513及一個假想的漏電感514被畫出,控制器6(見圖1)沒被畫出,且導通的元件以實線畫出,而不導通的元件以虛線畫出。圖3畫出第一控制信號Vgs1、第二控制信號Vgs2、流經升壓電感44的電流iLb、流經激磁電感513 的電流iLm、流經漏電感514的電流iLr及流經第四開關531的電流iD2中的每一個對時間t的關係。需注意的是,在圖3中,電流iLb、iLm、iLr、iD2中的每一個的波形同時傳達了關於此電流的大小及方向的資訊(即此電流的正值及負值指示此電流的相反方向),而在圖4至圖9中,電流iLb、iLm、iLr、iD2中的每一個的方向由一個相對應的箭頭表示。此外,諧振電容52及漏電感514可以在一個由諧振電容52的電容值及漏電感514的電感值決定的諧振頻率諧振。 Referring to FIGS. 3 through 9, the single-stage AC to DC converter of the present embodiment operates cyclically in the first mode to the sixth mode. In FIGS. 4 to 9, an intrinsic diode 421, 431 and a parasitic capacitance 422, 432 of each of the first switch 42 and the second switch 43 are drawn for simulating the non-ideal characteristics of the transformer 51. An imaginary magnetizing inductance 513 and an imaginary leakage inductance 514 are drawn, the controller 6 (see Fig. 1) is not drawn, and the conducting components are drawn in solid lines, and the non-conducting components are drawn in dashed lines. . 3 shows a first control signal Vgs1, a second control signal Vgs2, a current iLb flowing through the boosting inductor 44, and a magnetic flux inductance 513. The current iLm, the current iLr flowing through the leakage inductance 514, and the current iD2 flowing through the fourth switch 531 are related to time t. It should be noted that in Figure 3, the waveform of each of the currents iLb, iLm, iLr, iD2 simultaneously conveys information about the magnitude and direction of the current (ie, positive and negative values of this current indicate the current) In the opposite direction), in FIGS. 4 to 9, the direction of each of the currents iLb, iLm, iLr, iD2 is indicated by a corresponding arrow. In addition, the resonant capacitor 52 and the leakage inductance 514 can resonate at a resonant frequency determined by the capacitance of the resonant capacitor 52 and the inductance of the leakage inductance 514.
參閱圖3與圖4,本實施例的單級交流至直流轉換器在時點t0到時點t1期間操作在第一模式。在第一模式中,第一開關42不導通,且第二開關43以零電壓切換方式切換為導通。第三開關45切換為導通,升壓電感44被充電,且流經升壓電感44的電流iLb的大小從零線性上升。流經激磁電感513的電流iLm的大小逐漸下降到零,然後其方向反轉且其大小從零逐漸上升。流經漏電感514的電流iLr的大小逐漸下降到零,然後其方向反轉且其大小從零逐漸上升到最大值後下降。流經激磁電感513的電流iLm的大小不等於流經漏電感514的電流iLr的大小。第四開關531切換為導通,且能量經由變壓器51及第四開關531傳遞到輸出電容532及負載2。第一開關42的跨壓等於總線電壓Vbus。第二開關43的跨壓等於零。圖4只畫出流經激磁電感513的電流iLm的方向及漏電感514的電流iLr的方向反轉後的情況。 Referring to FIGS. 3 and 4, the single-stage AC to DC converter of the present embodiment operates in the first mode during a time point t0 to a time point t1. In the first mode, the first switch 42 is not turned on, and the second switch 43 is switched to be turned on in a zero voltage switching manner. The third switch 45 is switched to be turned on, the boost inductor 44 is charged, and the magnitude of the current iLb flowing through the boost inductor 44 rises linearly from zero. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually drops to zero, and then its direction is reversed and its magnitude gradually rises from zero. The magnitude of the current iLr flowing through the leakage inductance 514 gradually decreases to zero, and then its direction is reversed and its magnitude gradually rises from zero to a maximum value and then falls. The magnitude of the current iLm flowing through the magnetizing inductance 513 is not equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 is switched to be turned on, and energy is transferred to the output capacitor 532 and the load 2 via the transformer 51 and the fourth switch 531. The voltage across the first switch 42 is equal to the bus voltage Vbus. The voltage across the second switch 43 is equal to zero. 4 shows only the direction in which the direction of the current iLm flowing through the magnetizing inductance 513 and the direction of the current iLr of the leakage inductance 514 are reversed.
參閱圖3與圖5,本實施例的單級交流至直流轉換器在時點t1到時點t2期間操作在第二模式。在第二模式中,第一開關42維持在不導通,且第二開關43維持在導通。第三開關45維持在導通,升壓電感44被充電,且流經升壓電感44的電流iLb的大小線性上升。流經激磁電感513的電流iLm的大小逐漸上升。流經漏電感514的電流iLr的大小逐漸上升。流經激磁電感513的電流iLm的大小等於流經漏電感514的電流iLr的大小。第四開關531以零電流切換方式切換為不導通,且儲存在輸出電容532中的能量被釋放到負載2。第一開關42的跨壓等於總線電壓Vbus。第二開關43的跨壓等於零。 Referring to FIGS. 3 and 5, the single-stage AC to DC converter of the present embodiment operates in the second mode during a time point t1 to a time point t2. In the second mode, the first switch 42 remains non-conductive and the second switch 43 remains on. The third switch 45 is maintained in conduction, the boost inductor 44 is charged, and the magnitude of the current iLb flowing through the boost inductor 44 rises linearly. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually rises. The magnitude of the current iLr flowing through the leakage inductance 514 gradually increases. The magnitude of the current iLm flowing through the magnetizing inductance 513 is equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 switches to non-conduction in a zero current switching mode, and the energy stored in the output capacitor 532 is released to the load 2. The voltage across the first switch 42 is equal to the bus voltage Vbus. The voltage across the second switch 43 is equal to zero.
參閱圖3與圖6,本實施例的單級交流至直流轉換器在時點t2到時點t3期間操作在第三模式。在第三模式中,第一開關11維持在不導通,且第二開關12切換為不導通。第三開關45維持在導通,儲存在升壓電感44中的能量被釋放,且流經升壓電感44的電流iLb的大小線性下降。流經激磁電感513的電流iLm的大小逐漸下降。流經漏電感514的電流iLr的大小逐漸下降。流經激磁電感513的電流iLm的大小等於流經漏電感514的電流iLr的大小。第四開關531維持在不導通,且儲存在輸出電容532中的能量被釋放到負載2。儲存在第一開關42的寄生電容422中的能量被釋放,使得第一開關42的跨壓從總線電壓Vbus下降到零,然後第一開關42的本質二極體421切換為導通,使得第一開關42的跨壓維 持在零。第二開關43的寄生電容432被充電,使得第二開關43的跨壓從零上升到總線電壓Vbus。總線電容3被充電。圖6只畫出第二開關43的寄生電容432充電完成後的情況。 Referring to FIGS. 3 and 6, the single-stage AC to DC converter of the present embodiment operates in the third mode during a time point t2 to a time point t3. In the third mode, the first switch 11 remains non-conductive and the second switch 12 switches to non-conduction. The third switch 45 is maintained in conduction, the energy stored in the boost inductor 44 is released, and the magnitude of the current iLb flowing through the boost inductor 44 decreases linearly. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually decreases. The magnitude of the current iLr flowing through the leakage inductance 514 gradually decreases. The magnitude of the current iLm flowing through the magnetizing inductance 513 is equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 is maintained non-conducting, and the energy stored in the output capacitor 532 is released to the load 2. The energy stored in the parasitic capacitance 422 of the first switch 42 is released, so that the voltage across the first switch 42 drops from the bus voltage Vbus to zero, and then the intrinsic diode 421 of the first switch 42 is switched to be turned on, so that the first Cross-pressure dimension of switch 42 Hold at zero. The parasitic capacitance 432 of the second switch 43 is charged such that the voltage across the second switch 43 rises from zero to the bus voltage Vbus. The bus capacitor 3 is charged. FIG. 6 only shows the case after the parasitic capacitance 432 of the second switch 43 is charged.
參閱圖3與圖7,本實施例的單級交流至直流轉換器在時點t3到時點t4期間操作在第四模式。在第四模式中,第一開關11以零電壓切換方式切換為導通,且第二開關12維持在不導通。第三開關45維持在導通,儲存在升壓電感44中的能量被釋放,且流經升壓電感44的電流iLb的大小線性下降到零。流經激磁電感513的電流iLm的大小逐漸下降到零,然後其方向反轉且其大小從零逐漸上升。流經漏電感514的電流iLr的大小逐漸下降到零,然後其方向反轉且其大小從零逐漸上升。流經激磁電感513的電流iLm的大小等於流經漏電感514的電流iLr的大小。第四開關531維持在不導通,且儲存在輸出電容532中的能量被釋放到負載2。第一開關42的跨壓等於零。第二開關43的跨壓等於總線電壓Vbus。總線電容3被充電,然後儲存在其中的能量被釋放。圖7只畫出流經激磁電感513的電流iLm的方向及流經漏電感514的電流iLr的方向反轉前的情況。 Referring to FIGS. 3 and 7, the single-stage AC to DC converter of the present embodiment operates in the fourth mode during a time point t3 to a time point t4. In the fourth mode, the first switch 11 is switched to be turned on in a zero voltage switching manner, and the second switch 12 is maintained in a non-conducting state. The third switch 45 is maintained in conduction, the energy stored in the boost inductor 44 is released, and the magnitude of the current iLb flowing through the boost inductor 44 linearly drops to zero. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually drops to zero, and then its direction is reversed and its magnitude gradually rises from zero. The magnitude of the current iLr flowing through the leakage inductance 514 gradually decreases to zero, and then its direction is reversed and its magnitude gradually rises from zero. The magnitude of the current iLm flowing through the magnetizing inductance 513 is equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 is maintained non-conducting, and the energy stored in the output capacitor 532 is released to the load 2. The voltage across the first switch 42 is equal to zero. The voltage across the second switch 43 is equal to the bus voltage Vbus. The bus capacitor 3 is charged and then the energy stored therein is released. FIG. 7 only shows the direction before the direction of the current iLm flowing through the magnetizing inductance 513 and the direction of the current iLr flowing through the leakage inductance 514.
參閱圖3與圖8,本實施例的單級交流至直流轉換器在時點t4到時點t5期間操作在第五模式。在第五模式中,第一開關42維持在導通,且第二開關43維持在不導通。第三開關45以零電流切換方式切換為不導通, 且流經升壓電感44的電流iLb的大小等於零。流經激磁電感513的電流iLm的大小逐漸上升。流經漏電感514的電流iLr的大小逐漸上升。流經激磁電感513的電流iLm的大小等於流經漏電感514的電流iLr的大小。第四開關531維持在不導通,且儲存在輸出電容532中的能量被釋放到負載2。第一開關42的跨壓等於零。第二開關43的跨壓等於總線電壓Vbus。儲存在總線電容3中的能量被釋放。 Referring to FIGS. 3 and 8, the single-stage AC to DC converter of the present embodiment operates in the fifth mode from time t4 to time t5. In the fifth mode, the first switch 42 is maintained in conduction and the second switch 43 is maintained in non-conduction. The third switch 45 is switched to non-conducting in a zero current switching manner. And the magnitude of the current iLb flowing through the boost inductor 44 is equal to zero. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually rises. The magnitude of the current iLr flowing through the leakage inductance 514 gradually increases. The magnitude of the current iLm flowing through the magnetizing inductance 513 is equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 is maintained non-conducting, and the energy stored in the output capacitor 532 is released to the load 2. The voltage across the first switch 42 is equal to zero. The voltage across the second switch 43 is equal to the bus voltage Vbus. The energy stored in the bus capacitor 3 is released.
參閱圖3與圖9,本實施例的單級交流至直流轉換器在時點t5到時點t6期間操作在第六模式。在第六模式中,第一開關42切換為不導通,且第二開關43維持在不導通。第三開關45維持在不導通,且流經升壓電感44的電流iLb的大小等於零。流經激磁電感513的電流iLm的大小逐漸下降。流經漏電感514的電流iLr的大小逐漸下降。流經激磁電感513的電流iLm的大小等於流經漏電感514的電流iLr的大小。第四開關531維持在不導通,且儲存在輸出電容532中的能量被釋放到負載2。第一開關42的寄生電容422被充電,使得第一開關42的跨壓從零上升到總線電壓Vbus。儲存在第二開關43的寄生電容432中的能量被釋放,使得第二開關43的跨壓從總線電壓Vbus下降到零,然後第二開關43的本質二極體431切換為導通,使得第二開關43的跨壓維持在零。圖9只畫出第一開關42的寄生電容422充電完成後的情況。 Referring to FIGS. 3 and 9, the single-stage AC to DC converter of the present embodiment operates in the sixth mode from time t5 to time t6. In the sixth mode, the first switch 42 is switched to be non-conductive, and the second switch 43 is maintained to be non-conductive. The third switch 45 is maintained non-conducting, and the magnitude of the current iLb flowing through the boost inductor 44 is equal to zero. The magnitude of the current iLm flowing through the magnetizing inductance 513 gradually decreases. The magnitude of the current iLr flowing through the leakage inductance 514 gradually decreases. The magnitude of the current iLm flowing through the magnetizing inductance 513 is equal to the magnitude of the current iLr flowing through the leakage inductance 514. The fourth switch 531 is maintained non-conducting, and the energy stored in the output capacitor 532 is released to the load 2. The parasitic capacitance 422 of the first switch 42 is charged such that the voltage across the first switch 42 rises from zero to the bus voltage Vbus. The energy stored in the parasitic capacitance 432 of the second switch 43 is released, so that the voltage across the second switch 43 drops from the bus voltage Vbus to zero, and then the intrinsic diode 431 of the second switch 43 is switched to be turned on, so that the second The voltage across the switch 43 is maintained at zero. FIG. 9 only shows the case after the parasitic capacitance 422 of the first switch 42 is charged.
參閱圖1,綜上所述,本實施例的單級交流至直流轉換器具有以下優點: Referring to FIG. 1, in summary, the single-stage AC to DC converter of this embodiment has the following advantages:
1.藉由控制器6根據總線電壓Vbus調整第一控制信號Vgs1及第二控制信號Vgs2中的每一個的工作比,可以避免總線電壓Vbus隨著負載2的狀況改變而改變。如此一來,輸入電壓Vin可以具有較寬的範圍。 1. By adjusting the duty ratio of each of the first control signal Vgs1 and the second control signal Vgs2 according to the bus voltage Vbus, the bus voltage Vbus can be prevented from changing as the condition of the load 2 changes. As a result, the input voltage Vin can have a wide range.
2.藉由總線電容3充當電源轉換的中繼站,輸出電壓Vout可以具有較低的漣波。 2. By the bus capacitor 3 acting as a relay for power conversion, the output voltage Vout can have a lower chopping.
3.藉由控制器6根據輸出電壓Vout調整第一控制信號Vgs1及第二控制信號Vgs2的每一個的切換週期,輸出電壓Vout可以是恒定的。 3. The output voltage Vout may be constant by the controller 6 adjusting the switching period of each of the first control signal Vgs1 and the second control signal Vgs2 according to the output voltage Vout.
值得注意的是,在其它實施例中,可以對本實施例做出以下修改: It should be noted that in other embodiments, the following modifications may be made to the embodiment:
1.第三開關45可以是一個N型金氧半場效電晶體。此時,控制器6還耦接到第三開關45,且控制第三開關45在導通與不導通之間的切換。 1. The third switch 45 can be an N-type gold oxide half field effect transistor. At this time, the controller 6 is also coupled to the third switch 45, and controls the switching of the third switch 45 between conduction and non-conduction.
2.第四開關531可以是一個N型金氧半場效電晶體。此時,控制器6還耦接到第四開關531,且控制第四開關531在導通與不導通之間的切換。 2. The fourth switch 531 can be an N-type gold oxide half field effect transistor. At this time, the controller 6 is also coupled to the fourth switch 531, and controls switching of the fourth switch 531 between conduction and non-conduction.
3.參閱圖10,諧振轉換模組52可以還包括一個耦接在諧振電容52及一次繞組511之間的諧振電感54。此時,諧振電容52、諧振電感54及漏電感514(見圖9)在由諧振電容52的電容值、諧振電感54的電感值及漏電感514(見圖9)的電感值決定的諧振頻率諧振。 3. Referring to FIG. 10, the resonant converter module 52 can further include a resonant inductor 54 coupled between the resonant capacitor 52 and the primary winding 511. At this time, the resonance capacitor 52, the resonance inductor 54 and the leakage inductance 514 (see FIG. 9) are at a resonance frequency determined by the capacitance value of the resonance capacitor 52, the inductance value of the resonance inductor 54, and the inductance value of the leakage inductance 514 (see FIG. 9). resonance.
惟以上所述者,僅為本發明之實施例而已,當不能以此限定本發明實施之範圍,凡是依本發明申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。 However, the above is only the embodiment of the present invention, and the scope of the invention is not limited thereto, and all the equivalent equivalent changes and modifications according to the scope of the patent application and the patent specification of the present invention are still The scope of the invention is covered.
1‧‧‧電壓源 1‧‧‧voltage source
2‧‧‧負載 2‧‧‧load
3‧‧‧總線電容 3‧‧‧Bus Capacitor
4‧‧‧功率因數校正模組 4‧‧‧Power Factor Correction Module
41‧‧‧整流電路 41‧‧‧Rectifier circuit
42‧‧‧第一開關 42‧‧‧First switch
43‧‧‧第二開關 43‧‧‧Second switch
44‧‧‧升壓電感 44‧‧‧Boost Inductance
45‧‧‧第三開關 45‧‧‧third switch
5‧‧‧諧振轉換模組 5‧‧‧Resonance conversion module
51‧‧‧變壓器 51‧‧‧Transformers
511‧‧‧一次繞組 511‧‧‧First winding
512‧‧‧二次繞組 512‧‧‧second winding
52‧‧‧諧振電容 52‧‧‧Resonant capacitor
53‧‧‧整流濾波電路 53‧‧‧Rectifier filter circuit
531‧‧‧第四開關 531‧‧‧fourth switch
532‧‧‧輸出電容 532‧‧‧ output capacitor
6‧‧‧控制模組 6‧‧‧Control module
Vbus‧‧‧總線電壓 Vbus‧‧‧ bus voltage
Vgs1‧‧‧第一控制信號 Vgs1‧‧‧ first control signal
Vgs2‧‧‧第二控制信號 Vgs2‧‧‧ second control signal
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
Vout‧‧‧輸出電壓 Vout‧‧‧ output voltage
Claims (15)
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US11532982B2 (en) | 2021-03-08 | 2022-12-20 | Chicony Power Technology Co., Ltd. | Power factor correction circuit with fall time detection |
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TW201041287A (en) * | 2009-05-01 | 2010-11-16 | You-Gang Luo | A power supply with improved light load efficiency |
TW201201494A (en) * | 2010-06-29 | 2012-01-01 | Univ Ishou | Power conversion device |
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TW201041287A (en) * | 2009-05-01 | 2010-11-16 | You-Gang Luo | A power supply with improved light load efficiency |
TW201201494A (en) * | 2010-06-29 | 2012-01-01 | Univ Ishou | Power conversion device |
CN102510610A (en) * | 2011-10-21 | 2012-06-20 | 哈尔滨工业大学深圳研究生院 | Single-stage AC-DC (alternating current-direct current) high-power LED (light-emitting diode) lighting drive circuit |
TW201444262A (en) * | 2013-05-07 | 2014-11-16 | Univ Ishou | Power source conversion device |
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