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TWI560816B - Embedded package and packaging method - Google Patents

Embedded package and packaging method

Info

Publication number
TWI560816B
TWI560816B TW103123370A TW103123370A TWI560816B TW I560816 B TWI560816 B TW I560816B TW 103123370 A TW103123370 A TW 103123370A TW 103123370 A TW103123370 A TW 103123370A TW I560816 B TWI560816 B TW I560816B
Authority
TW
Taiwan
Prior art keywords
packaging method
embedded package
package
embedded
packaging
Prior art date
Application number
TW103123370A
Other languages
Chinese (zh)
Other versions
TW201603201A (en
Inventor
Zhiqiang Niu
Hua Pan
Ming-Chen Lu
Yueh-Se Ho
Jun Lu
Original Assignee
Alpha & Omega Semiconductor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alpha & Omega Semiconductor filed Critical Alpha & Omega Semiconductor
Priority to TW103123370A priority Critical patent/TWI560816B/en
Publication of TW201603201A publication Critical patent/TW201603201A/en
Application granted granted Critical
Publication of TWI560816B publication Critical patent/TWI560816B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
TW103123370A 2014-07-07 2014-07-07 Embedded package and packaging method TWI560816B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW103123370A TWI560816B (en) 2014-07-07 2014-07-07 Embedded package and packaging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW103123370A TWI560816B (en) 2014-07-07 2014-07-07 Embedded package and packaging method

Publications (2)

Publication Number Publication Date
TW201603201A TW201603201A (en) 2016-01-16
TWI560816B true TWI560816B (en) 2016-12-01

Family

ID=55641670

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103123370A TWI560816B (en) 2014-07-07 2014-07-07 Embedded package and packaging method

Country Status (1)

Country Link
TW (1) TWI560816B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9870985B1 (en) * 2016-07-11 2018-01-16 Amkor Technology, Inc. Semiconductor package with clip alignment notch
CN112701050B (en) * 2020-12-22 2022-04-22 杰群电子科技（东莞）有限公司 Packaging method and packaging structure of embedded element

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200635473A (en) * 2005-03-18 2006-10-01 Samsung Electro Mech Capacitor-embedded PCB having blind via hole and method of manufacturing the same
TW200719468A (en) * 2005-11-14 2007-05-16 Via Tech Inc Package, package module and manufacturing method of the package

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200635473A (en) * 2005-03-18 2006-10-01 Samsung Electro Mech Capacitor-embedded PCB having blind via hole and method of manufacturing the same
TW200719468A (en) * 2005-11-14 2007-05-16 Via Tech Inc Package, package module and manufacturing method of the package

Also Published As

Publication number Publication date
TW201603201A (en) 2016-01-16

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