TWI434257B - Electronic apparatus system - Google Patents

Description

Electronic device system

The present disclosure relates to an electronic device system, and more particularly to an electronic device system including a display device.

Recently, display devices have been applied to many fields, such as liquid crystal displays, including notebook personal computers, monitors, car navigators, functional computers, televisions of various sizes, mobile phones, and electronic message boards. In particular, today's thin or portable electronic products have become the new darling of the market, and the liquid crystal display device is widely used because its volume and thickness are smaller than those of the earlier image tube display devices.

In the development of today's electronic display technology, more and more attention has been paid to the power consumption of the display device, and the liquid crystal display device with low power consumption is more suitable for the user's demand for energy saving and environmental protection. Especially in portable display devices (such as mobile phones, smart phones, personal digital assistants, e-books, tablets, etc.), the power consumption of the liquid crystal display module directly affects the endurance of the entire device. In particular, in today's large-sized and lightweight display devices, there is an urgent need for a low-power and high-efficiency liquid crystal display module.

The current liquid crystal display device usually has a certain refresh rate or frame rate. Generally, the liquid crystal display device uses a frequency of about 60 to 70 Hz, that is, a screen update of 60~ per second. 70 times.

That is to say, at 60 Hz, even if the display screen on the liquid crystal display device does not change or has only a slight change, the display driving circuit periodically refreshes the display signals of the respective pixels in the display module at a frequency of about sixty times per second. . Therefore, unnecessary energy consumption is generated.

In the current thin film transistor liquid crystal display (TFT-LCD), the power consumption is mainly divided into a liquid crystal display panel, a driving circuit and a backlight module. Taking a 10.1 吋, 1280 RGB x 800 high-resolution thin film transistor liquid crystal display device as an example, wherein the power consumption of the liquid crystal display panel and the driving circuit portion is between about 1000 milliwatts (mW) and 2000 milliwatts; The power consumption of the backlight module is between 2,000 mW and 3000 mW. The system part can be used in small and medium size applications, mobile phones, tablets, e-books, etc. can be about 200 mW ~ 500 mW. In reflective or transflective display applications, the backlight can be freed from a large amount of power consumption, but there is still power consumption at the system side and the display panel and the driver circuit.

Although the current industry has proposed polarity inversion driving methods for driving circuits, such as row inversion driving or frame inversion driving, and area light scanning for backlight modules. However, the above-mentioned methods have limited effects, and liquid crystal display devices and display driving methods capable of providing stable display effects and reducing energy consumption are still actively sought.

In order to solve the above problems, the electronic device system disclosed in the present invention has a display device with a low display update frequency, or a display device that can dynamically adjust the update frequency, and uses a single gate, double gate, (multi) dual TFT driving thin film The pixel unit of the crystal can dynamically change the design of the storage capacitor of the capacitance value and the dynamically adjustable driving current, charging time and driving compensation method and parameters, and the display device driven by the low update frequency can be driven by the optimal driving method. In the display device that can be dynamically adjusted with the update frequency of the present invention, the liquid crystal display device is taken as an example, and the liquid crystal display device can be classified according to the image characteristics of the image information displayed at that time (such as dynamic, static, image, text, rapid change, Slowly change, etc.) The display update frequency of the drive circuit is adjusted accordingly, and the power saving effect is achieved by using a lower display update frequency. The frequency adjustment unit has at least two or more sets of scanning frequencies. For some products or specific application markets, the frequency adjustment unit can be directly set to the low frequency 10Hz, or 3Hz.... update frequency.

Under the lower display update frequency, the potential of the storage capacitor in the general liquid crystal display device may gradually change with time, resulting in a change in the transmittance of the liquid crystal display panel. For example, in the normally white mode, the transmittance increases with time, often In black mode, the transmittance decreases with time, which may result in uneven display brightness or luminance in one display period, which may cause flickering and splashing. Therefore, it is necessary to design a larger storage capacitor to cope with it. The charging of the large value storage capacitor can be fully charged by periodically adjusting the driving mode of the display module such as the driving current and the charging time during the display period.

Accordingly, an aspect of the present disclosure is to provide an electronic device system including at least a temporary memory, a display mode arithmetic unit, a display device, and a control circuit. The scratchpad is used to temporarily store image information, and the image information includes the data input update frequency. The display mode operation unit classifies the image characteristics according to the image information, and dynamically generates the display mode control signal after the operation judgment. The display device includes a display panel, and the display panel includes at least a plurality of pixel units. The control circuit controls the display mode and the driving mode of the display panel according to the display mode control signal, and adjusts the display output update frequency of the display panel by the frequency adjustment unit.

According to an embodiment of the present disclosure, the frequency adjustment unit may dynamically adjust the display output update frequency of the display panel according to the display mode and the driving mode of the display mode control signal control display panel.

According to another embodiment of the present disclosure, the frequency adjustment unit may provide a display output update frequency lower than or equal to 30 Hz according to the image information.

In accordance with yet another embodiment of the present disclosure, the display output update frequency includes two or more frequency values. The data input update frequency includes the fundamental frequency and its updated integer value. The fundamental frequency has a frequency value between 55 and 85 Hz. The display output update frequency is in the range of 10% above and below the positive integer multiple of the data input update frequency in the multiplier mode. The display output update frequency includes an update frequency value higher than or equal to 100 Hz in the multiplication mode. The display output update frequency is in the low frequency mode, which is within 10% of the positive integer of the data input update frequency. The display output update frequency includes an update frequency value lower than or equal to 30 Hz.

According to still another embodiment of the present disclosure, the image feature classification of the image information may be a motion image, a slow image, a static image, or a text mode.

According to another aspect of the present disclosure, wherein the display mode operation unit is outside the display device, the frequency adjustment unit of the control circuit is controlled by the passive display mode control signal of the display mode operation unit of the electronic device system. Wherein the control circuit is external to the display device or within the display device. The display panel of the display device is a liquid crystal display panel, an electrophoretic display panel, an electronic wetting panel, or an organic light emitting diode panel.

According to still another embodiment of the present disclosure, wherein the display mode operation unit is in the display device, the display device is an active display mode control signal to control the frequency adjustment unit of the control circuit. The display panel of the display device is a liquid crystal display panel, an electrophoretic display panel, an electronic wetting panel, or an organic light emitting diode panel.

Another aspect of the present disclosure is to provide an electronic device system including at least a register, a display device, and a control circuit. The scratchpad is used to temporarily store image information, and the image information includes the data input update frequency. The display device includes a display panel, and the display panel includes at least a plurality of pixel units and a plurality of storage capacitor units. The control circuit controls the display mode and the driving mode of the liquid crystal display panel according to the display mode control signal, and dynamically adjusts the driving method of the liquid crystal display panel and the compensation circuit compensation structure by the frequency adjusting unit.

In accordance with an embodiment of the present disclosure, the driving method includes dynamically adjusting a length of charging time of the display panel. The length of the charging time of the dynamic adjustment display panel is achieved by adjusting the opening time of the gate control signal. The control circuit is further configured to dynamically adjust the display output update frequency of the liquid crystal display panel, and the charging time length is changed or modulated according to the change of the display output update frequency. When the display output update frequency is increased, the charging time length is decreased accordingly. When the display output update frequency is lowered, the length of the charging time is increased.

In accordance with another embodiment of the present disclosure, a driving method includes dynamically adjusting a magnitude of a driving current of a display panel. When the control circuit adjusts the drive current, the drive current value can be adjusted to a simple multiple ratio. When the control circuit adjusts the driving current, it is adjusted by changing the number of current supply pins of the driving circuit in the liquid crystal display device or/and the shunt circuit thereon.

According to still another embodiment of the present disclosure, the control circuit is further configured to dynamically adjust the display output update frequency of the liquid crystal display panel, and the driving current is changed or modulated according to the change of the display output update frequency, wherein the display output update frequency is increased. When the drive current is reduced, the drive current is increased when the output update frequency is adjusted down. It shows that the output update frequency has two or more frequencies. The output update frequency is displayed in the low frequency mode, and is within a range of one tenth of the positive integer of the data input update frequency. The output update frequency is displayed as a frequency value less than 55 Hz or greater than 75 Hz.

According to still another embodiment of the present disclosure, the electronic device system is in an operating environment of two temperatures, or two or more temperatures, and the display output update frequency is changed or modulated as the temperature changes.

According to another embodiment of the present disclosure, the storage capacitors of the display panel each include a plurality of storage capacitor blocks, and the equivalent capacitance value of the storage capacitors controls the signals according to the display mode to control the electrical properties between the capacitor blocks. The connection form is adjusted. The driving current of the display panel is changed or modulated according to the adjustment of the equivalent capacitance value of the storage capacitor. When the equivalent capacitance value of the storage capacitor is increased, the driving current is increased, and the equivalent capacitance of the storage capacitor is increased. When the value is lowered, the drive current is reduced accordingly.

According to still another embodiment of the present disclosure, the charging time length of the display panel is changed or modulated according to the adjustment of the equivalent capacitance value of the storage capacitor, wherein when the equivalent capacitance value of the storage capacitor is increased, the charging is performed. The length of time increases accordingly. When the equivalent capacitance of the storage capacitor is adjusted down, the length of the charging time is reduced.

According to an embodiment of the present disclosure, in the driving circuit, each pixel unit includes at least one, two or more thin film transistor switches, double gate thin film transistors, and lightly doped thin film transistors. The off-state leakage current of the drive circuit is less than or equal to 10 ^-12 amps.

According to another embodiment of the present disclosure, the off-state leakage current of the driving circuit is further less than or equal to 10 ^-13 amps.

According to still another embodiment of the present disclosure, the gate unit corresponding to each pixel unit in the driving circuit is an amorphous germanium thin film transistor, an oxide thin film transistor.

According to still another embodiment of the present disclosure, the display panel of the display device is a liquid crystal display panel, an electrophoresis display panel, an electronic wet method panel, or an organic light emitting diode panel.

Another aspect of the present disclosure is to provide an electronic device system including at least a register, a display device, and a control circuit. The scratchpad is used to temporarily store image information, and the image information includes the data input update frequency. The display device includes a display panel, and the display panel includes at least a plurality of pixel units and a plurality of storage capacitor units. The control circuit controls the display mode and the driving mode of the liquid crystal display panel according to the display mode control signal, and dynamically adjusts the driving compensation method and parameters of the liquid crystal display panel by the frequency adjusting unit.

According to an embodiment of the present disclosure, the control circuit is further configured to dynamically adjust the display output update frequency of the display panel, and the driving compensation method and the parameter are changed or modulated according to the change of the display output update frequency. The display output update frequency is within 10% of the positive integer multiple of the data input update frequency in the multi-frequency mode, and the drive compensation method and parameters are adjusted in the multi-frequency mode.

According to another embodiment of the present disclosure, each storage capacitor of the display panel includes a plurality of storage capacitor blocks, and the capacitance value of the storage capacitor is adjusted according to an electrical connection manner between the display mode control signal control capacitor blocks. The driving compensation method and parameters are changed or modulated according to the adjustment of the capacitance value of the storage capacitor. The driving compensation method and parameters are adjusted when the capacitance value of the storage capacitor is adjusted.

In accordance with yet another embodiment of the present disclosure, the drive compensation method and parameters are adjusted by changing or building an array gamma curve and its parameters.

According to still another embodiment of the present disclosure, wherein the adjustment driving compensation method and parameters are adjusted by changing a starting voltage or a rotating voltage.

There is further an embodiment in accordance with the present disclosure in which the adjustment drive compensation method and parameters are adjusted by varying the drive waveform to compensate for voltage coupling effects in different display modes or at different drive voltages. The adjustment of the drive waveform is changed by varying the width, voltage difference, height, chamfer slope or timing of the drive waveform.

According to still another embodiment of the present disclosure, the display device is an electro-wet display device, an electrophoretic display device, an organic light-emitting diode display device, or a liquid crystal display device. When the display device is a liquid crystal display device, the liquid crystal display mode of the liquid crystal display device is a liquid crystal display mode of bistable or multi-stable or different liquid crystal phases.

Referring to FIG. 1A, a functional block diagram of an electronic device system 1 in accordance with a first embodiment of the present invention is shown. In the embodiment, the electronic device system 1 includes a host 10 and a display device 12. The electronic device system 1 may be a composite personal computer system, a handheld electronic device, or a digital camera, a digital photo frame, an MP3 or MP4 player, and the like. The host 10 includes a register 100, a frequency adjustment unit 102, and a control circuit 104. The display device 12 includes a drive circuit 120 and a display panel 122.

In this embodiment, the temporary memory device 100 can be a memory in the host 10 for receiving input of picture data to temporarily store image information having a data input update frequency f_in. In an embodiment, the host 10 further includes a central processing unit or a timing controller to transmit the screen data to the temporary storage unit 100. The data input update frequency f_in of the image information before entering the display panel device may have two or more update frequency values. In an embodiment, the data input update frequency f_in may be based on a fundamental frequency, and includes the base frequency and an update frequency value of a positive integer multiple thereof. For example, a typical display can receive image information at a frequency of 60 Hz or between 50 and 85 Hz and output it on the screen. The display device 12 in this embodiment can receive image information (for example, 120 Hz, 240 Hz, etc.) having a frequency of 60 Hz and a multiple of its positive integer multiple. It should be noted that the multiplier of a positive integer multiple here may include a range of ten percent above and below it. Such image information having a multiple of a positive integer multiple of the fundamental frequency includes an update frequency value higher than 100 Hz. In an embodiment, the data input update frequency f_in can be expressed as follows: f_in=60*N, where N is a positive integer, such as an update frequency value of 120, 180, 240, or 480 Hz (may include ten percent of it) Scope). The multiplier mode can be applied to a fast liquid crystal display in a 3D television, a 3D game, or a liquid crystal display device to receive higher frequency image information and further output to the display panel 122.

The register 100 is coupled to the driving circuit 120 and the frequency adjusting unit 102. The driving circuit 120 is configured to display image information on the display panel 122. The control circuit 104 is electrically connected to the frequency adjustment unit 102 and the drive circuit 120. In the present embodiment, the control circuit 104 can be a microcontroller in the host 10.

It should be noted that the driving circuit 120 in this embodiment does not use a fixed display output update frequency f_out, but may input the update frequency f_in according to the data input information and the frequency adjustment unit 102 classifies the image characteristics according to the image information. Under the adjustment, dynamically update the frequency f_out with different display outputs to achieve the best or most power-saving display. F_out, which can have two or more update frequency values.

The method for dynamically selecting different display output update frequencies f_out is as follows. The frequency adjustment unit 102 dynamically generates a display mode control signal according to the data input update frequency f_in and the image characteristic classification of the image information. Then, the control circuit 104 adjusts the display mode and the driving mode of the driving circuit 120 according to the display mode control signal. The drive circuit 120 can appropriately adjust the display output update frequency f_out according to different display modes and drive modes.

The image feature classification of the image information includes at least dynamic images (such as movies, animations, motion pictures, etc.), static slow images (such as eco photography, page advertisements, etc.) or static image retention (such as pictures, photos, static print ads). The text adjustment unit 102 can generate a corresponding display mode control signal according to the image characteristic of the image information, such as the dynamic image can maintain a high display output update frequency (for example, 60 Hz), or display in a multi-frequency mode. The output update frequency f_out is outputted on the display panel 122 according to the data input update frequency of the image information to meet the requirements of the aforementioned 3D display or fast liquid crystal (for example, 120 Hz, 180 Hz, 240 Hz or 480 Hz, which may include upper and lower percent thereof) Range of ten); static slow image can be switched to medium display output update frequency (eg 20Hz, 15Hz); while static hold image can be switched to low display output update frequency (eg 5Hz, 3Hz, 0.3Hz), however the invention does not To this end, if there is a strong energy saving demand, it can also switch to the low display output update frequency in the case of motion pictures. In an embodiment, when the static image, the static image, the text mode, or the special energy-saving dynamic image is displayed, the output update frequency f_out is reduced to a low frequency mode, and the display output update frequency f_out is The data input update frequency f_in is a multiple of a positive integer (may include a range of ten percent above and below it), that is, f_out=f_in/N.

As described above, in this embodiment, the frequency adjustment unit 102 of the present invention may have two sets (high and low display output update frequencies), three sets (high, medium, and low display output update frequencies) or three or more sets of scans. frequency. In an embodiment, the frequency adjustment unit has at least one scan frequency lower than 20 Hz. In another embodiment, the frequency adjustment unit has at least one scan frequency further below 5 Hz. In another embodiment, the frequency adjustment unit has at least one scan frequency further below 1 Hz.

In addition, the image information further has an image feature sub-category, and the image feature sub-category includes at least a full-color mode, an image mode or a text mode, and a single color system, and the frequency adjustment unit 102 can simultaneously consider image feature classification of the image information (dynamic, The static slow, static hold and image feature sub-category (full color mode, image mode, text mode, single color system) generate corresponding display mode control signals.

For example, motion pictures, static slow images, and static hold images can be further classified into full color mode/single color mode and text mode/image mode; that is, dynamic/static slow/static hold images can be Further full-color images, full-color characters, monochrome images, monochrome characters, and the like are classified into at least four seeds, but the invention is not limited thereto.

It should be noted that, in an embodiment, the frequency adjustment unit 102 can also provide a display output update frequency lower than or equal to 30 Hz according to the foregoing image information without adjustment.

Referring to FIG. 1B, a functional block diagram of an electronic device system 1 in accordance with a second embodiment of the present invention is shown. In the present embodiment, the register 100, the frequency adjustment unit 102, the control circuit 104, the drive circuit 120, and the display panel 122 are all disposed in the display device 12. Therefore, the dynamic adjustment mechanism described above can be operated in an active manner independently of the display device 12 itself in this embodiment, without being required to be passively controlled by the control circuit 104 by the drive circuit 120 as shown in FIG. 1A. The display mode control signal transmitted by the frequency adjustment unit 102 operates the dynamic adjustment mechanism.

The hardware elements included in the display device 12 are not limited to the first and second panels. It should be noted that, in different embodiments, the display device 12 may be a liquid crystal display device, an electrophoretic display device, an electronic humidification display device, or an organic light emitting diode display device. For example, in the case of a liquid crystal display device, the display device 12 may further include a timing control circuit, a signal receiving interface, and the like.

Please refer to Figure 2. 2 is a functional block diagram of an electronic device system 1 in accordance with a third embodiment of the present invention. In this embodiment In the electronic device system 1 , the frequency adjustment unit 102 is not provided. Therefore, after the register 100 receives the input of the screen data and temporarily stores the image information, the control circuit 104 can control the driving circuit 120 to drive the display panel. 122. Directly outputting a display screen having a display output update frequency lower than or equal to 30 Hz.

Please refer to FIG. 3A , which is a schematic top view of the pixel unit 30 in the display device 12 . Taking the liquid crystal display device as an example, wherein the display panel 122 includes a plurality of pixel units 30 (such as 1024*768 pixel units 30), the pixel unit includes a liquid crystal capacitor Clc, and the driving circuit 120 includes a plurality of storage capacitor units Cst for storage. The capacitor unit Cst corresponds to the liquid crystal capacitor Clc. In general, the voltage level of the liquid crystal capacitor Clc represents the content of the display signal. The storage capacitor unit Cst is connected in parallel with the liquid crystal capacitor Clc. The storage capacitor unit Cst is mainly used to maintain the voltage level of the display signal. When the display output update frequency is decreased, the update period of the capacitor becomes longer, which may cause the voltage maintenance rate to decrease, resulting in display. distortion. However, in the present invention, the capacitance values of the storage capacitor units Cst are significantly larger than the liquid crystal capacitors Clc, thereby increasing the voltage maintenance ratio of the display signals. In one embodiment, the capacitance of the storage capacitor unit Cst is greater than or equal to ten or even fifty times the capacitance of the liquid crystal capacitors Clc. Thereby, the voltage maintenance rate of the display signal is increased.

Please refer to Figure 4. FIG. 4 is a schematic top view of the pixel unit 40 in an embodiment of the disclosure. The storage capacitor unit Cst in the pixel unit 40 in this embodiment substantially further includes a plurality of storage capacitor blocks Cst1, Cst2, and Cst3. These storage capacitor blocks Cst1, Cst2, and Cst3 can control the connection form according to the display mode control signal, and achieve the effect of changing the capacitance value of the storage capacitor unit Cst. By the setting of the built-in switches 400, 402 and the control signal lines G1 and G2, the connection of the storage capacitor blocks Cst1, Cst2 and Cst3 can be changed according to the driving mode, the demand change or the display mode such as the aforementioned driving frequency, or The appropriate adjustment is based on a low display output update frequency. The control of the built-in switches 400 and 402 can respectively control the capacitance values of the storage capacitor units Cst in the pixel units 40 on the respective scan lines corresponding to the respective scan lines, or uniformly control the storage in the pixel units 40 on the entire liquid crystal display panel 122. The capacitance value of the capacitor unit Cst.

For example, if the display mode control signal is such that the display output update frequency f_out of the driving circuit 120 maintains a higher update frequency value, a partial storage capacitor unit Cst can be used (eg, only the storage capacitor block Cst1 is used). To maintain the voltage stability in the liquid crystal capacitor Clc. However, in the case where the display output update frequency f_out is greatly decreased, the capacitance value of the storage capacitor unit Cst can be increased by using all of the storage capacitor blocks Cst1, Cst2, and Cst3, so that the liquid crystal capacitor Clc having a longer update period is sufficient to maintain the same. Voltage level.

In another embodiment, the capacitance value of the storage capacitor unit Cst may be adjusted according to the type of the light source of the display device 12, such as a transmissive or reflective type, or according to the display type of the display device 12, such as a bistable, tristable state. get on.

It should be noted that the adjustable storage capacitor unit Cst can be applied to various types of displays such as thin film transistor liquid crystal displays, liquid crystal on Si-Wafer liquid crystal displays and oxide thin films. Crystal liquid crystal display, electron mobility method, Electrowe Wetting, and the like.

According to different display modes, different display output update frequencies, different storage capacitor units Cst values, and different driving modes, the driving circuit 120 can display image information by using different driving modes Id by different driving modes. On the display panel 122.

Please refer to Figure 3A again. In order to enable the image information to be displayed on the display panel 122, the driving circuit 120 may update the frequency sweep according to the foregoing display output to open the gates of the columns of the pixel units 122 by the gate control signal Vg column by column, and the driving current Id pair The pixel unit 122 performs charging. The driving current Id in this embodiment can be adjusted in size by changing the number of current supply pins or the shunt circuit thereon.

Please also refer to Figure 5. Figure 5 is a block diagram of a current supply wafer 5 in accordance with an embodiment of the present disclosure. The current supply chip 5 can be disposed in a driving circuit such as a source driver or a gate driver, or in a timing controller. The current supply wafer 5 includes a plurality of current supply pins 50. A current supply pin 50 can provide a drive current with a current value of I, and generally the current that each current supply pin 50 can provide has an upper limit, so two or more can be used in different requirements. The current supply pin 50 provides a drive current (such as 2I, 3I, 4I, etc.) for supply to the scan line or data line, and further to the liquid crystal display panel 122. Moreover, the current supply pin 50 can further be provided with a combination of the shunt circuit 52 such as a resistor to supply a non-integer multiple of the drive current Id (eg, (3/2)*I, (5/4)*I, etc. ) The effect. For example, in the current supply chip 5 in FIG. 5, three current supply pins 50 each provide a drive current having a current value of I, and one of the current supply pins provides a current value of (1/2)*I. The driving current is so that the four current supply pins 50 can provide a driving current of (7/2)*I.

Please refer to Figure 6. Fig. 6 is a view showing a state in which liquid crystal molecules are perpendicular and parallel to the direction of the electric field in the long axis direction thereof. When the liquid crystal molecules is parallel or perpendicular to the electric field direction of the major axis of the liquid crystal, respectively feel ε _// and ε _⊥ two different dielectric constants. The relationship between the equivalent capacitance of the liquid crystal molecules and the electric field can be expressed by the following equation:

C=ε _r ε ₀ ‧ (A/d)

Therefore, the capacitance values C _// and C _{液晶 of the} liquid crystal capacitor Clc parallel or perpendicular to the direction of the liquid crystal molecules and the electric field can be expressed as follows:

C _// =ε _// ε ₀ ‧ (A/d)

C _⊥ =ε _⊥ ε ₀ ‧ (A/d)

The capacitance value C _{// of} the liquid crystal capacitor Clc in the direction parallel to the long axis of the liquid crystal and the dielectric constant ε _// , and the capacitance value in the direction of the long axis of the vertical liquid crystal and the C _⊥ dielectric coefficient ε _⊥ are functions as a function of frequency, that is, Can be expressed as the following formula:

C _// =C _// (f);C _⊥ =C _⊥ (f)

ε _// =ε _// (f); ε _⊥ =ε _⊥ (f)

Please refer to Figure 7 again. Fig. 7 is a graph showing the relationship between the dielectric coefficient ε _// , the dielectric coefficient ε _{⊥ ,} and the difference Δ ε (i.e., dielectric anisotropy) and frequency. Therefore, taking positive liquid crystal as an example, at low frequencies, the liquid crystal will exhibit positive dielectric anisotropy and exhibit negative dielectric anisotropy at high frequencies. The frequency at which the positive dielectric constant is converted into a negative dielectric coefficient is called the cross-over frequency fc, which is related to the molecular structure and dipole characteristics of the liquid crystal. The dependence of Δε on frequency can be utilized to control the forward direction of the major axis of the liquid crystal molecules.

In the case where the liquid crystal molecules apply the electric field E (V) generated by the voltage V, the liquid crystal molecules are forced to rearrange. The form of its arrangement can be represented by a director function:

n=n(x,y,z,E(V))

And its electrical displacement in the electric field can be expressed as: D = ε. E(V)

The equivalent capacitance value C of the liquid crystal capacitor Clc can be further expressed as: C=C(f, E(V)) or C=C(f, ε.E(V))

As can be seen from the above, the liquid crystal capacitance Clc will be highly correlated with the frequency. When the output update frequency f_out is changed, the capacitance value of the liquid crystal capacitor Clc and its dielectric constant ε will change accordingly. In an embodiment, in the low frequency mode, the display output update frequency f_out of the liquid crystal display panel 122 will be greatly reduced. Therefore, the refresh period of the liquid crystal capacitor Clc will be elongated, and the liquid crystal capacitance Clc will increase. In another embodiment, the arrangement and characteristics of the liquid crystal molecules are also temperature dependent, and the electronic device system 1 may operate in an operating environment of two temperatures or two or more temperatures, so the liquid crystal capacitor Clc may also follow the display panel 122. Change in the ambient temperature or pressure.

In order to be able to maintain the voltage level in different frequency modes, different temperatures and different pressures, the capacitance value of the storage capacitor unit Cst can be increased by the aforementioned method. Therefore, the current value of the driving current Id can be increased, and the storage capacitor unit Cst can be charged with a larger current to achieve the effect of maintaining the voltage level. As shown in FIG. 8, the driving current Ifl adjusted in the low frequency mode (fl) adjusted by the frequency adjusting unit 102 or directly outputting a low display output update frequency can be adjusted to the driving in the higher frequency (fh) mode. Current Ifh has a larger current value. In the above embodiment, the drive current Id is adjusted in response to the change in the display output update frequency and the storage capacitor unit Cst. In other embodiments, the driving current Id may also be adjusted according to different driving modes such as temperature changes or different display modes.

Similarly, according to different display modes, different display output update frequencies, different storage capacitor units Cst values, and different driving modes, the driving circuit 120 can control charging by using the gate control signal Vg for different charging time lengths. In an embodiment, in the case of the low frequency mode adjusted by the frequency adjustment unit 102 or directly outputting a low display output update frequency, the display output update frequency f2 of the liquid crystal display panel 122 is greatly reduced. Therefore, the refresh period of the liquid crystal capacitor Clc will be elongated. In order to be able to maintain its voltage level, the capacitance value of the storage capacitor unit Cst can be increased by the aforementioned method. Therefore, the length of the charging time can be increased by changing the length of the opening time of the gate control signal Vg to charge the storage capacitor unit Cst for a longer period of time in the same time to achieve the effect of maintaining the voltage level. . As shown in FIG. 9, the charging time length Tfl in the low frequency mode (fl) can be adjusted to a time value in which the charging time length Tfh in the higher frequency (fh) mode is larger.

It should be noted that in an embodiment, the driving current and the length of the charging time can be adjusted in accordance with the change of the other party to achieve the best display effect.

In an embodiment, the driving circuit 120 can use different driving circuit driving compensation methods and parameters to perform charging according to different display modes, different display output update frequencies, different storage capacitor units Cst values, and different driving modes. Please refer to Figure 10 and Figure 11. FIG. 10 is a schematic diagram showing a third-order driving mode, and FIG. 11 is a schematic diagram showing a compensation voltage amount ΔVp required to be adjusted in the third-order driving mode. Since the liquid crystal capacitor Clc and the storage capacitor unit Cst will change under different display output update frequencies, the feed through voltage due to the coupling effect of the capacitor will also be different. Therefore, the amount of voltage to be compensated will also be different. For example, in the case that the frequency adjustment unit 102 adjusts the low frequency mode or directly outputs a low display output update frequency, since the corresponding liquid crystal capacitor Clc and the storage capacitor unit Cst will become larger, the voltage to be compensated will also be The corresponding increase.

Therefore, in an embodiment, the driving compensation method and parameters can be achieved by adjusting the pull-down compensation voltage Vge as shown in FIG. The pull-down compensation voltage Vge is to pull down the voltage level of the gate control signal Vg of the n-1th column pixel in order to compensate the pixel unit of the nth column. Alternatively, the overall drive waveform, such as its width, voltage difference, height, chamfer slope, or timing, can be adjusted accordingly. In other embodiments, the drive compensation method and parameters are adjusted by changing or building the array gamma curve and parameters, the liquid crystal onset voltage, the liquid crystal rotation voltage, or the transistor threshold voltage.

As shown in FIG. 3A, in the embodiment, the driving circuit 120 of the present invention is an amorphous germanium thin film transistor and an oxide thin film transistor (Oxide TFT) using a double gate structure 142 to drive the circuit 120. The leakage current is reduced, and the leakage current is reduced to help increase the voltage maintenance rate of the display signal. The double gate structure 142 can be a double gate thin film transistor or a lightly doped thin film transistor. In one embodiment, the off-state leakage current of the driving circuit 120 may be less than or equal to 10 ^-13 amps. In another embodiment, the off-state leakage current of the driving circuit 120 may further be less than or equal to 10 ^-14 amps.

However, in another embodiment, each pixel unit in the driving circuit may include a single gate or double gate thin film transistor structure 142 ′, such as an amorphous germanium thin film transistor, an oxide thin film transistor (Oxide TFT). As shown in Figure 3B. The preparation of the oxide thin film transistor is mainly to replace the germanium material portion originally applied to the amorphous germanium thin film transistor with a-IGZO (amorphous Indium Gallium Zinc Oxide) to form a thin film transistor, and the advantage is that the number of mask processes is small. The cost of the lower temperature polycrystalline germanium low temperature polycrystalline germanium film transistor process is low, and the surface of the thin film transistor substrate is good, which can be applied to the substrate production of the 5th generation line or above. The organic thin film transistor has a large on-current characteristic and a high carrier mobility characteristic, so that it can make the off-state leakage current less than or equal to 10 ^-12 amps, or further less than or equal to 10 ^-13 amps, or it can be turned on. The current is larger than that of a general thin film transistor, which accelerates the efficiency of charging.

In essence, the current common liquid crystal display technologies mainly include amorphous germanium thin film transistors (a-Si TFT), low temperature poly-silicon (LTPS) thin film transistors, and microcrystalline germanium thin film transistors (μ-Si). TFT) technology and oxide (Oxide TFT) thin film transistors. The main liquid crystal thin film transistor technology on the market today, whether it is a general or mainstream production process technology, refers to mostly amorphous germanium thin film transistors. Compared with low temperature polycrystalline germanium thin film transistors, the productivity of amorphous germanium thin film transistors is large. The production process is shorter and the cost is lower. However, the use of low-temperature polycrystalline germanium film transistor, in addition to the material and the component itself is more reliable than the amorphous germanium film transistor, the low-temperature polycrystalline germanium film transistor leakage current (Ioff) is large, not suitable for power saving purposes. Therefore, many companies are committed to developing new technologies, hoping to increase the electron mobility of backplane thin film transistors, while reducing the brightness unevenness (mura) caused by uneven crystallization, speeding up production and reducing production costs.

Microcrystalline germanium thin film transistors and oxide thin film transistors all have high electron mobility, and low leakage current performance is better than amorphous germanium thin film transistors. Mainly using the DLTA (Diode Laser Thermal Annealing) process developed by itself, the technology focuses on the use of infrared laser with a wavelength of 800 nm, a scanning crystallization process at a speed of 150 nm per second, and the electron mobility is between 0. -10cm2/Vs thin film transistor, the experimental results of electron mobility can reach about 3.1cm2 / Vs.

At present, many manufacturers are committed to the development of materials and technologies for oxide thin film transistors, hoping to achieve high electron mobility and low cost backplane manufacturing with new materials and processes. The oxide thin film transistor is mainly prepared by partially replacing the germanium material originally applied to the amorphous germanium thin film transistor with a-IGZO (amorphous Indium Gallium Zinc Oxide) to form an oxide thin film transistor, and the advantage is that the number of mask processes is Less, lower cost, low temperature polysilicon film transistor process is low, and the substrate surface is flat, which can be applied to the production of substrates above the 5th generation line.

Therefore, it can be seen from the above that the double gate thin film transistor structure or the double thin film transistor structure has better performance than the structure of the single gate thin film transistor. The back sheet formed by using the microcrystalline germanium film transistor or the oxide thin film transistor has better performance than the amorphous germanium film transistor.

In an embodiment, the driving circuit 120 of the liquid crystal display device 12 further includes a row inversion driving or a frame inversion driving.

In the above paragraphs, the present invention discloses a liquid crystal display device having a dynamically adjustable update frequency and a pixel unit using a (multiple) dual thin film transistor driving circuit or a single gate or double gate thin film transistor such as amorphous矽 Thin film transistor, oxide thin film transistor, design of storage capacitor that can dynamically change capacitance value, and dynamically adjustable drive current, charging time and drive compensation method and parameters, to achieve low update frequency drive with optimal drive mode Liquid crystal display device. In the liquid crystal display device with the update frequency of the present invention, the liquid crystal display device can be adjusted according to the image characteristic classification (such as dynamic, static, image, text, rapid change, slow change, etc.) of the image information displayed at that time. The display update frequency of the drive circuit achieves power saving by using a lower display update frequency. The frequency adjustment unit has at least two or more sets of scanning frequencies.

The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

1‧‧‧Electronic device system

10‧‧‧Host

100‧‧‧ register

102‧‧‧frequency adjustment unit

104‧‧‧Control circuit

12‧‧‧ display device

120‧‧‧Drive circuit

122‧‧‧ display panel

142‧‧‧Double Gate Architecture

142'‧‧‧Single or double gate thin film Crystal architecture

30‧‧‧pixel unit

400, 402‧‧‧ Built-in switch

40‧‧‧pixel unit

50‧‧‧current supply pin

5‧‧‧ Current supply chip

52‧‧‧Split circuit

The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood.

1A is a functional block diagram of an electronic device system in accordance with a first embodiment of the present invention;

1B is a functional block diagram of an electronic device system in accordance with a second embodiment of the present invention;

2 is a functional block diagram of an electronic device system in accordance with a third embodiment of the present invention;

3A is a schematic plan view showing a pixel unit in a liquid crystal display device;

3B is a schematic top view of a pixel unit in a liquid crystal display device;

4 is a top plan view of a pixel unit in an embodiment of the disclosure;

5 is a block diagram of a current supply chip in an embodiment of the disclosure;

Fig. 6 is a schematic view showing a state in which the liquid crystal molecules are perpendicular and parallel to the direction of the electric field in the long axis direction; Fig. 7 is a graph showing the relationship between the dielectric constant ε _∥ , the dielectric constant ε _⊥ and the difference Δε between the two and the frequency. FIG. 8 is a schematic diagram showing driving currents in different driving modes and display modes; FIG. 9 is a schematic diagram showing charging time lengths determined by gate control signals in different driving modes and display modes; FIG. A schematic diagram of the third-order driving mode; and FIG. 11 is a schematic diagram showing the amount of compensation voltage required to be adjusted corresponding to the third-order driving mode.

1. . . Electronic device system

10. . . Host

100. . . Register

102. . . Frequency adjustment unit

104. . . Control circuit

12. . . Display device

120. . . Drive circuit

122. . . Display panel

Claims (44)

An electronic device system includes at least: a temporary storage device for temporarily storing an image information, wherein the image information includes a data input update frequency; and a display mode operation unit, which is classified according to an image characteristic of the image information, and is determined by operation Dynamically generating a display mode control signal; a display device comprising a display panel, the display panel comprising at least a plurality of pixel units; and a control circuit for controlling a display mode and a driving of the display panel according to the display mode control signal The mode adjusts the output update frequency of one of the display panels by a frequency adjustment unit. The electronic device system of claim 1, wherein the frequency adjustment unit is configured to dynamically adjust the display output update frequency of the display panel according to the display mode control signal and the display mode of the display panel. The electronic device system of claim 2, wherein the frequency adjustment unit is configured to provide a display output update frequency lower than or equal to 30 Hz according to the image information. 2. The electronic device system of claim 2, wherein the display output update frequency comprises two or more frequency values. 2. The electronic device system, wherein the data input update frequency comprises a fundamental frequency and an update frequency value of a positive integer multiple thereof. The electronic device system of claim 5, wherein the fundamental frequency has a frequency value between 55 and 85 Hz. The electronic device system of claim 2, wherein the display output update frequency is in a range of up to ten percent of a positive integer multiple of the data input update frequency in the one-octave mode. The electronic device system of claim 7, wherein the display output update frequency comprises an update frequency value higher than or equal to 100 Hz in the frequency multiplication mode. 2. The electronic device system, wherein the display output update frequency is in a low frequency mode, and is within a range of one tenth of a tenth of a positive integer of the data input update frequency. The electronic device system of claim 2, wherein the display output update frequency comprises an update frequency value that is less than or equal to 30 Hz. The electronic device system of claim 2, wherein the image characteristic classification of the image information is a dynamic image, a slow image, a static image or a text mode. In the electronic device system of claim 2, wherein the display mode operation unit is outside the display device, the frequency adjustment unit of the control circuit is a passive display mode control signal that receives the display mode operation unit of the electronic device system to control . The electronic device system of claim 12, wherein the control circuit is external to the display device or within the display device. The electronic device system of claim 2, wherein the display mode computing unit is in the display device, the display device is an active display mode control signal to control the frequency adjusting unit of the control circuit. The electronic device system of claim 2, wherein the display panel of the display device is a liquid crystal display panel, an electronic swimming display panel, an electronic wetting panel, or an organic light emitting diode panel. The electronic device system of claim 1, wherein the display device further stores a capacitor unit, the control circuit controls the display mode of the display panel and the driving mode, thereby dynamically adjusting a driving method of the display panel and a driving method Control circuit compensation architecture. The electronic device system of claim 16, wherein the driving method comprises dynamically adjusting a charging time length of the display panel. The electronic device system of claim 17, wherein dynamically adjusting the length of the charging time of the display panel is achieved by adjusting an opening time of a gate control signal. The electronic device system of claim 17, wherein the control circuit is further configured to dynamically adjust the display output update frequency of the liquid crystal display panel, and the charging time length is changed or modulated according to the change of the display output update frequency. When the display output update frequency is increased, the length of the charging time is decreased accordingly, and when the display output update frequency is decreased, the charging time length is increased accordingly. The electronic device system of claim 16, wherein the driving method comprises dynamically adjusting a magnitude of a driving current of the display panel. In the electronic device system of claim 20, when the control circuit adjusts the driving current, the driving current value can be adjusted to a simple multiple ratio. The electronic device system of claim 20, wherein the control circuit adjusts the driving current by changing a number of current supply pins of one of the driving circuits of the liquid crystal display device or/and a shunt circuit thereon To make adjustments. The electronic device system of claim 20, wherein the control circuit is further configured to dynamically adjust a display output update frequency of the liquid crystal display panel, wherein the drive current is changed or modulated according to the change of the display output update frequency, wherein When the display output update frequency is increased, the driving current is adjusted downward, and when the display output update frequency is lowered, the driving current is increased accordingly. The electronic device system of claim 16, wherein the display output update frequency has two or more frequencies. The electronic device system of claim 16, wherein the display output update frequency is in a low frequency mode, and is within a range of one tenth of a tenth of a positive integer of the data input update frequency. The electronic device system of claim 16, wherein the display output update frequency is a frequency value less than 55 Hz, or greater than 75 Hz. The electronic device system of claim 16, wherein the electronic device system is an operating environment at two temperatures, or two or more temperatures. The electronic device system of claim 16, wherein the storage capacitors of the display panel each comprise a plurality of storage capacitor blocks, and the magnitude of the equivalent capacitance of the storage capacitors controls the signals according to the display mode, and controls the signals. The electrical connection between the capacitor blocks is adjusted. The electronic device system of claim 28, wherein the driving current of the display panel is changed or modulated according to an adjustment of an equivalent capacitance value of the storage capacitors, wherein an equivalent capacitance value of the storage capacitors is adjusted When the time is increased, the driving current is increased accordingly, and when the equivalent capacitance value of the storage capacitors is decreased, the driving current is decreased. The electronic device system of claim 28, wherein the charging time length of the display panel is changed or modulated according to an adjustment of an equivalent capacitance value of the storage capacitors, wherein an equivalent capacitance value of the storage capacitors When the increase is increased, the length of the charging time is increased accordingly, and when the equivalent capacitance value of the storage capacitors is decreased, the length of the charging time is decreased. The electronic device system of claim 16, wherein the driving circuit comprises at least two or more thin film transistor switches, a double gate thin film transistor, and a lightly doped 对应 corresponding to each of the pixel units. A thin film transistor in which one of the driving circuits has a closed state leakage current of 10 ^-12 amps or less. The electronic device system of claim 31, wherein one of the drive circuits has a closed state leakage current further less than or equal to 10 ^-13 amps. The electronic device system of claim 16, wherein the gate unit of each of the pixel units is an amorphous germanium thin film transistor and an oxide thin film transistor (Oxide). TFT). The electronic device system of claim 16, wherein the display panel of the display device is a liquid crystal display panel, an electrophoretic display panel, an electronic wetting panel, a single crystal reflective liquid crystal display, or an organic light emitting diode Polar body panel. The electronic device system of claim 1, wherein the display device further comprises a plurality of storage capacitor units, and the control circuit controls the display mode of the display panel and the driving mode, thereby adjusting the inclusion of the display panel One of the pixel units drives the compensation method and parameters. The electronic device system of claim 35, wherein the control circuit is further configured to dynamically adjust one of the display panels to display an output update frequency, and the drive compensation method and parameters are changed or modulated as the display output update frequency changes. The electronic device system of claim 36, wherein the display output update frequency is within 10% of a positive integer multiple of the data input update frequency in the octave mode, and the driving compensation method and parameters are Adjust in this multiplier mode. The electronic device system of claim 35, wherein each of the storage capacitors of the display panel comprises a plurality of storage capacitor blocks, and the capacitance values of the storage capacitors control the capacitor blocks according to the display mode control signals. The electrical connection form is adjusted, and the driving compensation method and reference The number is changed or modulated according to the adjustment of the capacitance value of the storage capacitors. The electronic device system of claim 35, wherein the driving compensation method and parameters are adjusted by changing or building an array gamma curve and its parameters. The electronic device system of claim 35, wherein the adjusting the driving compensation method and parameters is adjusted by changing a starting voltage or a rotating voltage. The electronic device system of claim 35, wherein the adjusting the driving compensation method and parameters is performed by changing a driving waveform to compensate for the different display modes or a voltage coupling effect of one of different driving voltages. . The electronic device system of claim 35, wherein the adjustment of the driving waveform is changed by varying a width of the driving waveform, a voltage difference, a height, an angular slope, or a timing. The electronic device system of claim 35, wherein the display device is an electrowetting (Electrode Wetting) display device, an electrophoretic display device, an organic light emitting diode display device, or a liquid crystal display device. The electronic device system of claim 35, wherein the display device is a liquid crystal display device, and the liquid crystal display mode of one of the liquid crystal display devices is a liquid crystal display mode of bistable or multi-stable or different liquid crystal phases.