TWI425623B - Nonvolatile resistance memory device - Google Patents

Description

Non-volatile resistive memory

The present invention relates to a nonvolatile memory (NVM), and more particularly to a non-volatile resistive memory (RRAM).

In recent years, mobile personal electronic devices have become increasingly popular, and the use of smart phones, digital cameras, notebook computers, and consumer electronics has also led to the demand for memory with low energy consumption and long memory. Increase; therefore, the use of non-volatile memory will grow substantially. Non-volatile memory is a type of memory. Its main feature is that when the external power is turned off, the information stored in the memory will not disappear. It can be used as a storage device as a hard disk. use.

The memory element of the resistive memory is basically composed of a resistor that can change the resistance via an electrical pulse and a transistor (1R1T). The structure of the resistor is mainly the upper electrode/insulating layer/lower electrode. The materials used for the insulating layer having the variable resistance characteristic can be seen as perovskite oxides and transition metal oxides. (transition metal oxides) and the like. Write (set) or write by applying an immediate resistance value change (ie, a so-called resistive switching effect) generated by applying a pulse bias signal to an insulating layer having a variable resistance characteristic Erase (erase; reset) function. When reading data, it is given a small bias to read its current value, while the relative high and low resistance states can be used as a source of memory signals. Therefore, when erasing the high resistance state (HRS) is written to The higher the ratio of the low resistance state (LRS), the higher the memory identification.

Among the RRAMs of perovskite-structured oxides, erbium-manganese-oxygen (PrCaMnO ₃ , PCMO for short) calcium-manganese oxide (LaCaMnO ₃ ) or chromium-doped lanthanum zirconate (Cr doped SrZrO ₃ ) can be found in the insulating layer. ), while the upper and lower electrodes are found to use Pt, or yttrium copper oxide (YBa ₂ Cu ₃ O _7-x , abbreviated as YBCO). Although such an RRAM having an oxide of a perovskite structure has a permanent memory reading and writing function; however, a perovskite oxide is a multi-oxide, which depends not only on a high-temperature process but also on a binary oxide (binary Oxides) In contrast, the composition of the multi-element oxide is also difficult to precisely control and is not easily introduced in the CMOS process.

Among the RRAMs of the transition metal oxide, binary oxides such as NiO _x , CuO, ZrO ₂ , TiO ₂ , and HfO _{2 may} be used as the insulating layer. At present, the most common applications are NiO _x and CuO, while the upper and lower electrodes use Pt. Although the RRAM composed of these binary oxides is easier to control than the constituents of the multi-element oxide; however, the RRAM composed of the binary oxide, such as the conventional Pt/TiO ₂ /Pt structure, has an open field (forming field) ) and the switching voltage [(switching voltage), that is, the write voltage and the erase voltage] are as high as 2~3 MV/cm and 4~5 V respectively; in addition, the distribution of the high and low resistance states is scattered and the switching current is also high. Therefore, not only is the loss high, the conversion voltage is not stable, and the degree of recognition still needs to be improved.

According to the above description, the pursuit of low-loss, high-stability conversion voltage and excellent recognition is a problem to be overcome in the field of non-volatile resistive memory.

<Summary of the Invention>

As is known in the RRAM-related field, the filamentary theory is one of the theories of the current working mechanism of RRAM. Filament theory is primarily believed to have some electrically conductive filaments within the oxide layer. The working mechanism of the filament theory applied by RRAM is briefly explained below.

When the oxide is applied to an applied electric field, the amount of current will be instantaneously increased due to the movement, aggregation and connection of the conductive material inside the portion, and the resistance state will also form a low resistance state (LRS due to conduction of the conductive wire; Set). In addition, an external electric field is provided in a low resistance state, and a large amount of current is transmitted through the conductive wire, which also generates a large amount of thermal energy, which causes the conductive wire to be broken due to overheating; therefore, the resistance state changes back to high resistance due to a sudden drop in current amount. State (HRS; reset). This resistance conversion is divided into two categories, one is unipolar, that is, the high resistance state is driven by the same polarity but different magnitudes of voltage; the other is bipolar, the conversion of high and low resistance states Is driven by voltages of different polarities The formation of conductive filaments is primarily dependent on the movement of ions (eg, anions or metal cations within the oxide) that drive current. In the case of generally randomly distributed grain or amorphous structures, the path of such ion movement is a scattered distribution, so that the formation of the conductive wire path is dendritic. The path of the conductive filaments generated each time the write/erase voltage is applied is not uniform; therefore, the stability of the switching bias is not good.

In view of the above problems of unstable switching bias caused by the dendritic dispersion of the conductive wire path, the present invention mainly uses columnar crystal grains. (columnar grain) structure, with a particularly preferred crystallinity, and an oxide having variable resistance as an oxide layer for recording high and low resistance states. The path of the current-driven ion movement is provided by a straight grain boundary between the columnar crystal grains, thereby forming a conductive wire path in which the directional tendency is uniform.

<Invention purpose>

Accordingly, it is an object of the present invention to provide a non-volatile resistive memory.

Therefore, the non-volatile resistive memory of the present invention comprises: a first electrode, a second electrode formed over the first electrode, and an oxide layer sandwiched between the first and second electrodes. The oxide layer has a current-driven varistor characteristic and is in a columnar grain structure along a direction substantially perpendicular to its layer. Part of the columnar grains of the oxide layer are juxtaposed in the radial direction. The grain boundary of the adjacent columnar grains is used as a moving path of ions in the oxide layer when driven by current.

The effect of the invention is to reduce the loss of the non-volatile resistive memory while improving the stability and recognition of the switching voltage.

The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention.

Before the present invention is described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals.

Referring to FIG. 1, a first preferred non-volatile resistive memory of the present invention is preferred. The embodiment comprises: a first electrode 2, a second electrode 3 formed above the first electrode 2, and an oxide layer 4 sandwiched between the first and second electrodes 2, 3. The oxide layer 4 has a current-driven varistor characteristic and is in a columnar grain structure along a direction X substantially perpendicular to its layer. The columnar crystal grains of the oxide layer 4 are juxtaposed to each other in the radial direction. The grain boundary of the adjacent columnar crystal grains is used as a moving path of ions in the oxide layer 4 when driven by current.

Preferably, the first preferred embodiment of the present invention further comprises a substrate 5, a titanium layer 6 formed on the germanium substrate 5, and an oxidation sandwiched between the titanium layer 6 and the germanium substrate 5.矽 layer 7. The first and second electrodes 2, 3 suitable for use in the first preferred embodiment of the present invention are made of platinum (Pt), Ti, Ag, a conductive oxide (e.g., RuO ₂ , YBCO), or a nitride (e.g., TiN, TaN) is formed, and the first electrode 2 is sandwiched between the oxide layer 4 and the titanium layer 6. In the first preferred embodiment of the present invention, the second electrode 3 is a circular electrode made of Pt having a diameter of 220 μm.

It is worth mentioning here that the present invention mainly utilizes grain boundaries between adjacent columnar grains as a path for current driving oxygen vacancies to form a conductive filament, when the radial grain size of the columnar grains is over In an hour, it is less likely to form columnar grains; in contrast, the radial grain size of excessively large columnar grains, in the application of nano-scale miniaturized elements, the oxide layer 4 will not be able to obtain a sufficient amount of columnar The grains, and will tend to provide a conductive filament path from the flat grain boundaries due to the tendency to be a single grain structure. Therefore, preferably, the radial grain size of the columnar grains of the oxide layer 4 is between 5 nm and 100 nm. In the first preferred embodiment of the present invention, the pillar of the oxide layer 4 The radial grain size of the grains is about 25 nm.

The oxide layer 4 suitable for use in the present invention is made of an insulating oxide of a hexagonal crystal structure (HCP) of zinc oxide (Zn0) or yttrium oxide (BeO); in the first preferred embodiment of the present invention, The oxide layer 4 is subjected to 40 W at a room temperature and a working pressure of 5 × 10 ³ Torr via a ZnO target (not shown) in a rf magnetron sputtering system. The output power is completed.

In addition, when the thickness of the oxide layer 4 is insufficient, the element of the present invention as a whole will be short-circuited due to a leakage current problem; conversely, when the thickness of the oxide layer 4 is too large, the loss of the entire element of the present invention It will increase relatively because the write/erase voltage during operation is too high. Therefore, preferably, the thickness of the oxide layer 4 is between 5 nm and 500 nm.

It is worth mentioning here that when the thickness of the oxide layer 4 is thin (for example, below 100 nm), it is suitable for use as a bipolar resistive memory; conversely, when the thickness of the oxide layer 4 is Larger (for example, above 100 nm), it is suitable for use as a unipolar resistive memory. In the first preferred embodiment of the invention, the thickness of the oxide layer 4 is 100 nm (i.e., suitable for unipolar resistive memory).

Referring to FIG. 2, a scanning electron microscope (SEM) topographical cross-sectional view of the first preferred embodiment of the present invention shows that the oxide layer (ie, ZnO) 4 has a columnar grain structure. .

Referring to FIG. 3, the X-ray diffraction spectrogram (XRD) of the first preferred embodiment of the present invention shows that the ZnO of the first preferred embodiment has (002) [ie, , C axis preferred orientation (Orientation)] The hexagonal crystal phase structure in which the growth direction of the columnar crystal grains is directed to grow along the C axis.

Referring to FIG. 4, the X-ray photoelectron spectrogram (XPS) of the ZnO of the first preferred embodiment of the present invention shows that the Zn 2 p _{1 / 2} signal peak and the Zn 2 p _3/2 The binding energy of the signal peaks is at 1045.3 eV and 1022.3 eV, respectively, and the bond energy difference between them is about 23.0 eV, which is equivalent to the total oxidation state of zinc (ie, Zn ²⁺ ). Therefore, the ZnO of the first preferred embodiment of the present invention is an insulating film in an oxidized state, which can prevent the integral component of the first preferred embodiment from being electrically conductive due to part of the metallic zinc, and the component cannot be used due to a short circuit. .

Referring to FIG. 5, the current versus voltage (I-V) graph of the first preferred embodiment of the present invention shows that the first preferred embodiment of the present invention is under operating conditions with a current compliance of 30 mA. For example, the turn-on voltage and the corresponding turn-on electric field are only about 3 V and 0.3 MV/cm, respectively; and the write voltage (ie, write or set) and the erase voltage (ie, erase or reset) are about 2 V and less than 1 respectively. V. The on-state electric field of the first preferred embodiment of the present invention is relatively much reduced compared to the open electric field (2 to 3 MV/cm) of the conventional Pt/TiO ₂ /Pt structure proposed in the prior art.

Referring to FIG. 6, the uniaxial I-V curve and the resistance versus inversion number of the first preferred embodiment of the present invention show that the write voltage and the erase voltage are respectively concentrated between 1.25 V and 2.35 V. Between 0.60 and 0.75 V, and the conversion voltage is less than 2.0 V. It is shown that the first preferred embodiment of the present invention effectively provides a uniform path of oxygen vacancies during movement due to ZnO having a columnar grain structure; therefore, the operation (write/erase) voltage is stabilized. Furthermore, the overall component of the first preferred embodiment of the present invention consumes less power than the switching voltage (5 V) of the conventional Pt/TiO ₂ /Pt structure proposed in the prior art. In addition, although the high resistance state (HRS) of the first preferred embodiment of the present invention exhibits a tendency to shake at the initial stage; however, the high resistance state after the 50th inversion is stable, and In the first preferred embodiment, the ratio of the high resistance state (HRS) to the written low resistance state (LRS) of the erased has reached 3-4 orders of magnitude, and the excellent performance of the overall component is also demonstrated. .

Referring again to Figure 1, a second preferred embodiment of the non-volatile resistive memory of the present invention is substantially identical to the first preferred embodiment. The difference is that the oxide layer 4 has a thickness of about 25 nm (i.e., is suitable for a bipolar resistive memory).

Referring to FIG. 7, a cross-sectional view of a transmission electron microscope (TEM) of the second preferred embodiment of the present invention shows that the oxide layer of the second preferred embodiment of the present invention (ie, ZnO) 4 has a thickness of about 25 nm and has a columnar grain structure.

Referring to FIG. 8, the biaxial I-V curve and the voltage versus inversion number of the second preferred embodiment of the present invention show that the write voltage and the erase voltage are respectively concentrated between 0.6 V and 0.8 V. Between -0.4 V and -0.8 V, and the conversion voltage is less than 1.0 V. Furthermore, the overall component of the second preferred embodiment of the present invention consumes less power than the switching voltage (5 V) of the conventional Pt/TiO ₂ /Pt structure proposed in the prior art. It is shown that the second preferred embodiment of the present invention effectively provides a uniform path of oxygen vacancies during movement due to the columnar grain structure of ZnO; therefore, the operation (write/erase) voltage is stabilized.

In summary, the non-volatile resistive memory of the present invention not only consumes Low, it also has the characteristics of high operating voltage stability and excellent recognition, and indeed achieves the purpose of the present invention.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent.

2‧‧‧First electrode

3‧‧‧second electrode

4‧‧‧Oxide layer

5‧‧‧矽 substrate

6‧‧‧Titanium layer

7‧‧‧Oxide layer

X‧‧‧ direction

1 is a front elevational view showing a first preferred embodiment of the non-volatile resistive memory of the present invention; and FIG. 2 is a SEM topographical view showing the cross-sectional morphology of the first preferred embodiment of the present invention. Figure 3 is an XRD analysis data illustrating the crystal structure of an oxide layer (ZnO) of the first preferred embodiment of the present invention; and Figure 4 is an XPS energy spectrum illustrating the first preferred embodiment of the present invention. FIG. 5 is an I-V graph illustrating the state of the turn-on voltage, the write voltage, and the erase voltage of the first preferred embodiment of the present invention; FIG. 6 is an I-V curve and resistor. For the inverse number of times graph, the operational stability and the identification of the first preferred embodiment of the present invention are illustrated; FIG. 7 is a TEM topographical view illustrating the cross-sectional topography of the second preferred embodiment of the present invention; FIG. 8 is a graph of I-V curve and voltage pair reversal times, illustrating operational stability and recognition of the second preferred embodiment of the present invention.

2‧‧‧First electrode

3‧‧‧second electrode

4‧‧‧Oxide layer

5‧‧‧矽 substrate

6‧‧‧Titanium layer

7‧‧‧Oxide layer

X‧‧‧ direction

Claims (5)

A non-volatile resistive memory comprising: a first electrode; a second electrode formed above the first electrode; and an oxide layer sandwiched between the first and second electrodes, having a current drive The variable resistance characteristic is a columnar grain structure along a direction substantially perpendicular to the layer thereof, and a part of the columnar crystal grains of the oxide layer are juxtaposed radially, by adjacent columnar grains The grain boundary acts as a moving path for ions in the oxide layer to be driven by current. The non-volatile resistive memory according to claim 1, wherein the columnar crystal grains of the oxide layer have a radial grain size of between 5 nm and 100 nm. The non-volatile resistive memory according to claim 1, wherein the oxide layer is made of an insulating oxide having a hexagonal crystal structure of zinc oxide or cerium oxide. The non-volatile resistive memory according to claim 1, wherein the oxide layer has a thickness of between 5 nm and 500 nm. The non-volatile resistive memory according to any one of claims 1 to 4, further comprising a substrate, a titanium layer formed on the germanium substrate, and a sandwich between the titanium layer and the germanium layer A ruthenium oxide layer between the substrates, the first and second electrodes are made of platinum, and the first electrode is sandwiched between the oxide layer and the titanium layer.