TWI409772B - Pixel structure, display panel and driving methods thereof - Google Patents
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本發明係關於一種畫素架構、顯示面板及其驅動方法。The present invention relates to a pixel architecture, a display panel, and a driving method thereof.
顯示裝置為現今生活中不可或缺的電子產品之一,其由早期的陰極射線管(cathode ray tube, CRT)顯示裝置發展至現今的液晶顯示(liquid crystal display, LCD)裝置以及有機發光二極體(organic light-emitting diode, OLED)顯示裝置等,並廣泛應用於通訊、資訊及消費性電子等產品上。Display devices are one of the indispensable electronic products in today's life. They have evolved from early cathode ray tube (CRT) display devices to today's liquid crystal display (LCD) devices and organic light-emitting diodes. Organic light-emitting diode (OLED) display devices, etc., are widely used in communications, information and consumer electronics.
以液晶顯示裝置而言,依據其液晶分子反應速度、液晶顯示裝置的驅動方式、背光模組產生的顯示光源以及人眼追蹤特性(eye-tracking characteristic)等原因的影響,使得液晶顯示裝置於切換顯示畫面時產生動態模糊(motion blur)的問題。In the liquid crystal display device, the liquid crystal display device is switched depending on the reaction speed of the liquid crystal molecules, the driving method of the liquid crystal display device, the display light source generated by the backlight module, and the eye-tracking characteristic. A problem of motion blur occurs when the screen is displayed.
動態模糊係指於切換顯示畫面的過程中,產生了邊緣輪廓模糊的現象。為了改善動態模糊的問題,習知的液晶顯示裝置係利用高速液晶材料、或使用過驅動(over driving)的驅動方式、或插黑畫面(black frame insertion)技術等方法,來改善動態模糊的問題。Dynamic blur refers to the phenomenon that the edge contour is blurred during the process of switching the display screen. In order to improve the problem of dynamic blurring, conventional liquid crystal display devices use a high-speed liquid crystal material, or an overdrive driving method, or a black frame insertion technique to improve the problem of dynamic blurring. .
請參照圖1所示,習知的一種使用插黑畫面技術的一畫素架構1係包含一第一電晶體T11 、一第二電晶體T12 以及一畫素等效電容C11 。Referring to FIG. 1 , a pixel structure 1 using a black screen technology includes a first transistor T 11 , a second transistor T 12 , and a pixel equivalent capacitor C 11 .
第一電晶體T11 係與一第一掃描線S11 、一資料線D11 以及第二電晶體T12 電性連接,第二電晶體T12 係與一第二掃描線S12 以及一訊號線(圖未示)電性連接,畫素等效電容C11 係與第一電晶體T11 以及第二電晶體T12 電性連接。於此,第一電晶體T11 以及第二電晶體T12 皆為N型金氧化半導體(n-type metal-oxide-semiconductor, NMOS)電晶體。另外,畫素等效電容C11 具有相互電性連接之一液晶電容CLC1 以及一儲存電容CST1 。The first transistor T 11 is electrically connected to a first scan line S 11 , a data line D 11 , and a second transistor T 12 , and the second transistor T 12 is coupled to a second scan line S 12 and a signal. A line (not shown) is electrically connected, and the pixel equivalent capacitance C 11 is electrically connected to the first transistor T 11 and the second transistor T 12 . Here, the first transistor T 11 and the second transistor T 12 are all n-type metal-oxide-semiconductor (NMOS) transistors. In addition, the pixel equivalent capacitor C 11 has a liquid crystal capacitor C LC1 and a storage capacitor C ST1 electrically connected to each other.
請參照圖2所示,以說明上述的畫素架構1的作動。於一第一時間t11 內,掃描線S11 傳送高準位之驅動訊號導通第一電晶體T11 ,且掃描線S12 傳送低準位之驅動訊號截止第二電晶體T12 。此時,一影像資料係可經由資料線D11 、第一電晶體T11 寫入畫素等效電容C11 ,畫素等效電容C11 的兩端具有一電位差VLC1 。Please refer to FIG. 2 to illustrate the operation of the pixel structure 1 described above. At a first time t 11, the scan line S 11 transmits the high level of the drive signal turns on the first transistor T 11, and the scan line S 12 transmits a low level OFF signal of the second driving transistor T 12. In this case, an image data line 11 via data line D, a first transistor T 11 writes the pixel equivalent capacitance C 11, 11 at both ends of the pixel equivalent capacitance C has a potential difference V LC1.
於一第二時間t12 內,掃描線S11 以及掃描線S12 皆為傳送低準位之驅動訊號分別截止第一電晶體T11 以及第二電晶體T12 。During a second time t 12 , the scan line S 11 and the scan line S 12 are both driving signals of low level and turning off the first transistor T 11 and the second transistor T 12 , respectively .
於一第三時間t13 內,掃描線S11 傳送低準位之驅動訊號截止第一電晶體T11 ,且掃描線S12 傳送高準位之驅動訊號導通第二電晶體T12 。此時,一黑畫面影像資料係可經由訊號線以及第二電晶體T12 寫入畫素等效電容C11 。其中,訊號線係傳送一共同電壓VCOM ,其係經由第二電晶體T12 而輸入畫素等效電容C11 ,以將黑畫面影像資料寫入畫 素等效電容C11 。During a third time t 13 , the scan line S 11 transmits the low level drive signal to the first transistor T 11 , and the scan line S 12 transmits the high level drive signal to turn on the second transistor T 12 . At this time, a black screen image data can be written into the pixel equivalent capacitance C 11 via the signal line and the second transistor T 12 . The signal line transmits a common voltage V COM , which is input to the pixel equivalent capacitance C 11 via the second transistor T 12 to write the black image data to the pixel equivalent capacitance C 11 .
於一第四時間t14 內,掃描線S11 以及掃描線S12 皆為傳送低準位之驅動訊號分別截止第一電晶體T11 以及第二電晶體T12 。During a fourth time t 14 , the scan line S 11 and the scan line S 12 are both driving signals of low level and turning off the first transistor T 11 and the second transistor T 12 , respectively .
然而,畫素架構1係包含兩條掃描線S11 、S12 ,且其材質係為不透光材質,將使得畫素架構1的開口率下降,因而造成顯示裝置的亮度降低。因此,如何提供一種在既有畫素架構下,減少掃描線數目以提高開口率的畫素架構、顯示面板及其驅動方法,實為當前重要課題之一。However, the pixel structure 1 includes two scanning lines S 11 and S 12 and is made of an opaque material, which causes the aperture ratio of the pixel structure 1 to decrease, thereby causing a decrease in brightness of the display device. Therefore, how to provide a pixel structure, a display panel and a driving method thereof for reducing the number of scanning lines to increase the aperture ratio under the existing pixel structure is one of the current important topics.
有鑑於上述課題,本發明之目的為提供一種能夠提高開口率的畫素架構、顯示面板及其驅動方法。In view of the above problems, an object of the present invention is to provide a pixel structure, a display panel, and a driving method thereof that can increase an aperture ratio.
為達上述目的,本發明提供一種畫素架構,其係與一掃描線以及一資料線配合應用。畫素架構包含一第一類型電晶體、一第二類型電晶體以及一畫素等效電容。第一類型電晶體與掃描線以及資料線電性連接,第二類型電晶體與掃描線、一訊號線以及第一類型電晶體電性連接,畫素等效電容與第一類型電晶體以及第二類型電晶體電性連接。To achieve the above object, the present invention provides a pixel architecture that is used in conjunction with a scan line and a data line. The pixel architecture includes a first type of transistor, a second type of transistor, and a pixel equivalent capacitance. The first type of transistor is electrically connected to the scan line and the data line, and the second type of transistor is electrically connected to the scan line, the signal line and the first type of transistor, the pixel equivalent capacitance and the first type of transistor and the first type Two types of transistors are electrically connected.
為達上述目的,本發明提供一種畫素架構之驅動方法,其中畫素架構與一掃描線以及一資料線配合應用,且畫素架構具有一第一類型電晶體、一第二類型電晶體以及一畫素等效電容。第一類型電晶體與掃描線以及資料線電 性連接,第二類型電晶體與掃描線、一訊號線以及第一類型電晶體電性連接,畫素等效電容係與第一類型電晶體以及第二類型電晶體電性連接。畫素架構之驅動方法包含以下步驟:於一第一時間,經由一掃描線傳送一第一準位之驅動訊號而導通一第一類型電晶體,截止一第二類型電晶體,並經由一資料線及第一類型電晶體將一第一影像資料寫入一畫素等效電容。於一第二時間,經由掃描線傳送一第二準位之驅動訊號而截止第一類型電晶體以及第二類型電晶體。於一第三時間,經由掃描線傳送一第三準位之驅動訊號而導通第二類型電晶體,截止第一類型電晶體,並經由訊號線及第二類型電晶體將一第二影像資料寫入畫素等效電容。To achieve the above objective, the present invention provides a driving method for a pixel structure, wherein a pixel structure is used in combination with a scan line and a data line, and the pixel structure has a first type of transistor, a second type of transistor, and A pixel equivalent capacitor. The first type of transistor and scan line and data line The second type of transistor is electrically connected to the scan line, the signal line, and the first type of transistor. The pixel equivalent capacitance is electrically connected to the first type of transistor and the second type of transistor. The driving method of the pixel structure includes the following steps: transmitting a first level driving signal through a scan line to turn on a first type of transistor, cutting off a second type of transistor, and transmitting a data through a scan line The line and the first type of transistor write a first image data to a pixel equivalent capacitance. At a second time, a second level of driving signal is transmitted via the scan line to turn off the first type of transistor and the second type of transistor. At a third time, a third level of driving signal is transmitted through the scan line to turn on the second type of transistor, the first type of transistor is turned off, and a second image data is written by the signal line and the second type of transistor. Enter the pixel equivalent capacitance.
為達上述目的,本發明提供一種顯示面板,其係包含一第一基板以及一第二基板。第二基板與第一基板相對設置,並具有一畫素架構、一掃描線以及一資料線,其中畫素架構具有一第一類型電晶體、一第二類型電晶體以及一畫素等效電容。第一類型電晶體與掃描線以及資料線電性連接,第二類型電晶體與掃描線、一訊號線以及第一類型電晶體電性連接,畫素等效電容與第一類型電晶體以及第二類型電晶體電性連接。To achieve the above objective, the present invention provides a display panel including a first substrate and a second substrate. The second substrate is disposed opposite to the first substrate and has a pixel structure, a scan line and a data line, wherein the pixel structure has a first type of transistor, a second type of transistor and a pixel equivalent capacitance . The first type of transistor is electrically connected to the scan line and the data line, and the second type of transistor is electrically connected to the scan line, the signal line and the first type of transistor, the pixel equivalent capacitance and the first type of transistor and the first type Two types of transistors are electrically connected.
為達上述目的,本發明提供一種顯示面板之驅動方法。其中,顯示面板具有一掃描線、一資料線以及一畫素架構,且畫素架構具有一第一類型電晶體、一第二類型電晶體以及一畫素等效電容。第一類型電晶體與掃描線以及 資料線電性連接,第二類型電晶體與掃描線、一訊號線以及第一類型電晶體電性連接,畫素等效電容與第一類型電晶體以及第二類型電晶體電性連接。顯示面板之驅動方法包含以下步驟:於一第一時間,經由一掃描線傳送一第一準位之驅動訊號而導通一第一類型電晶體,截止一第二類型電晶體,並經由一資料線及第一類型電晶體將一第一影像資料寫入一畫素等效電容。於一第二時間,經由掃描線傳送一第二準位之驅動訊號而截止第一類型電晶體以及第二類型電晶體。於一第三時間,經由掃描線傳送一第三準位之驅動訊號而導通第二類型電晶體,截止第一類型電晶體,並經由訊號線及第二類型電晶體將一第二影像資料寫入畫素等效電容。To achieve the above object, the present invention provides a driving method of a display panel. The display panel has a scan line, a data line and a pixel structure, and the pixel structure has a first type of transistor, a second type of transistor and a pixel equivalent capacitance. The first type of transistor and scan line and The data line is electrically connected. The second type of transistor is electrically connected to the scan line, the signal line, and the first type of transistor. The pixel equivalent capacitance is electrically connected to the first type of transistor and the second type of transistor. The driving method of the display panel includes the following steps: transmitting a first level driving signal through a scan line to turn on a first type of transistor, cutting off a second type of transistor, and passing through a data line. And the first type of transistor writes a first image data into a pixel equivalent capacitance. At a second time, a second level of driving signal is transmitted via the scan line to turn off the first type of transistor and the second type of transistor. At a third time, a third level of driving signal is transmitted through the scan line to turn on the second type of transistor, the first type of transistor is turned off, and a second image data is written by the signal line and the second type of transistor. Enter the pixel equivalent capacitance.
承上所述,依據本發明之畫素架構、顯示面板及其驅動方法係利用畫素架構中之第一類型電晶體以及第二類型電晶體在不同的電壓準位下會有不同的作動狀態,藉由適當的控制其作動狀態,即可僅使用一條掃描線來插入黑畫面影像資料,以改善動態模糊的問題。與習知技術相較,本發明之畫素架構、顯示面板及其驅動方法可減少畫素架構中不透光的區域,進而可提高開口率。As described above, the pixel structure, the display panel, and the driving method thereof according to the present invention use the first type of transistor in the pixel structure and the second type of transistor to have different actuation states at different voltage levels. By appropriately controlling the state of its operation, it is possible to insert black image data using only one scan line to improve the problem of dynamic blur. Compared with the prior art, the pixel structure, the display panel and the driving method thereof of the invention can reduce the opaque area of the pixel structure, thereby increasing the aperture ratio.
以下將參照相關圖式,說明依據本發明較佳實施例之畫素架構、顯示面板及其驅動方法。Hereinafter, a pixel structure, a display panel, and a driving method thereof according to a preferred embodiment of the present invention will be described with reference to related drawings.
請參照圖3所示,本發明較佳實施例之畫素架構2係 包含一第一類型電晶體T21 、第二類型電晶體T22 以及一畫素等效電容C21 。Referring to FIG. 3, the pixel structure 2 of the preferred embodiment of the present invention includes a first type of transistor T 21 , a second type of transistor T 22 , and a pixel equivalent capacitor C 21 .
第一類型電晶體T21 係與一掃描線S21 、一資料線D21 以及第二類型電晶體T22 電性連接,第二類型電晶體T22 係與掃描線S21 以及一訊號線(圖未示)電性連接,畫素等效電容C21 係與第一類型電晶體T21 以及第二類型電晶體T22 電性連接。其中,訊號線係傳送一共同電壓VCOM 。The first type of transistor T 21 is electrically connected to a scan line S 21 , a data line D 21 and a second type transistor T 22 , and the second type of transistor T 22 is connected to the scan line S 21 and a signal line ( The figure is not shown. The electrical connection, the pixel equivalent capacitance C 21 is electrically connected to the first type of transistor T 21 and the second type of transistor T 22 . Wherein, the signal line transmits a common voltage V COM .
於本實施例中,第一類型電晶體T21 以及第二類型電晶體T22 係可分別為N型金氧半導體電晶體以及P型金氧半導體(p-type metal-oxide-semiconductor, PMOS)電晶體。然而,熟知此一技藝者當知,第一類型電晶體T21 以及第二類型電晶體T22 亦可分別為P型金氧半導體電晶體以及N型金氧半導體電晶體,於此並無限制。In this embodiment, the first type of transistor T 21 and the second type of transistor T 22 are respectively N-type MOS transistors and p-type metal-oxide-semiconductors (PMOS). Transistor. However, it is known to those skilled in the art that the first type of transistor T 21 and the second type of transistor T 22 can also be P-type MOS transistors and N-type MOS transistors, respectively. .
另外,畫素等效電容C21 係具有一液晶電容CLC2 以及一儲存電容CST2 。其中,液晶電容CLC2 係與儲存電容CST2 相互電性連接。In addition, the pixel equivalent capacitor C 21 has a liquid crystal capacitor C LC2 and a storage capacitor C ST2 . The liquid crystal capacitor C LC2 is electrically connected to the storage capacitor C ST2 .
請參照圖4所示,以說明上述的畫素架構2的作動。於一第一時間t21 內,掃描線S21 傳送一第一準位L1 之驅動訊號導通第一類型電晶體T21 ,並截止第二類型電晶體T22 。此時,一第一影像資料係可經由資料線D21 、第一類型電晶體T21 寫入畫素等效電容C21 ,畫素等效電容C21 的兩端具有一電位差VLC2 。其中,第一影像資料係為顯示畫面的顯示資料,且第一準位L1 之絕對值係大於第一影像資料之電壓準位的絕對值,以導通第一類型電晶體T21 。Please refer to FIG. 4 to illustrate the operation of the pixel structure 2 described above. During a first time t 21 , the scan line S 21 transmits a driving signal of a first level L 1 to turn on the first type of transistor T 21 and turns off the second type of transistor T 22 . At this time, a first image data 21 may be based, a first type of transistor T 21 writes the pixel equivalent capacitance C via the data line D 21, both ends of the pixel equivalent capacitance C has a potential difference of 21 V LC2. The first image data is the display data of the display screen, and the absolute value of the first level L 1 is greater than the absolute value of the voltage level of the first image data to turn on the first type of transistor T 21 .
於一第二時間t22 內,掃描線S21 傳送一第二準位L2 之驅動訊號截止第一類型電晶體T21 以及第二類型電晶體T22 。During a second time t 22 , the scan line S 21 transmits a drive signal of the second level L 2 to turn off the first type of transistor T 21 and the second type of transistor T 22 .
於一第三時間t23 內,掃描線S21 傳送一第三準位L3 之驅動訊號截止第一類型電晶體T21 ,並導通第二類型電晶體T22 。此時,共同電壓VCOM 係可經由訊號線傳送至第二類型電晶體T22 ,俾使一第二影像資料寫入畫素等效電容C21 ,且第三準位L3 之絕對值係大於第二影像資料之電壓準位的絕對值,以導通第二類型電晶體T22 。其中,第二影像資料係為一黑畫面影像資料。During a third time t 23 , the scan line S 21 transmits a drive signal of a third level L 3 to turn off the first type of transistor T 21 and turn on the second type of transistor T 22 . At this time, the common voltage V COM can be transmitted to the second type transistor T 22 via the signal line, and a second image data is written into the pixel equivalent capacitance C 21 , and the absolute value of the third level L 3 is The absolute value of the voltage level is greater than the second image data to turn on the second type of transistor T 22 . The second image data is a black image data.
承上所述,本實施例係利用畫素架構2中之第一類型電晶體T21 以及第二類型電晶體T22 在不同的電壓準位下會有不同的作動狀態,藉由適當的控制其作動狀態,即可僅使用一條掃描線S21 來插入黑畫面影像資料,以改善動態模糊的問題。與習知技術相較,本實施例之畫素架構2係可減少畫素架構2中不透光的區域,進而可提高開口率。As described above, in this embodiment, the first type of transistor T 21 and the second type of transistor T 22 in the pixel structure 2 have different operating states at different voltage levels, with appropriate control. In its active state, black line image data can be inserted using only one scanning line S 21 to improve the problem of dynamic blur. Compared with the prior art, the pixel structure 2 of the embodiment can reduce the opaque area of the pixel structure 2, thereby increasing the aperture ratio.
於一第四時間t24 內,掃描線S21 傳送第二準位L2 之驅動訊號截止第一類型電晶體T21 以及第二類型電晶體T22 。其中,第二準位L2 係介於第一準位L1 以及第三準位L3 之間。During a fourth time t 24 , the scan line S 21 transmits the driving signal of the second level L 2 to turn off the first type transistor T 21 and the second type transistor T 22 . The second level L 2 is between the first level L 1 and the third level L 3 .
另外,本實施例之第一時間t21 、第二時間t22 、第三時間t23 以及第四時間t24 係可構成一圖框時間tF 。於本實施例中,畫素架構2係操作於複數圖框時間tF ,其中,顯示畫面在一個圖框時間tF 中,一半的時間係顯示第一影像 資料,而另一半時間係顯示黑畫面影像資料。In addition, the first time t 21 , the second time t 22 , the third time t 23 , and the fourth time t 24 of the embodiment may constitute a frame time t F . In this embodiment, the pixel architecture 2 operates at a plurality of frame times t F , wherein the display screen is in a frame time t F , half of the time is displaying the first image data, and the other half is displaying the black image. Screen image data.
另外,上述之訊號線係可為另一掃描線,其係可藉由適當控制該掃描線所傳送的訊號,俾使該掃描線傳送共同電壓VCOM ,因而顯示畫面亦可顯示黑畫面影像資料,以改善動態模糊的問題。In addition, the above signal line can be another scan line, which can transmit the common voltage V COM by appropriately controlling the signal transmitted by the scan line, so that the display screen can also display black image data. To improve the problem of dynamic blur.
請參照圖5所示,本實施例之畫素架構2的拓樸態樣係與複數掃描線S21 ~S2n 以及複數資料線D21 ~D2m 配合應用。其中,掃描線S21 ~S2n 以及資料線D21 ~D2m 係為交錯設置,並形成相對應之交錯區域。在各交錯區域係可設置如圖3所示之畫素架構2。Referring to FIG. 5, the topology of the pixel structure 2 of the present embodiment is applied in combination with the complex scan lines S 21 to S 2n and the plurality of data lines D 21 to D 2m . The scan lines S 21 -S 2n and the data lines D 21 -D 2m are staggered and form corresponding interlaced regions. A pixel structure 2 as shown in FIG. 3 can be disposed in each interlaced area.
請參照圖6所示,本發明較佳實施例之一種顯示面板3係包含一第一基板31、一液晶層32及一第二基板33。第二基板33與第一基板31相對設置,而液晶層32係設置於第二基板33與第一基板31之間。Referring to FIG. 6 , a display panel 3 according to a preferred embodiment of the present invention includes a first substrate 31 , a liquid crystal layer 32 , and a second substrate 33 . The second substrate 33 is disposed opposite to the first substrate 31, and the liquid crystal layer 32 is disposed between the second substrate 33 and the first substrate 31.
於本實施例中,第二基板33係包含一畫素架構、一掃描線以及一資料線。其中關於畫素架構、掃描線及資料線的敘述則如上述及圖3所示,於此不再贅述。In this embodiment, the second substrate 33 includes a pixel structure, a scan line, and a data line. The descriptions of the pixel structure, the scan line and the data line are as described above and shown in FIG. 3, and are not described herein again.
請參照圖7所示,其係為本發明較佳實施例之畫素架構的驅動方法。畫素架構係與一掃描線及一資料線配合應用。其中,畫素架構、掃描線以及資料線係與上述實施例之畫素架構2及其相關敘述相同。而畫素架構的驅動方法係包含步驟W11至步驟W14。Please refer to FIG. 7, which is a driving method of a pixel structure according to a preferred embodiment of the present invention. The pixel architecture is used in conjunction with a scan line and a data line. The pixel structure, the scan line, and the data line are the same as the pixel structure 2 of the above embodiment and related descriptions. The driving method of the pixel structure includes steps W11 to W14.
步驟W11,係於一第一時間,經由一掃描線傳送一第一準位之驅動訊號而導通一第一類型電晶體,截止一第二 類型電晶體,並經由一資料線及第一類型電晶體將一第一影像資料寫入一畫素等效電容。Step W11, in a first time, transmitting a first level driving signal through a scan line to turn on a first type of transistor, and ending a second A type of transistor, and a first image data is written into a pixel equivalent capacitance via a data line and a first type of transistor.
步驟W12,係於一第二時間,經由掃描線傳送一第二準位之驅動訊號而截止第一類型電晶體以及第二類型電晶體。Step W12, at a second time, transmitting a second level driving signal via the scan line to turn off the first type of transistor and the second type of transistor.
步驟W13,係於一第三時間,經由掃描線傳送一第三準位之驅動訊號而導通第二類型電晶體,截止第一類型電晶體,並經由訊號線及第二類型電晶體將一第二影像資料寫入畫素等效電容。Step W13, in a third time, transmitting a third level driving signal through the scan line to turn on the second type of transistor, cutting off the first type of transistor, and passing the signal line and the second type of transistor The second image data is written into the pixel equivalent capacitance.
步驟W14,係於一第四時間,掃描線傳送第二準位之驅動訊號截止第一類型電晶體及第二類型電晶體。In step W14, at a fourth time, the scan line transmits the second level of the driving signal to cut off the first type of transistor and the second type of transistor.
其中詳細的控制方式,於上述實施例中已一併詳述,故於此不再加以贅述。另外,於本實施例中,顯示面板的驅動方法係與上述之畫素架構的驅動方法相同,於此不再贅述The detailed control method has been described in detail in the above embodiments, and thus will not be further described herein. In addition, in the embodiment, the driving method of the display panel is the same as the driving method of the pixel structure described above, and details are not described herein again.
綜上所述,依據本發明之畫素架構、顯示面板及其驅動方法係利用畫素架構中之第一類型電晶體以及第二類型電晶體在不同的電壓準位下會有不同的作動狀態,藉由適當的控制其作動狀態,即可僅使用一條掃描線來插入黑畫面影像資料,以改善動態模糊的問題。與習知技術相較,本發明之畫素架構、顯示面板及其驅動方法可減少畫素架構中不透光的區域,進而可提高開口率。In summary, the pixel structure, the display panel, and the driving method thereof according to the present invention use the first type of transistor in the pixel structure and the second type of transistor to have different actuation states at different voltage levels. By appropriately controlling the state of its operation, it is possible to insert black image data using only one scan line to improve the problem of dynamic blur. Compared with the prior art, the pixel structure, the display panel and the driving method thereof of the invention can reduce the opaque area of the pixel structure, thereby increasing the aperture ratio.
以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均 應包含於後附之申請專利範圍中。The above is intended to be illustrative only and not limiting. Any equivalent modifications or variations to the spirit and scope of the invention are It should be included in the scope of the patent application attached.
1、2‧‧‧畫素架構1, 2‧‧‧ pixel architecture
3‧‧‧顯示面板3‧‧‧ display panel
31‧‧‧第一基板31‧‧‧First substrate
32‧‧‧液晶層32‧‧‧Liquid layer
33‧‧‧第二基板33‧‧‧second substrate
C11 、C21 ‧‧‧畫素等效電容C 11 , C 21 ‧ ‧ pixel equivalent capacitance
CLC1 、CLC2 ‧‧‧液晶電容C LC1 , C LC2 ‧‧‧Liquid Crystal Capacitors
CST1 、CST2 ‧‧‧儲存電容C ST1 , C ST2 ‧‧‧ storage capacitor
D11 、D21 ~D2m ‧‧‧資料線D 11 , D 21 ~ D 2m ‧‧‧ data line
L1 ‧‧‧第一準位L 1 ‧‧‧first position
L2 ‧‧‧第二準位L 2 ‧‧‧second level
L3 ‧‧‧第三準位L 3 ‧‧‧ third position
S11 、S12 、S21 ~S2n ‧‧‧掃描線S 11 , S 12 , S 21 ~S 2n ‧‧‧ scan lines
T11 、T12 ‧‧‧電晶體T 11 , T 12 ‧‧‧O crystal
T21 ‧‧‧第一類型電晶體T 21 ‧‧‧first type of crystal
T22 ‧‧‧第二類型電晶體T 22 ‧‧‧Second type transistor
tF ‧‧‧圖框時間t F ‧‧‧ frame time
t11 ~t14 、t21 ~t24 ‧‧‧時間t 11 ~t 14 , t 21 ~t 24 ‧‧‧ time
VCOM ‧‧‧共同電壓V COM ‧‧‧Common voltage
VLC1 、VLC2 ‧‧‧電位差V LC1 , V LC2 ‧‧‧ potential difference
W11~W14‧‧‧步驟W11~W14‧‧‧Steps
圖1為習知畫素架構的示意圖;圖2為習知畫素架構的時序控制圖;圖3為本發明較佳實施例之畫素架構的示意圖;圖4為本發明較佳實施例之畫素架構的時序控制圖;圖5為本發明較佳實施例之畫素架構的拓樸實施態樣;圖6為本發明較佳實施例之顯示面板的示意圖;以及圖7為依據本發明較佳實施例之顯示面板之驅動方法的步驟流程圖。1 is a schematic diagram of a conventional pixel architecture; FIG. 2 is a timing diagram of a conventional pixel architecture; FIG. 3 is a schematic diagram of a pixel architecture of a preferred embodiment of the present invention; FIG. 5 is a schematic diagram of a pixel structure according to a preferred embodiment of the present invention; FIG. 6 is a schematic diagram of a display panel according to a preferred embodiment of the present invention; and FIG. 7 is a schematic diagram of a display panel according to a preferred embodiment of the present invention; A flow chart of the steps of the driving method of the display panel of the preferred embodiment.
2‧‧‧畫素架構2‧‧‧ pixel architecture
C21 ‧‧‧畫素等效電容C 21 ‧‧‧pixel equivalent capacitor
CLC2 ‧‧‧液晶電容C LC2 ‧‧‧Liquid Crystal Capacitor
CST2 ‧‧‧儲存電容C ST2 ‧‧‧ storage capacitor
D21 ‧‧‧資料線D 21 ‧‧‧Information line
S21 ‧‧‧掃描線S 21 ‧‧‧ scan line
T21 ‧‧‧第一類型電晶體T 21 ‧‧‧first type of crystal
T22 ‧‧‧第二類型電晶體T 22 ‧‧‧Second type transistor
VCOM ‧‧‧共同電壓V COM ‧‧‧Common voltage
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TW529007B (en) * | 1998-06-09 | 2003-04-21 | Hitachi Ltd | Liquid crystal display device |
US20060033698A1 (en) * | 2004-06-05 | 2006-02-16 | Cheng-Jung Chen | Method and device used for eliminating image overlap blurring phenomenon between frames in process of simulating CRT impulse type image display |
US20070001960A1 (en) * | 2005-06-30 | 2007-01-04 | Kim Seong G | Method and apparatus for processing data of liquid crystal display |
US20080238846A1 (en) * | 2007-03-30 | 2008-10-02 | Samsung Electronics Co., Ltd. | Liquid crystal display and driving method thereof |
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TW529007B (en) * | 1998-06-09 | 2003-04-21 | Hitachi Ltd | Liquid crystal display device |
US20060033698A1 (en) * | 2004-06-05 | 2006-02-16 | Cheng-Jung Chen | Method and device used for eliminating image overlap blurring phenomenon between frames in process of simulating CRT impulse type image display |
US20070001960A1 (en) * | 2005-06-30 | 2007-01-04 | Kim Seong G | Method and apparatus for processing data of liquid crystal display |
US20080238846A1 (en) * | 2007-03-30 | 2008-10-02 | Samsung Electronics Co., Ltd. | Liquid crystal display and driving method thereof |
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