TWI491014B - Method of forming semiconductor stack unit and semiconductor package - Google Patents

Description

Semiconductor stacking unit and semiconductor package manufacturing method

The present invention relates to a semiconductor stacked unit, a semiconductor package, and a method of fabricating the same, and more particularly to a semiconductor stacked unit having a buried conductive element, a semiconductor package, and a method of fabricating the same.

With the advancement of the times, today's electronic products are developing towards miniaturization, multi-function, high-power and high-speed operation. In order to cope with this development trend, the semiconductor industry is not actively developing small size, high performance, high function, and high. Speed-oriented semiconductor packages to meet the requirements of electronic products.

In order to achieve more integration and higher performance, the semiconductor package has developed a so-called through silicon interposer (TSI) which forms a plurality of through holes penetrating the lower surface of the substrate and is filled. The conductive material is formed in the through holes to form a plurality of conductive through holes, and a circuit layer may be formed on the lower surface of the base material to form a piercing interposer.

The figures shown in Figs. 1A and 1B are cross-sectional views of a conventional piercing interposer and a method of manufacturing the same.

As shown in FIG. 1A, a semiconductor substrate 10 having a first surface 10a and a second surface 10b opposite to each other and a plurality of conductive vias 101 extending through the first surface 10a and the second surface 10b is provided. A first conductive bump 11a electrically connected to the conductive via 101 is disposed on the first surface 10a, and the first surface 10a of the semiconductor substrate 10 and the first conductive bump 11a are temporarily temporarily provided by the temporary adhesive layer 12. Fixed to the carrier plate 13 On the second layer 10b of the semiconductor substrate 10, a second conductive bump 11b electrically connected to the conductive via 101 is disposed on the peeling layer 14.

As shown in FIG. 1B, a dicing film 15 is attached to the second surface 10b of the semiconductor substrate 10, and the carrier sheet 13, the peeling layer 14, and the temporary adhesive layer 12 on the first surface 10a are removed. Finally, a singulation step (not shown) is performed.

However, when the temporary adhesive layer 12 is removed, the removal is often incomplete, and the temporary adhesive layer 12 remains on the first surface 10a, resulting in a final yield drop. .

Therefore, how to avoid various problems in the above-mentioned prior art has become a problem that is currently being solved.

The present invention provides a semiconductor stacking unit comprising: a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias extending through the first surface and the second surface; a first adhesive layer is formed on the first surface of the semiconductor substrate; a plurality of first conductive elements are embedded in the first adhesive layer and exposed on the surface of the first adhesive layer, and electrically connected The conductive vias are formed on the second surface and electrically connected to the conductive vias.

The invention provides a method for fabricating a semiconductor stacked unit, comprising: providing a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias penetrating the first surface and the second surface; Forming a plurality of first conductive elements electrically connected to the conductive vias; The semiconductor substrate is disposed on the adhesive layer on a carrier, and the adhesive layer covers the first surface and the first conductive component; and the second surface is formed with a plurality of electrically connected to each of the conductive vias. a conductive member, and removing the carrier; the semiconductor substrate is attached to a carrier by its second conductive component; a portion of the adhesive layer is removed from the side of the adhesive layer to expose the first conductive component; Cutting a single step; and removing the carrier sheet.

The invention provides a method for fabricating another semiconductor stacking unit, comprising: providing a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias penetrating the first surface and the second surface; Forming a plurality of first conductive elements electrically connected to the conductive vias; the semiconductor substrate is placed on the first adhesive layer on a carrier, and the first adhesive layer covers the first surface and the first a conductive element; forming a plurality of second conductive elements electrically connected to the conductive vias on the second surface; forming a second adhesive layer on the second surface, and the second adhesive layer covers the second conductive Removing a portion of the second adhesive layer from the side of the second adhesive layer to expose the second conductive member; removing the carrier and causing the semiconductor substrate to pass the second conductive member and the second adhesive layer Attached to a carrier sheet; grinding and removing a portion of the first adhesive layer from the side of the first adhesive layer, exposing the first conductive member; performing a singulation step; and removing the carrier sheet.

The present invention further provides a semiconductor package, comprising: a first semiconductor stacked unit, comprising: a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias penetrating the first surface and the second surface a first adhesive layer formed on the first surface of the semiconductor substrate; a plurality of first conductive elements embedded in the first adhesive layer and exposed to the first a surface of a glue layer electrically connected to each of the conductive vias; and a plurality of second conductive elements formed on the second surface and electrically connected to the conductive vias; the package substrate has a relative a third surface and a fourth surface, the first semiconductor stacked unit being attached to the third surface by a second conductive element thereof; and a semiconductor wafer attached to the first semiconductor stacked unit.

The present invention further provides a method of fabricating a semiconductor package, comprising: providing a first semiconductor stacked unit, comprising: a semiconductor substrate having opposite first and second surfaces and a plurality of first and second surfaces a first conductive layer formed on the first surface of the semiconductor substrate; a plurality of first conductive elements embedded in the first adhesive layer and exposed on the surface of the first adhesive layer And electrically connecting the conductive vias; and the plurality of second conductive elements are formed on the second surface and electrically connected to the conductive vias; and the first semiconductor stacked unit is supported by the second conductive components And a third surface of the package substrate having the third surface and the fourth surface opposite to each other, and the semiconductor wafer is mounted on the first semiconductor stacked unit.

As can be seen from the above, since the present invention forms a permanently bonded adhesive material covering a conductive member on a semiconductor substrate, such as an encapsulant or a primer, and then grinding the adhesive and the conductive member, the conductive member is exposed without It is necessary to use a temporary adhesive layer and a step of removing the temporary adhesive layer as in the prior art, so that there is no problem that the adhesive remains on the semiconductor substrate, so that the yield can be effectively improved.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "side", "smooth" and "one" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments to the relative relationship are considered to be within the scope of the invention without departing from the scope of the invention.

First embodiment

2A to 2F are views showing a first embodiment of the semiconductor stacked unit, the semiconductor package, and the method of fabricating the same according to the present invention, wherein the second D' is a second embodiment of the second embodiment.

As shown in FIG. 2A, a semiconductor substrate 20 having a first surface 20a and a second surface 20b opposite to each other and a plurality of conductive vias 201 extending through the first surface 20a and the second surface 20b is provided. The semiconductor substrate 20 includes At least one wafer or interposer, and forming a plurality of first conductive elements 21a electrically connected to the conductive vias 201 on the first surface 20a, the first conductive elements 21a being, for example, conductive bumps, and then the semiconductor Substrate 20 The material of the adhesive layer 23 can be, for example, an underfill or an encapsulant, and the adhesive layer 23 is coated with the first first conductive member 21a. The surface 20a and the first conductive element 21a, the carrier 22 includes a carrier plate 221 and a release layer 222 thereon, and the adhesive layer 23 is formed on the peeling layer 222, and then the second A plurality of second conductive elements 21b electrically connected to the conductive vias 201 are formed on the surface 20b, and the second conductive elements 21b are, for example, conductive bumps.

As shown in FIG. 2B, the carrier 22 is removed and the semiconductor substrate 20 is attached to a carrier sheet 24, such as a film, by its second conductive element 21b.

As shown in FIG. 2C, a portion of the adhesive layer 23 and the first conductive member 21a are removed from the side of the adhesive layer 23 to expose the first conductive member 21a.

As shown in FIG. 2D, the dicing step is performed, and the carrier sheet 24 is removed, thereby completing the semiconductor stacking unit 2 of the present invention; wherein the first conductive element 21a and the second conductive element 21b may also be made of copper. A metal post, such as the semiconductor stacking unit 2' shown in FIG. 2D'.

As shown in FIG. 2E, the semiconductor stacking unit 2 is placed on the third surface 25a of the package substrate 25 having the third surface 25a and the fourth surface 25b opposite thereto by the second conductive member 21b. A primer 26 is formed between the semiconductor stacking unit 2 and the package substrate 25, and a plurality of solder balls 27 are disposed on the fourth surface 25b of the package substrate 25.

As shown in FIG. 2F, the semiconductor wafer 28 is mounted on the first conductive element 21a, and a sealing is formed on the third surface 25a of the package substrate 25. A colloid 29 is mounted to coat the semiconductor stacked unit 2 and the semiconductor wafer 28, and thus the semiconductor package of the present invention is completed.

Second embodiment

3A to 3E are schematic views showing a second embodiment of the semiconductor stacked unit of the present invention and a method of manufacturing the same, wherein the 3D' is a third embodiment of the 3D drawing, and the 3E is the 3D. The application example of the figure. The embodiment of the present embodiment is substantially the same as the previous embodiment. The main difference is that the present embodiment is such that the semiconductor stacked unit is vertically symmetrical to reduce the warpage phenomenon, and therefore only a brief description will be made herein.

As shown in FIG. 3A, a semiconductor substrate 20 having a first surface 20a and a second surface 20b opposite to each other and a plurality of conductive vias 201 extending through the first surface 20a and the second surface 20b is provided. The semiconductor substrate 20 includes A first conductive element 21a electrically connected to each of the conductive vias 201 is formed on the first surface 20a, and the first conductive element 21a is, for example, a conductive bump, and the semiconductor substrate 20 is formed on the first surface 20a. The first adhesive layer 21a is attached to the first adhesive layer 23a of the carrier member 22. The material of the first adhesive layer 23a can be, for example, a primer or an encapsulant, and the first adhesive layer 23a is coated. The first surface 20a and the first conductive element 21a, the carrier 22 includes a carrier plate 221 and a release layer 222 thereon, and the first adhesive layer 23a is formed on the release layer 222, and then A plurality of second conductive elements 21b electrically connected to the conductive vias 201 are formed on the two surfaces 20b, and the second conductive elements 21b are, for example, conductive bumps.

As shown in FIG. 3B, a second adhesive layer 23b, such as a primer or an encapsulant, is formed on the second surface 20b, and the second adhesive layer 23b covers the second adhesive layer 23b. The second conductive element 21b, and the portion of the second adhesive layer 23b and the second conductive member 21b are removed from the side of the second adhesive layer 23b to expose the second conductive member 21b.

As shown in FIG. 3C, the carrier 22 is removed, and the semiconductor substrate 20 is attached to the carrier sheet 24, such as a film, by the second conductive member 21b and the second adhesive layer 23b.

As shown in FIG. 3D, a portion of the first adhesive layer 23a and the first conductive member 21a are removed from the side of the first adhesive layer 23a, the first conductive member 21a is exposed, and a singulation step is performed, and the step is performed. In addition to the carrier sheet 24, the semiconductor stacking unit 3 of the present invention is completed; wherein the first conductive element 21a and the second conductive element 21b may also be metal pillars of copper material, such as the semiconductor stack shown in FIG. 3D' Unit 3'.

As shown in FIG. 3E, the semiconductor stacking unit 3 (second semiconductor stacked unit) of FIG. 3D is disposed between the semiconductor stacked unit 2 (first semiconductor stacked unit) of FIG. 2F and the semiconductor wafer 28, and constitutes another A semiconductor package, it is to be noted that, besides the semiconductor stacked unit 3 (second semiconductor stacked unit), the semiconductor stacked unit 2 (first semiconductor stacked unit) and the semiconductor wafer 28 may be disposed to have a continuity A wafer or interposer of a via (TSV).

The present invention further provides a semiconductor stacking unit comprising: a semiconductor substrate 20 having a first surface 20a and a second surface 20b opposite to each other and a plurality of conductive vias 201 extending through the first surface 20a and the second surface 20b; The adhesive layer 23a is formed on the first surface 20a of the semiconductor substrate 20; the plurality of first conductive elements 21a are embedded in the first adhesive layer 23a. And being exposed on the surface of the first adhesive layer 23a, and electrically connecting the conductive vias 201; and the plurality of second conductive elements 21b are formed on the second surface 20b, and electrically connected to the conductive vias 201.

In the semiconductor stacking unit of the present invention, the first conductive element 21a is flush with the surface of the first adhesive layer 23a, and the semiconductor substrate 20 includes at least one wafer or interposer, and the first adhesive layer 23a is a bottom. The first conductive element 21a is a conductive bump or a metal pillar, and the second conductive component 21b is a conductive bump or a metal pillar.

The semiconductor stacking unit further includes a second adhesive layer 23b formed on the second surface 20b of the semiconductor substrate 20 and covering the second conductive component 21b, and the second conductive component 21b is exposed The surface of the second adhesive layer 23b is a primer or encapsulant, and the second conductive member 21b is flush with the surface of the second adhesive layer 23b.

The present invention further provides a semiconductor package, comprising: a semiconductor stacking unit, comprising: a semiconductor substrate 20 having opposite first and second surfaces 20a and 20b and a plurality of first and second surfaces 20a and 20b a first conductive layer 21a is formed on the first surface 20a of the semiconductor substrate 20; a plurality of first conductive elements 21a are embedded in the first adhesive layer 23a and exposed to the first a surface of the adhesive layer 23a, and electrically connected to each of the conductive vias 201; and a plurality of second conductive elements 21b formed on the second surface 20b, and electrically connected to each of the conductive vias 201; the package substrate 25, Corresponding to the third surface 25a and the fourth surface 25b, the semiconductor stacked unit is attached to the third surface 25a by the second conductive element 21b; the semiconductor wafer 28 is tied to the first surface The conductive member 21a; and the encapsulant 29 are formed on the package substrate 25 to encapsulate the semiconductor stacked unit and the semiconductor wafer 28.

In the semiconductor package, the first conductive element 21a is flush with the surface of the first adhesive layer 23a, and includes a primer 26 formed between the semiconductor stacked unit and the package substrate 25, and The plurality of solder balls 27 are disposed on the fourth surface 25b of the package substrate 25.

In summary, the present invention is based on the invention to form a permanently bonded adhesive layer covering a conductive member on a semiconductor substrate, such as an encapsulant or a primer, and then grinding the adhesive layer and the conductive member. Excluding the conductive element without using the temporary adhesive layer and removing the temporary adhesive layer as in the prior art, so that there is no problem that the adhesive remains on the semiconductor substrate, so that the good adhesion can be effectively improved. rate.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

10,20‧‧‧Semiconductor substrate

10a, 20a‧‧‧ first surface

10b, 20b‧‧‧ second surface

101,201‧‧‧Electrical through hole

11a‧‧‧First conductive bump

11b‧‧‧Second conductive bump

12‧‧‧ Temporary adhesive layer

13,221‧‧‧ carrying board

14,222‧‧‧ peeling layer

15‧‧‧Cutting film

2,2’,3,3’‧‧‧Semiconductor stacking unit

21a‧‧‧First conductive element

21b‧‧‧Second conductive element

22‧‧‧Carrier

23‧‧‧ glue layer

23a‧‧‧First layer

23b‧‧‧Second layer

24‧‧‧Carrier

25‧‧‧Package substrate

25a‧‧‧ third surface

25b‧‧‧ fourth surface

26‧‧‧Bottom glue

27‧‧‧ solder balls

28‧‧‧Semiconductor wafer

29‧‧‧Package colloid

1A and 1B are cross-sectional views of a conventional piercing interposer and a method of manufacturing the same; and FIGS. 2A to 2F are schematic views showing a first embodiment of a semiconductor stacking unit, a semiconductor package, and a method of manufacturing the same according to the present invention; Wherein the 2D' diagram is another embodiment of the 2D diagram; and the 3A to 3E diagrams are the semiconductor stacking unit of the present invention and A schematic diagram of a second embodiment of the method, wherein the third embodiment is a third embodiment of the third embodiment, and the third embodiment is an application example of the third embodiment.

2‧‧‧Semiconductor stacking unit

20‧‧‧Semiconductor substrate

20a‧‧‧ first surface

20b‧‧‧second surface

201‧‧‧ conductive vias

21a‧‧‧First conductive element

21b‧‧‧Second conductive element

23‧‧‧ glue layer

Claims (21)

A semiconductor stacking unit is provided, comprising: providing a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias penetrating the first surface and the second surface; on the first surface of the semiconductor substrate Forming a plurality of first conductive elements electrically connected to the conductive vias; the semiconductor substrate is attached to the permanently bonded adhesive layer on a carrier, and the adhesive layer covers the entire surface of the semiconductor substrate a surface and the first conductive element; forming a plurality of second conductive elements electrically connected to the conductive vias on the second surface of the semiconductor substrate, and removing the adhesive layer exposed outside the carrier; The semiconductor substrate is placed on a carrier by its second conductive component; a portion of the adhesive layer is removed from the side of the adhesive layer to expose the first conductive component; and a singulation step is performed to make the adhesive layer The side surface is flush with the side surface of the semiconductor substrate; and the carrier sheet is removed. The method of manufacturing a semiconductor stacking unit according to claim 1, wherein the carrier comprises a carrier plate and a release layer thereon, and the adhesive layer is formed on the release layer. The method of fabricating a semiconductor stacking unit according to claim 1, wherein the semiconductor substrate comprises at least one wafer or an interposer. The method of manufacturing a semiconductor stacking unit according to claim 1, wherein the adhesive layer is a primer or an encapsulant. The method of manufacturing a semiconductor stacking unit according to claim 1, wherein the first conductive element is a conductive bump or a metal pillar, and the second conductive component is a conductive bump or a metal pillar. The method of manufacturing a semiconductor stacking unit according to claim 1, wherein the carrier sheet is a film. The method of fabricating a semiconductor stacking unit according to claim 1, wherein the grinding removing portion of the adhesive layer comprises grinding the removed portion of the first conductive member. A semiconductor stacking unit is provided, comprising: providing a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias penetrating the first surface and the second surface; on the first surface of the semiconductor substrate Forming a plurality of first conductive elements electrically connected to the conductive vias; the semiconductor substrate is attached to the first adhesive layer of the permanent bond on a carrier, and the first adhesive layer covers the semiconductor substrate And forming a second electrically conductive element electrically connected to each of the conductive vias on the second surface of the semiconductor substrate; forming a second surface on the second surface of the semiconductor substrate a second adhesive layer, and the second adhesive layer covers the second conductive member; and the second adhesive layer is removed from the side of the second adhesive layer to expose the second conductive member; Removing the first adhesive layer that is permanently bonded outside the carrier, and attaching the semiconductor substrate to the carrier by the second conductive component and the second adhesive layer; grinding from the side of the first adhesive layer Except for a portion of the first adhesive layer, the first conductive member is exposed; a singulation step is performed to make a side surface of the first adhesive layer flush with a side surface of the semiconductor substrate; and the carrier sheet is removed. The method of fabricating a semiconductor stacking unit according to claim 8, wherein the grinding removing portion of the second adhesive layer comprises grinding the removed portion of the second conductive member. The method of fabricating a semiconductor stacking unit according to claim 8, wherein the grinding removing portion of the first adhesive layer comprises grinding the removed portion of the first conductive member. The method of manufacturing a semiconductor stacking unit according to claim 8, wherein the carrier comprises a carrier plate and a release layer thereon, and the first adhesive layer is formed on the release layer. The method of fabricating a semiconductor stacking unit according to claim 8, wherein the semiconductor substrate comprises at least one wafer or an interposer. The method for manufacturing a semiconductor stacking unit according to claim 8, wherein the first adhesive layer is a primer or an encapsulant, and the second adhesive layer is a primer or an encapsulant. The method of manufacturing a semiconductor stacking unit according to claim 8, wherein the first conductive element is a conductive bump or a metal pillar. And the second conductive element is a conductive bump or a metal pillar. The method of manufacturing a semiconductor stacking unit according to claim 8, wherein the carrier sheet is a film. A method of fabricating a semiconductor package, comprising: providing a first semiconductor stacked unit, comprising: a semiconductor substrate having opposite first and second surfaces and a plurality of conductive vias extending through the first surface and the second surface a first adhesive layer is formed on the entire first surface of the semiconductor substrate, and a side surface of the first adhesive layer is flush with a side surface of the semiconductor substrate; a plurality of first conductive elements are embedded in the first adhesive layer The first adhesive layer is exposed on the surface of the first adhesive layer and electrically connected to each of the conductive vias; and the plurality of second conductive elements are formed on the second surface of the semiconductor substrate and electrically connected Each of the conductive vias; wherein the process of the first semiconductor stacked unit comprises: bonding the semiconductor substrate to the first adhesive layer permanently bonded on a carrier, and forming the second conductive components After removing the first adhesive layer that is permanently bonded outside the carrier, and the semiconductor substrate is placed on a carrier by the second conductive component, and then removing the carrier after the singulation step; The The semiconductor stacking unit by means of which a second electrically conductive contact element disposed on a package substrate having opposite third and fourth surfaces of the On the three surfaces, a semiconductor wafer is attached to the first semiconductor stacked unit. The method of fabricating a semiconductor package according to claim 16, wherein the first conductive element is flush with a surface of the first adhesive layer. The method of fabricating a semiconductor package according to claim 16, further comprising forming an encapsulant on the package substrate to encapsulate the first semiconductor stacked unit and the semiconductor wafer. The method of fabricating a semiconductor package according to claim 16, further comprising forming a primer between the first semiconductor stacked unit and the package substrate. The method of fabricating a semiconductor package according to claim 16, further comprising a wafer, an interposer or a second semiconductor stacking unit having a via hole disposed between the first semiconductor stacked unit and the semiconductor wafer. The method of fabricating a semiconductor package according to claim 16, wherein the plurality of solder balls are disposed on the fourth surface of the package substrate.