TWI455469B - Power supply with over current protection and control circuit thereof and method of over current protection - Google Patents

Description

Power supply with overcurrent protection and control circuit thereof and method for overcurrent protection

The invention relates to a power supply with overcurrent protection and a control circuit thereof and a method for overcurrent protection, in particular to a method for adaptively adjusting an overcurrent protection critical setting value or controlling an overcurrent protection signal delay according to a current sensing signal. Time, a method of power supply and its control circuit and overcurrent protection to stabilize the peak of the primary side current and the secondary side current.

Overcurrent protection is an important protection measure in the power supply. In a relatively straightforward manner, as shown in FIG. 1A, the comparator 11 compares the current sensing signal CS with the fixed voltage setting value Vpeak. When the current sensing signal CS exceeds the set value Vpeak, the overcurrent detecting signal OC is output. A condition indicating an overcurrent occurs, wherein the current sense signal CS is related to the magnitude of the transformer primary side current Ip. The switch control circuit 12 controls the operation of the power switch P on the one hand according to a feedback signal (not shown), and turns off the power switch P on the other hand according to the overcurrent detection signal OC. The main problem of this prior art is that there is a delay time between the output of the overcurrent detection signal OC from the comparator 11 and the actual off power switch P. During the delay time, the primary side current Ip and the current sensing signal CS, The value continues to increase. In this regard, the solution is to set the set value Vpeak to a lower value. Thus, although the primary side current Ip increases during the delay time, the actual overcurrent setting is not exceeded when the power switch P is actually turned off. Upper limit. However, the delay time also causes the problem that the input voltage of the power supply may be different, for example, it may be a high-line voltage (for example, 375 volts) or a low-line voltage (for example). 127 volts), the current increase rate is different, so that the power switch P is actually turned off, the magnitude of the primary side current Ip will be different due to the input voltage being high/low line voltage, and the output current and power are different. Can not be stable to the target value that you want to adjust.

In detail, please refer to Figure 1B, showing the ideal state of the OCP control mechanism, where the thick solid line represents the signal waveform of the primary side current Ip_high when the input voltage is the high line voltage; the thin solid line represents the input voltage is the low line voltage. , the signal waveform of the primary side current Ip_low; and the dotted line represents the peak setting value Ipeak of the primary side current Ip of the OCP control mechanism (corresponding to the set value Vpeak), under ideal conditions, that is, when there is no delay effect, regardless of the input voltage is high The line voltage or the low line voltage can control the primary side current Ip below the peak set value Ipeak without delay.

Please refer to Figure 1C for the actual status of the OCP control mechanism. In the actual OCP control mechanism, regardless of whether the input voltage is high line voltage or low line voltage, there will be a delay time Tp to actually turn off the power switch P. As shown in the figure, when the input voltage is the high line voltage, the primary side current peak when the power switch P is actually turned off is Ipeak1, and the primary side current peak Ipeak2 when the power switch P is actually turned off is higher than the low line voltage. The power or current consistency problem that results in the output.

In response to the above problem, a pulse width modulation (PWM) controller 50 is proposed in U.S. Patent No. 6,611,439. Referring to FIG. 2A, the OCP control mechanism is shown. Compared with the prior art described above, the OCP control mechanism of this patent increases the reference voltage Vinr associated with the input voltage Vin. In this way, although the input voltage Vin is a high line voltage or a low line voltage, the overcurrent protection critical set value can be adaptively adjusted to improve the output power or current consistency problem. However, the controller 50 is usually integrated into an integrated circuit, which requires adding a pin to the integrated circuit of the controller 50, such as the pin Vinr shown in FIG. 2, which increases the manufacturing cost, and Limit the scope of the application. Among them, Vcc is the internal voltage, OSC is the oscillating circuit, and its output clock signal is used to input the SQ flip-flop.

A power supply is proposed in U.S. Patent No. 7,215,105. Please refer to Figure 2B-2C for the OCP control mechanism. Compared with the above prior art, the OCP control mechanism of this patent adds the initial primary current peak setting value Ipeak to the ON time of the PWM signal. The ramp signal Ramp is such that the primary side current peak setting value increases with time, so that when the input voltage is a high line voltage, the primary side current peak will be relatively earlier than when the input voltage is a low line voltage. The primary current peak setting value is used to compensate for the problem that the primary side current peak is large when the input voltage is the high line voltage; thereby achieving the problem of improving the power or current consistency of the output. However, the disadvantage of this prior art is that it uses a pre-designed fixed compensation mechanism instead of adaptively adjusting with the magnitude of the input voltage, which makes the OCP control mechanism unable to accurately correct the primary side current Ip peak. . Among them, LEB is the leading edge blanking, and Source and Drain respectively represent the source and drain of the power switch.

In view of the above, the present invention is directed to the above-mentioned prior art deficiencies, and provides a power supply with overcurrent protection, a control circuit thereof and an overcurrent protection method, which can adjust the overcurrent protection critical set value according to the current sensing signal adaptability. And there is no need to increase the pins of the integrated circuit to save manufacturing costs and increase the range of applications.

One of the objects of the present invention is to provide a power supply with overcurrent protection.

Another object of the present invention is to provide a control circuit for a power supply having overcurrent protection.

In order to achieve the above object, in one aspect, the present invention provides a power supply with overcurrent protection, comprising: a power conversion circuit having at least one power switch, through which an input voltage is applied Converting to an output voltage and generating a current; a control circuit receiving a current sensing signal related to the current, and generating an operation signal according to the current sensing signal to operate the power switch to adjust the current, the control The circuit includes: a switch control circuit that generates the operation signal according to a feedback signal and an overcurrent detection signal; and a first comparator that compares the current sensing signal with a threshold setting to generate a first comparison The output signal is used to determine the overcurrent detection signal; a sample and hold circuit outputs a peak signal according to the current sensing signal to represent a peak of the current sensing signal; and a compensation circuit coupled to the sample and hold circuit Generating a compensation signal according to the peak signal and a preset value; wherein the compensation signal is used to determine the a set value, or the compensation signal is used to control the first comparator output signal to delay the delay time to become the over current detection signal; thereby, the overcurrent detection signal can be adaptively adjusted according to the current, so that the current is The peak value corresponds to the preset value.

The power conversion circuit may be, for example, a boost conversion circuit, a buck conversion circuit, a buck-boost conversion circuit, or a flyback conversion circuit.

In another aspect, the present invention also provides a control circuit for a power supply having overcurrent protection, the power supply including a power conversion circuit having at least one power switch, via operation of the power switch, Converting an input voltage into an output voltage and generating a current; the control circuit includes: a switch control circuit, generating the operation signal according to the feedback signal and an overcurrent detection signal; and a first comparator, the current is The sensing signal is compared with a threshold set value to generate a first comparator output signal for determining the overcurrent detecting signal; a sample and hold circuit for outputting a peak signal according to the current sensing signal to represent the a peak of the current sensing signal; and a compensation circuit coupled to the sample and hold circuit, generating a compensation signal according to the peak signal and a preset value; wherein the compensation signal is used to determine the threshold value, or the compensation signal Controlling the output signal of the first comparator to delay a delay time to become the overcurrent detection signal; thereby Flow detection signal may be adaptively adjusted according to the current so that the current peak corresponds to the predetermined value.

In one embodiment, the compensation circuit preferably includes an error amplifier that generates the compensation signal based on the peak signal and the preset value to determine the threshold setting.

In another embodiment, the compensation circuit preferably includes: a second comparator that compares the peak signal with the preset value to generate the compensation signal; and a counter that generates a count signal according to the compensation signal; And a digital-to-analog conversion circuit that converts the count signal to an analogous value of the threshold to input the first comparator.

In another implementation, the compensation circuit preferably includes: a delay circuit that receives a delay signal associated with the compensation signal to control the first comparator output signal to delay for a delay time to become the over current detection signal And an error amplifier coupled to the sample and hold circuit, and generating the compensation signal according to the peak signal and the preset value; wherein the threshold set value is related to the preset value and has a difference therebetween.

In another implementation, the compensation circuit preferably includes: a delay circuit that receives a delay signal to control the first comparator output signal to delay for a delay time to become the over current detection signal; and a second comparator Comparing the peak signal with the preset value to generate the compensation signal; a counter according to the compensation signal to generate a count signal; and a digital-analog conversion circuit for converting the count signal to the analog delay signal, The delay circuit is input; wherein the threshold set value is related to the preset value and has a difference therebetween.

In another aspect, the present invention also provides a method of overcurrent protection for a power supply having at least one power switch, the operation of the power switch to generate an input based on an input voltage The current is converted and the output current is supplied to a load circuit; the method of overcurrent protection includes: detecting the input current to generate a current sensing signal; comparing the current sensing signal with a threshold setting to generate a comparison signal for determining an overcurrent detection signal for controlling to turn off the power switch; outputting a peak signal according to the current sensing signal to represent a peak value of the current sensing signal; and according to the peak signal and the peak signal The preset value generates a compensation signal, wherein the compensation signal is used to determine the threshold setting value, or the compensation signal is used to control the comparison signal to delay a delay time to become the overcurrent detection signal; thereby, the overcurrent is caused The detection signal can be adaptively adjusted according to the input current such that the input current peak corresponds to the preset value.

In the method of overcurrent protection, the step of generating the compensation signal preferably includes: comparing the peak signal with the preset value to generate the compensation signal; generating a counting signal according to the compensation signal; and converting the counting signal to The critical setting.

In a preferred embodiment, the step of generating the compensation signal preferably includes: comparing the peak signal with the preset value to generate the compensation signal; generating a delay signal according to the compensation signal; and controlling by the delay signal The comparison signal is delayed by a delay time to become the overcurrent detection signal; wherein the threshold setting value is related to the preset value and has a difference therebetween.

In another preferred embodiment, the step of generating the compensation signal preferably includes: comparing the peak signal with the preset value to generate the compensation signal; generating a counting signal according to the compensation signal; and changing the counting signal The delay signal is controlled by the delay signal; and the delay signal is delayed by a delay time to become the overcurrent detection signal; wherein the threshold setting value is related to the preset value and has a difference therebetween.

The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

Referring to FIG. 3A, the basic architecture of the present invention is shown. The power supply 10 includes a control circuit 30 and a power conversion circuit 40. The control circuit 30 controls at least one power transistor P in the power conversion circuit 40 to input the input voltage Vin. The output voltage Vout is converted to an output current Iout and supplied to the load circuit 20, wherein the control circuit 30 receives the current sense signal CS for OCP control. The power conversion circuit 40 is, for example but not limited to, a boost converter circuit as shown in FIG. 3B-3C, a buck converter circuit shown in FIG. 3D-3E, a buck-boost converter circuit shown in FIG. 3F-3G, and The flyback conversion circuit shown in Fig. 3H. Hereinafter, the present invention will be described by taking a flyback conversion circuit as an example, but the same concept of the present invention is not limited to application to a flyback conversion circuit, and can be applied to other types of power conversion circuits as long as OCP control is required in these circuits. And the input voltage may vary such that there is a delay between detecting an overcurrent and actually turning off the power switch P, and the present invention can be applied.

Referring to Figures 4A-4C, a first embodiment of the present invention is shown. 4A shows that the power conversion circuit 40 in the power supply 10 is a flyback conversion circuit including a primary side circuit 13 that receives the rectified AC power Vin to output a primary side current Ip, and according to the primary side current Ip a current sensing signal CS is generated; a transformer 15 coupled to the primary side circuit 13 converts the primary side current Ip into a secondary side current; and a secondary side circuit 17 coupled to the transformer 15 that receives the secondary side current The output current Iout is supplied to the load circuit 20, and the feedback signal FB is generated, for example, by detecting the output current Iout or the output voltage Vout, and is sent to the control circuit 30, thereby controlling the power switch P in the primary side circuit 13. . As shown in FIG. 4B, the control circuit 30 includes a switch control circuit 12, a comparator 31, a sample and hold circuit 32, and an error amplifier 33 coupled to the sample and hold circuit 32. The comparator 31 compares the current sense signal CS related to the primary side current Ip with a threshold set value to generate an overcurrent detection signal OC. The switch control circuit 12 controls the operation of the power switch P according to the feedback signal (not shown in FIG. 4B), and turns off the power switch P according to the overcurrent detection signal OC to adjust the primary side current Ip. The sample and hold circuit 32 outputs a peak signal according to the current sense signal CS, which represents the peak value of the current sense signal CS. The error amplifier 33 generates a compensation signal according to the peak signal and the preset value, and the threshold setting value is generated according to the compensation signal, that is, the critical setting value is adaptively adapted according to the difference between the peak signal and the preset value. Adjust to the appropriate value. In the present embodiment, the threshold set value is, for example, a compensation signal, but the invention is not limited thereto, for example, an offset voltage (not shown) is added between the output of the error amplifier 33 and the input of the comparator 31, It is also feasible.

FIG. 4C shows the signal waveform of the current sensing signal CS and the critical setting value according to the adaptive adjustment of the current sensing signal CS in this embodiment. As shown in the figure, if the preset value is set as the target peak value Vpeak of the current sensing signal CS, the control circuit 30 will adaptively adjust the critical set value, and control the peak value of the current sensing signal CS to a preset value. This adaptively adjusts the primary side current Ip so that the peak value of the primary side current Ip can be controlled to a target value (Ipeak, corresponding to the target peak value Vpeak of the current sensing signal CS) regardless of the input voltage change, thereby improving the output. Power or current consistency issues.

5A and 5B respectively show the primary side current and current sensing of the input voltage, for example, the high line voltage and the low line voltage, in the embodiment using the prior art of the 1A-1C diagram and the 4A to 4C diagram using the present invention, respectively. Signal waveform comparison of signals. Referring to FIG. 5A, as described in [Prior Art], since the input voltage is a high line voltage during the delay time Tp, the actual primary side current Ip_high peak is compared to the actual low line voltage. The peak value of the primary side current Ip_low is high; the peak value of the current sense signal CS_high corresponding to the high line voltage is also higher than the peak value of the current sense signal CS_low when the line voltage is low. That is to say, the primary current peak set value Ipeak and the fixed voltage set value Vpeak will have different peaks of the primary side current Ip and different current sensing signal peaks at different input voltages, resulting in different output power or current signals. Peak.

In contrast, with the technical idea of the present invention, as shown in FIG. 5B, the primary side current peak set value Ipeak corresponds to a preset value Vpeak (corresponding to the positive input terminal of the error amplifier 33 of FIG. 4B), which is directed to the high line. The voltage and the low line voltage are respectively adaptively adjusted to generate different threshold settings Vpeak1 and Vpeak2 (corresponding to the negative input terminal of the comparator 31 of FIG. 4B), and the primary side current Ip_high1 and Ip_high2 are the same under different input voltages. The peak value of the primary side current Ip, that is, the primary side current peak setting value Ipeak; thus, the consistency of the signal peak of the output power or current can be improved.

6A and 6B show a second embodiment of the present invention, which is different from the first embodiment in that the present embodiment is achieved by a digital method. As shown in FIG. 6A, in addition to the switch control circuit 12, the comparator 31, and the sample and hold circuit 32, the control circuit 30 further includes a comparator 39 coupled to the sample and hold circuit 32 to compare the peak signal with the preset value. a compensation signal is generated; a counter 34 receives the compensation signal and counts up/down to generate a count signal; and a digital-to-analog converter (DAC) 35 receives the count signal to generate a critical set value . FIG. 6B shows the signal waveform of the current sensing signal CS of the present embodiment, and the critical setting value is adjusted according to the adaptability of the current sensing signal CS, and a similar effect can be achieved with the first embodiment.

Figures 7A-7C show a third embodiment of the invention. 7A is the same as FIG. 4A, showing that the power conversion circuit 40 in the power supply 10 is a flyback conversion circuit including a primary side circuit 13 that receives the rectified AC power Vin to output a primary side current Ip, And generating a current sensing signal CS according to the primary side current Ip; the transformer 15 coupled to the primary side circuit 13 converts the primary side current Ip into a secondary side current; and a secondary side circuit 17 coupled to the transformer 15 Receiving the secondary side current to generate the output current Iout to the load circuit 20, and detecting the output current Iout or the output voltage Vout, generating the feedback signal FB, and transmitting it to the control circuit 30, thereby controlling the primary side circuit 13 Power switch P. As shown in FIG. 7B, the control circuit 30 includes a comparator 31, a sample and hold circuit 32, an error amplifier 33 coupled to the sample and hold circuit 32, a delay circuit 36, and a switch control circuit 12. The comparator 31 compares the current sensing signal CS related to the primary side current Ip with a critical set value to generate a comparison signal. In this embodiment, the critical set value is preferably a value lower than the set value, and is represented by a preset value -ΔV in the figure (the illustration is merely illustrative, and does not mean that the biasing element ΔV must be set in the circuit and according to the pre- Setting the value minus ΔV to generate the critical set value, or directly generating a reference signal input comparator 31 equal to the preset value -ΔV. The sample and hold circuit 32 outputs a peak signal according to the current sense signal CS, which represents the peak value of the current sense signal CS. The error amplifier 33 compares the peak signal with a preset value to generate a compensation signal, and the delay signal is generated according to the compensation signal to control the delay time of the delay circuit 36. In the present embodiment, the delay signal is, for example, a compensation signal. However, the present invention is not limited thereto. For example, the compensation signal outputted by the error amplifier 33 may be converted into a digital signal, and the delay circuit 36 may be controlled in a digital manner. The delay circuit 36 receives the delay signal and the amplification signal to output an overcurrent detection signal OC. The switch control circuit 12 generates an operation signal OP based on the overcurrent detection signal OC, thereby operating the power switch P to adjust the primary side current Ip.

Please refer to FIG. 7C for explaining the concept of the embodiment. The difference from the foregoing embodiment is that, considering the prior art, the output of the overcurrent detection signal OC by the comparator 11 is delayed, resulting in a power or current consistency problem of the output; and the present embodiment utilizes the concept of the present invention. The delay time is adaptively controlled. For example, when the input voltage is a low line voltage, the delay time is increased; conversely, when the input voltage is a high line voltage, the delay time is not increased, or delayed for a small amount of time. As shown in FIG. 7C, the peak value of the current sensing signal CS is compared with a preset value, and the comparison result produces a compensation signal for generating a delay signal, which is input to the delay circuit 36, thereby controlling the delay time and making the length smaller. The input voltage has a long delay time, while the larger input voltage has a short delay time. Due to the loopback feedback mechanism of the loop, the peak value of the primary side current Ip can be balanced to the peak set value Ipeak regardless of the input voltage change (corresponding to The preset value is Vpeak), thereby improving the power or current consistency of the output.

Fig. 8 shows a fourth embodiment of the present invention. Unlike the third embodiment, this embodiment is achieved by a digital method. As shown in FIG. 8, the control circuit 30 includes a comparator 39 coupled to the sample and hold circuit 32 in addition to the switch control circuit 12, the comparator 31, the sample and hold circuit 32, and the delay circuit 36 to compare the peak signals. And a preset value, generating a compensation signal; a counter 34 for receiving the compensation signal, and counting up/down to generate a counting signal; and a digital-to-analog conversion circuit 35 for receiving the counting signal to generate a delay signal. This embodiment is similar to the third embodiment in that a similar effect can be achieved in which the digital-analog conversion circuit 35 can be omitted if the delay circuit 36 is digitally controlled. Delay circuits that can control the delay time by analog or digital signals are well known to those skilled in the art, so the details are not described herein.

The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. In the same spirit of the invention, various equivalent changes can be conceived by those skilled in the art. For example, in the circuit of each embodiment shown, components that do not affect the main meaning of the signal, such as other switches, may be inserted; for example, the input and output of the comparator or the error amplifier may be interchanged, and only the signal processing mode corresponding to the correction circuit is required. For example, if the input of the comparator 31 is positively and negatively interchanged in the embodiment of the seventh or eighth embodiment, the critical set value will become the preset value + ΔV. All such modifications may be made in accordance with the teachings of the present invention, and the scope of the present invention should be construed to cover the above and other equivalents.

10. . . Power Supplier

11. . . Comparators

30. . . Control circuit

31. . . Comparators

32. . . Sample and hold circuit

33. . . Error amplifier

34. . . counter

35. . . Digital-to-analog conversion circuit DAC

36. . . Delay circuit

39. . . Comparators

40. . . Power conversion circuit

50. . . Controller

CS CS_high, CS_high1 CS_low, CS_low1. . . Current sensing signal

Drain. . . Bungee

FB. . . Feedback signal

Ip. . . Primary current

Ipeak. . . Peak setting

Ip_high, Ip_high1, Ip_low, Ip_low1. . . Primary current

Ipeak1, Ipeak2. . . Primary current peak

Iout. . . Output current

LEB. . . Lead-in obscuration circuit

OC. . . Overcurrent detection signal

OSC. . . Oscillating circuit

P. . . Power switch

S, Q, Rst SQ. . . Positive and negative pin

Source. . . Source

Ip. . . delay

Vcc. . . Internal voltage

Vin. . . Input voltage

Vinr. . . Reference voltage

Vo, Vout. . . The output voltage

Vpeak. . . Set value

Vpeak1. . . Critical set point

Vpeak2. . . Critical set point

The 1A-1C diagram shows the prior art overcurrent protection mechanism.

Figure 2A shows a PWM controller as proposed in U.S. Patent No. 6,611,439.

Figure 2B-2C shows a power supply as disclosed in U.S. Patent No. 7,215,105.

Figure 3A shows the basic architecture of the present invention.

The 3B-3H diagram exemplifies the power conversion circuit 40 to which the present invention can be applied in combination with various types.

4A-4C shows a first embodiment of the present invention.

5A-5B show the comparison of the signal waveforms of the primary side current and current sense signals of the high line voltage and the low line voltage in the prior art and the present invention.

Figures 6A-6B show a second embodiment of the invention.

Figures 7A-7C show a third embodiment of the invention.

Figure 8 shows a fourth embodiment of the present invention.

30. . . Control circuit

31. . . First comparator

32. . . Sample and hold circuit

33. . . Error amplifier

CS. . . Current sensing signal

Ip. . . Primary current

OC. . . Overcurrent detection signal

P. . . Power switch

Claims (16)

A power supply with overcurrent protection, comprising: a power conversion circuit having at least one power switch, through which an input voltage is converted into an output voltage and an input current is generated; a control circuit, Receiving a current sensing signal related to the input current and a feedback signal related to an output current or the output voltage, and generating an operation signal according to the current sensing signal and the feedback signal to operate the power switch, And adjusting the input current, the control circuit includes: a switch control circuit, generating the operation signal according to the feedback signal and an overcurrent detection signal; a first comparator, the current sensing signal, and a threshold setting Comparing values to generate a first comparator output signal for determining the overcurrent detection signal; a sample and hold circuit for outputting a peak signal according to the current sensing signal to represent a peak of the current sensing signal; a compensation circuit coupled to the sample and hold circuit, generating a compensation signal according to the peak signal and a preset value; The compensation signal is used to determine the threshold setting value, or the compensation signal is used to control the first comparator output signal to delay the delay time to become the overcurrent detection signal; thereby, the overcurrent detection signal can be The input current is adaptively adjusted such that the peak value of the input current corresponds to the preset value. The power supply with overcurrent protection according to claim 1, wherein the compensation circuit includes an error amplifier that generates the compensation signal according to the peak signal and the preset value to determine the critical setting. value. The power supply with overcurrent protection according to claim 1, wherein the compensation circuit comprises: a second comparator that compares the peak signal with the preset value to generate the compensation signal; a counter that generates a count signal according to the compensation signal; and a digital-analog conversion circuit that converts the count signal to an analogy The critical set value is input to the first comparator. The power supply with overcurrent protection according to claim 1, wherein the compensation circuit comprises: a delay circuit for receiving a delay signal related to the compensation signal to control the delay of the first comparator output signal a delay time is the overcurrent detection signal; and an error amplifier coupled to the sample and hold circuit generates the compensation signal according to the peak signal and the preset value; wherein the threshold setting is related to the preset value and There is a difference between the two. The power supply device with overcurrent protection according to claim 1, wherein the compensation circuit comprises: a delay circuit for receiving a delay signal to control the first comparator output signal to delay for a delay time; An over current detection signal; a second comparator that compares the peak signal with the preset value to generate the compensation signal; a counter that generates a count signal according to the compensation signal; and a digital-to-analog conversion circuit that converts The counting signal is analogous to the delay signal to input the delay circuit; wherein the threshold setting is related to the preset value and has a difference therebetween. The power supply with overcurrent protection according to claim 1, wherein the power conversion circuit is a boost conversion circuit, a buck conversion circuit, a buck-boost conversion circuit, or a flyback conversion circuit. The power supply device with overcurrent protection according to claim 1, wherein the power conversion circuit comprises a primary side circuit, a transformer coupled to the primary side circuit, and a secondary side circuit coupled to the transformer, wherein The current sensing signal is related to a primary side current generated by the primary side circuit. A control circuit for a power supply with overcurrent protection, the power supply includes a power conversion circuit that receives an operation signal to operate at least one of the power switches, and an input via the operation of the power switch Converting the voltage into an output voltage and generating an input current; the control circuit includes: a switch control circuit for generating the operation signal according to a feedback signal and an overcurrent detection signal; and a first comparator for correlating the One of the input current sense signals is compared with a threshold set value to generate a first comparator output signal for determining the overcurrent detection signal; a sample and hold circuit for outputting a peak according to the current sense signal a signal representing a peak of the current sensing signal; and a compensation circuit coupled to the sample and hold circuit to generate a compensation signal according to the peak signal and a preset value; wherein the compensation signal is used to determine the threshold setting a value, or the compensation signal is used to control the first comparator output signal to delay a delay time to become the over current detection Signal; thereby, so that the overcurrent detection signal may be adaptively adjusted according to the input current, the input to the peak currents corresponding to the predetermined value. The control circuit of claim 8, wherein the compensation circuit comprises an error amplifier that generates the compensation signal according to the peak signal and the preset value to determine the critical set value. The control circuit of claim 8, wherein the compensation circuit comprises: a second comparator that compares the peak signal with the preset value to generate the compensation signal; a counter that generates a count signal according to the compensation signal; and a digital-analog conversion circuit that converts the count signal to an analogy The critical set value is input to the first comparator. The control circuit of claim 8, wherein the compensation circuit comprises: a delay circuit, receiving a delay signal related to the compensation signal to control the first comparator output signal to delay a delay time, An overcurrent detection signal; and an error amplifier coupled to the sample and hold circuit, generating the compensation signal according to the peak signal and the preset value; wherein the threshold setting is related to the preset value and has a difference between the two value. The control circuit of claim 8 , wherein the compensation circuit comprises: a delay circuit, receiving a delay signal to control the first comparator output signal to delay for a delay time to become the over current detection signal; a second comparator that compares the peak signal with the preset value to generate the compensation signal; a counter that generates a count signal according to the compensation signal; and a digital-to-analog conversion circuit that converts the count signal to an analogy The delay signal is input to the delay circuit; wherein the threshold set value is related to the preset value and has a difference therebetween. An overcurrent protection method for a power supply, the power supply having at least one power switch, the operation of the power switch to generate an input current according to an input voltage, and converting to generate an output current supply a load The method of detecting the overcurrent protection includes: detecting the input current to generate a current sensing signal; comparing the current sensing signal with a threshold setting value to generate a comparison signal for determining an overcurrent detection a signal for controlling the power switch to be turned off; a peak signal is outputted according to the current sensing signal to represent a peak of the current sensing signal; and a compensation signal is generated according to the peak signal and a preset value; wherein The compensation signal is used to determine the threshold setting value, or the compensation signal is used to control the comparison signal to delay the delay time to become the overcurrent detection signal; thereby, the overcurrent detection signal can be adaptively adjusted according to the input current. So that the input current peak corresponds to the preset value. The method for generating an overcurrent protection according to claim 13 , wherein the step of generating the compensation signal comprises: comparing the peak signal with the preset value to generate the compensation signal; and generating a signal according to the compensation signal Counting the signal; and converting the count signal to the critical set value. The method for generating an overcurrent protection according to claim 13 , wherein the step of generating the compensation signal comprises: comparing the peak signal with the preset value to generate the compensation signal; and generating a delay according to the compensation signal The signal is controlled by the delay signal to delay the delay time to become the overcurrent detection signal; wherein the threshold setting value is related to the preset value and has a difference therebetween. The method of applying the overcurrent protection according to claim 13 , wherein the step of generating the compensation signal comprises: comparing the peak signal with the preset value to generate the compensation signal; And generating a count signal according to the compensation signal; converting the count signal to a delay signal; and controlling the comparison signal by the delay signal to delay the delay time to become the over current detection signal; wherein the threshold setting value is related to the The preset value has a difference between the two.