1330308 九、發明說明： 【發明所屬之技術領域】 本發明為-種穩壓電路’制是-種具有大輸入電壓範 圍之低壓降穩壓器。 【先前技術】 具低壓降（low dropout ;LDO)之穩壓器被相當廣泛地 應用於如電腦、行動電話、交通工具或是其餘電子產品之電源 管理系統上。獅管理系統使用健降麵器作為區域性電源 供應器。低壓降穩壓器必須具有純淨的輸出與快速暫離變應。 同時，低壓降穩壓器更使電源管理系統可以有效提供般 供應電壓等級之額外電壓。舉例來說，5伏特或是^12伏 電壓管理系統使用低壓降穩壓器，將可供應部份的晶片組或 5己憶體純淨的2·5伏特及3.3伏特的電壓訊號。 、儘管低壓降穩壓器並不能相當有效率地轉換功率， 他卻具有體積小、成本不南的特點，且也僅有相當小的頻率干 擾（frequency interference)。此外它可提供區域電路純 且不會因為電源系統的其他區域的電流波動（贿邮 而受影響。因此，在區域電路的功率消耗相對於 “源供應彡統的貞載來說相當微小時，低壓降穩壓器 泛地使用於區域電路的電源供應。 ’、 -理想低餅穩壓ϋ提供精準的直流電輸出，同時 載變化以及輸入暫態時具有快速響應。且因為 琴廣 品，如電腦與行動電話，故設計以 傳^，|器包含有_於傳遞元件之回授控制迴路， 兀二f閘極電壓而能控制其阻抗(knpedance)。 根據閉極電壓，傳遞元件可供應不_級的電流至電源供應器 5 區。因此’不論負細情況與輸人的暫態響應，因為閘 f電壓被職，轉會提供敎的直流電騷出。如「第i ^所不’係為習知_隨_壓器（s_efbllGwreguto) ，路，’其包合有N型傳遞電晶體1G、回授控制電路η以 $壓器12 ’分壓器12具有分壓點FB以及兩個電阻丨之卜 赃之錢私職V並輸 =Γ设置··輸出电塵v〇。回授控制電路11包含有誤差放 ^ 15^X及傳輸。至誤差放大器15之正輸人端的參考訊號 :。狹呈放大器15的輪出端連接至N型傳遞電晶體川之 ’而直流輸人健Vin傳輸至N型傳遞電晶體⑴的 轉S則可傳遞直流輸出輕Vq。直流輸出電 =〇係由回授控制電路U透過分壓器12來傳遞^^電阻丨2卜 =串連於直流輸出龍v〇與參考地端之間分壓點FB位於 阻121、122之間’並連接回誤差放大器15之負輪入端。 此一源極隨耦穩壓器的優點在於良好的穩定性，N型 晶體1G提供衰減至回授迴路，誤差放大器15主要㈣$ f的=(gain) ’而可輕易達到足夠的增益邊限(ωηΜ:) 邊限fhase Margin)。另一個優點在於具有高電源拒斥 ^ ower Supply Rejecti〇n Rati〇 ; psRR)，N 型傳遞電晶體 H直流輸入電壓&，因此可具有高的阻抗來 ΐίί直流輪入電壓〜至直流輸出電壓V。的雜訊。铁而， 源極隨耦麵H缺點是此麵虔器具有高壓 壓、高於導通N型傳遞電晶體10之臨 直流輸出_ V。之間的賴差限制了直 电晶體10於截止狀態時，位於沒極端D與源極端S之電壓t 2圖」’係為低壓降顏器的基本結構，低壓 H it型傳遞電晶體20，回授控制電路21與分虔 斋，/刀壓斋22包含有兩個電阻22卜222，回授控制電路 端,mu輪出端37。n型傳遞電晶體31包含有〉及極 極娃ς 閘極端〇，汲極端D耦接於輸入端36，源 2 37。P型傳遞電晶體32與N型傳遞電晶 接’同樣的，P鶴遞電晶體32也包含有 汲減D 與祕端G ’源極端S雛於輸入端36， 及極D轉接於輸出端37。 第3圖」中所繪示，控制電路3〇包含有兩個誤差放 ϋ Γϋΐ㈣33、34 °參考訊號^傳遞入控制電 ϊ 33透過分壓11 35 _於輪出端37。分塵 ==vr第一回授訊號 高於第一_號vFB1。誤緑All 糸 裔34透過分麗器35叙接於輪出端 f Ο R 3S1 + R 352 + R 353 R353 R 351 + R 352 + R 353 R 352 + R 353 堅V01與第一輪出電壓％係可由方程式⑴⑺絲示： V〇l = Vrep X V〇2 Y » . . R ·»<! -U P ·><*» _L D ^*·« (1； (2) 其中’尺35】係為電阻351之電阻值； R352係為電阻352之電阻值； 尺353係為電阻353之電阻值； 因此，第-輸出電麼V〇1會略高於第二輸$縣％。 N型傳遞電晶體31供應第—輪出電 生第-輪出電遷％至輸出端37•時。 造成N型傳遞電晶體31截止時 虔 產生第二 與P態傳遞電晶體32係並聯連接於輸出端37 ’因此，輸入電 壓I高於臨界電壓Vra時將產生第―輸㈣壓」 電塵Vm低於臨界電s V™時將產生第二輪出電i 端37，臨界電壓Vth係可由下列方程式(3)說明电:lV〇2至輸出1330308 IX. Description of the Invention: [Technical Field] The present invention is a low-voltage drop regulator having a large input voltage range. [Prior Art] Regulators with low dropout (LDO) are widely used in power management systems such as computers, mobile phones, vehicles, or other electronic products. The Lion Management System uses a face-lifting device as a regional power supply. Low-dropout regulators must have pure output and fast transients. At the same time, the low-dropout regulator allows the power management system to effectively provide additional voltages at the supply voltage level. For example, a 5 volt or ^12 volt voltage management system using a low dropout regulator will supply a portion of the chipset or 5 mn. of pure 2.5 volt and 3.3 volt voltage signals. Although the low-dropout regulator does not convert power quite efficiently, it has the characteristics of small size, low cost, and only a relatively small frequency interference. In addition, it provides regional circuit purity and is not affected by current fluctuations in other areas of the power system (bumping of mail. Therefore, the power consumption in the area circuit is relatively small compared to the "source supply system". Low-dropout regulators are used extensively in the power supply of regional circuits. ', - Ideal low-profile voltage regulators provide accurate DC output, with fast response to load changes and input transients, and because of the wide variety of products, such as computers With the mobile phone, it is designed to pass the feedback control loop of the transmission component, and the knives can be controlled by the gate voltage. According to the closed-pole voltage, the transmission component can be supplied without _ The current of the class is in the area of the power supply 5. Therefore, regardless of the negative condition and the transient response of the input, because the voltage of the gate f is employed, the transfer provides a turbulent direct current. For example, the "ith ^n" is _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Diary of money V and output = Γ setting · · output electric dust v 〇. The feedback control circuit 11 includes error correction and transmission. The reference signal to the positive input terminal of the error amplifier 15: the rounding of the narrow amplifier 15 The end is connected to the N-type transfer transistor Chuanzhi' and the DC input is transmitted to the N-type transfer transistor (1). The transfer S can transmit the DC output light Vq. The DC output power is controlled by the feedback control circuit U. The voltage converter 12 transmits the ^^ resistor 丨2b=connected between the DC output dragon v〇 and the reference ground terminal Between the resistors 121 and 122' and is connected back to the negative wheel terminal of the error amplifier 15. The advantage of this source-coupling regulator is good stability. The N-type crystal 1G provides attenuation to the feedback loop. The error amplifier 15 is mainly (four) $f = (gain) and can easily achieve sufficient gain margin. (ωηΜ:) margin fragal Margin). Another advantage is that it has a high power supply rejection, psRR), N-type transfer transistor H DC input voltage &, therefore can have high impedance Ϊ́ίί DC wheeling voltage ~ to DC output voltage V. Noise. Iron and source The disadvantage of the coupling surface H is that the surface of the surface of the transistor has a high voltage, which is higher than the direct current output _ V of the conducting N-type transmitting transistor 10. The difference between the direct current crystal 10 and the off state is limited to the extreme D. The voltage t 2 map with the source terminal S is the basic structure of the low-voltage dropper, the low-voltage H it-type transfer transistor 20, the feedback control circuit 21 and the branching, and the knife-pressing 22 contains two resistors. 22 222, feedback control circuit end, mu wheel output 37. The n-type transfer transistor 31 includes a "> and a pole 闸 gate terminal 〇, and the 汲 terminal D is coupled to the input terminal 36, the source 237. The P-type transfer transistor 32 is the same as the N-type transfer transistor. The P-transistor 32 also includes a decrement D and a secret end. The G' source terminal S is at the input terminal 36, and the pole D is switched to the output. End 37. As shown in Fig. 3, the control circuit 3 includes two error ϋ 四 (4) 33, 34 ° reference signal ^ is transmitted to the control electrode 33 through the partial pressure 11 35 _ at the wheel end 37. Dividing the dust == vr The first feedback signal is higher than the first _ number vFB1. False Green All 糸 34 34 is connected to the wheel end f Ο R 3S1 + R 352 + R 353 R353 R 351 + R 352 + R 353 R 352 + R 353 Jian V01 and the first round of output voltage It can be shown by equation (1)(7): V〇l = Vrep XV〇2 Y » . . R ·»<! -UP ·><*» _L D ^*·« (1; (2) where 'foot 35 】 is the resistance value of the resistor 351; R352 is the resistance value of the resistor 352; the ruler 353 is the resistance value of the resistor 353; therefore, the first output power V 〇 1 will be slightly higher than the second input $ county %. The type transfer transistor 31 supplies the first-wheel power generation to the output terminal 37. When the N-type transfer transistor 31 is turned off, the second and P-state transfer transistors 32 are connected in parallel. Output terminal 37 ' Therefore, when the input voltage I is higher than the threshold voltage Vra, the first-input (four) voltage will be generated. When the electric dust Vm is lower than the critical electric s VTM, the second-stage power-off i-end 37 will be generated, and the threshold voltage Vth can be Equation (3) below illustrates electricity: lV〇2 to output
Vth = Vo+ Vgs (3) 其中，Vgs係為N型傳遞電晶體31之間 =導，型傳遞電晶體3丨，。係為二ΐ:=出 導通之增益很大，當ν型傳遞電晶體31 ¥通¥，Ρ型傳遞電晶體32會戴止。第一 二輪出電壓V〇2之賴差如下列方程式(4)，且包可加5略。 ΔΥ = Voi - V02 (4) 兩個失、為紐實_之電路示意圖， 傳送至誤差放大n 33、H二二考訊▲ Vr2为別 有電阻41、42，誤差放大哭^貝也列中，分壓态35包含 輪出端37。誤差放大哭ϋ3，透過電阻41、42耦接於 第二參考訊號I控制。Ν型僂H別根據第—參考訊號VRi與 32來分別產生第—輪出體31與P型傳遞電晶體 計第-輸出龍VG3時“ 出電壓V〇4。其中設 列方程式⑶、（6): 内於弟二輸出輕V以，且滿足下 v〇3 =vR1 R42 R41+R42 ------ R42 (5 其中〜係為電阻41之電阻值； 係為電阻41之電阻值。 °又十第參考訊镜Vri會略高於第二參考訊號Vi (6 1330308 型傳遞電晶體31導通時，產生第一輸出電壓％至輸 出端37,而當輸入電壓ViN過低而導 y時，p型傳遞電晶體32齡被導通而產生第 V〇4至輸出端37。 响參閱「第5圖」’係為本發明低壓降穩壓器更包含有自 測電=5G之較佳實施例的電路示賴。當輸人電壓VlN為高 準位時，偵測電路5〇用來截止p型傳遞電晶體Μ不需透過 ，授迴路，如此提高了輸入電壓Vm為高準位時的暫能塑應 (tmnSlentresponse)。價測電路5〇包含有比較器51與‘;^ 阻 52、53。比較态 51 的正輸入端（positive inputterminal 以接，，人臨界㈣vTIN，而諸人端（negative — 貝於輸入端％用以透過電阻52、53來偵測輸 ^电壓。當輸入電壓VlN大於輸入臨界電壓％取時，比較 态51之輸出端產生的前饋訊號（feedf〇rwards 於放大器34使P型傳遞電晶體32截止。 池耦接 本發明所揭露之低壓降穩壓器，在輸入至輸出電壓 (H^to-output讀_過高時，如同習知源極軸穩壓器 般操作，而具有高電源拒斥比與迴路穩定性，且當輸入至 電壓過低時’其又可達到低壓降。 _ 雖然本發明以前述之較佳實施例揭露如上，麸苴並 以限定本發明，任何熟習此技藝者，林脫離本發^ 範圍内’#可作些許之更输_，因此本伽德護範圍冬 視後附之申請專利範圍所界定者為準。 田 【圖式簡單說明】 第1圖係為習知源極隨叙穩壓器之電路示意圖。 第2圖係為習知低壓降穩壓器之電路示意圖。 第3圖係為本發明低壓降穩壓器之較佳實施例之電路示 11 1330308 意圖。 第4圖係為本發明低壓降穩壓器之另一較佳實施例之電 路示意圖。 第5圖係為本發明低壓降穩壓器具有輸入電壓偵測電路 之較佳實施例之電路示意圖。 【主要元件符號說明】Vth = Vo+ Vgs (3) where Vgs is between N-type transfer transistors 31 = conduction, type transfer transistor 3 丨. The system is two turns: = output The gain of the conduction is very large. When the ν-type transfer transistor 31 is used, the 传递-type transfer transistor 32 will be worn. The difference between the first two-round voltage V〇2 is as shown in the following equation (4), and the package can be added slightly. ΔΥ = Voi - V02 (4) Two missing, for the circuit diagram of the new _, transmitted to the error amplification n 33, H two two test ▲ Vr2 for the other resistance 41, 42, the error amplification crying ^ also listed The partial pressure state 35 includes a wheeled end 37. The error amplification is 3, and the resistors 41 and 42 are coupled to the second reference signal I for control. ΝType 偻H according to the first-reference signal VRi and 32 to generate the first-round body 31 and the P-type transfer transistor meter first-output dragon VG3 respectively, the output voltage V 〇 4, which sets the equations (3), (6 ): The inner second output is light V, and satisfies the lower v〇3 = vR1 R42 R41 + R42 ------ R42 (5 where ~ is the resistance value of the resistor 41; is the resistance value of the resistor 41. °The tenth reference mirror Vri will be slightly higher than the second reference signal Vi (6 1330308 type transfer transistor 31 is turned on, the first output voltage % is generated to the output terminal 37, and when the input voltage ViN is too low to lead y The p-type transfer transistor is turned on to generate the Vth4 to the output terminal 37. Referring to "Fig. 5", it is a preferred implementation of the low-dropout regulator of the present invention including self-test power = 5G. The circuit of the example is shown. When the input voltage VlN is at a high level, the detecting circuit 5 is used to cut off the p-type transmitting transistor, and does not need to pass through, and the circuit is looped, thus increasing the input voltage Vm to a high level. Temporary plasticity (tmnSlentresponse). The price measurement circuit 5〇 includes a comparator 51 and ';^ resistance 52, 53. The positive input of the comparison state 51 (positive inputte Rminal is connected, the human critical (four) vTIN, and the human end (negative - the input terminal % is used to detect the input voltage through the resistors 52, 53. When the input voltage VlN is greater than the input threshold voltage %, the comparison state 51 The feedforward signal generated at the output (feedf〇rwards is turned off by the amplifier 34 to the P-type transfer transistor 32. The cell is coupled to the low-dropout regulator disclosed in the present invention, at the input to output voltage (H^to-output read When _ is too high, it operates like a conventional source-axis regulator, and has a high power supply rejection ratio and loop stability, and when the input voltage is too low, it can reach a low voltage drop. _ Although the present invention is The preferred embodiment discloses that, as described above, the bran is limited to the present invention, and any person skilled in the art can get a little more from the scope of the present invention. Therefore, the application of the winter vision of the present Gardner range is attached. The definition of the scope of patents shall prevail. Field [Simple description of the diagram] Figure 1 is a schematic diagram of the circuit of a conventional source-supplied regulator. Figure 2 is a schematic diagram of a conventional low-dropout regulator. Is the low voltage drop regulator of the present invention The circuit of the preferred embodiment shows 11 1330308. FIG. 4 is a circuit diagram of another preferred embodiment of the low-dropout regulator of the present invention. FIG. 5 is a low-voltage drop regulator of the present invention having an input voltage detect A circuit diagram of a preferred embodiment of the circuit. [Main component symbol description]
10 N型傳遞電晶體 11 回授控制電路 12 分壓器 121 、 122 電阻 15 誤差放大器 20 P型傳遞電晶體 21 回授控制電路 211 誤差放大器 22 分壓器 221 、 222 電阻 23 寄生電容 30 控制電路 31 N型傳遞電晶體 32 P型傳遞電晶體 33 ' 34 誤差放大器 35 分壓器 351 ' 352 > 353 電阻 36 輸入端 37 輸出端 41、42 電阻 50 偵測電路 51 比較器 52'53 電阻 12 1330308 FB 分壓點 Enb 前授控制訊號 G 閘極端 D 沒極端 S 源極端 ViN 直流輸入電壓 Vref 蒼考訊號 VR1 第一參考訊號 VR2 第二參考訊號 V〇 直流輸出電壓 Vfbi 第一回授訊號 VfB2 第二回授訊號 VgSi ' Vgs2 閘極至源極電壓 VdsI、VdS2 汲極至源極電壓10 N-type transfer transistor 11 feedback control circuit 12 voltage divider 121, 122 resistance 15 error amplifier 20 P-type transfer transistor 21 feedback control circuit 211 error amplifier 22 voltage divider 221, 222 resistor 23 parasitic capacitance 30 control circuit 31 N-type transfer transistor 32 P-type transfer transistor 33 ' 34 Error amplifier 35 voltage divider 351 ' 352 > 353 resistor 36 input 37 output 41, 42 resistor 50 detection circuit 51 comparator 52'53 resistor 12 1330308 FB voltage dividing point Enb pre-control signal G gate extreme D no extreme S source extreme ViN DC input voltage Vref Cang test signal VR1 first reference signal VR2 second reference signal V〇 DC output voltage Vfbi first feedback signal VfB2 Two feedback signals VgSi ' Vgs2 gate to source voltage VdsI, VdS2 drain to source voltage
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