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TWI314369B - Mehrschichtiger verbundkorper mit elektronischer funktion - Google Patents

Mehrschichtiger verbundkorper mit elektronischer funktion Download PDF

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TWI314369B
TWI314369B TW095111903A TW95111903A TWI314369B TW I314369 B TWI314369 B TW I314369B TW 095111903 A TW095111903 A TW 095111903A TW 95111903 A TW95111903 A TW 95111903A TW I314369 B TWI314369 B TW I314369B
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layer
multilayer composite
layers
components
capacitor
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TW095111903A
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TW200707818A (en
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Andreas Ullmann
Alexander Knobloch
Merlin Welker
Walter Fix
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Polyic Gmbh & Co Kg
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/202Integrated devices comprising a common active layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10166Transistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10174Diode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Description

1314369 九、發明說明: 【發明所屬之技術領域】
本發明關於一種具電子功能的吝B "«b 07夕層複合體,特別是電 子構造組,包含至二個不同的有機電子構件。 【先前技術】 有一些習知之構件,例如國際專利w〇 〇2/15264所發 層、半導 一基質上 上組合,
表者,一般一電子構件藉將不同的功能層(導電 電層、絕緣層、再一個導電層)先後相隨施覆在 而製成。數個電子構件可在一電路板(piatine) 例如德專利DE 101 51440 Cl所述者。 目前使用的構造組的缺點為:對一個複雜的構造組, 要個別地先後製造許多個別的構件,將它們連接成導電方 式並設置。為此需要各種高成本的工作與程序步驟。 【發明内容】 種構造組,這種建構適合大量 中可將多數要電子構件――主 、%效電晶體、電貫穿接點 本發明的目的在建構一 製造且可廉價實施,且在其 動及被動元件,如電晶體 (Durchkontact,英:th_gh-contact)、電阻、導電路電 阻、線圈、電容器 '整流器或類似物任意地(特別是與一 二極體)組合。 ' 二/ 〇 3' _個不同 電子構件,至少有二個層與該二構件系共通者,該二層各 在一道工作過程施覆,它們可為均勻者或構造化者。 舉例而言’其中一層(它與本發明的複合體的構件係 5 -1314369 且/或另一層, 施覆時不作構造 共通者)為均勻的或構造化的半導電層, 舉例而言,它在某些情況由於其高粘性在 化。 依本發明-有利特點,該複合體的所有構件,亦及各 情不同構件及任意數目的構件係同時且在相同基質上製 造’且舉例*言’係在—道連續進行的程序中製造。如此, 一些構件包含有一些層,這些層在該構件中沒有功能性。
同樣地有利的方式,係使該至少二個層(但基本上也 有五個或更多的層)中的—個層係與複合體的構件係共通 者即載體層,以及與所有構件共同的基質。 依-較佳實施例’ 一多層式複合體的所有構件由相關 的層建構成,I中有-些層作構造化,而其他的層則整體 句勻對於複合體中的所有構件這些層,係同時製造,且 如有必要可配合各構件作構造化。 利用此多層式複合體特別可做成一些構造組,其中至 V含有一個二極體及另一個不同的構件。 舉例而S,所做的多層式複合體為一簡單的整流器, 中至少有—個不同構件——個二極體及一電容一—存 在該複合體中。 如果在該構造組中至少含三個不同構件——至少二個 二極體、—個電容至貫穿接點(它們構成該複合體),則 連複雜的整流器也可做在此多層複合體中。 夕要建構一個具有調變器的簡單整流器,舉例而言,該 層複&體至少有二個不同構件---個二極體、〆電容 6 1314369 器、及一電晶體。 最後’在該多層式複合體,至少有四個不同構件__ —個二極體、一個電容器、一個電晶體及一個或數個貫穿 接點,以建構一答詢機(Transponder)。 基本上,此多層式複合體可包含所有可能構件如電晶 體、場效電晶體、電接點、電阻、導電路電阻、線圈、電 容器、整流器、或類似物,往往特別還可與一個或數個二 極體組合。 該多層式複合體的二導電層一—就其未來的工作而言 〜―宜可具有二同的材料。在此,特別有利的方式係使與 半導電層接觸的導電層由銀製成,則而對立電極的材料則 為具不同的未來工作的材料,特別是一種非貴金屬材料, 例如銅、鎳、鉻、結或類似物。 在製造該構造組時,特佳的做法,係使所有構件利用 四個構造化的層製造,並在—道製造程序將它們作良
慮的重疊。 在此’典型的構造,由下往上看,係為這種順序:基 質、導電層、半導電層、絕緣層、及上方的導電層^ 考慮將這種順序顛倒,這也合乎本發明的構想。 在此一種特佳的做法,係將複 口』瑕的二導電層Α尤 它們特別是具有不同的未來功作或不同的費 二種不nV::,VeaU)者。這點舉例而t㈣ 佳或合金構成的金屬層而達成。在此,特 /係使用銀當作鄰界到半導電層的電極,特別是當 •1314369 作導電層與該半導電層及另—金屬/另一合金接觸,它具 有與銀不同的未來工作’當作對立電極。 ^ 一在以下本發明利用四個示意圖詳細說明本發明的較佳 貫施例。 【實施方式】 圖1下方可看到基質(1)。且有一芈±日具而认私士 ^ 十坦長面的所有絕緣 材料都可做基質,可撓性與剛性材料都同樣可使用。例如, φ可在此位置使用可撓性膜,如PE膜或其他聚合物塑膠膜、 玻璃、石英、陶瓷、或其他材料。
跟在基貝(1)之後的層(2)為第一導電層或下方電極 (2),它作構造化而施覆,依-有利設計,此處製造源極及 排極的電⑮,它們被隨後的半導電層蓋住,要做導電層⑺ 只能使用導電材料,其中,該材料是否為有機材料、無機 材料或複合材料,並不重要。依__較佳實施例,用於導電 層(它與半導電層接觸)的材料,係-種金屬或合金,其 電子游離功(Austrittsarbeit,英:_心§1卿⑴在U 42eV範圍,且宜在49心#選擇材料時,宜注意到該 電子游離功可配合半導體的費米位準平衡,使得與該半導 體的費米位準的姜官矣Qq +扪是且為0.3eV或更少。如此可確保該電荷 載體可無問題地從半導體材料過渡到導電材料中。 在第一及下方的電極層之後,跟著為導電層(3卜它由 粘度在某些情況係不作構造化而施覆。用於作導電層 :材料宜為有機材料’如P3AT、P3dhtt、可調節區域二 ♦烷基噻吩、聚芴(P〇IyfI〇ren)的衍生物、PPV、一般及/ 8 .1314369 或其他聚合物’例如具有共輛主鏈,或在主鍵中有可自由 活動的電子對者。此半導電層(3),舉例而言,也可利用印 刷作構造化施覆。 在大部分電子構件的場合,在此層(3)其後跟隨著—個 、丄緣的層⑷’匕八在基質上的—些位置須作構造化施覆(在 巧些位置要製造二極體或貫穿接點,一介電層或絕緣層要 保持留2,因為它們會有干擾作用。舉例而t,絕緣層(4) 鲁*可溶可印刷的材料構成。所用之絕緣層的材料宜為有機 可溶材料’例如聚苯乙婦衍生物、PMMA或—般絕緣的聚 合物。 在該構造化的絕緣層(4)之後,跟著一上方導電層(5), 做為電子構件主要部件的終點,它也宜作構造化。在此, 使用導電的有機及無機材料及//或複合材料。特宜使用一 些金屬,它們的電子游離功與其下方導電層(對立電極) 的材料不同。在此,依一實施例所用材料的電子游離功在 鲁3〜5eV範圍,特別是3〇eV〜46eV或更高,舉例而言, 此處可成功地銅、鎳、鉻、鈷、錳等。 在圖1的基質(1)上方,由左往右做其他的構件:一貫 穿接點或通道(a)、接著在下方導電層(2)中有一個電晶體 (b),具有源極/排極的電極,它經由上方導電層(5)與該貫 穿接點連接在電晶體(6)旁設有一個二極體(c),其中該半導 電層(3)被拉高到對立電極(5)的位準為止,俾不會造成電流 /電壓損失。在一極體(c)右邊可見到一電容器(d),而其右 邊’亦即在最右邊外側’有一電阻或一線圈(e)。 9 1314369 圖2中再顯示圖1中戶斤 此處,半導體(3)在二極體(c)的 ’、所有層’然而 穿接點⑷、電二: 不,其他構件〔貫 的位準1 容器⑷及電阻⑷〕的上方電極⑷ ==而係在此處將二極體⑷的上方電極⑺更低地 双到絕緣層(4)的位準。 =3中顯示所有主要構件,它們_齊在—基質上,它 有層W所需者,如果在各構件中所 相可同時製造。層順序和…示者 質,層⑵槿4使用相同或其他相關材料。因此層⑴為基 為對=1,層(3)為半導層、層(4)為絕緣層、層⑺ 為對立電極、它也作構造化。 ) =此’構件順序如下:最左邊外側為貫穿接點⑴,其 ’二極體⑷之後為電容器⑷。利用此處 丰導τ將天線來的父流電壓整流。 +導體在—極體⑷的區域施覆得較厚—些一 點可在同時製造時這㈣件時制— ’這 圖4顯示一多層式複合 、W達成。 及-電阻或-線圈整合。利用這層冓造貫以 ⑷、電晶體⑻、電阻或線圈這二,種貫穿㈣ p叫聚合物場效電晶體)、=的;:置,至少可構建 器(叫Flop)、分頻器及振遷器、正反 -桎;㈣構造又相當於其他圖中所示者。雖然此處不做 —極體,但上方的電極(5)盥 处个1又 同。 )/、下方的電極(2)的材料完全不 1314369 戈密=做上層或封閉層者’往往還用該構件的一封囊廣 ^封該裝置及/材料易受損之故),它可包含 谷種大不相同的材料及 /次層疊物。該封囊層/密封層可 由剛性或可撓性的材料構成。 利用這種構造,可將雷早捉里&二 _ 將電子表置的主要構件藉著將層(它 們可為連貫整面施覆者及/ 设百汉/次構造化)相鄰及/或先後施 在一基質上而製造,這必構件你 .+ 一稱仵例子有電晶體、場效電晶體、 貝穿接點、電阻、導電路雷 守电峪电阻、電感、二極體、電容器及 整流器。 本發明首度開啟了構建一整個構造組(如腿〇標籤) 的可能性,其中該整個標鐵可隨所有構件在一道製造程序 中製成’如此’首度提供了一種廉價大量生產的方法。 【圖式簡單說明】 圖1係經-完全整合的可印刷的電子電路(例如對於 -完全的答詢機電路所需者)的示意橫截面, • ® 2再顯示圖1所示的所有構件,但在此處該半導體 層在一極體的位置並非一直到另外構件的上方電極的位 準,二極體的上方電極在此處放在較低處, 圖3係供應電壓的構造,此處這些構件一—二極體、 電容器與貫穿接點同時在一基質上產生, 圖4顯示一複合體,它將一貫穿接點、一電晶體、一 電阻及/或一線圈整合。 【主要元件符號說明】 (1) 基質 π 1314369 (2) 層(第一導電層,或下方電極 (3) 導電層 (4) 絕緣屬或介電層 (5) 上方導電層(對立電極) (a) 貫穿接點或通道 (b) 電晶體 (c) 二極體 (d) 電容器 (e) 電阻或線圈 12

Claims (1)

1314369 申請專利範面 肜。日修(更)正替換
1 . 一種多層複合體,包含至少二個不同的有機電子 構件,對於它們而言至少有二個層係共通者,該二層係在 —道工作過程施覆,且可為均勻或為構造化者,且 該至少二個共通的層包含二個電極層’它們的材料就 其游離功而言係不同者。 2 .如申請專利範圍第丨項之多層複合體,其中: 該較貴的電極層主要由銀構成。 3·如申請專利範圍第i或第2項之多層複合體,其 中 中 中 較不貴的電極層主要由銅構成 4.如申請專利範圍第1或第 該二個電極層構成一個電極及 5 ·如申請專利範圍第1或第 項之多層複合體,其 —個對立電極。 2項之多層複合體,其 該至少二個不同構件之—為電容器 6 .如申請專利範圍第1或第2項 之多層複合體,其 中 其中至少做二個二極體及 7 .如申請專利範圍第工 —個電容器。 或第2項之多層複合體,其 其中至少做三個不 及一電晶體。 同構件 一個二極體、一電容器 1 4 1314369 称Μ >日修(更)正替換頁 -- 8 .如申請專利範圍第1或第2項之多層複合體,其 中: 其中至少做四個不同構件--一個二極體、一個電容 - 器、一個電晶體及一貫穿接點。 9 ·如申請專利範圍第1或第2項之多層複合體,其 中. 其中至少有一電子構件:電晶體、場效電晶體、貫穿 接點、電阻、導電路電阻、線圈、電容器及/或整流器與 一二極體一齊製造。 1 0 ·如申請專利範圍第1或第2項之多層複合體, 其中: 該二個元件共同的層至少有一層可在一道連續製造程 序中製造。 1 1 .如申請專利範圍第1或第2項之多層複合體, 其中: 該至少二個構件共同的層之一可用印刷技術製造。 十一、圖式: 如次頁。 2
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US20080203383A1 (en) 2008-08-28
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WO2006108514A3 (de) 2007-04-05
TW200707818A (en) 2007-02-16
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WO2006108514A2 (de) 2006-10-19
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DE102005017655A1 (de) 2006-11-02

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