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TWI306255B - Control device for accelerating memory to execute iterant command - Google Patents

Control device for accelerating memory to execute iterant command Download PDF

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Publication number
TWI306255B
TWI306255B TW095135520A TW95135520A TWI306255B TW I306255 B TWI306255 B TW I306255B TW 095135520 A TW095135520 A TW 095135520A TW 95135520 A TW95135520 A TW 95135520A TW I306255 B TWI306255 B TW I306255B
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Taiwan
Prior art keywords
state
memory
block
search
verification
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TW095135520A
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Chinese (zh)
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TW200816199A (en
Inventor
Ming Hsun Sung
Yu Lin Hsieh
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Ite Tech Inc
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Priority to TW095135520A priority Critical patent/TWI306255B/en
Priority to US11/610,509 priority patent/US7765367B2/en
Priority to JP2007027596A priority patent/JP4594944B2/en
Publication of TW200816199A publication Critical patent/TW200816199A/en
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Publication of TWI306255B publication Critical patent/TWI306255B/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Description

1306255 ITPT-05-013 19356twf.doc/t 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種半導體記憶體,且特別是有關於 一種可加速記憶體執行重複性指令的控制裝置。 【先前技術】 對一般半導體記憶體而言,用來執行的指令(c〇mand) 及動作並不繁雜,大部份控制的流程都在於對不同記憶體 _ 位址下軸似的指令,也因此常會需要在某一時間内,對 不同的纪憶體位址做重覆性的動作,例如抹除(erase)所有 記憶體内各位址上之值,也就是依序對所有的記憶體區塊 下達抹除齡。-般而言可撰綠體程式(fmnware c〇de) 透過微控器(Micro-contr〇ller Unit ’ MCU)的輸出淳將指令 傳送到記憶體以達到要求,在動作的期間内MCU無法分 工做其它的事,影響了整體效能。 【發明内容】 種記憶體的控制裝置 減低微控制器的負荷 用 並 本發明的目的就是在提供一 以加速記憶體執行重覆性指令, 增加記憶體執行指令的效能。 本發明提出一種記憶體的控制裝 執行重複性指令。紗辦Η」 ㈣加速s己憶體 資訊表以刀t壯 包括微控器、控制器、區塊 :狀恶裝置(state machine)。其 = 出-指令以操作記憶體,而記 p用叫 输記憶體及微控器之間,當 塊。控制器 執行時,由微控器透過控制器執 二被重複 订忑扣7,而當判斷出該 1306255 ITPT-05-013 19356twf.doc/t 指令需被重複執行時,可由狀態裝置重複執行該指令。區 塊資讯表用以記錄每一個區塊的狀態。狀態裝置用以根據 區塊資訊表取得每一個區塊的狀態,解析區塊的狀態以便 重複執行該指令,並據以更新區塊資訊表内的狀態。 本發明藉由在需要對記憶體執行重複性指令時,將原 本負貝下達指令的微控器改成由狀態裝置下達指令,可以 在不需要微控器及軟體的介入下由狀態裝重指 令’增加記憶體的制效能及減低其功率損耗。 為讓本發明之上述和其他㈣、特徵和優點能更明顯 隆,下文特舉較佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 11為依照本發明-實施例所纟會示之記憶體的控制裝 之塊圖,其中記憶體以非揮發性記憶體(η⑽·仰1沾k 的快閃記憶體為例,而記憶體包含多個區塊 勃!麥照®1,控制裝置100目以加速快閃記憶體 執灯重覆性騎,其包括微㈣ ^ ⑽、狀態裝置13〇、區塊資訊表14〇及細1 是讀^!1G^以f出—指令以操作記憶體,該指令可以 塊之指二N =人t令、抹除指令’或者尋找則固空的區 MCU日lL)之門、ϋ°㈣11 12G祕於快閃記憶體及 MCU11"、二,J判斷出該指令不需被重複執行時,由 ▽而被重讀行時,由狀態裝置別重複執行該指令。 1306255 ITPT-05-013 19356twf.doc/t • $夕卜在狀態裝置130重複執行該指令時,需搭配區 塊資訊表140及仔列器150,其中區塊資訊表ΗΟ用以記 錄快閃記憶體中每-個區塊的狀態,而㈣器15 列狀態裝置130重複執行該指令時所需的快閃記憶體的位 址。因此,狀態裝置130根據區塊資訊表14〇取得快閃記 憶體中每-個區塊的狀態,解析這些狀態並得以適當的動 作重複執行該指令,然後進一步更新區塊資訊表14〇内相 • 對應的狀作為狀悲裝置130下一次啟動的依據。 圖2為依,日、?、本發明一貫施例所繪示之區塊資訊表之資 料結構圖。請參照圖2,圖1所示的區塊資訊表14〇包括 多個子區塊資訊’分別對應到快閃記憶體每一個區塊。在 一實施例中,每一個子區塊資訊大小為16位元,其中第一 個攔位為記憶體區塊的狀態,有空的(empty)、已用的(used) 及可抹除的(erasable)三種狀態,以2位元表示之;第二個 攔位保留不使用’可以在擴充其它功能所需資訊時使用; 而第三個攔位為LP映射,即邏輯位址(l〇gical address)到實 . 體位址(physical address)的映射闕係,以12位元表示之。 最初,區塊資訊表140中每一個子區塊資訊内的資料 是依據快閃記憶體中相對應的區塊内之冗餘區域 (redundant area)的内容而建立,並將之儲放在隨機存取記 憶體(Random Access Memory,RAM)所劃分出來的一塊區 域。當狀態裝置130啟動時,狀態裝置130根據區塊資訊 表140提供區塊的狀態之分析結果做出相對應的動作以重 複執行該指令,並由軟體更新區塊資訊表140的内容,硬1306255 ITPT-05-013 19356twf.doc/t IX. Description of the Invention: [Technical Field] The present invention relates to a semiconductor memory, and more particularly to a control device capable of accelerating memory execution of repetitive instructions . [Prior Art] For general semiconductor memory, the instructions (c〇mand) and actions used for execution are not complicated. Most of the control processes are based on instructions that are similar to different memory_addresses. Therefore, it is often necessary to perform repeated actions on different memory addresses at a certain time, such as erasing the values of all the addresses in the memory, that is, sequentially all the memory blocks. Release the age. - Generally speaking, the green program (fmnware c〇de) transmits the command to the memory through the output of the Micro-contr〇ller Unit 'MCU to meet the requirements. The MCU cannot be divided during the operation period. Doing other things affects overall performance. SUMMARY OF THE INVENTION A control device for a memory reduces the load on a microcontroller. The object of the present invention is to provide an accelerated memory to execute a repetitive instruction and increase the performance of a memory execution instruction. The invention proposes a memory control device to execute a repetitive instruction. (4) Accelerate the sufficiency of the body. The information table is sturdy with a knife. It includes a micro controller, a controller, and a block: a state machine. Its = output - command to operate the memory, while p is used between the input memory and the microcontroller, as a block. When the controller is executed, the micro controller is repeatedly ordered by the controller, and when it is determined that the 1306255 ITPT-05-013 19356twf.doc/t instruction needs to be repeatedly executed, the state device may repeatedly execute the instruction. The block information table is used to record the status of each block. The state device is configured to obtain the state of each block according to the block information table, parse the state of the block to repeatedly execute the instruction, and update the state in the block information table accordingly. The invention can change the micro controller of the original negative order instruction into the instruction by the state device when the repetitive instruction is required to be executed on the memory, and can be loaded by the state without the intervention of the micro controller and the software. 'Increase the performance of the memory and reduce its power loss. The above and other aspects, features and advantages of the present invention will become more apparent from the following description. [Embodiment] 11 is a block diagram of a memory control device according to the present invention, wherein the memory is exemplified by a non-volatile memory (n(10)· 11 kk flash memory). The memory includes a plurality of blocks, Maizhao®1, and the control device 100 aims to accelerate the flashing of the flash memory, including micro (4) ^ (10), state device 13〇, block information table 14〇 And fine 1 is to read ^! 1G ^ to f - command to operate the memory, the instruction can be the block of the two N = human t command, erase the command 'or find the solid area of the MCU day lL), ϋ°(4)11 12G is secretive to flash memory and MCU11", second, J judges that the instruction does not need to be repeatedly executed, and when the line is reread due to ▽, the state device does not repeat the instruction. 1306255 ITPT-05-013 19356twf.doc/t • When the state device 130 repeatedly executes the command, it needs to be combined with the block information table 140 and the piglet 150, wherein the block information table is used to record the flash memory. The state of each block in the body, and the (four) 15 column state device 130 repeats the address of the flash memory required to execute the instruction. Therefore, the state device 130 obtains the state of each block in the flash memory according to the block information table 14 , parses the states and repeats the execution of the command by appropriate actions, and then further updates the block information table 14 • The corresponding shape is used as the basis for the next start of the device 130. Fig. 2 is a structural diagram of the information of the block information table according to the consistent embodiment of the present invention. Referring to FIG. 2, the block information table 14 shown in FIG. 1 includes a plurality of sub-block information's corresponding to each block of the flash memory. In one embodiment, each sub-block information size is 16 bits, wherein the first block is the state of the memory block, empty, used, and erasable. (erasable) three states, expressed in 2 bits; the second block reserved without 'can be used when expanding the information required for other functions; and the third block is LP mapping, ie logical address (l〇 The mapping of the gical address to the physical address is expressed in 12 bits. Initially, the data in each sub-block information in the block information table 140 is established according to the content of the redundant area in the corresponding block in the flash memory, and is stored in a random An area partitioned by a random access memory (RAM). When the state device 130 is activated, the state device 130 performs a corresponding action according to the analysis result of the state of the block provided by the block information table 140 to repeatedly execute the instruction, and the content of the block information table 140 is updated by the software.

1306255 ITPT-05-013 19356twf.doc/t 體將根據block status(table内儲放的狀態值)。如此一來, 在需要重複執行該指令時,利用狀態裝置13〇取代Mcu 110重複執行該指令,大幅降低MCU 11〇的負荷,使得整 個快閃記憶體的使用有更好的效能。而在不黨要 二二 ,指令時’使狀態裝置13 0處於閒置(idle)狀態以減少功^ 損耗。 圖為依照本發明-實施例所緣示之狀態裝置的狀能 圖,其適驗執行尋找N個空的區塊的指令,N為正^ 睛參照圖3,圖1所示的狀態裝置13〇包括閒置狀能a、 尋找狀態B、判斷狀態C、抹除狀態D、驗證狀能= ί狀態:。其中,閒置狀態A為狀態裝置13。的初:狀t 哥找狀i B用錄據區塊資訊表⑽記錄的㈣^。 塊的狀態,自快閃記憶體中尋找則固1‘ : 用用以驗證區塊的抹除是否成: 、、口束狀惑F用叫止重複執行該指令。 ,態裝置m收到開始信號時 該指令,因此狀態裝置ί30 义:員重稷執仃 一旦尋找狀態Β自快閃記情 〔進入哥找狀態Β。 則進入結束狀態F以停止^^=^_區塊時’ 尋找❹個空的區境時,==反之,當尚未 判斷狀態C根據子區播次 心 塊是空的或是可抹除的。,狀態欄位判斷目前區 址記錄到符列器150,戈:^疋空的’則將該區塊的位 亚回到哥找狀態B繼續尋找下一個 1306255 ITPT-05-013 19356twf.doc/t .f的區塊。紐塊是可抹_’咖抹除狀態D進行抹除, 错此不需透過軟體而直接由硬體發出抹除指令。另外,判 斷狀態C直到件列器150不夠空間件列位址,或重覆次數 超過指定的數目M (即找了 Μ個區塊仍然找不到N個空的 區塊)時,會再_結束狀態F以停止錢執行該指令,其 中Μ為大於n的正整數。 . #抹除狀態D抹除區塊_容後,_驗證狀態£驗 _ 難塊的抹除是否成功’若成剌回到尋餘態Β再尋找 下一個空的區塊’若失敗則到結束狀態F以停止重複執行 該指令。最後,結束狀態F停止重複執行該指令,並將狀 態回報給系統,故在此例狀態裝置13〇可以找出在快閃記 憶體内還可以使用的空的區塊,如果達到需要的數目後會 自動停下,以避免浪費系統效能及減少功率損耗,不需軟 體介入可減輕MCU 110的負荷。 *圖4繪不為依照本發明另一實施例的一種狀態裝置的 狀,圖’可以適用於重複性執行動作,如抹除、寫入、讀 出等等。請參照® 4 ’狀態裝置由閒置狀態Α等待勒體^ 達開始命令,開始後進人尋餘態B。在滿足找尋條件後, 則進入結束狀態F並且回報給系統。相對地,若是尚未滿 足找尋條件,則進入判斷狀態c。在本實施例中,找尋條 件意指結束此狀態裝置的條件。例如,若是狀態裝置用來 抹除10個記憶體區塊,則尋找條件則為1〇個記憶體區塊。 、在尋找狀態B時,若是記憶體狀態符合判斷條件,則 進入執打動作狀態D。反之,若是記憶體狀態不符合判斷 1306255 ITpT-〇5-〇i3 19356twf.d〇c/t = Β。α抹除為例’錢記 二除的’則進行抹除動作。而若是標記不為可: 除的,則再跳回找尋狀態Β。 +為可抹 作狀態D結束後,可以進人驗證狀能Ε & 動作成功執行’則跳回尋找狀態B,以繼續;下。而 憶體位址騎均_作。姆地,若是動作^了了己 回結束狀態F,並且Θ郝& '則跳 λ , +卫卫回報糸統。以下本發明揭露讀出、皆 入以及抹除k的狀態裝置實例。 ' 寫 讀出本發,一較佳實施例的-種在執行 —、置的狀態圖。請合併參照圖1和圖5, 如右人執仃動作為對記憶 / 憶體位址之狀態標= 1將對應到欲讀出之記 億體區間全部言賣^ 狀f Β。當尚未將指定的記 C瞎,檢杳兮々味 θ進入判斷狀態C。而在判斷狀態 Μ體(ΙΓ^Ϊ 址及狀態標記。相對地,當指定之 出時,則直接跳至結束狀態F。 態標記為不需讀欲;:出之記憶體區間内’或是狀 查下一記憶體位址=能=找狀;f,以重新檢 址在指定區間内,並=之較5亥5己憶體位 讀出動作狀態D。此出的狀態時,麻至執行 體發出讀出的指令,】且,:器120會被控制對快閃記憶 跳至驗證狀HE。並且在控制器⑽執行動作結束後, 1306255 ITPT-05-013 19356twf.doc/t 若是讀出記憶體的動作成功執行,則跳到尋找狀態 B ’以對下一記憶體位址繼續重複以上步驟。相對地,若 疋頃出記憶體的動作失敗了,則回到結束狀態F,並且將 狀態回報給系統。因此’在本實施例中,狀態裝置130可 =找出快閃記憶體内指定區間之記憶體的内容,並且在指 定區間搜尋完畢後系統會自動停下,以分擔微控制器 的負荷。 ^圖6繪示為依照本發明之一較佳實施例的一種在執行 寫入動作之狀態裝置的狀態圖。請合併參照圖1和圖6, ^欲執订動作騎記憶體巾在某記憶體區舰寫人的動作 時,首先透過韋刃體指定欲寫入之記憶體位址區間。當 13Gt被啟鱗,會由閒置狀態A進人尋找狀態B。春 肤^指定的實體記憶體區間全部寫人時,會進入到判^ 悲,以檢查該記憶體位址及狀態標記。 疋之,憶_„被寫人,齡接黯結綠態F。4 句斷狀態C時,如果記憶體位址不在耷 體區間内’或是狀態標記為不可寫入的狀之心隐 狀態B,以fA 日7狀態,則跳回尋找 二—_紐在衫區間内並且 ^^ f之’ 對快閃二此時’系統會透過控制器12。 作結束後Γϋί 且在控制器m值型動 个伐,跳至驗證狀態E。 阻主勒 B,人記憶體的動作成功執行,_至尋找狀能 下—兄憶體位址繼續重複以上的步驟。反之,^' 11 1306255 ITPT-05-013 19356twf.doc/t 寫入記憶體的動作失敗了,則回到結束狀態F,並且將狀 態回報給系統。因此,在本實施例中,狀態裝置13〇可已 依據狀態標記,而在指定之記憶體區間内重複進行寫入的 動作。1306255 ITPT-05-013 19356twf.doc/t will be based on the block status (status value stored in the table). In this way, when the instruction needs to be repeatedly executed, the state device 13 is used instead of the Mcu 110 to repeatedly execute the instruction, which greatly reduces the load of the MCU 11〇, so that the use of the entire flash memory has better performance. In the absence of the party, when the command is made, the state device 130 is placed in an idle state to reduce the power loss. BRIEF DESCRIPTION OF THE DRAWINGS The figure shows a state diagram of a state device according to the present invention, which is adapted to perform an instruction to find N empty blocks, N being a positive eye, and FIG. 3, the state device 13 shown in FIG. 〇 Include idle status a, find status B, determine status C, erase status D, verify status = ί status:. The idle state A is the state device 13. The first: the shape of the t brother looking for the i B recorded with the block information table (10) (four) ^. The state of the block, if it is searched from the flash memory, it is solid 1': It is used to verify whether the erase of the block is: or, the mouth is confused with F and the instruction is repeatedly executed. The state device m receives the start signal when the instruction, so the state device ί30 meaning: the person is heavy and stubborn. Once the state is sought, the flash is remembered. Then enter the end state F to stop the ^^=^_ block when 'finding an empty area, == or vice versa, when it has not been judged that the state C is empty or erasable according to the sub-region broadcast sub-block . The status field determines that the current location record is recorded to the characterizer 150, and the "go: empty" is then returned to the state of the block B to continue looking for the next 1306255 ITPT-05-013 19356twf.doc/ The block of t.f. The block can be erased _' coffee erasing state D for erasing, the wrong way does not need to send the erase command directly by the hardware through the software. In addition, it is judged that the state C is not enough for the spacer column address, or the number of repetitions exceeds the specified number M (that is, if only N empty blocks are found in the block), The end state F executes the instruction with a stop money, where Μ is a positive integer greater than n. #抹除 State D erase block _ after the _ verification state 验 _ difficult block erase is successful 'If you return to the search state, then find the next empty block' If it fails End state F to stop repeating the instruction. Finally, the end state F stops repeating the instruction and returns the status to the system, so in this example the state device 13 can find an empty block that can be used in the flash memory, if the required number is reached. It will automatically stop to avoid wasting system performance and reducing power loss. It can reduce the load of MCU 110 without software intervention. * Figure 4 depicts a state device in accordance with another embodiment of the present invention, which may be adapted for repetitive execution operations such as erasing, writing, reading, and the like. Please refer to the ® 4 ′ state device from the idle state Α waiting for the body to reach the start command, and then enter the search for the residual state B. After the search condition is met, the end state F is entered and returned to the system. In contrast, if the search condition is not satisfied, the judgment state c is entered. In the present embodiment, the search condition means the condition for ending the state device. For example, if the state device is used to erase 10 memory blocks, then the search condition is 1 memory block. When looking for the state B, if the memory state meets the judgment condition, the operation state D is entered. On the other hand, if the memory state does not meet the judgment 1306255 ITpT-〇5-〇i3 19356twf.d〇c/t = Β. The alpha erase is an example of the 'money record two division' and the erase operation is performed. If the mark is not available: If it is, then jump back to the search state. + After the readable state D is over, you can enter the verification state and the action will be executed successfully. Then jump back to find the state B to continue; And the memory address is _. Mdi, if the action ^ has returned to the end state F, and Θ Hao & 'jump λ, + Guardian returns 糸. The following is an example of a state device for reading, arranging, and erasing k. 'Writing and reading the present invention, a state diagram of a preferred embodiment. Please refer to FIG. 1 and FIG. 5 together. If the right person performs the action as the status of the memory/memory address, the flag = 1 will correspond to the message to be read. When the specified record C has not been reached, the test θ is entered into the judgment state C. In the judgment state body (ΙΓ^Ϊ address and status flag. Relatively, when specified, it jumps directly to the end state F. The state is marked as no need to read; in the memory interval] Look at the next memory address = can = find the shape; f, to re-address in the specified interval, and = more than 5 Hai 5 recalled body position read action state D. This state, Ma to the executive body The read command is issued, and the device 120 is controlled to jump to the flash memory by the flash memory, and after the controller (10) performs the action, 1306255 ITPT-05-013 19356twf.doc/t if it is a read memory If the action of the body is successfully executed, jump to the search state B' to continue repeating the above steps for the next memory address. In contrast, if the action of the memory is failed, return to the end state F, and return the state. To the system. Therefore, in the present embodiment, the state device 130 can = find the content of the memory in the specified interval in the flash memory, and the system will automatically stop after searching in the specified interval to share the microcontroller's Load. ^ Figure 6 is shown in accordance with one of the present invention A state diagram of a device in a state in which a write operation is performed in a preferred embodiment. Please refer to FIG. 1 and FIG. 6 together, in order to perform an action riding on a memory towel in a memory area, when the player writes a motion, first The blade specifies the address of the memory address to be written. When 13Gt is triggered, the idle state A will enter the state to find the state B. When the physical memory interval specified by the spring skin ^ is written, it will enter the judgment. In order to check the memory address and status mark. 疋之, recall _„ is written, the age is connected to the green state F. 4 when the sentence is C, if the memory address is not in the body area' or the status is marked as The state of the unwritable heart is hidden, and in the state of fA, the state of 7 is jumped back to find the second--news in the shirt zone and ^^f's 'flashing two' at this time the system will pass through the controller 12. After the end Γϋί and in the controller m value type, jump to the verification state E. Block the main B, the human memory action is successfully executed, _ to find the shape of the next - the brother recall the body address continues to repeat the above steps. Conversely, ^' 11 1306255 ITPT-05-013 19356twf.doc/t write memory Fails, back to the end state F., And the state returns to the system. Accordingly, in the present embodiment, the state machine may have 13〇 depending on the state flag, the write operation is repeated within the specified range of memory.

圖7繪示為依照本發明之一較佳實施例的一種在執行 抹除動作之狀態裝置的狀態圖。請合併參照圖丨和圖7 , 如欲執行重複性抹除動作時,可透過韌體將區塊資訊表 140中,對應到欲抹除之記憶體時體位址之狀態標記設定 ,可抹除的(Erasable)。在狀態裝置】3〇被啟動後,會進入 尋找狀態B。當指定的記憶體區塊尚未全部抹除時7狀態 裝置會進人判斷狀態C。相對地,當指定的記憶體區間已 全部抹除完畢,則直接跳至結束狀態F。Figure 7 is a diagram showing the state of the apparatus in the state in which the erase operation is performed, in accordance with a preferred embodiment of the present invention. Please refer to the figure 丨 and FIG. 7. If the repetitive erasing action is to be performed, the status flag of the block body information table 140 corresponding to the memory body address to be erased can be set by the firmware, and can be erased. (Erasable). After the status device is activated, it will enter the search state B. When the specified memory block has not been completely erased, the 7-state device will enter the state judgment state C. In contrast, when the specified memory interval has been completely erased, it jumps directly to the end state F.

若是該位址狀態標記為不可抹除的或記憶體位址不在 指定區間内時,則再跳回尋找狀態β,以重新檢查下一記 憶體位址及其㈣標記。狀,若該他在指賴間内, 並且狀標記為可抹除的,則進人執行抹除狀態D。此時, 控制器_120會對記憶體裝置發出抹除指令,並且在控制器 120執行動作結束後,跳至驗證狀態e。 石疋職聊成X力,則跳回狀態B,α對下一記憶體 以上的步驟。反之,如果抹除動作失敗,則跳回 、、、。束狀恶F,並且回報給系統。 士 、月藉由在$要對記憶體執行重複性指令時,將原 、責下達指令的微控該成由狀態裝置下達指令,可以 12 1306255 ITFT-05-〇 13 ] 935 6twf.doc/t 在不需要微控器及軟體的介入下由狀態裝置完成 •7,增加記憶體的使用效能及減低其功率損耗。 曰 雖然本發明已以較佳實施例揭露如上,麩Α ,本發明:任何熟習此技藝者,在不脫離:發 和乾圍内’當可作些許之更動與潤飾,因此 ^ 範圍當視後附之申請專利範圍所界定者為準 之保護 【圖式簡單說明】 裝置為依照本發明一實施例的一種記憶體的控制 資料為依照本發明—實施_ —魏塊資訊表之 圖^示為依照本發明—實施例t種 悉圖^適用於執行尋找多個空的區塊的指令。收 狀態=、會不為依照本發明另—實施例的—種狀態襄置的 讀出:作明之一較佳實施例的-種在執行 狀恶裝置的狀態圖。 芎入二竹3不為依照本發明之一較佳實施例的一種在執行 馬入狀態I置的狀態圖。 執订 抹除二乍照本發明之-較佳實施例的-種在執行 r ± φ _狀怨扁置的狀態圖。 要元件符號說明】 °己fe體的控制褒置 110 :微控器 13 1306255 ITPT-05-013 19356twf.doc/t 120 :控制器 130 :狀態裝置 140 :區塊資訊表 150 :佇列器 A : 閒置狀態 B : 尋找狀態 C : 判斷狀態 D : 抹除狀態 E : 驗證狀態 F : 結束狀態If the address status flag is not erasable or the memory address is not within the specified interval, then jump back to the search state β to recheck the next memory address and its (4) flag. If the person is within the fingertip and the mark is erasable, then the erase state D is performed. At this time, the controller_120 issues an erase command to the memory device, and jumps to the verification state e after the controller 120 performs the action. Shih-hsien chats into X-force, then jumps back to state B, α to the next step above the memory. Conversely, if the erase action fails, it jumps back to , , , . Bunch of evil F, and return to the system. When the recursive instruction is executed on the memory, the micro-control of the original and the responsibility command is issued by the state device, which can be 12 1306255 ITFT-05-〇13] 935 6twf.doc/t It is completed by the state device without the intervention of the microcontroller and software. 7. Increase the memory usage and reduce its power loss. Although the present invention has been disclosed in the preferred embodiment as above, the present invention: any person skilled in the art, without departing from the hair and the dry circumference, can make some changes and retouching, so the scope of the treatment is The protection defined by the scope of the patent application is as follows: The device is a control data of a memory according to an embodiment of the present invention, which is shown in the figure of the present invention. In accordance with the present invention - an embodiment of the invention is adapted to execute instructions for finding a plurality of empty blocks. Receiving state =, will not be read in accordance with another embodiment of the present invention: a state diagram of a preferred embodiment of the present invention. The intrusion into the two bamboos 3 is not a state diagram in which the state of the horse is set in accordance with a preferred embodiment of the present invention. The invention is performed by erasing a state diagram of the preferred embodiment of the present invention in the execution of r ± φ _ 怨 扁 。. The description of the component symbol is as follows: Control device 110: Micro controller 13 1306255 ITPT-05-013 19356twf.doc/t 120: Controller 130: State device 140: Block information table 150: Arrayer A : Idle state B: Find state C: Determine state D: Erase state E: Verify state F: End state

Claims (1)

1306255 97-09-25 十、申請專利範圍: 十1‘一種記憶體的控制裝置,用以加速該記憶體執行重 複性指令’其巾該記‘&體包含多㈣塊,雜制裝置包括: 一微控器,用以發出一指令以操作該記憶體; 一區塊資訊表,用以記錄每一該些區塊的狀態; 一狀態裝置’用以根據該區塊資訊表取得每—該些 塊的狀‘4 ’解析每—該些區塊的狀態以重複執行該指令, 亚據以更新該區塊資訊表内相對應的狀態;以及 一控制器’輕接於該記憶體及該微控器之間,杳 出该指令未被重魏行時,㈣難驗 而當判斷出該指令被重複執行時,由二匕 重複執行該指令。 队心攻置 如申明專利圍帛1項所述之控制裝置,更包括 =㈣以物狀_重複執行該指令所需=個 产中請專利範圍第1項所述之控繼置,1中” k體包括一非揮發性記憶體。 5己 令包汶項所述之控制裝置’其中該指 中Ν為=數抹除或尋找㈣空的㈣之指令,其 ^如”專·_ 4項所述之㈣ =置用以執行尋肺個空的區塊的指令時,該 —間置狀態’為該狀態裝置的初始狀態; 15 1306255 rt 97-09-25 一尋找狀態,用以根據該區塊資訊表所記錄的每一該 些區塊的狀態,自該記憶體中尋找N個空的區塊; 一判斷狀態,用以判斷區塊是空的或可抹除的; 一抹除狀態,用以抹除區塊的内容; 一驗證狀態,用以驗證區塊的抹除是否成功;以及 一結束狀態,用以停止重複執行該指令,1306255 97-09-25 X. Patent application scope: Ten 1's a memory control device for accelerating the memory to execute repetitive instructions 'there is a towel' and the body contains multiple (four) blocks, and the miscellaneous device includes : a microcontroller for issuing an instruction to operate the memory; a block information table for recording the status of each of the blocks; a state device 'for obtaining each of the blocks based on the block information table The blocks of the blocks are '4' parsing the state of each of the blocks to repeatedly execute the instruction, updating the corresponding state in the block information table; and a controller is 'lightly connected to the memory and Between the microcontrollers, when the instruction is not re-routed, (4) difficult to check and when it is determined that the instruction is repeatedly executed, the instruction is repeatedly executed by the second. The team's heart attack, such as the control device described in the claim patent enclosure, includes: (4) the object _ repeated execution of the instruction required = one production, the scope of the patent, the control of the first paragraph, 1 The k body includes a non-volatile memory. 5 The control device described in the Bunwen item, wherein the finger is the number of erased or found (four) empty (four) instructions, such as "special__ 4 (4) = when the instruction to execute the block for emptying the lung is set, the -intervening state 'is the initial state of the state device; 15 1306255 rt 97-09-25 a search state for The status of each of the blocks recorded in the block information table, searching for N empty blocks from the memory; a judgment state for determining whether the block is empty or erasable; a state for erasing the contents of the block; a verification state for verifying whether the erasure of the block is successful; and an end state for stopping the execution of the instruction repeatedly, 其中’當該狀態裝置接收一開始信號以重複執行該指 令時則由該閒置狀態進入該尋找狀態;當該尋找狀態自該 記憶體中尋找到N個空的區塊時則進入該結束狀態;當該 哥找狀態自該記憶體中尚未尋找到N個空的區塊時則進入 «亥判斷狀態,當該判斷狀悲判斷目前區塊是空的則回到該 尋找狀態;當該判斷狀態判斷目前區塊是可抹除的則到該 抹除狀態,當該抹除狀態抹除區塊的内容後則到該驗證狀 悲;以及當該驗證狀態驗證區塊的抹除成功時則回到該尋 找狀態。Wherein when the state device receives a start signal to repeatedly execute the instruction, the idle state enters the seek state; when the seek state finds N empty blocks from the memory, the end state is entered; When the brother finds a state from which no N empty blocks have been found in the memory, the state is entered into the judgment state, and when the judgment state is judged that the current block is empty, the state is returned to the search state; when the judgment state is Determining that the current block is erasable, then to the erase state, when the erase state erases the content of the block, the verification is sad; and when the verification state verification block is successfully erased, then Go to the search status. 6·如申凊專利範圍第5項所述之控制裝置,其中當該 判_狀態判斷找了 Μ個區塊仍找不到ν個空的區塊時則 到该結束狀態’其中]VT為大於Ν的正整數。 7·如申請專利範圍第5項所述之控制裝置,其中當該 驗證狀態驗證區塊的抹除失敗時則到該結束狀態。 △ 8·如申請專利範圍第4項所述之控制裝置,其中當該 狀恶裝置扣疋s亥記憶體中之一記憶體區間内的計憶體位址 進行一讀出動作時,該狀態裝置包括下列狀態·· 一間置狀態,為該狀態裝置的初始狀態; 16 1306255 97-09-25 一尋找狀態,當該狀態襞置被啟動時,會從該 態進入該尋找狀態; ^ 一判斷狀態’當指定之該記憶體區間尚未被全部 時’則從鱗錄祕至該,赠查該記恃體: 址和-絲標記,當該記憶體位科在欲讀出之記憶 間内,以及該狀態標記為不需讀出之狀態二者其二 :態=到該尋找狀態’以重新檢查下一記憶體位址及;6. The control device according to claim 5, wherein when the judgment state finds that a block is still unable to find ν empty blocks, then the end state 'where VT is A positive integer greater than Ν. 7. The control device of claim 5, wherein the end state is reached when the erasure of the verification status verification block fails. ??? The control device according to claim 4, wherein the state device is performed when a memory address in a memory interval of the memory device of the device is performed Including the following states: · A set state, which is the initial state of the state device; 16 1306255 97-09-25 A search state, when the state device is activated, it will enter the search state from the state; ^ a judgment The state 'When the specified memory interval has not been fully taken', the secret is recorded from the scale, and the memory is checked: the address and the silk mark, when the memory location is in the memory to be read, and The status is marked as a state that does not need to be read, two of which: state = to the search state 'to re-examine the next memory address and; _作狀H ’當該記憶體紐在 ,内’且綠態標記為需要㈣之狀糾,職該 :進入該執行讀出動作狀態’以對該記憶體發出讀出=_H?' when the memory button is inside, and the green state is marked as needing (4), the job is: enter the execution read operation state 'to read out the memory = 魅^證狀態、’當該讀出動作結束後,職魏行括出 ===該驗證狀態1驗證該讀出動作是出 二,出動作成功時’則回到該尋找狀態,= 體位址進行該讀出動作;以及 σ己隐 進入;=當該讀出動作失敗時,則從該驗證狀態 9.如申請專利範圍第8項 尋找狀態中,當指定之該記憶體’其中在該 接進入該結束狀態。 祀^出完畢’則直 , 11« 進行—寫人動作時,錄態裝置包括下顺=叫體位址 1306255 #只月.日修正替換買 97-°9-25 ,置狀態’為該狀態裝置的初始狀態; 尋找狀態,當該狀態裝置被啟動時,會從該閒 態進入該尋找狀態; 士 一判斷狀態,當指定之該記憶體區間尚未被全部寫入 時,則從該尋找狀態跳至該判斷狀態,以檢查該記憶體仅 址和一狀態標記,當該記憶體位址不在欲寫入之記憶體 間内,以及該狀態標記為不可寫入之狀態二者其^之二 則回到該尋找狀態,以重新檢查下一記憶體位址及: 狀彳?1^ §己, 一執行寫入動作狀態,當該記憶體位址在該記憶體 間内’且錄態標記為可以寫人之狀態時,則從該判斷: 態進入該執行寫入動作狀態,以對該記憶體發出寫入的妒 令; 曰 一驗證狀態,當該寫入動作結束後,則從該執行 動作狀態進入該驗證狀態,以驗證該寫入動作是否成二入 當該寫入動作成功時,則回到該尋找狀態,以對下―士丄 體位址進行該寫入動作;以及 己k 一結束狀態,當該寫入動作失敗時’則從該驗證 進入該結束狀態。 ^ 心 11.如申請專利範圍弟1 〇項所述之控制裝置,盆中在 該尋找狀態中’當指定之該記憶體區間皆被寫入時了則直 接進入該結束狀態。 、、 18 1306255 IHH _ -------…-Ί [ήί |營£替換頁1 97-09-25 12.如申請專利範圍第4項所述之控制裝置,其中當該 狀態裝置指定一記憶體中之一記憶體區間内的記憶體位址 進行一抹除動作時,該狀態裝置包括下列狀態: 一閒置狀態,為該狀態裝置的初始狀態; 一尋找狀態,當該狀態裝置被啟動時,會從該閒置狀 態進入該尋找狀態; 一判斷狀態,當指定之該記憶體區間尚未被全部抹除 時,則從該尋找狀態跳至該判斷狀態,以檢查該記憶體位 址和一狀態標記’當該記憶體位址不在欲抹除之記憶體區 間内’以及該狀態標記為不可抹除之狀態二者其中之一 日守,則回到該尋找狀態,以重新檢查下一記憶體位址及其 狀態標記; 一執行抹除動作狀態,當該記憶體位址在該記憶體區 間内,且該狀態標記為可抹除之狀態時,則從該判斷狀態 進入該執行抹除動作狀態,以對該記憶體發出抹除的指令; 驗證狀悲,當該寫入抹除結束後,則從該執行抹除 • 動作狀態進入該驗證狀態,以驗證該抹除動作是否成功, 當該抹除動作成功時,則回到該尋找狀態,以對下一記憶 體位址重複進行該抹除動作;以及 —結束狀態,當該抹除動作失敗時,則從該驗磴狀能 進入該結束狀態。 β 13·如申請專利範圍第π項所述之控制裝置,其中在 該尋找狀態中,當指定之該記憶體區間已全部抹除完畢 時,則直接進入該結束狀態。 μ 19The state of the enchantment certificate, 'When the readout operation is finished, the employee Wei Wei is out === the verification state 1 verifies that the readout action is out of the second, and when the action is successful, the user returns to the search state, and the body address performs the Read action; and σ has entered; = when the read action fails, then from the verification state 9. In the search state of item 8 of the scope of the patent, when the memory is specified, where the access is entered End state.祀^出完' is straight, 11« is performed - when writing a person's action, the recording device includes the next shun = the body address 1306255 #月月.日修正 replacement replacement buy 97-°9-25, set the state 'for the state device The initial state; when the state device is activated, the search state is entered from the idle state; the judge state determines the state, and when the specified memory interval has not been fully written, the state is jumped from the seek state Up to the judgment state, to check the memory address and a status flag, when the memory address is not in the memory to be written, and the status is marked as unwritable. Go to the search state to re-examine the next memory address and: 彳?1^ §, once the write operation state is performed, when the memory address is in the memory space In the state of the state, the state is entered into the execution of the write operation state to issue a write command to the memory; in the verification state, when the write operation ends, the execution operation state is entered. The verification status To verify whether the write action is binary or not, when the write operation is successful, return to the search state to perform the write operation on the lower-soul address; and the end state, when the write When the action fails, 'the end state is entered from the verification. ^Heart 11. As in the control device described in the patent application, in the search state, when the specified memory interval is written, the cell enters the end state directly. , 18 1306255 IHH _ -------...-Ί [ήί | 营£ replacement page 1 97-09-25 12. The control device of claim 4, wherein when the state device specifies When a memory address in a memory interval of a memory performs an erasing action, the state device includes the following states: an idle state, which is an initial state of the state device; and a seek state, when the state device is activated. Entering the search state from the idle state; a judgment state, when the specified memory interval has not been completely erased, jumping from the search state to the determination state to check the memory address and a status flag Returning to the search state to re-examine the next memory address and when one of the memory addresses is not in the memory segment to be erased and the state is marked as non-erasable a status flag; an execution erase state, when the memory address is in the memory interval, and the state is marked as an erasable state, then the execution is entered from the determination state In addition to the action state, an instruction to erase the memory is issued; the verification is sad, and when the write erase is completed, the verification state is entered from the execution erase state to verify whether the erase operation is successful. When the erasing action is successful, returning to the searching state to repeat the erasing action on the next memory address; and - ending state, when the erasing action fails, the verification state can be Enter the end state. The control device according to the item π of the patent application, wherein in the seek state, when the specified memory interval has been completely erased, the end state is directly entered. μ 19
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