TWI398755B - Method for restoring an embedded system - Google Patents

Description

Embedded system recovery method

The invention relates to a method for computer system security management, in particular to an embedded system recovery method.

With the networking of information systems and the increasingly serving of critical applications, information system security has become a basic premise for the successful operation of information systems. Enterprises have begun to invest heavily in information security, and information security products and services have also become hot spots in the market. However, because the Internet is full of various computer viruses, its contagious, concealed, latent and destructive is unimaginable, and the current anti-virus software can not predict the new virus generated in the future, so the computer It is not uncommon for a user to be infected with a virus while using a computer, and many system profiles on the computer may be paralyzed when infected. In addition, sometimes the user's improper operation, some computer systems will inevitably have various problems, so for various systems on the computer, once the system configuration file has problems, it is necessary to restore these system configuration files.

For embedded systems, because the system is designed for a specific task, once the system is abnormal, it will destroy its system configuration information, which is crucial for enterprises and individuals. Not only is a lot of time wasted by manual recovery, but it is also likely because of the configuration information for the system. If you do not understand, the system configuration information recovered will be incomplete or incorrect. Therefore, how to provide a method for restoring the configuration information of the embedded system is one of the security problems that need to be solved in the embedded system.

In view of the above, it is necessary to provide an embedded system recovery method, which can conveniently and quickly restore the configuration information of the embedded system, and improve the accuracy of recovery.

An embedded system recovery method. The method includes the steps of: operating an embedded system in a computer; providing a universal input/output device in the computer, the universal input and output device comprising a switch, a first pin, a second pin, and a light emitting diode, the switch connection An input button; backing up the system configuration file of the embedded system; setting the first pin as the input end, the second pin as the output end; registering the interrupt processing routine; pressing the input button to touch the switch to close Making the first pin generate a high level, thereby generating a hardware interrupt; calling an interrupt processing routine to process the interrupt signal generated by the hardware interrupt; determining whether the general input/output interrupt information sent by the interrupt processing routine is received; Receiving the general-purpose input/output interrupt information of the interrupt processing routine, transmitting a high-low discontinuous level control signal to the second pin to cause the light-emitting diode to emit light; calling the system configuration file to restore the system configuration of the embedded system; A low level control signal is applied to the second pin to extinguish the light emitting diode.

Compared with the prior art, the embedded system recovery method uses a GPIO (General Purpose Input/Output) device to restore the configuration file of the embedded system with one key, thereby improving the recovery efficiency and accuracy. Sex.

1‧‧‧ computer

2‧‧‧Input equipment

11‧‧‧BIOS

12‧‧‧GPIO equipment

13‧‧‧CPU

14‧‧‧Flash-ROM

15‧‧‧ Busbar

1 is a structural diagram of an application environment of an embedded system recovery method of the present invention.

FIG. 2 is a circuit diagram of a button recovery circuit of the GPIO device in FIG. 1.

3 is a flow chart of a preferred embodiment of the embedded system recovery method of the present invention.

Figure 4 is a sub-flow diagram of initializing the GPIO system setup in Figure 3.

Figure 5 is a sub-flow diagram of interrupt processing routine top half processing interrupt signals.

Figure 6 is a sub-flow diagram of the interrupt processing signal in the bottom half of the interrupt processing routine.

Referring to FIG. 1, it is a structural diagram of an application environment of the embedded system recovery method of the present invention. The application environment of the embedded system recovery method mainly includes a computer 1 and an input device 2. The computer 1 includes a BIOS (Basic Input/Output System) 11, a GPIO (General Purpose Input/Output) device 12, a CPU (Central Processing Unit) 13 and a bus bar. 15. The BIOS 11 includes a Flash-ROM (Flash Memory) 14. The BIOS 11, the GPIO device 12 and the CPU 13 are all connected to the bus bar 15.

The computer 1 can be an IBM Personal Computer (IBM PC) or an Apple Mac PC, or any other suitable computer.

The key recovery circuit diagram of the GPIO device 12 is as shown in FIG. 2, and the circuit diagram includes a switch K1, a first resistor R1, a second resistor R2, a third resistor R3, a capacitor C1, and an LED (Light Emitting Diode). L1, first pin P1, second pin P2, and a power supply V1 that supplies a voltage of 3.3V. The first pin P1, the first resistor R1, the switch K1, the third resistor R3, the LED L1, and the second pin P2 are sequentially connected in series, and the second resistor R2 is connected in parallel with the capacitor C1. The second resistor R2 connected in parallel and one end of the capacitor C1 are connected to the line between the first pin P1 and the first resistor R1, and the other end is grounded. The power source V1 is connected to a connection between the switch K1 and the third resistor R3. The anode of the LED L1 is connected to the third resistor R3, and the cathode is connected to the second pin P2. The positive electrode C1 is connected to the connection between the first pin P1 and the first resistor R1, and the negative electrode is grounded. The switch K1 is also connected to an input button of the input device 2, when the corresponding input button of the input device 2 is pressed, the switch K1 is closed, and the first pin P1 is at a high level, thereby A hardware interrupt is generated. When the system sends a high level to the second pin P2, since the other end of the LED L1 is connected to the power source V1 through the resistor R3, the circuit in which the LED L1 is located is turned on, and the LED L1 has a current, so that the LED L1 is lit at this time; When the system sends a low level to the second pin P2, no current flows through the LED L1, so the LED L1 is extinguished at this time; when the system sends a high and low discontinuous level to the second pin P2, there is a discontinuous current in the LED L1. Pass, so the LED L1 flashes at this time.

The Flash-ROM 14 stores an operating system, an embedded system, and a system configuration file thereof. The operating system can be a Windows operating system or a Unix/Linux operating system. The embedded system installation operates on the On the operating system.

Referring to Figure 3, there is shown a flow diagram of a preferred embodiment of an embedded system recovery method. Step S11, step S12 and step S14 are performed at the core layer of the computer system, that is, at the same level as the operating system layer. Step S13, step S15, step S16, step S17 and step S18 are performed on the application layer.

First, in step S11, the system configuration information is backed up to the Flash-ROM 14 to form a system configuration file. The system configuration file includes system startup information, user information, and services started to restore the embedded system.

In step S12, the GPIO system settings are initialized. The step of initializing the GPIO system setting is as shown in FIG. 4, and mainly includes: setting an input/output port of each pin in the button recovery circuit of the GPIO device (step S121); registering an interrupt processing routine, that is, assigning an interrupt processing routine The interrupt number (step S122); the setting allows the system to receive the GPIO hardware interrupt signal (step S123).

The button recovery circuit of the GPIO device is as shown in FIG. 2. In this embodiment, the first pin P1 is set as an input port, and the second pin P2 is set as an output port. The GPIO device typically has 26 input pins, and each pin corresponds to an interrupt number, which is typically between 32-64.

The interrupt number assigned to the interrupt processing routine in step S122 should be consistent with the interrupt number corresponding to the first pin P1, that is, if the interrupt number corresponding to the first pin P1 is 37, the interrupt processing routine is The assigned interrupt number should be 37, which means that the interrupt processing can be called when the interrupt number that generates the interrupt is 37. The routine handles the interrupt signal. The interrupt processing routine includes a top half and a bottom half. The top half is a fast, asynchronous, interrupt handler that responds quickly to the hardware and completes the operation in the shortest amount of time. The interrupt handler can preempt the tasks in the kernel and mask other interrupts during execution. The bottom half is a post-pushing task that is executed only when the operating system is idle.

In step S13, when the embedded system is not working properly and the system configuration is damaged, pressing the corresponding input button on the input device 2, the touch switch K1 is closed, and a hardware interruption is generated. As shown in FIG. 2, when the switch K1 is closed, the first pin P1 is at a high level, and an interrupt signal is generated.

In step S14, the interrupt processing routine is called to process the interrupt signal. The step of the interrupt processing routine processing the interrupt signal is as shown in FIG. 5 and FIG. 6.

In step S15, it is determined whether the GPIO interrupt information sent by the interrupt processing routine is received.

Step S16, when receiving the GPIO interrupt information sent by the interrupt processing routine, sending a high and low interrupt level control signal to the second pin P2 of the GPIO device, so that the LED L1 is in a blinking state, thereby indicating that the system configuration is in progress. File recovery.

In step S17, the system configuration file is called from the Flash-ROM 14, and the system configuration is restored.

Step S18, after the system configuration recovery is completed, send a low level control signal to the second pin P2 of the GPIO device, so that the LED L1 is turned off, thereby indicating the system configuration. The file is restored.

In step S15, if the GPIO interrupt information of the interrupt processing routine is not received, the step S15 is continued to determine whether or not the GPIO interrupt information of the interrupt processing routine is received.

Referring to FIG. 5, it is a sub-flowchart that interrupts the processing of the top half processing interrupt signal.

Step S161, reading a high level signal from the first pin P1 end, and receiving a hardware interrupt signal.

Step S162, further determining whether the received hardware interrupt signal is a GPIO interrupt signal. The judgment is made according to the interrupt number of the signal. When the interrupt number is between 32-64, it indicates that the interrupt is a GPIO interrupt signal; otherwise, it indicates that the interrupt is not a GPIO interrupt signal.

Step S163, if the hardware interrupt signal is a GPIO interrupt signal, set an interrupt flag when the interrupt signal is generated. For example, when the hardware interrupt signal is a GPIO interrupt signal, the interrupt flag is recorded by an overall variable N=N+1. The initial value of this global variable is zero.

Step S164, scheduling the interrupt processing routine bottom half to process the interrupt signal.

In step S162, if the signal is not a GPIO interrupt signal, the flow is terminated.

Referring to FIG. 6, a sub-flowchart for interrupting the processing of the interrupt signal by the bottom half of the routine is processed.

In step S165, the interrupt flag is cleared. Clear the value of the total variable N .

In step S166, the GPIO interrupt information is sent to the application layer, that is, the GPIO interrupt information is sent to the step S15 for processing.

Claims (5)

An embedded system recovery method, the method comprising the steps of: running an embedded system in a computer; providing a universal input/output device in the computer, the universal input and output device comprising a switch, a first pin, a second pin, and a light a diode, the switch is connected to an input button; backing up the system configuration file of the embedded system; setting the first pin as an input terminal, the second pin as an output terminal; registering an interrupt processing routine; pressing the input Pressing the button, the switch is closed, causing the first pin to generate a high level, thereby generating a hardware interrupt; calling an interrupt processing routine to process the interrupt signal generated by the hardware interrupt, the interrupt processing routine including the top half executed successively The top and bottom half, the top half is a fast, asynchronous interrupt handler that responds quickly to the hardware and completes the operation in the shortest amount of time. The interrupt handler can preempt the tasks in the kernel and execute Other interruptions are masked, and the bottom half is a post-execution task that is executed only when the operating system is idle. Half; determine whether to receive the general-purpose input and output interrupt information sent by the interrupt processing routine; when receiving the general-purpose input/output interrupt information of the interrupt processing routine, send a high-low intermittent level control signal to the second pin, so that Luminous diode light; Calling the system configuration file to restore the system configuration of the embedded system; sending a low level control signal to the second pin to extinguish the light emitting diode. The embedded system recovery method of claim 1, wherein the method further comprises: setting the system to allow the general-purpose input/output interrupt signal to be received. The method for recovering an embedded system according to claim 1, wherein the step of processing the interrupt signal in the top half of the interrupt processing routine comprises: receiving a hardware interrupt signal; determining whether the received hardware interrupt signal is It is a general-purpose input/output interrupt signal; when the received hardware interrupt signal is a general-purpose input/output interrupt signal, an interrupt flag is set; and the bottom part of the interrupt processing routine is processed to process the interrupt signal. The method for recovering an embedded system according to claim 3, wherein the step of processing the interrupt processing routine interrupt half of the routine interrupt processing comprises: clearing the interrupt flag; returning a general input/output interrupt information. The embedded system recovery method according to claim 1, wherein the registration interrupt processing routine refers to assigning an interrupt number to the interrupt processing routine, and the interrupt number is interrupted by the first stitch. The number is the same.