1359400 100年11月24日梭正替换頁 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係關於一種液晶顯示裝置及其資料處理電路與驅 動方法。 【先前技術】 [0002] 液晶顯示裝置因具有低輻射、厚度薄等特點，而被廣泛 應用於行動電話 '電視、筆記型電腦等電子顯示設備。 目前之液晶顯示裝置採用圖框反轉（Frame I nvers i on) 驅動' 線反轉（Row Inversion)驅動、行反轉（Column Inversion)驅動及點反轉（Dot Inversion)驅動，其 中，點反轉驅動應用最為廣泛。 [0003] 請參閱圖1，係一種先前技術液晶顯示裝置點反轉驅動之 驅動示意圖。該液晶顯示裝置顯示第η圖框（Frame)時， 每一晝素（Pixel)與其相鄰之四畫素之驅動電壓之正負極 性均不同。當該液晶顯示裝置顯示第n + 1圖框時，每一晝 素驅動電壓之正負極性與第η圖框正好相反。圖框每變換 一次，該晝素之驅動電壓之正負極性亦發生一次變換， 從而驅動該液晶顯示裝置顯示圖像。 [0004] 請參閱圖2，係該液晶顯示裝置顯示某一特定畫面之二相 鄰圖框。設“亮”表示晝素輝度超過一標準值（該標準值 可根據設計需要而設定），“亮+ ”表示晝素輝度超過該 標準值且該畫素之驅動電壓之極性為正，“亮一”表示 畫素輝度超過該標準值且該畫素之驅動電壓之極性為負 ，“黑”表示畫素輝度未超過該標準值。當該液晶顯示 裝置顯示前一圖框時，若輝度超過該標準值之畫素均為 096120794 表單编號Α0101 第4頁/共19頁 1003436913-0 100年11月24日慘正替換頁 1359400 “亮+ ”，則該液晶顯示裝置顯示後一圖框時，該“亮+ ”晝素均變為“亮一”。因此，當該液晶顯示裝置顯示 該畫面時》所有該亮畫素在亮+ ”與“亮一”之間 交替變換。 [0005] 然，當該液晶顯示裝置所有該“亮”晝素在“亮+ ”與“ 亮一”之間交替變換時，該液晶顯示裝置顯示晝面輝度 之極性變化頻率為60/2 = 30Hz，從而其顯示畫面閃爍 (Flicker)頻率為30 Hz。因為人眼對頻率小於30 Hz之 閃爍比較敏感，所以使用者能夠感覺到該液晶顯示裝置 顯示畫面之閃爍，使用者在觀看該液晶顯示裝置顯示的 晝面時有不適感，不利於使用者的視覺健康。 【發明内容】 [0006] 有鑑於此，提供一種改善畫面閃爍之液晶顯示裝置驅動 電路實為必要。 [0007] 同時提供一種採用上述驅動電路之液晶顯示裝置亦為必 要。 [0008] 還有必要提供一種改善畫面閃爍之液晶顯示裝置驅動方 法。 [0009] —種液晶顯示裝置資料處理電路，其包括一圖框#描頻 率選擇電路、一記憶體、一資料選擇電路、一訊號輸出 電路及一資料分析電路，輸入該資料處理電路之圖像訊 號通過該資料分析電路儲存在該記憶體中，該資料分析 電路讀取該記憶體中之圖像訊號，並分析每一圖框之畫 素輝度及該圖框畫素之驅動電壓之極性，該圖框掃描頻 096120794 表單編號A0101 第5頁/共19頁 1003436913-0 1359400 100年11月24日梭正替换頁 率選擇電路根據該資料分析電路之分析結果控制該訊號 輸出電路輸出之圖像訊號之圖框頻率，該資料選擇電路 讀取該記憶體中之圖像訊號’並根據該貢料分析電路之 分析結果控制該訊號輸出電路輸出之圖像訊號。 [0010] 一種液晶顯示裝置，其包括一時序控制器、一資料處理 電路，該資料處理電路包括一圖框掃描頻率選擇電路、 一記憶體、一資料選擇電路、一訊號輸出電路及一資料 分析電路》輸入該資料處理電路之圖像訊號通過該資料 分析電路儲存在該記憶體中》該資料分析電路讀取該記 憶體中之圖像訊號，並分析每一圖框之晝素輝度及該圖 框畫素之驅動電壓之極性，該圖框掃描頻率選擇電路根 據該資料分析電路之分析結果控制該訊號輸出電路輸出 之圖像訊號之圖框頻率，該資料選擇電路讀取該記憶體 中之圖像訊號，並根據該資料分析電路之分析結果控制 該訊號輸出電路輸出之圖像訊號5該訊號輸出電路輸出 之圖像訊號傳送至該時序控制器，該時序控制器根據該 圖像訊號控制該液晶顯示裝置之動作時序。 [0011] 一種液晶顯示裝置驅動方法，其包括如下步驟：圖像訊 號輸入一資料分析電路，並經該資料分析電路儲存在一 記憶體中；該資料分析電路讀取該記憶體中之圖像訊號 ，並分析每一圖框之畫素輝度及該圖框畫素之驅動電壓 之極性；提供一圖框掃描頻率選擇電路，該圖框掃描頻 率選擇電路根據該資料分析電路之分析結果控制輸出圖 像訊號之圖框頻率；提供一資料選擇電路，該資料選擇 電路讀取該記憶體中之圖像訊號，並根據該資料分析電 096120794 表單编號A0101 第6頁/共19頁 1003436913-0 1359400 100年.11月24日修正替換頁 路之分析結果控制輸出之圖像訊號；提供一訊號輸出電 路，該訊號輸出電路輸出由該圖框掃描頻率選擇電路與 該資料選擇電路控制之圖像訊號。與先前技術相比，本 發明之液晶顯示裝置資料處理電路分析每一圖框之畫素 輝度及該圖框畫素之驅動電壓之極性，若該圖框晝素輝 度超過一標準輝度且該圖框畫素之驅動電壓極性不都相 同，則該資料處理電路輸出之圖像訊號之圖框頻率不變 ;若該圖框畫素輝度超過該標準輝度且該圖框畫素之驅 動電壓極性都相同，則該資料處理電路輸出之圖像訊號 之圖框頻率提高，從而使該液晶顯示裝置顯示畫面輝度 之極性變化頻率提高，即提高其顯示畫面閃爍頻率。因 為人眼對較高頻率之閃爍不易察覺，所以人眼不會感覺 到該液晶顯示裝置之閃爍，使用者在觀看畫面時，不會 產生不適感，也不會影響使用者的視覺健康。 【實施方式】 [0012] 請參閱圖3，係本發明夜晶顯示裝置第一實施方式之結構 示意圖。該液晶顯示裝置20包括一圖像處理電路 (Scaler Integrate Circuit)21、一時序控制器 (Time.Control Register, TCON)22、一掃描驅動電 路23、一資料驅動電路24及一液晶面板25。該圖像處理 電路21包括一資料處理電路26。 [0013] 該圖像處理電路21藉由該時序控制器22電連接該掃描驅 動電路23，該時序控制器22電連接該資料驅動電路24， 該資料驅動電路24藉由複數資料線（未標示）電連接該液 晶面板25，該掃描驅動電路23藉由複數掃描線（未標示） 096120794 表單編號A0101 第7頁/共19頁 1003436913-0 1359400 100年11月24日修正替换頁 電連接該液晶面板25。 [0014] 該資料處理電路26對輸入該圖像處理電路21之圖像訊號 進灯分析、選擇及調整。該時序控制器22控制該掃描驅 動電路23及該資料驅動電路24之動作時序。該掃描驅動 電路23及該資料驅動電路24驅動該液晶面板25顯示圖像 〇 [0015] 凊參閲圖4，係圖3所示資料處理電路26之内部電路示意 圖。該育料處理電路26包括一資料分析電路261、—圖框 掃描頻率選擇電路262、一記憶體263 ' 一資料選擇電路 264及一訊號輸出電路265。 〇 [0016] '•亥資料分析電路261藉由該圖框掃描頻率選擇電路電 連接该訊號輸出電路265，該資料分析電路261電連接該 δ己憶體263 ’該記憶體263藉由該資料選擇電路264電連 接該訊號輸出電路265。 [0017] 邊資料分析電路261分析輸入該資料處理電路26之每一圖 框之畫素輝度及該圖框畫素之驅動電壓極性，該圖框掃 描頻率選擇電路262控制該訊號輸出電路265輸出之圖像 訊號之圖框頻率（通常為60Hz或75Hz)，該記憶體263用 於儲存圖像訊號，該資料選擇電路264控制該訊號輸出電 路265輸出之圖像訊號，該訊號輸出電路265輸出圖像訊 魂。 月併參閱圖4、圖5，其中，圖5係圖3所示液晶顯示裝 置20之驅動波形圖。“Vdl”係輸入該資料處理電路26之 圖像訊號波形圖，“Vd2”係該訊號輸出電路265輸出之 096120794 表·單编敢A0101 .第8頁/共19頁 1003436913-0 [0018] 1.359400 100年.11月24日慘正替換頁 圖像訊號波形圖。待處理之第η圖框之圖像訊號通過該資 料分析電路261儲存在該記憶體263中，該圖像訊號通常 為顯示繪圖陣列（Video Graphic Array, VGA)訊號或 數位視訊介面（Digital Visual Interface, DVI)訊 號，其圖框頻率為60Hz。在tl到t2時間内，該資料分析 電路261從該記憶體263中讀取該第η圖框之圖像訊號，並 分析該圖像訊號顯示圖像之畫素輝度，輝度超過一標準 值（該標準值可根據設計需要而設定）之畫素之驅動電壓 極性不都相同（此時，人眼不易察覺該液晶顯示裝置20顯 示畫面之閃爍），該圖框掃描頻率選擇電路262控制該訊 號輸出電路265輸出之圖像訊號之圖框頻率為60Hz，該資 料選擇電路264從該記憶體263中讀取該第η圖框之圖像訊 號並傳送至該訊號輸出電路265，同時，第η+1圖框之圖 像訊號儲存在該記憶體263中。該訊號輸出電路265接收 該圖框掃描頻率選擇電路262及該資料選擇電路264輸出 之訊號，並輸出圖框頻率為60Hz之圖像訊號，該圖像訊 號通常為低壓差分訊號（Low Voltage Differential Signal，LVDS)或小幅度擺動差動訊號（Reduced Swing Differential Signal, RSDS)。 [0019] 在t2到t4時間内，該資料分析電路261從該記憶體263中 讀取該第n+1圖框之圖像訊號，並分析該圖像訊號顯示圖 像之畫素，輝度超過該標準值之畫素之驅動電壓極性都 相同（此時，人眼能夠察覺該液晶顯示裝置20顯示畫面之 閃爍），該圖框掃描頻率選擇電路262控制該訊號輸出電 路265輸出之圖像訊號之圖框頻率由60Hz提高到75Hz(該 096120794 表單編號A0101 第9頁/共19頁 1003436913-0 1359400 圖框持續8^間由T1變為T2)。該資料選擇電路264從該記 憶體263中讀取該第n+1圖框之圖像訊號，並在t3到 間内插入黑晝面訊號（該黑晝面持續時間為T3，且T1 = T2 + T3)，該帶有黑畫面之圖像訊號亦傳送至該訊號輸出電 路265，該訊號輪出電路265接收該圖框掃描頻率選擇電 路262及該資料選擇電路264輸出之訊號並輸出圖框頻 率為75Hz之圖像訊號。 [0020] 請再參閲圖3，該訊號輸出電路265輸出之圖像訊號傳送 至該時序控制H 22 ’該時序控制n22根據該圖像訊號控 制》玄掃指驅動電路23及該資料驅動電路24之動作時序， 並將該圖像訊號傳送至該資料驅動電路24，從而使該# 描驅動電路23及該資料驅動電路24驅動該液晶面板託顯 示圖像。 [0021] 與先前技術相比，該液晶顯示裝置2〇增加—資料處理電 路26，該資料處理電路26分析每一圖框之畫素輝度及該 圖框畫素之驅動電歷之極性’若該圖框晝素輝度超過_ 標準輝度且該圖框畫章之驅動電壓極性不都相同，則該 資料處理電路26輸出之圖像訊號之圖框頻率不變；若該 圖框畫素輝度超過該標準輝度且該圖框畫素之驅動電壓 極性都相同，則該資料處理電路26輸出之圖像訊號之圖 框頻率提高到75Hz，從而使該液晶顯示裝置2〇顯示畫面 輝度之極性變化頻率大於30Hz，即其顯示畫面閃爍頻率 大於30 Hz。因為人眼對頻率大於3〇心之閃爍不易察覺 ，所以不會感覺到該液晶顯示裝置2〇之閃爍，使用者在 觀看畫面時，不會產生不適感，也不會影響使用者的視 096120794 表單编號A0101 笫10頁/共19頁 -1003436913-0 1359400 100年11月24日修正替換頁 覺健康。 [0022] 同時，只有在該液晶顯示裝置20閃爍時，其圖框頻率才 提高到75Hz，與一直使用圖框頻率為75Hz之液晶顯示裝 置相比，該液晶顯示裝置2 0之散熱量和電磁干擾減小。 將該圖像訊號之圖框掃描頻率提高到75Hz，同時採用插 黑技術，該液晶顯示裝置20顯示之畫面不會有拖影現象 ，有利於提高該液晶顯示裝置20顯示之晝質。 [0023] 請參閱圖6，係本發明液晶顯示裝置第二實施方式之結構 示意圖。該液晶顯示裝置30與第一實施方式之液晶顯示 裝置20之區別在於：該液晶顯示裝置30包括一圖像處理 電路31、一時序控制器32、一掃描驅動電路33、一資轉 驅動電路34及一液晶面板35。該時序控制器32包括一資 料處理電路36。 [0024] 惟，該資料處理電路亦可根據需要而設計在其他位置， 如該圖像處理電路與該時序控制器之間，該液晶顯示裝 置之圖框頻率還可提高到80Hz或更高頻率，並不限於上 述實施方式所述。 [0025] 綜上所述，本發明確已符合發明之要件，爰依法提出專 利申請。惟，以上該者僅為本發明之較佳實施方式，本 發明之範圍並不以上述實施方式為限，舉凡熟習本案技 藝之人士援依本發明之精神所作之等效修飾或變化，皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 [0026] 圖1係一種先前技術液晶顯示裝置點反轉驅動之驅動示意 096120794 表單編號A0101 第Η頁/共19頁 1003436913-0 1359400 100年11月24日按正替换頁 圖。 [0027] 圖2係該液晶顯示裝置顯示某一特定畫面之二相鄰圖框。 [0028] 圖3係本發明液晶顯示裝置第一實施方式之結構示意圖。 [0029] 圖4係圖3所示資料處理電路之内部電路示意圖。 [0030] 圖5係圖3所不液晶顯不裝置之驅動波形圖。 [0031] 圖6係本發明液晶顯示裝置第二實施方式之結構示意圖。 【主要元件符號說明】 [0032] 液晶顯示裝置：20、30 [0033] 圖像處理電路：21、31 [0034] 時序控制器：22、32 [0035] 掃描驅動電路：23、33 [0036] 資料驅動電路：24、34 [0037] 液晶面板：25、35 [0038] 資料處理電路：26、36 [0039] 資料分析電路：261 [0040] 圖框掃描頻率選擇電路：262 [0041] 記憶體：263 [0042] 資料選擇電路：264 [0043] 訊號輸出電路：265 096120794 表單编號A0101 第12頁/共19頁 1003436913-01359400 November 24, 2014 Shuttle Replacement Page VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a liquid crystal display device, a data processing circuit thereof, and a driving method. [Prior Art] [0002] Liquid crystal display devices are widely used in mobile phones such as televisions and notebook computers because of their low radiation and thin thickness. The current liquid crystal display device uses a frame inversion (Frame I nvers i on) to drive a 'Row Inversion' drive, a line inversion (Column Inversion) drive, and a dot inversion (Dot Inversion) drive, where The rotary drive is the most widely used. Please refer to FIG. 1, which is a schematic diagram of driving of a dot-reverse driving of a liquid crystal display device of the prior art. When the liquid crystal display device displays the nth frame, the driving voltage of each pixel and its adjacent four pixels is different from the positive and negative polarities. When the liquid crystal display device displays the n + 1 frame, the positive and negative polarities of each of the pixel driving voltages are exactly opposite to the nth frame. Each time the frame is changed, the positive and negative polarities of the driving voltage of the pixel are also changed once, thereby driving the liquid crystal display device to display an image. Referring to FIG. 2, the liquid crystal display device displays two adjacent frames of a specific picture. Let "bright" means that the luminance of the element exceeds a standard value (the standard value can be set according to the design requirements), "bright +" means that the luminance of the pixel exceeds the standard value and the polarity of the driving voltage of the pixel is positive, "bright one "" indicates that the pixel luminance exceeds the standard value and the polarity of the driving voltage of the pixel is negative, and "black" indicates that the pixel luminance does not exceed the standard value. When the liquid crystal display device displays the previous frame, if the luminance exceeds the standard value, the pixels are 096120794. Form number Α 0101 Page 4 / Total 19 pages 1003436913-0 November 24, 2014 Misplaced replacement page 1359400 " Bright + ”, when the liquid crystal display device displays the next frame, the “bright +” pixels become “bright one”. Therefore, when the liquid crystal display device displays the picture, "all of the bright pixels alternate between bright +" and "bright one". [0005] However, when the liquid crystal display device has all of the "bright" elements in the "bright" When the alternating between + and "bright one", the liquid crystal display device displays the polarity change frequency of the facet brightness is 60/2 = 30 Hz, so that the display flicker frequency (Flicker) frequency is 30 Hz. Because the human eye is less than the frequency. The 30 Hz flicker is sensitive, so the user can feel the flicker of the display screen of the liquid crystal display device, and the user feels uncomfortable when viewing the kneading surface displayed by the liquid crystal display device, which is disadvantageous to the user's visual health. [0006] In view of the above, it is necessary to provide a liquid crystal display device driving circuit for improving picture flicker. [0007] It is also necessary to provide a liquid crystal display device using the above driving circuit. [0008] It is also necessary to provide an improvement. A method for driving a liquid crystal display device with a flickering screen. [0009] A liquid crystal display device data processing circuit including a frame #picming frequency selection circuit a memory, a data selection circuit, a signal output circuit, and a data analysis circuit, wherein the image signal input to the data processing circuit is stored in the memory through the data analysis circuit, and the data analysis circuit reads the memory In the image signal, and analyze the pixel luminance of each frame and the polarity of the driving voltage of the frame pixel, the frame scanning frequency 096120794 form number A0101 page 5 / total 19 pages 1003436913-0 1359400 100 years On November 24, the shuttle replacement page rate selection circuit controls the frame frequency of the image signal outputted by the signal output circuit according to the analysis result of the data analysis circuit, and the data selection circuit reads the image signal in the memory. Controlling the image signal outputted by the signal output circuit according to the analysis result of the tributary analysis circuit. [0010] A liquid crystal display device comprising a timing controller and a data processing circuit, the data processing circuit including a frame scanning frequency Selecting a circuit, a memory, a data selection circuit, a signal output circuit, and a data analysis circuit to input the data processing circuit The image signal is stored in the memory by the data analysis circuit. The data analysis circuit reads the image signal in the memory, and analyzes the luminance of each frame and the driving voltage of the frame pixel. Polarity, the frame scanning frequency selection circuit controls the frame frequency of the image signal output by the signal output circuit according to the analysis result of the data analysis circuit, and the data selection circuit reads the image signal in the memory, and according to the The analysis result of the data analysis circuit controls the image signal outputted by the signal output circuit. The image signal outputted by the signal output circuit is transmitted to the timing controller, and the timing controller controls the operation timing of the liquid crystal display device according to the image signal. . [0011] A liquid crystal display device driving method includes the steps of: inputting an image signal into a data analysis circuit, and storing the data in a memory through the data analysis circuit; and the data analysis circuit reads an image in the memory Signal, and analyzing the pixel luminance of each frame and the polarity of the driving voltage of the frame pixel; providing a frame scanning frequency selection circuit, the frame scanning frequency selection circuit controlling the output according to the analysis result of the data analysis circuit The frame frequency of the image signal; providing a data selection circuit for reading the image signal in the memory, and analyzing the data according to the data 096120794 Form No. A0101 Page 6 / 19 pages 1003436913-0 1359400 100 years. On November 24th, the image signal of the analysis result of the replacement page is corrected; a signal output circuit is provided, and the signal output circuit outputs an image controlled by the frame scanning frequency selection circuit and the data selection circuit. Signal. Compared with the prior art, the liquid crystal display device data processing circuit of the present invention analyzes the pixel luminance of each frame and the polarity of the driving voltage of the frame pixel, if the frame luminance of the frame exceeds a standard luminance and the image If the polarity of the driving voltage of the frame pixel is not the same, the frame frequency of the image signal output by the data processing circuit is unchanged; if the pixel brightness of the frame exceeds the standard luminance and the driving voltage polarity of the frame pixel is Similarly, the frame frequency of the image signal output by the data processing circuit is increased, so that the polarity of the display screen brightness of the liquid crystal display device is increased, that is, the display screen flicker frequency is increased. Since the human eye is less noticeable to the higher frequency flicker, the human eye does not feel the flicker of the liquid crystal display device, and the user does not feel uncomfortable when viewing the screen, and does not affect the visual health of the user. [Embodiment] [0012] Please refer to FIG. 3, which is a schematic structural view of a first embodiment of a night crystal display device of the present invention. The liquid crystal display device 20 includes an image processing circuit (Scaler Integrate Circuit) 21, a timing controller (Time Control Register, TCON) 22, a scan driving circuit 23, a data driving circuit 24, and a liquid crystal panel 25. The image processing circuit 21 includes a data processing circuit 26. The image processing circuit 21 is electrically connected to the scan driving circuit 23 by the timing controller 22, and the timing controller 22 is electrically connected to the data driving circuit 24, and the data driving circuit 24 is connected by a plurality of data lines (not labeled) The liquid crystal panel 25 is electrically connected to the liquid crystal panel 25, and the scan driving circuit 23 is electrically connected to the liquid crystal by a plurality of scanning lines (not shown) 096120794 Form No. A0101 Page 7/19 pages 1003436913-0 1359400 Panel 25. [0014] The data processing circuit 26 analyzes, selects, and adjusts the image signals input to the image processing circuit 21. The timing controller 22 controls the timing of the operation of the scan driving circuit 23 and the data driving circuit 24. The scan driving circuit 23 and the data driving circuit 24 drive the liquid crystal panel 25 to display an image. [0015] Referring to FIG. 4, an internal circuit diagram of the data processing circuit 26 shown in FIG. The feed processing circuit 26 includes a data analysis circuit 261, a frame scan frequency selection circuit 262, a memory 263', a data selection circuit 264, and a signal output circuit 265. •[0016] 'Hai data analysis circuit 261 is electrically connected to the signal output circuit 265 by the frame scanning frequency selection circuit, and the data analysis circuit 261 is electrically connected to the δ ** 263 ′′ the memory 263 by the data The selection circuit 264 is electrically coupled to the signal output circuit 265. [0017] The edge data analysis circuit 261 analyzes the pixel luminance of each frame input to the data processing circuit 26 and the driving voltage polarity of the frame pixel, and the frame scanning frequency selection circuit 262 controls the output of the signal output circuit 265. The frame frequency of the image signal (usually 60 Hz or 75 Hz), the memory 263 is used for storing the image signal, and the data selection circuit 264 controls the image signal output by the signal output circuit 265, and the signal output circuit 265 outputs Image soul. Referring to Figures 4 and 5, Fig. 5 is a driving waveform diagram of the liquid crystal display device 20 shown in Fig. 3. "Vdl" is the image signal waveform input to the data processing circuit 26, "Vd2" is the output of the signal output circuit 265, 096120794 table, single code, dare A0101. Page 8 / 19 pages 1003436913-0 [0018] 1.359400 100 years. November 24th, misplaced page image signal waveform. The image signal of the η frame to be processed is stored in the memory 263 by the data analysis circuit 261. The image signal is usually a video graphic Array (VGA) signal or a digital video interface (Digital Visual Interface). , DVI) signal, its frame frequency is 60Hz. During the period from t1 to t2, the data analysis circuit 261 reads the image signal of the nth frame from the memory 263, and analyzes the pixel luminance of the image signal display image, and the luminance exceeds a standard value ( The standard value may be set according to design requirements. The polarity of the driving voltage of the pixel is not the same (in this case, the human eye is not aware of the flicker of the display screen of the liquid crystal display device 20), and the frame scanning frequency selecting circuit 262 controls the signal. The frame frequency of the image signal outputted by the output circuit 265 is 60 Hz, and the data selection circuit 264 reads the image signal of the nth frame from the memory 263 and transmits the image signal to the signal output circuit 265, and at the same time, The image signal of the +1 frame is stored in the memory 263. The signal output circuit 265 receives the signal output by the frame scanning frequency selection circuit 262 and the data selection circuit 264, and outputs an image signal having a frame frequency of 60 Hz, and the image signal is usually a low voltage differential signal (Low Voltage Differential Signal). , LVDS) or Reduced Swing Differential Signal (RSDS). [0019] During the period from t2 to t4, the data analysis circuit 261 reads the image signal of the n+1th frame from the memory 263, and analyzes the pixel of the image signal display image, and the luminance exceeds The polarity of the driving voltage of the standard value is the same (at this time, the human eye can detect the flicker of the display screen of the liquid crystal display device 20), and the frame scanning frequency selecting circuit 262 controls the image signal output by the signal output circuit 265. The frame frequency is increased from 60 Hz to 75 Hz (the 096120794 form number A0101 page 9 / 19 pages 1003436913-0 1359400 frame continues from 8 to T2). The data selection circuit 264 reads the image signal of the n+1th frame from the memory 263, and inserts a black surface signal between t3 and the interval (the black surface duration is T3, and T1 = T2) + T3), the image signal with the black screen is also sent to the signal output circuit 265, and the signal wheel circuit 265 receives the signal output by the frame scan frequency selection circuit 262 and the data selection circuit 264 and outputs the frame. Image signal with a frequency of 75 Hz. [0020] Please refer to FIG. 3 again, the image signal outputted by the signal output circuit 265 is transmitted to the timing control H 22 '. The timing control n22 controls the scan finger driving circuit 23 and the data driving circuit according to the image signal control. The operation timing of 24 is transmitted to the data driving circuit 24, so that the #-drawing driving circuit 23 and the data driving circuit 24 drive the liquid crystal panel to display an image. [0021] Compared with the prior art, the liquid crystal display device 2 increases the data processing circuit 26, and the data processing circuit 26 analyzes the pixel luminance of each frame and the polarity of the driving electric history of the frame pixel. If the luminance of the frame exceeds _ standard luminance and the polarity of the driving voltage of the frame stamp is not the same, the frame frequency of the image signal output by the data processing circuit 26 is unchanged; if the pixel luminance exceeds The standard luminance and the driving voltage polarity of the frame pixels are the same, the frame frequency of the image signal output by the data processing circuit 26 is increased to 75 Hz, so that the liquid crystal display device 2 displays the polarity of the screen luminance. More than 30Hz, that is, its display screen flicker frequency is greater than 30 Hz. Because the human eye is not easy to detect the flicker with a frequency greater than 3〇, the liquid crystal display device 2 does not feel the flicker, and the user does not feel uncomfortable when viewing the screen, and does not affect the user's view 096120794. Form No. A0101 笫 10 pages / Total 19 pages - 1003436913-0 1359400 Correction of the replacement page health on November 24, 100. [0022] Meanwhile, only when the liquid crystal display device 20 is blinking, the frame frequency is increased to 75 Hz, and the heat dissipation amount and electromagnetic state of the liquid crystal display device 20 are compared with the liquid crystal display device using the frame frequency of 75 Hz. The interference is reduced. The frame scanning frequency of the image signal is increased to 75 Hz, and the black insertion technique is used. The liquid crystal display device 20 displays a picture without smear, which is advantageous for improving the quality of the liquid crystal display device 20. Referring to FIG. 6, a schematic structural view of a second embodiment of a liquid crystal display device of the present invention is shown. The difference between the liquid crystal display device 30 and the liquid crystal display device 20 of the first embodiment is that the liquid crystal display device 30 includes an image processing circuit 31, a timing controller 32, a scan driving circuit 33, and a transfer driving circuit 34. And a liquid crystal panel 35. The timing controller 32 includes a data processing circuit 36. [0024] However, the data processing circuit can also be designed at other locations as needed, such as between the image processing circuit and the timing controller, the frame frequency of the liquid crystal display device can also be increased to 80 Hz or higher. It is not limited to the above embodiment. [0025] In summary, the present invention has indeed met the requirements of the invention, and the patent application is filed according to law. However, the above is only a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and those skilled in the art will be able to make equivalent modifications or changes in accordance with the spirit of the present invention. It is covered by the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS [0026] FIG. 1 is a schematic diagram of a driving operation of a dot-reverse driving of a liquid crystal display device of the prior art. 096120794 Form No. A0101 Page/19 pages 1003436913-0 1359400 November 24, 2014 Pressing a replacement page Figure. 2 is a view showing two adjacent frames of a certain screen displayed by the liquid crystal display device. 3 is a schematic structural view of a first embodiment of a liquid crystal display device of the present invention. 4 is a schematic diagram of an internal circuit of the data processing circuit shown in FIG. 3. [0030] FIG. 5 is a driving waveform diagram of the liquid crystal display device of FIG. 6 is a schematic structural view of a second embodiment of a liquid crystal display device of the present invention. [Main component symbol description] [0032] Liquid crystal display device: 20, 30 [0033] Image processing circuit: 21, 31 [0034] Timing controller: 22, 32 [0035] Scanning drive circuit: 23, 33 [0036] Data driving circuit: 24, 34 [0037] Liquid crystal panel: 25, 35 [0038] Data processing circuit: 26, 36 [0039] Data analysis circuit: 261 [0040] Frame scanning frequency selection circuit: 262 [0041] Memory :263 [0042] Data selection circuit: 264 [0043] Signal output circuit: 265 096120794 Form number A0101 Page 12 / Total 19 pages 1003436913-0