1251290 九、發明說明： 【發明所屬之技術領域】 本發明提供一種晶圓裝載室及其晶圓載具，尤指一種 減少熱應力造成晶圓破片之晶圓裝載室及其晶圓載具。 【先前技術】 超大型積體電路(VLSI)之製作係以由半導體材質構成 之晶圓為基底，配合數十道甚至上百道的半導體製程以於 晶圓上形成具有預設佈局設計之電子元件以及連接線路， 最後再利用切割以及封裝製程將形成之晶粒(die)製作成複 數個晶片（chip)以供使用。在這數十道甚至上百道的半導體 製程中，往往有數道加工過程溫度極高，為使晶圓快速降 溫散熱至室溫後，再進行下一製程，因此需要架設晶圓裝 載室，提供為晶圓冷卻之緩衝站。 請參考第1圖為習知技術晶圓載具10之示意圖。晶圓 載具10設置於一晶圓裝載室中（圖未示）.，其包含有一晶 圓座12由二薄板12a、12b所形成，用來承載一晶圓。通 常一晶圓裝載室中設置有複數個層層堆疊的晶圓載具10， 而各晶圓載具10可分別容置一晶圓。晶圓加工過程中，有 1251290 數道加工過程溫度過高，因此設置一提供晶圓冷卻之緩衝 站’將已完成製程之南溫晶圓放置於晶圓裝載室之晶圓座 12上，待晶圓冷卻後再進行下一製程。以去光阻(strip)製 程為例，完成去光阻製程的晶圓通常溫度高達200QC，因 此無法直接進行下一道製程，便會將高溫晶圓回傳至晶圓 裝載室中，置放在晶圓座12上，等待冷卻。 • 請參考第2圖，第2圖為第1圖所示晶圓載具10表面 置放有一晶圓14的俯視圖。第2圖顯示出當晶圓14置放 在習知晶圓座12之上時，晶圓14兩侧會與薄板12a、12b 有大面積之接觸，由於熱量接觸導熱的原理，故接觸到晶 圓座12之晶圓14的兩侧冷卻速度較快，而未接觸晶圓座 12之晶圓14的中間部分冷卻速度較慢，因此造成晶圓14 中間部分與兩侧具有溫度差而受到熱應力影響造成晶圓可 • 能從中間裂開（如雙箭頭所指處），導致破片並且刮傷晶圓 裝載室裡的其他晶圓，形成多片晶圓報廢。 由上可知習知技術之晶圓載具10與晶圓14屬於「面」 的接觸方式，因此有接觸到晶圓座12之晶圓14散熱冷卻 速度快，而未接觸晶圓座12之晶圓14散熱冷卻速度慢， 才會有熱應力之影響。有鑑於此，申請人乃根據此等缺點 1251290 及依據多年從事製造該類產品之相關經驗，悉心觀察且研 究之，進而提出本發明，不但可以減少熱應力之影響並有 效提升晶圓生產率，進一步減少晶圓製造之成本。 【發明内容】 本發明之主要目的即在於提供一種能防止熱應力造成 晶圓破片之晶圓裝載室及其晶圓載具。 本發明提供一種晶圓裝載室（loadlock chamber)，其包 含有一裝載室殼體，其具有至少一負載口（loading port)、至 少一設置於裝載室殼體外側之負載門（loading door)以及至 少一晶圓載具(wafer holder)，設於裝載室殼體之内，用以 承載一晶圓。其中，晶圓載具另包含有至少一晶圓座以及 複數個定位裝置（locator)，設於晶圓座之上並突出於晶圓座 • 表面。當晶圓置於晶圓載具之上時，晶圓之底表面僅與該 等定位裝置相接觸。 由於本發明之晶圓裝載室在承載晶圓時，晶圓之底面 僅與晶圓載具上的定位裝置相接，因此晶圓與晶圓載具之 間係採用「點」的接觸方式，因此不但能使晶圓以輻射冷 卻方式降溫，並且可以有效避免整片晶圓散熱速度差異太 1251290 大而造成晶圓破片以及刮傷其他晶圓，能有效提高晶圓之 良率、降低製造成本。 為了使貴審查委員能更近一步了解本發明之特徵及 技術内容，請參閱以下有關本發明之詳細說明與附圖。然 而所附圖式僅供參考與輔助說明用，並非用來對本發明加 以限制者。 【實施方式】 請參考第3圖，第3圖為本發明晶圓裝載室及其晶圓 載具之示意圖。如第3圖所示，本發明提供一晶圓裝載室 (loadlock chamber ) 30包含有至少一側壁32、一上蓋34 以及一底部36所形成的裝載室殼體38、複數個負載口 (loading port) 40設置於裝載室殼體38之側壁32、至少 • 一負載門（loading door) 42設置於裝載室殼體38之侧壁 32外側以及複數個晶圓載具（wafer holder) 44設置於裝載 室殼體38之内。其中負載口 40用來當作晶圓進出晶圓載 具44之出入口，負載門42用來當作隔離外部之活門，而 晶圓載具44係以堆疊方式堆疊於裝載室殼體38之内，而 且任一晶圓載具44所包含之晶圓座46與設於其上側或下 侧之另一晶圓載具44之晶圓座46間具有一空隙，用以承 1251290 載晶圓。 另外，晶圓裝載室30另包含有一抽真空裝置39，當 晶圓放置於晶圓載具44上之後，將負載門42關上，可使 用抽真空裝置39將晶圓裝載室30内部抽真空，以使晶圓 在真空狀態下冷卻。晶圓裝載室30另可選擇性包含有一冷 卻裝置（圖未示）設置於裝載室殼體38内部，其包含有複數 • 條冷卻水管路，能使置放於晶圓載具44之上的晶圓更快冷 卻0 如第4圖所示，第4圖為第3圖之晶圓載具44之放大 示意圖，晶圓載具44另包含有至少一晶圓座46以及複數 個定位裝置（locator) 48。其中，晶圓座46包含有二不相 接觸但共水平面之薄板46a、46b，用以承載一晶圓，而晶 • 圓載具44包含有至少三個定位裝置48，定位裝置48為一 向上突起之凸點並且分別位於晶圓座46之薄板46a、46b 上。如第4圖所示，當定位裝置48設置於晶圓座46之上 時，各定位裝置48係突出於晶圓座46之上表面。在本發 明的較佳實施例中，各定位裝置48具有一平坦之頂面，以 供晶圓放置。 1251290 當晶圓放置於晶圓載具44之晶圓座46之上時，晶圓 之圓心落在定位裝置48所圍成之圖形中，且晶圓之底表面 僅與定位裝置48之上頂面相接觸，而晶圓與定位裝置48 之接觸面積小於晶圓面積之30%，其中較佳接觸面積可視 情況而定為20%至30%、10%至20%，更佳為1%至10%。 如第5圖所示，第5圖為第4圖定位裝置之放大示意 • 圖，定位裝置48之形成方式可以使用鑽孔並車牙方式將晶 圓座46挖一小洞後，再將定位裝置48鎖固於晶圓座46 上，或者直接製作出一體成型之定位裝置48。其中，定位 裝置48之材料可選擇相同於晶圓座46之耐高溫材料，例 如鋁、鐵氟龍(teflon)或上述之組合，另外，定位裝置48 之高度a較佳小於7毫米，以使晶圓能穩固放置於晶圓座 46上。 請參考第6圖，第6圖為本發明晶圓載具之另一實施 例的示意圖。為便於說明，第6圖之部分圖式符號仍沿用 第4圖之圖式符號。本發明晶圓載具44包含有一晶圓座 46，而晶圓座46係由一薄板所構成。晶圓載具44另包含 有複數個定位裝置50，設於晶圓座46之上，並突出於晶 圓座46的上表面。定位裝置50為一向上突起之條狀凸塊 1251290 並且分別位於晶圓座46之一中心線46c兩侧。當一晶圓置 於晶圓載具44之上時，晶圓之底面僅會與定位裝置50相 接觸，且定位裝置50會分別位於晶圓之一直徑之兩侧。定 位裝置50之形成方式與第4圖所示之定位裝置48相同， 可以一體成形方式直接形成晶圓座46以及定位裝置50， 或在現有晶圓座46表面鑽孔，再固定定位裝置50於晶圓 座46上。後者可直接改良廠商已有之設備，以改善晶圓散 φ 熱不均之問題而不需增加成本汰換晶圓座。 其中值得注意是，晶圓裝載室30為一冷卻室（cooling chamber)用來當作半導體製程中任一製程之緩衝站並且使 用晶圓載具44來承載高溫製程後之晶圓，使晶圓之溫度降 為室溫後再進行另一製程，例如，半導體去光阻製程後之 缓衝站（buffer station)，使用晶圓載具44承載完成去光阻 鲁 製程之南溫晶圓。 綜上所述，由於本發明之晶圓載具採用「點」的接觸 方式，而習知技術之晶圓載具採用「面」的接觸方式，可 知本發明之晶圓與定位裝置之接觸面積遠小於習知晶圓與 晶圓載具之接觸面積，不但可使整片晶圓散熱速度相近， 預防過南之溫差產生熱應力之效應影響，造成晶片之破片 11 1251290 甚至因為破片而刮傷其他晶圓等情形，而形成多片晶圓報 廢，並可保持晶圓水平。由此可知，本發明之晶圓裝載室 及其晶圓載具，不但能提高晶圓生產之良率，而且進一步 降低晶圓之製造成本。 以上所述僅為本發明之較佳實施例，凡依本發明申請 專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範 圍0 【圖式簡單說明】 第1圖為習知技術晶圓載具之示意圖。 第2圖為第1圖所示晶圓載具表面置放有一晶圓之俯視圖。 第3圖為本發明晶圓裝載室及其晶圓載具之示意圖。 第4圖為第3圖之晶圓載具之放大示意圖。 ❿ 第5圖為第4圖定位裝置之放大示意圖。 第6圖為本發明晶圓載具之另一實施例之示意圖。 12 1251290 【主要元件符號說明】 10 晶圓載具 12 晶圓座 12a 薄板 12b 薄板 14 晶圓 30 晶圓裝載室 32 側壁 34 上蓋 36 底部 38 裝載室殼體 39 抽真空裝置 40 負載口 42 負載門 44 晶圓載具 46 晶圓座 46a 薄板 46b 薄板 46c 中心線 48 定位裝置 50 定位裝置1251290 IX. Description of the Invention: [Technical Field] The present invention provides a wafer loading chamber and a wafer carrier thereof, and more particularly to a wafer loading chamber and a wafer carrier for reducing wafer stress caused by thermal stress. [Prior Art] The production of ultra-large integrated circuits (VLSI) is based on a wafer made of a semiconductor material, and is combined with dozens or even hundreds of semiconductor processes to form electronic components having a predetermined layout design on a wafer. And the connection lines, and finally the formed die is fabricated into a plurality of chips for use by a dicing and packaging process. In these dozens or even hundreds of semiconductor processes, there are often several processes that are extremely hot. In order to allow the wafer to cool down to room temperature and then proceed to the next process, it is necessary to set up the wafer loading chamber. Wafer cooling buffer station. Please refer to FIG. 1 for a schematic diagram of a conventional wafer carrier 10. The wafer carrier 10 is disposed in a wafer loading chamber (not shown). The wafer carrier 12 includes a wafer 12 formed by two thin plates 12a, 12b for carrying a wafer. Typically, a plurality of stacked wafer carriers 10 are disposed in a wafer loading chamber, and each wafer carrier 10 can accommodate a wafer. During wafer processing, there are 1,512,290 processes that are too hot. Therefore, a buffer station that provides wafer cooling is set up. Place the finished south temperature wafer on the wafer holder 12 of the wafer loading chamber. After the wafer is cooled, the next process is performed. Taking the strip process as an example, the wafer that completes the photoresist process usually has a temperature of up to 200 QC, so the next process cannot be directly performed, and the high temperature wafer is transferred back to the wafer load chamber and placed. On the wafer holder 12, waiting for cooling. • Refer to Figure 2, which is a top plan view of the wafer 14 on the surface of the wafer carrier 10 shown in Figure 1. Figure 2 shows that when the wafer 14 is placed on the conventional wafer holder 12, the wafer 14 has a large area contact with the thin plates 12a, 12b on both sides. Due to the thermal contact heat conduction principle, the wafer holder is contacted. The wafer 14 of 12 has a faster cooling speed on both sides, and the middle portion of the wafer 14 not contacting the wafer holder 12 has a slower cooling rate, thereby causing a temperature difference between the middle portion and the both sides of the wafer 14 to be affected by thermal stress. The wafer can be cracked from the middle (as indicated by the double arrow), causing fragmentation and scratching other wafers in the wafer loading chamber, resulting in multiple wafer scraps. It can be seen that the wafer carrier 10 and the wafer 14 of the prior art are in a "face" contact manner, so that the wafer 14 contacting the wafer holder 12 has a fast cooling rate and does not contact the wafer of the wafer holder 12. 14 The heat dissipation is slow and the thermal stress will be affected. In view of this, the applicant has carefully observed and studied based on these shortcomings 1251290 and based on years of experience in manufacturing such products, and has proposed the present invention, which not only reduces the influence of thermal stress and effectively improves wafer productivity, further Reduce the cost of wafer fabrication. SUMMARY OF THE INVENTION A primary object of the present invention is to provide a wafer loading chamber and a wafer carrier capable of preventing wafer breakage caused by thermal stress. The present invention provides a load lock chamber including a load chamber housing having at least one loading port, at least one loading door disposed outside the load chamber housing, and at least A wafer holder is disposed within the load chamber housing for carrying a wafer. The wafer carrier further includes at least one wafer holder and a plurality of locators disposed on the wafer holder and protruding from the wafer holder surface. When the wafer is placed over the wafer carrier, the bottom surface of the wafer is only in contact with the positioning device. Since the wafer loading chamber of the present invention carries the wafer, the bottom surface of the wafer is only connected to the positioning device on the wafer carrier, so the "point" contact mode is adopted between the wafer and the wafer carrier, so not only the contact mode is adopted between the wafer and the wafer carrier, The wafer can be cooled by radiant cooling, and the difference in the heat dissipation speed of the whole wafer can be effectively prevented from being too large, and the wafer is fragmented and scratched by other wafers, which can effectively improve the yield of the wafer and reduce the manufacturing cost. In order to provide a more detailed understanding of the features and technical aspects of the present invention, the following detailed description of the invention and the accompanying drawings. The drawings are for illustrative purposes only and are not intended to limit the invention. [Embodiment] Please refer to FIG. 3, which is a schematic view of a wafer loading chamber and a wafer carrier thereof according to the present invention. As shown in FIG. 3, the present invention provides a load lock chamber 30 including a load chamber housing 38 formed by at least one side wall 32, an upper cover 34, and a bottom portion 36, and a plurality of load ports (loading port). 40 is disposed on the side wall 32 of the loading chamber housing 38, at least: a loading door 42 is disposed outside the side wall 32 of the loading chamber housing 38 and a plurality of wafer holders 44 are disposed in the loading chamber Inside the housing 38. Wherein the load port 40 is used as the entrance and exit of the wafer carrier 44, the load gate 42 is used as the isolation external shutter, and the wafer carrier 44 is stacked in the loading chamber housing 38 in a stacked manner, and There is a gap between the wafer holder 46 included in any of the wafer carriers 44 and the wafer holder 46 of another wafer carrier 44 disposed on the upper or lower side thereof for carrying the 1251290 wafer. In addition, the wafer loading chamber 30 further includes a vacuuming device 39. After the wafer is placed on the wafer carrier 44, the load gate 42 is closed, and the interior of the wafer loading chamber 30 can be evacuated using the vacuuming device 39. The wafer is allowed to cool under vacuum. The wafer loading chamber 30 can optionally include a cooling device (not shown) disposed inside the loading chamber housing 38, which includes a plurality of cooling water lines for enabling the crystals placed on the wafer carrier 44. The circle is cooled faster. As shown in FIG. 4, FIG. 4 is an enlarged schematic view of the wafer carrier 44 of FIG. 3. The wafer carrier 44 further includes at least one wafer holder 46 and a plurality of locators 48. . The wafer holder 46 includes two non-contacting but coplanar sheets 46a, 46b for carrying a wafer, and the wafer carrier 44 includes at least three positioning devices 48. The positioning device 48 is upwardly protruding. The bumps are located on the sheets 46a, 46b of the wafer holder 46, respectively. As shown in FIG. 4, when the positioning device 48 is disposed on the wafer holder 46, each positioning device 48 protrudes from the upper surface of the wafer holder 46. In the preferred embodiment of the invention, each positioning device 48 has a flat top surface for wafer placement. 1251290 When the wafer is placed over the wafer holder 46 of the wafer carrier 44, the center of the wafer falls within the pattern enclosed by the positioning device 48, and the bottom surface of the wafer is only adjacent to the top surface of the positioning device 48. Contact, and the contact area of the wafer with the positioning device 48 is less than 30% of the wafer area, wherein the preferred contact area may be 20% to 30%, 10% to 20%, and more preferably 1% to 10%, as the case may be. . As shown in Fig. 5, Fig. 5 is an enlarged schematic view of the positioning device of Fig. 4. The positioning device 48 is formed by drilling a hole in the wafer holder 46 and then positioning it. The device 48 is secured to the wafer holder 46 or directly formed into an integrally formed positioning device 48. Wherein, the material of the positioning device 48 can be selected from the same high temperature resistant material as the wafer holder 46, such as aluminum, teflon or a combination thereof, and the height a of the positioning device 48 is preferably less than 7 mm, so that The wafer can be stably placed on the wafer holder 46. Please refer to FIG. 6. FIG. 6 is a schematic view showing another embodiment of the wafer carrier of the present invention. For the sake of explanation, the partial symbols of Fig. 6 still use the symbol of Fig. 4. The wafer carrier 44 of the present invention includes a wafer holder 46 which is constructed of a thin plate. The wafer carrier 44 further includes a plurality of positioning devices 50 disposed on the wafer holder 46 and projecting from the upper surface of the wafer holder 46. The positioning device 50 is an upwardly protruding strip-shaped bump 1251290 and is located on either side of a center line 46c of the wafer holder 46. When a wafer is placed over the wafer carrier 44, the bottom surface of the wafer will only be in contact with the positioning device 50, and the positioning device 50 will be located on either side of the diameter of one of the wafers. The positioning device 50 is formed in the same manner as the positioning device 48 shown in FIG. 4, and the wafer holder 46 and the positioning device 50 can be directly formed in an integrally formed manner, or the surface of the existing wafer holder 46 can be drilled, and the positioning device 50 can be fixed. On the wafer holder 46. The latter can directly improve the existing equipment of the manufacturer to improve the problem of uneven heat dissipation of the wafer without increasing the cost of replacing the wafer holder. It should be noted that the wafer loading chamber 30 is a cooling chamber used as a buffer station for any process in the semiconductor process and uses the wafer carrier 44 to carry the wafer after the high temperature process, so that the wafer is After the temperature is lowered to room temperature, another process is performed, for example, a buffer station after the semiconductor photoresist removal process, and the wafer carrier 44 is used to carry the south temperature wafer to complete the photoresist removal process. In summary, since the wafer carrier of the present invention adopts a "point" contact method, and the wafer carrier of the prior art adopts a "face" contact mode, it can be seen that the contact area of the wafer and the positioning device of the present invention is much smaller than that. The contact area between the wafer and the wafer carrier can not only make the whole wafer heat dissipation speed similar, but also prevent the influence of thermal stress caused by the temperature difference in the south, causing the chip fragment 11 1251290 to scratch other wafers even due to fragmentation. The formation of multiple wafers is scrapped and the wafer level can be maintained. It can be seen that the wafer loading chamber and the wafer carrier of the present invention can not only improve the yield of wafer production, but also further reduce the manufacturing cost of the wafer. The above is only the preferred embodiment of the present invention, and all the equivalent changes and modifications made by the scope of the present invention should be within the scope of the present invention. 0 [Simple Description of the Drawing] FIG. 1 is a conventional technique. Schematic diagram of the wafer carrier. Fig. 2 is a plan view showing a wafer on the surface of the wafer carrier shown in Fig. 1. Figure 3 is a schematic view of the wafer loading chamber and its wafer carrier of the present invention. Figure 4 is an enlarged schematic view of the wafer carrier of Figure 3. ❿ Figure 5 is an enlarged schematic view of the positioning device of Figure 4. Figure 6 is a schematic view of another embodiment of a wafer carrier of the present invention. 12 1251290 [Description of main components] 10 Wafer carrier 12 Wafer holder 12a Thin plate 12b Thin plate 14 Wafer 30 Wafer loading chamber 32 Side wall 34 Upper cover 36 Bottom 38 Load chamber housing 39 Vacuuming device 40 Load port 42 Load gate 44 Wafer carrier 46 wafer holder 46a thin plate 46b thin plate 46c center line 48 positioning device 50 positioning device
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