TW594347B - Liquid crystal display panel having reduced flicker - Google Patents
Liquid crystal display panel having reduced flicker Download PDFInfo
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- TW594347B TW594347B TW092118129A TW92118129A TW594347B TW 594347 B TW594347 B TW 594347B TW 092118129 A TW092118129 A TW 092118129A TW 92118129 A TW92118129 A TW 92118129A TW 594347 B TW594347 B TW 594347B
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60P—VEHICLES ADAPTED FOR LOAD TRANSPORTATION OR TO TRANSPORT, TO CARRY, OR TO COMPRISE SPECIAL LOADS OR OBJECTS
- B60P7/00—Securing or covering of load on vehicles
- B60P7/02—Covering of load
- B60P7/04—Covering of load by tarpaulins or like flexible members
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60J—WINDOWS, WINDSCREENS, NON-FIXED ROOFS, DOORS, OR SIMILAR DEVICES FOR VEHICLES; REMOVABLE EXTERNAL PROTECTIVE COVERINGS SPECIALLY ADAPTED FOR VEHICLES
- B60J7/00—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs
- B60J7/08—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs of non-sliding type, i.e. movable or removable roofs or panels, e.g. let-down tops or roofs capable of being easily detached or of assuming a collapsed or inoperative position
- B60J7/12—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs of non-sliding type, i.e. movable or removable roofs or panels, e.g. let-down tops or roofs capable of being easily detached or of assuming a collapsed or inoperative position foldable; Tensioning mechanisms therefor, e.g. struts
- B60J7/1204—Control devices, e.g. for compensating tolerances, for defining movement or end position of top, for tensioning the top or for switching to an emergency mode
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60J—WINDOWS, WINDSCREENS, NON-FIXED ROOFS, DOORS, OR SIMILAR DEVICES FOR VEHICLES; REMOVABLE EXTERNAL PROTECTIVE COVERINGS SPECIALLY ADAPTED FOR VEHICLES
- B60J7/00—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs
- B60J7/08—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs of non-sliding type, i.e. movable or removable roofs or panels, e.g. let-down tops or roofs capable of being easily detached or of assuming a collapsed or inoperative position
- B60J7/12—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs of non-sliding type, i.e. movable or removable roofs or panels, e.g. let-down tops or roofs capable of being easily detached or of assuming a collapsed or inoperative position foldable; Tensioning mechanisms therefor, e.g. struts
- B60J7/14—Non-fixed roofs; Roofs with movable panels, e.g. rotary sunroofs of non-sliding type, i.e. movable or removable roofs or panels, e.g. let-down tops or roofs capable of being easily detached or of assuming a collapsed or inoperative position foldable; Tensioning mechanisms therefor, e.g. struts with a plurality of rigid plate-like elements or rigid non plate-like elements, e.g. with non-slidable, but pivotable or foldable movement
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60Y—INDEXING SCHEME RELATING TO ASPECTS CROSS-CUTTING VEHICLE TECHNOLOGY
- B60Y2200/00—Type of vehicle
- B60Y2200/10—Road Vehicles
- B60Y2200/14—Trucks; Load vehicles, Busses
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Abstract
Description
594347 五、發明說明(1) 發明所屬之技術領域 本發明係關於一種液晶顯示面板(liquid crystal display panel,LCD panel)’特別是一種低閃燦液晶顯 示面板。 先前技術 薄膜電晶體液晶顯示面板(thin film transistor LCD),主要是利用成矩陣狀排列的薄膜電晶體,配合適 當的電子元件來驅動液晶像素,以產生豐富亮麗的圖 形。由於薄膜電晶體液晶顯示面板具有外型輕薄、耗電 量少以及無輻射污染等特性,因此被廣泛地應用在筆記 型電腦(notebook)、個人數位助理(pDA)等攜帶式資訊產 品上,甚至已有逐漸取代傳統桌上型電腦之CRT監視器的 趨勢。 一請參考圖一與圖二’圖一為習知一薄膜電晶體液晶 顯不ί板的示意圖,圖二則為一薄膜電晶體液晶顯示面 板之單一像素的等效電路示意圖。如圖一所示,一液晶 $示面板1 0包含有一下基板i 2,下基板丨2包含有一像素 =列(Pixel array)區14、一掃描線驅動電路區16以及一 =料線驅動電路區18。其中,像素陣列區14内包含有複 條掃描線(scan line,未顯示)與複數條資料線(data594347 V. Description of the invention (1) The technical field to which the invention belongs The present invention relates to a liquid crystal display panel (LCD panel) ', especially a low-brightness bright liquid crystal display panel. In the prior art, thin film transistor LCDs mainly used thin-film transistors arranged in a matrix and equipped with appropriate electronic components to drive liquid crystal pixels to produce rich and beautiful graphics. Thin-film transistor liquid crystal display panels are widely used in portable information products such as notebooks, personal digital assistants (pDA), etc., due to their thin and light appearance, low power consumption, and no radiation pollution. CRT monitors have gradually replaced traditional desktop computers. First, please refer to FIG. 1 and FIG. 2 ′. FIG. 1 is a schematic diagram of a conventional thin film transistor liquid crystal display panel, and FIG. 2 is a schematic diagram of an equivalent circuit of a single pixel of a thin film transistor liquid crystal display panel. As shown in FIG. 1, a liquid crystal display panel 10 includes a lower substrate i 2, and the lower substrate 2 includes a pixel = pixel area 14, a scanning line driving circuit area 16, and a material line driving circuit. District 18. The pixel array region 14 includes a plurality of scan lines (not shown) and a plurality of data lines (data
第8頁 594347Page 594347
數二象ί ?不);、且各該掃描線與各該資料線係定義出複 ΐ ,Λ Π ),如圖—所示之像素A~C以及像素 Λ R,R ;:,中素A〜C係電連接於同一條掃描線,而像素 A、B及C’則是電連接於同一條資料線。 如圖一所不’掃描線驅動電路區丨6内包含有複數個 •^7動積體電路晶片(如晶片16a〜16c)以及複數條匯流線 ’而各匯流線1 7係用來電連接各該驅動積體電路晶 片。其中各該驅動積體電路晶片是利用覆晶技術(chip — on-glass,COG)而直接製作於下基板12表面,而各匯流 線1 7亦是直接製作於下基板丨2上,此即所謂的w〇A (wiring on array)設計。 如圖二所示,一像素2 〇至少包含有一液晶單元LC與 一薄膜電晶體TFT,其中液晶單元LC係由一像素電極 (pixel electrode)、一共通電極 cE(common counter electrode)、以及一液晶分子層所組成。而薄膜電晶體 TFT則包含有一閘極連接至一掃描線GL〇、一汲極連接至一 資料線DL 〇、以及一源極連接至液晶單元LC的像素電極, 由於該閘極與該源極部份重疊,因而產生一寄生電容Gs 於該閘極與該源極之間。此外,像素2 0另包含有一儲存 電容(storage capacitor )SC連接液晶單元LC與一掃描線 G L 1 ’儲存電谷S C係用來減少漏電流對液晶平元L C的電壓 的影響,亦即用來協助液晶單元LC儲存電荷。Count two images ί? No); and each of the scan lines and each of the data lines define a complex ΐ, Λ Π), as shown in the pixels A ~ C and pixels Λ R, R shown in the figure—: A to C are electrically connected to the same scan line, and pixels A, B, and C 'are electrically connected to the same data line. As shown in Figure 1, the scan line driving circuit area 6 includes a plurality of ^ 7 dynamic integrated circuit chips (such as wafers 16a to 16c) and a plurality of bus lines, and each bus line 17 is used to electrically connect each The driving integrated circuit chip. Each of the driving integrated circuit wafers is directly fabricated on the surface of the lower substrate 12 using chip-on-glass (COG) technology, and each of the bus lines 17 is also directly fabricated on the lower substrate 丨 2, that is, The so-called w〇A (wiring on array) design. As shown in FIG. 2, a pixel 20 includes at least a liquid crystal cell LC and a thin film transistor TFT. The liquid crystal cell LC is composed of a pixel electrode, a common counter electrode cE, and a liquid crystal. Made up of molecular layers. The thin film transistor TFT includes a gate electrode connected to a scan line GL0, a drain connected to a data line DL0, and a pixel electrode connected to a source electrode of the liquid crystal cell LC. Since the gate and the source electrode Partial overlap results in a parasitic capacitance Gs between the gate and the source. In addition, the pixel 20 further includes a storage capacitor SC connected between the liquid crystal cell LC and a scanning line GL 1 'The storage valley SC is used to reduce the influence of the leakage current on the voltage of the liquid crystal LC cell, that is, used to Assist the liquid crystal cell LC to store charge.
由於施加於 -定的關係,因 在液晶單元LC上 光穿透度,再配 定之畫面。而施 CE與像素電極之 像素電極並未連 (floating)狀態 動,將會透過寄 電壓,因而使得 定之值。而此電 voltage, VFD), 液晶單元LC上 此只要依據所 的電壓,即可 合以均勻的光 加在液晶單元 間的電壓差, 接至任何電壓 ’此時像素電 生的電容而耦 施加在液晶單 壓變動量稱為 其可表示為: 的電壓 要顯示 將各個 源,便 LC上的 當薄膜 源,而 極的周 合至像 元LC上 饋路流 與光的穿透度具有 的畫面來控制施加 像素設定在適當的 可使顯示器產生預 電昼係為共通電極 電晶體TFT關閉時, 處在浮動 圍若有任何電壓變 素電極,並改變其 的電壓偏離原先設 電壓(f eed-through (1)Because it is applied to the fixed relationship, the light transmittance in the liquid crystal cell LC is reconfigured. However, if the CE and the pixel electrode of the pixel electrode are not in a floating state, they will pass the voltage, thus making it a fixed value. And this voltage (VFD), as long as the voltage on the liquid crystal cell LC can be combined with a uniform light voltage difference between the liquid crystal cells, connected to any voltage 'at this time the capacitance of the pixel electricity is coupled and applied The amount of change in the single voltage of the liquid crystal is called: it can be expressed as: The voltage to be displayed will be each source, which will be the thin film source on the LC, and the pole's circumference will be the same as the feed current and light transmission on the pixel LC. The picture is used to control the application pixel settings. When the display can be pre-powered, the common electrode is a common electrode. When the transistor TFT is turned off, if there is any voltage-varying electrode in the floating area, and its voltage deviates from the original set voltage (f eed -through (1)
Vfd=[Cgs/(clc+csc+cgs)]*A V 蚀/· ί I Ξ ί (1)内的Cl為液晶單元“之電容,Cse% =ί ί雪*,5谷,CG為薄膜電晶體TFT之閘極與源極間 ' .^ ^ V刺為施加於掃描線上之脈衝電壓之振 幅。〆般而=,經由調整共通電極CE之電壓便可以消除 V F所邊^之衫響’然而由於掃描線内的電阻及電容效 應,使得施加於掃描線上之脈衝電壓之負緣(f a丨丨丨ng edge)會有圓角化(rounded)的情形,因而造成Vfd會隨著 像素膝離掃彳田線的輸入端(input end)越遠而越小,也就Vfd = [Cgs / (clc + csc + cgs)] * AV etch / · ί I Ξ ί (1) Cl is the capacitance of the liquid crystal cell, Cse% = ί Snow *, 5 valleys, CG is a thin film capacitor Between the gate and the source of the crystal TFT '. ^ ^ V is the amplitude of the pulse voltage applied to the scanning line. Generally =, by adjusting the voltage of the common electrode CE, the shirt sound of VF can be eliminated. However, Due to the resistance and capacitance effects in the scanning line, the negative edge of the pulse voltage applied to the scanning line will be rounded, so Vfd will be swept away from the pixel knee. The farther and smaller the input end of the Putian line, the smaller
594347 五、發明說明(4) 是說,圖一所示之像素A、B與C的V F钓關係將為(V FD) A> (V FD) B> ( V FD) c。因此,所有像素的V F所造成的影響便很難 經由調整共通電極CE之電壓而消除,此將導致液晶顯示 面板1 0產生晝面閃爍(f 1 i c k e r )的情形。 另一方面,由於掃描線驅動電路1 6内的匯流線1 7具 有相當大的電阻值,因此當一脈衝電壓自匯流線1 7輸入 各該驅動積體電路晶片時9各該驅動積體電路晶片之輸 入電壓會有所不同,進而導致各該驅動積體電路晶片的 輸出電壓之波形(waveform)不同。例如,如圖三所示, 驅動積體電路晶片1 6 a所輸出的電壓差(△ V GA)最高,驅動 積體電路晶片1 6 b所輸出的電壓差(△ V GB’)次之,而驅動 積體電路晶片1 6c所输出的電壓差(△ VGC’)再次之,因而 造成V FD會隨著像素距離資料線的輸入端(input end)越遠 而越小,亦即圖一所示之像素A、B’與C’的V F#j關係為 (V FD) A> ( V FD) B > ( V FD) C ’因而導致畫面產生閃燦的情形’降 低液晶顯示面板的顯示品質。 發明内容 本發明的目的是提供一種低閃爍液晶顯示面板,並 使該液晶顯示面板内的各個像素均具有約略相同的V FD, 以改善前述之缺失。594347 V. Description of the invention (4) It means that the V F fishing relationship of the pixels A, B and C shown in Fig. 1 will be (V FD) A > (V FD) B > (V FD) c. Therefore, it is difficult to eliminate the influence caused by the V F of all pixels by adjusting the voltage of the common electrode CE, which will cause the liquid crystal display panel 10 to produce a day-to-day flicker (f 1 i c k e r). On the other hand, since the bus lines 17 in the scan line driving circuit 16 have a relatively large resistance value, when a pulse voltage is input from the bus line 17 to each of the driving integrated circuit chips, each of the driving integrated circuits is 9 The input voltage of the chip will be different, which will result in different waveforms of the output voltage of each driving integrated circuit chip. For example, as shown in FIG. 3, the voltage difference (△ V GA) outputted by driving the integrated circuit chip 16 a is the highest, and the voltage difference (△ V GB ') outputted by driving the integrated circuit chip 16 b is the second, The voltage difference (△ VGC ') output by the driving integrated circuit chip 16c is the same again, thus causing V FD to decrease as the pixel is farther away from the input end of the data line, which is shown in Figure 1. The VF # j relationship between the pixels A, B ', and C' is shown as (V FD) A > (V FD) B > (V FD) C 'Thus causing the screen to flicker.' Reduce the display of the LCD panel quality. SUMMARY OF THE INVENTION An object of the present invention is to provide a low-flicker liquid crystal display panel, and each pixel in the liquid crystal display panel has approximately the same V FD to improve the aforementioned defects.
第11頁 594347 五 發明說明(5) 種 下 且 得 依據本發明之目的,本 ^ 液晶顯示面板,該液晶二明的較佳實施例係提供〜 基板以及複數個像素設i = 有一上基板、一 各該像素至少包含有一補俨二板/、忒下基板之間, 一約略相同之饋路流電壓,以=丨、=來使各該像素獲 閃爍效應。 減〉、該液晶顯示面板之 由於本發明係於各像素内加入一 補償電容係由各該像素電極與 =電令’而各該 描線所重疊的重疊區域所組^‘巧===應之掃 容值,以達到使各該像素二=電 面板之顯示品質。 徒升液日日顯示 實施方式 請參考圖四,圖四係為本發明之液晶顯 效電路圖。如圖四所示,等效電路4〇至少包人 反之等 聰C,而像素a、B與C的位置係分別對應於圖^有像-素A、 素A、B與C。像素A包含有一液晶單元LC與一壤腊、示之像 T a,液晶單元LC係由一像素電極、一共通電極、電晶體 液晶分子層所組成,因此液晶單元L c可視為°一 E曰以及一 容’而薄膜電晶體T具有一閘極連接至掃描線&晶= 極連接至資料線DL{)、以及一源極連接至液曰、 Q、一沒 队日日早7L LC的像Page 11 594347 Fifth invention description (5) According to the purpose of the present invention, the present invention is a liquid crystal display panel. The preferred embodiment of the liquid crystal display is to provide a substrate and a plurality of pixels. I = has an upper substrate, Each of the pixels includes at least one supplementary second plate / lower substrate, and a substantially the same feed current voltage, so that each pixel has a flicker effect. Less> Because the present invention is to add a compensation capacitor to each pixel, the liquid crystal display panel is composed of each pixel electrode and = electric order 'and each overlapping area where the traces overlap. Sweep the capacitance value to achieve the display quality of each pixel two = electric panel. Zoom liquid day and day display Embodiment Please refer to FIG. 4, which is a liquid crystal display circuit diagram of the present invention. As shown in Figure 4, the equivalent circuit 40 at least includes people and vice versa, and the positions of the pixels a, B, and C correspond to the pixels-pixels A, A, B, and C, respectively. The pixel A includes a liquid crystal cell LC, a wax, and an image T a. The liquid crystal cell LC is composed of a pixel electrode, a common electrode, and a liquid crystal molecular layer of the transistor. Therefore, the liquid crystal cell L c can be regarded as ° -E. And a capacitor 'while the thin film transistor T has a gate connected to the scan line & crystal = pole connected to the data line DL (), and a source connected to the liquid, Q, and a 7L LC image
594347 五、發明說明(6) 素電極,並且由於該閘極與該源極部份重疊,因而形成 一寄生電容GS於該閘極與該源極之間。此外,像素A另包 含有一補償電容C’ A與一儲存電容SCA,補償電容C’ #連 接液晶單元LC之像素電極與掃描線GL〇,而儲存電容SC則 連接液晶單元LC之像素電極與掃描線GL r 相同地,像素B包含有一液晶單元LC、一薄膜電晶體 TB、一儲存電容SCB、以及一補償電容C’ b,並且薄膜電晶 體T妁閘極與源極係部份重疊,因而產生一寄生電容 GSB。而像素C則是由一液晶單元LC、一薄膜電晶體Tc、一 儲存電容SCc、以及一補償電容C’所組成,由於薄膜電晶 體T妁閘極與源極係部份重疊,因此像素C還具有一寄生 電容GSC。 如圖四所示,由於各補償電容C’ a、C’與C’ df系分別與 電容GSA、GS與GS在聯,因此方程式(1)可改寫成下式: V FD= [ ( C GS+ C ) / ( C LC+ C SC+ C GS+ C ) ] *△ V G ( 2 ) 其中C為補償電容C’之電容。一般而言,在方程式 (1 )與方程式(2)中,儲存電容SC與液晶單元LC的電容皆 約為寄生電容GS與補償電容C’的數十倍,也就是說,Csc, CLC >> C GS, C,因此,方程式(2 )又可簡化成下式:594347 V. Description of the invention (6) A prime electrode, and since the gate and the source partially overlap, a parasitic capacitance GS is formed between the gate and the source. In addition, the pixel A further includes a compensation capacitor C ′ A and a storage capacitor SCA. The compensation capacitor C ′ # is connected to the pixel electrode of the liquid crystal cell LC and the scan line GL0, and the storage capacitor SC is connected to the pixel electrode of the liquid crystal cell LC and the scan. The line GL r is the same, the pixel B includes a liquid crystal cell LC, a thin film transistor TB, a storage capacitor SCB, and a compensation capacitor C ′ b, and the thin film transistor T 妁 gate and the source system partially overlap, so Generate a parasitic capacitance GSB. The pixel C is composed of a liquid crystal cell LC, a thin-film transistor Tc, a storage capacitor SCc, and a compensation capacitor C '. Since the thin-film transistor T 妁 gate and the source system partially overlap, the pixel C It also has a parasitic capacitance GSC. As shown in Figure 4, since the compensation capacitors C'a, C ', and C'df are connected to the capacitors GSA, GS, and GS, respectively, equation (1) can be rewritten as: V FD = [(C GS + C) / (C LC + C SC + C GS + C)] * △ VG (2) where C is the capacitance of the compensation capacitor C ′. In general, in equations (1) and (2), the capacitances of the storage capacitor SC and the liquid crystal cell LC are about several tens of times the parasitic capacitance GS and the compensation capacitance C ', that is, Csc, CLC > > C GS, C, so equation (2) can be simplified into the following formula:
第13頁 594347 五、發明說明(7) V FD= [ (。GS+ C ) / ( C lc+ C sc) ] *△ V G ( 3 ) 如圖四與方程式(3 )所示,由於掃描線G L朽的電阻及 電容效應(如前所述)^ 若使(C GS) ( C GS) B= ( C GS) C、( C SC) A= (C SC) B= ( C SC) C、( C lc) A= ( C LC) B= ( C LC)與 C a= C C c’ 則像素 A、B 與C的V f約關係將為(V fd) a〉( V fd) ( V fd) C’而此將導致液晶 顯示面板產生晝面閃爍的情形。因此,為了降低液晶顯 示面板產生晝面閃爍的情形,則必須讓像素A、B與C的V FD 約略相同,而根據方程式(3 ),可藉由調整各像素的補償 電容C ’、閘極與源極間的寄生電容C cs、或是儲存電容 C sc,來達到讓各像素的V FI^j略相同之目的,而調整的方 式為: (1 )如方程式(3 )所不 5 當 C A〈 C B< C c、( C GS) A= ( C GS) B= ( C GS) C、Page 13 594347 V. Description of the invention (7) V FD = [(. GS + C) / (C lc + C sc)] * △ VG (3) As shown in Figure 4 and equation (3), because the scanning line GL decays Resistance and capacitance effects (as described above) ^ If (C GS) (C GS) B = (C GS) C, (C SC) A = (C SC) B = (C SC) C, (C lc) A = (C LC) B = (C LC) and C a = CC c 'Then the approximate relationship between V f of pixels A, B and C will be (V fd) a> (V fd) (V fd) C 'And this will cause the day and night flicker of the LCD panel. Therefore, in order to reduce the occurrence of daytime flicker in the LCD panel, the V FD of the pixels A, B and C must be made about the same. According to equation (3), the compensation capacitance C ′ and gate of each pixel can be adjusted. The parasitic capacitance C cs between the source and the storage capacitance C sc is used to achieve the purpose of making V FI ^ j of each pixel slightly the same, and the adjustment method is: (1) as shown in equation (3) CA <C B < C c, (C GS) A = (C GS) B = (C GS) C,
(C SC) A: ( C SC) B= ( C SC)與(C LC) A= ( C LC) B= ( C LC) C’ 貝丨J 像素 A、B與 C 的V F妁關係可為(V FD) A« ( V FD) B« ( V FD) c。因此,若使補償電 容c ’的電容c隨著像素距離掃描線的輸入端越遠而漸增, 可使各像素的V F約略相同。 (2 )如方程式(3 )所不,當(C GS) A< C GS) B〈( C GS) C、C A= C C C、 (c SC) Α= ( C SC) Β= ( C SC)與(C LC) Α= ( C LC) Β= ( C LC) C’ 同樣可使像素 A、B與C的V F的關係為(V FD) ( V FD) ( V FD) C。所以,右使 寄生電容G S的電容C 遺著像素距離掃描線的輸入端越遠 而漸增,則可使各像素的V F釣略相同。(C SC) A: (C SC) B = (C SC) and (C LC) A = (C LC) B = (C LC) C ′ Be J The VF 妁 relationship between pixels A, B and C can be (V FD) A «(V FD) B« (V FD) c. Therefore, if the capacitance c of the compensation capacitance c 'is gradually increased as the pixel is further away from the input end of the scanning line, the V F of each pixel can be made approximately the same. (2) As shown in equation (3), when (C GS) A < C GS) B <(C GS) C, CA = CCC, (c SC) Α = (C SC) Β = (C SC) and (C LC) Α = (C LC) Β = (C LC) C ′ can also make the relationship of VF of pixels A, B, and C to (V FD) (V FD) (V FD) C. Therefore, if the capacitance C of the parasitic capacitance G S of the left pixel increases from the input end of the scanning line and increases, the V F of each pixel can be made slightly the same.
第14頁 594347Page 594347
五、發明說明(8) (3)如方程式(3)所示,當(CsV. Description of the invention (8) (3) As shown in equation (3), when (Cs
B (C GS) A= ( C GS) B= ( C GS)與(C Lc) A= ( C ) ^ B ( C sc) C、C 广 C B: C c、 與C的VF的關係為(VFD), (v LC)C,亦可使像素a、 漸 電容sc的電容cs隨著像辛距二L J :D) c。因此’若使儲存 減,各像素的VF也會約描線的輸入端越遠而 (1)、方式(2)與方式(3) 的V F約略相同之目的。 方式。 值得一提的是,上述之方式 還可彼此搭配’以達到讓各像素 以下說明係為本發明之具體實施 請參考圖五(A),、圖五(B),圖五(A)與圖五(B)係為 本發明之第一實施例之像素陣列上視圖,而本發明之第 一實施例的設計即是根據上述之方式(丨)。如圖五(A )所 示,一像素陣列5 0至少包含有一掃描線5 2電連接至一掃 描線驅動電路54、以及資料線56a〜56c電連接至一資料線 驅動電路(未顯示)。另外,像素陣列5 0另包含有像素a、 B與C,而像素A、B與C内分別包含有薄膜電晶體τ A、T與T c 以及其相對應之液晶單元(未顯示)。其中,薄膜電晶體 T A、T與T钓汲極6 2 a、6 2 b與6 2 c分別與資料線5 6 a、5 6 b與 5 6c相連接,源極64a、64b與64c則分別與液晶單元之像 素電極58a、58b與58c相連接,而閘極60a、60b與60c則 分別與掃描線5 2相連接,並且各閘極與各源、汲極間還 分別設有半導體層66a、66b與66c。B (C GS) A = (C GS) B = (C GS) and (C Lc) A = (C) ^ B (C sc) C, C, CB: C c, and the relationship between V and C is ( VFD), (v LC) C, can also make the capacitance c of the pixel a and the gradual capacitance sc follow the image distance LJ: D) c. Therefore, if the storage is reduced, the VF of each pixel will be about the farther away from the input end of the drawing line, and the VF of (1), mode (2) and mode (3) will be about the same purpose. the way. It is worth mentioning that the above methods can also be matched with each other to achieve each pixel. The following description is a specific implementation of the present invention. Please refer to FIG. 5 (A), FIG. 5 (B), FIG. 5 (A) and FIG. Fifth (B) is a top view of a pixel array according to the first embodiment of the present invention, and the design of the first embodiment of the present invention is based on the above-mentioned manner (丨). As shown in FIG. 5 (A), a pixel array 50 includes at least one scanning line 52 electrically connected to a scanning line driving circuit 54 and data lines 56a to 56c electrically connected to a data line driving circuit (not shown). In addition, the pixel array 50 further includes pixels a, B, and C, and the pixels A, B, and C respectively include thin-film transistors τ A, T, and T c and corresponding liquid crystal cells (not shown). Among them, the thin-film transistors TA, T, and T fishing drain electrodes 6 2 a, 6 2 b, and 6 2 c are respectively connected to the data lines 5 6 a, 5 6 b, and 5 6c, and the source electrodes 64a, 64b, and 64c are respectively The pixel electrodes 58a, 58b, and 58c of the liquid crystal cell are connected, and the gate electrodes 60a, 60b, and 60c are connected to the scanning line 52 respectively, and a semiconductor layer 66a is provided between each gate and each source and drain. , 66b and 66c.
第15頁 594347 五、發明說明(9) A、另包含有重疊區域68a、68b與68c,其 田f $區域6 8 a係為閘極6 〇 a與源極6 4 a重疊的部份,而重 登^域68b與68c則分別為閘極6〇b、60c與源極64b及64c 重$的部份。除此之外,像素電極58a、58b與58c還分別 包含有延伸部份69a、69b與69c,並且延伸部份69a、69b 與6 9 c均與掃描線5 2部份重疊,而形成重疊區域7 〇 a、7 0 b 與7〇c,需注意的是,重疊區域7〇a、7〇1)與^仏的面積係 呈遞增變化。 在本實施例中,重疊區域68a、6 8b與6 8c係分別對應 於圖四所示之寄生電容GSA、GS與GSC,並且重疊區域 6 8&'681)與68(3的面積約略相等,因此使得((^)卢((^)尸 (c gs) c。再者,重疊區域7 0 a、7 0 b與7 0 c係分別對應於圖四 所示之補償電容C,A、C,與C,c,由於重疊區域70a、70b與 7 0c的面積係逐漸增加,因此補償電容c,a、c,與C,約電 容值C A、C與C係呈遞增變化(亦即c A<C B<C c),因而可使像 素A、B與C的V F趵略相同。並且,由於各像素電極與掃描 線之間的空間寬大,因此針對大尺寸的液晶顯示面板而 言’各像素電極與掃描線之間具有足夠的空間來設置重 豐區域70a、70 b與7 0 c,以使各像素的V F約略相同。 此外,本發明之第一實施例之實施方式並不限於圖 五(A )所示,圖五(B )所示即為本發明之第一實施例的另Page 15 594347 V. Description of the invention (9) A. It also contains overlapping areas 68a, 68b, and 68c. The field f $ area 6 8 a is the part where the gate electrode 6 〇a and the source electrode 6 4 a overlap, and The re-entry domains 68b and 68c are parts of gate 60b, 60c and source 64b and 64c, respectively. In addition, the pixel electrodes 58a, 58b, and 58c also include extensions 69a, 69b, and 69c, respectively, and the extensions 69a, 69b, and 6 9c all overlap with the scanning line 5 2 to form an overlapping area. 70a, 70b, and 70c. It should be noted that the areas of the overlapping areas 70a, 701) and ^ 仏 are increasing. In this embodiment, the overlapping regions 68a, 68b, and 68c respectively correspond to the parasitic capacitances GSA, GS, and GSC shown in FIG. 4, and the areas of the overlapping regions 6 8 & '681) and 68 (3 are approximately equal, Therefore, ((^) Lu ((^) corpse (c gs) c. Furthermore, the overlapping areas 7 0 a, 7 0 b, and 7 0 c respectively correspond to the compensation capacitors C, A, and C shown in FIG. 4 , And C, c, because the areas of the overlapping areas 70a, 70b, and 70c gradually increase, so the compensation capacitances c, a, c, and C, about the capacitance values CA, C, and C are increasing (that is, c A < C B < C c), so that the VF of the pixels A, B, and C can be made slightly the same. Moreover, since the space between each pixel electrode and the scanning line is wide, it is There is enough space between the pixel electrode and the scanning line to set the heavy areas 70a, 70b, and 70c so that the VF of each pixel is approximately the same. In addition, the implementation of the first embodiment of the present invention is not limited to the drawings 5 (A), and FIG. 5 (B) shows another embodiment of the first embodiment of the present invention.
第16頁 594347 五、發明說明(ίο) 一種實施方式。如圖五(B )所示,在像素陣列5 0中,掃描 線5 2上包含有延伸部份7 1 a、7 1 b與7 1 c,而延伸部份 71a、71b與71c係分別位於像素電極58a、58b與58c的下 側,並分別與像素電極58a、58b與58c重疊而形成重疊區 域72a、72b與72c,且重疊區域72a、72b與72c的面積係 逐漸增加。另外,在廣視角液晶顯示器的應用中,例如 垂直配向(vertical alignment)液晶,常設置有規制手 段(regulating means),例如突起結構(protrusion), 用以規範液晶的配向,以增進廣視角的效果。因此,當 應用於上述顯示器時,像素電極58a、58b與58c的上侧另 可分別設置有突起結構(protrusion)73a、73 b與7 3 c,而 由於突起結構7 3 a〜7 3 c係用來避免掃描線5 2的延伸部份 7 1 a〜7 1 c的電場干擾液晶分子的排列方向,因此突起結構 7 3a、7 3b與7 3 c係分別遮蓋部份的延伸部份71a、7 lb與 71c。在本發明之其他實施例中,突起結構73a〜7 3c也可 以設置在一共通電極(未顯示)上,該共通電極係設於一 上基板上,而該上基板係與設有像素陣列5 0的下基板平 行相對。一般而言,突起結構7 3 a〜7 3 c係由光阻材料所構 成。 重疊區域6 8 a、6 8 b與6 8 c係分別對應於圖四所示之電 容GSA、GS與GSC,而重疊區域72a、72b與72c則分別對應 於圖四所示之補償電容C’ A、C’與C’ c。如圖五(B)所示, 重疊區域72a、72 b與7 2 c的面積係逐漸增加,因此補償電Page 16 594347 V. Description of the Invention (ίο) An embodiment. As shown in FIG. 5 (B), in the pixel array 50, the scanning line 5 2 includes extensions 7 1 a, 7 1 b, and 7 1 c, and the extensions 71a, 71b, and 71c are respectively located at Below the pixel electrodes 58a, 58b, and 58c, they overlap with the pixel electrodes 58a, 58b, and 58c to form overlapping regions 72a, 72b, and 72c, and the areas of the overlapping regions 72a, 72b, and 72c gradually increase. In addition, in the application of a wide-viewing angle liquid crystal display, for example, vertical alignment liquid crystals are often provided with regulating means, such as protrusions, to regulate the alignment of the liquid crystal to improve the effect of the wide viewing angle. . Therefore, when applied to the above display, the pixel electrodes 58a, 58b, and 58c may further be provided with protrusions 73a, 73b, and 73c on the upper side, respectively. It is used to prevent the electric field of the extended portion 7 1 a ~ 7 1 c of the scanning line 5 2 from interfering with the alignment direction of the liquid crystal molecules. Therefore, the protruding structures 7 3a, 7 3b, and 7 3 c respectively cover the extended portions 71a, 7 lb and 71c. In other embodiments of the present invention, the protruding structures 73a to 7c may also be disposed on a common electrode (not shown). The common electrode is provided on an upper substrate, and the upper substrate is provided with a pixel array 5 The lower substrates of 0 face each other in parallel. Generally speaking, the protruding structures 7 3 a to 7 3 c are made of a photoresist material. The overlapping areas 6 8 a, 6 8 b, and 6 8 c correspond to the capacitors GSA, GS, and GSC shown in Fig. 4, respectively, and the overlapping areas 72a, 72b, and 72c correspond to the compensation capacitors C 'shown in Fig. 4, respectively. A, C 'and C' c. As shown in FIG. 5 (B), the areas of the overlapping regions 72a, 72b, and 7 2c gradually increase, so the compensation power
第17頁 594347 、發明說明(11) =C A、C’與C’妁電容值CA、C與c犀遞增變化(亦即CA<CB c) ’所以可使像素A、B與〇的v ρ釣略相同。Page 17 594347, description of the invention (11) = CA, C 'and C' 妁 The capacitance values CA, C, and c are gradually changed (that is, CA < CB c) 'so that v of the pixels A, B, and 0 can be ρ Fishing is slightly the same.
Pi ^明參考圖六,圖六係為本發明之第二實施例之像素 I上視圖,而本發明之第二實施例係結合上述之方式 I 〃方式(2 )。如圖六所示,像素陣列5 0係包含有區域I ^ =域I I ’其中像素A、Β與C係位於區域I,而薄膜電晶 一 TA、T與T妁閘極60a、601)與6〇c分別包含有區塊67&、 b與6 7c,並且區塊67a、671)與67c位於重疊區域68心 b與68c内:且區塊67a、67b與67c的面積係呈遞增變 匕,而使重疊區域68a、68b與68c的面積逐漸增加。 在本發明之第二實施例中,重疊區域68a、68b與68c ,,應於圖四所示之電容GSa、GS與GSc。如圖六所示,重 ,區域68a、68b與68c的面積呈遞增變化,因此電容gS、 GS妁電容值關係為(Cgs)a<Cgs)b<(Cg 以 a B與C的Vf約略相同。也就是說,區域丨内的像素U素 3 =二閘極與源極間之寄生電容Cgs,以使區曰 的V F鈞略相同。 )分1豕畜 此外,由 整各像素的寄 板的需求。因 5〇另包含有區 於受限於閘極 生電容GS,並 此,在本發明 域I I,而位於 與源極的尺寸 無法因應大尺 之第二實施例 區域I I的像素 關係’藉由調 寸液晶顯示面 中,像素陣列 (未顯示)則是 594347Pi ^ refers to FIG. 6, which is a top view of a pixel I of the second embodiment of the present invention, and the second embodiment of the present invention is combined with the above-mentioned manner I 〃 mode (2). As shown in FIG. 6, the pixel array 50 includes a region I ^ = domain II ', where pixels A, B, and C are located in region I, and a thin film transistor (TA, T, and T 妁 gate electrodes 60a, 601) and 6〇c contains blocks 67 &, b, and 6 7c, respectively, and blocks 67a, 671) and 67c are located in the overlapping areas 68 and b and 68c: and the areas of blocks 67a, 67b, and 67c are gradually increasing. , And gradually increase the area of the overlapping regions 68a, 68b, and 68c. In the second embodiment of the present invention, the overlapping regions 68a, 68b, and 68c should be the capacitors GSa, GS, and GSc shown in FIG. As shown in Figure 6, the area of the areas 68a, 68b, and 68c changes gradually. Therefore, the relationship between the capacitances gS, GS, and the capacitance value is (Cgs) a < Cgs) b < In other words, the pixel U in the region 丨 3 = the parasitic capacitance Cgs between the second gate and the source, so that the VF of the region is slightly the same. Demand. Because 50 also includes a pixel relationship restricted by the gate-generated capacitance GS, and in the domain II of the present invention, the pixel relationship between the second embodiment region II and the size of the source electrode cannot correspond to the large scale. In the adjusted LCD display surface, the pixel array (not shown) is 594347.
由調整各像素的補償電容C,,以使位於區域丨丨的各 的V F約略相同,且位於區域丨丨的像素結構可參考第 施例,因此不再贅述 請參考圖七,圖七係為本發明之第三實施例之像素 陣列上視圖,而本發明之第三實施例係結合上述之方式 (1)與方式(3)。如圖七所示,像素A、包含有重疊區 域70a、70b與70c,像素電極58a、581)與58〇:分別包含"有。 延1部份69a、69b與69c,重疊區域70a即為延伸部份69a =掃描線52重疊的部份,而重疊區域7〇b與7〇c則分別為 掃描線5 2與延伸部份6 9 b及6 9 c重疊的部份,並且重疊區 域7 0 a、7 0 b與7 0 c的面積係逐漸增加。此外,像素A、B與 C另包含有重疊區域74a、74b與74c,而重疊區域74a、/、 74=與74c係分別為像素電極58a、58b與58c與掃描線52a 重疊的部份’並且重疊區域74a的面積大於重疊區域 74b,而重疊區域74b的面積大於重疊區域74c。 少在本發明之第三實施例中,重疊區域74a、74b與74c 係對應於圖四所示之儲存電容SCa、SC與SCc,而重疊、區域 7 a、7 0 b與7 0 c則分別對應於圖四所示之補償電容c,a、The compensation capacitor C of each pixel is adjusted so that the VFs in the regions 丨 丨 are approximately the same, and the pixel structure in the region 丨 丨 can refer to the embodiment, so no more details please refer to FIG. 7, which is A top view of a pixel array of a third embodiment of the present invention, and the third embodiment of the present invention combines the above-mentioned manner (1) and manner (3). As shown in FIG. 7, the pixel A includes the overlapping areas 70a, 70b, and 70c, and the pixel electrodes 58a, 581), and 58: each includes " yes. Extend 1 part 69a, 69b, and 69c. The overlapping area 70a is the extended part 69a = the part where the scanning line 52 overlaps, and the overlapping areas 70b and 70c are the scanning line 5 2 and the extended part 6 respectively. 9 b and 6 9 c overlap, and the areas of the overlapping areas 7 0 a, 7 0 b, and 7 0 c gradually increase. In addition, the pixels A, B, and C also include overlapping regions 74a, 74b, and 74c, and the overlapping regions 74a, /, 74 =, and 74c are portions where the pixel electrodes 58a, 58b, and 58c overlap with the scanning line 52a, respectively; and The area of the overlapping area 74a is larger than the area of the overlapping area 74b, and the area of the overlapping area 74b is larger than the area of the overlapping area 74c. In the third embodiment of the present invention, the overlapping regions 74a, 74b, and 74c correspond to the storage capacitors SCa, SC, and SCc shown in FIG. 4, and the overlapping, regions 7a, 70b, and 70c are respectively Corresponding to the compensation capacitors c, a,
C’與C’ c。如圖七所示,重疊區域7〇a、7〇1)與7〇c的面積 呈遞增變化’ ^此補償電容C,A、C,與C,钓電容值關係為 CA<CB<Cc’而重$區域74a、74b與74c的面積係逐漸減少, 因此儲存電容SCa' SC與SC钓電容值關係為(Csc) a>(csc)b>C 'and C' c. As shown in FIG. 7, the areas of the overlapping areas 70a, 701) and 70c are increasing gradually. ^ The relationship between the compensation capacitors C, A, C, and C, and the value of the fishing capacitor is CA < CB < Cc '. The areas of the heavy regions 74a, 74b, and 74c gradually decrease, so the relationship between the storage capacitance SCa ′ SC and the SC fishing capacitance value is (Csc) a > (csc) b >
第19頁 594347Page 594 347
(CsC)C,所以可使像素A、像素B與像素C的略相同 此外,儲存電 壓的影響,並協助 越小則對協助液晶 存電容的電容無法 則會藉由調整各像 略相同,因此本發 約略相同,更可避 何的能力。 谷係用來減少漏電 ^晶單元儲存電荷 單元儲存電荷的能 再繼續減少時,本 素的補償電容C,, 明之第三實施例不 免降低儲存電容協 流對液晶單元的電 ,儲存電容的電容 力越低。因此當儲 發明之第三實施例 以使各像素的V FI^J 僅可使各像素的V FD 助液晶单元儲存電(CsC) C, so that the pixels A, B, and C can be made slightly the same. In addition, the influence of the storage voltage and the smaller the assistance is, the smaller the capacitance of the liquid crystal storage capacitor cannot be, and the images are slightly adjusted by adjusting, This hair is about the same, what ability can be avoided. The valley system is used to reduce the leakage charge of the crystal unit. When the storage charge of the unit can continue to decrease, the compensation capacitor C of the element, the third embodiment of the invention inevitably reduces the storage capacitor co-current to the liquid crystal cell, and the storage capacitor's capacitance. The lower the force. Therefore, when the third embodiment of the invention is stored, the V FI ^ J of each pixel can only make the V FD of each pixel assist the liquid crystal cell to store electricity.
於同 同一 發明 計是 含有 84> 及像 圖一 有薄 示) 分別 白h單The same invention is calculated to contain 84 > and is shown in Figure 1)
2 Ϊ ί的是,本發明之第一至第三實.施例係針對位 二掃描線上的各個像素,然而本發明亦可應用在 ^二料線上的各個像素。請參考圖八,圖八係為本 ί四實施例之像素陣列上視圖,而本實施例的設 …上述之方式(1 )。如圖八所示,一像素陣列8 0包 =數條掃描線82a與82b電連接至一掃描線驅動電路 J料線8 6 a與8 6 b電連接至一資料線驅動電路8 8、以 的A、B’與C’,而像素A、B,與C,的位置分別對應於 :像素A、B’與C’。其中像素a、B,與C,内分別包含 。膜電晶體T A、T B,與T C,以及其相對應之液晶單元(未^ °亚、且薄膜電晶體1^、1\,與17之汲極94&、941)與94 與賁料線86a相連接,源極96a、96b與9 6c分別與液 元之像素電極9 0 a ' 9 0 b與9 0 c4目連接,而閘極9 2 a、2) The first to third embodiments of the present invention are directed to each pixel on the second scanning line. However, the present invention can also be applied to each pixel on the second material line. Please refer to FIG. 8. FIG. 8 is a top view of a pixel array according to the fourth embodiment, and the design of this embodiment is the manner (1) described above. As shown in FIG. 8, a pixel array 80 packet = several scanning lines 82 a and 82 b are electrically connected to a scanning line driving circuit J material lines 8 6 a and 8 6 b are electrically connected to a data line driving circuit 8 8. The positions of A, B ', and C', and the pixels A, B, and C, respectively correspond to: pixels A, B ', and C'. The pixels a, B, and C respectively contain. Membrane transistors TA, TB, and TC, and their corresponding liquid crystal cells (not ^ °, and thin film transistors 1 ^, 1 \, and the drain electrodes 94 &, 941 of 17) and 94 and the material line 86a Are connected, the source electrodes 96a, 96b, and 9 6c are connected to the liquid crystal pixel electrodes 9 0 a '9 0 b and 9 0 c4, respectively, and the gate electrodes 9 2 a,
第20頁 594347 發明說明(14) 92b與92c則分別與各掃描線82a相連接,另外,各閘極與 各源、汲極間還分別設有半導體層98a、98b與98c。 另一方面,像素電極90a、90 b與90 c各包含有延伸部 份99a、99b與99c,並且延伸部份99a、99b與99c均與各 掃描線8 2 a部份重疊,而形成面積逐漸增加的重疊區域 1 〇 〇 a、1 〇 〇 b與1 〇 〇 c。此外,像素電極9 0 a、9 0 b與9 0 c分別 與各掃描線82 b重疊於重疊區域l〇2a、102 b與102c,而形 成像素A、B’與C’之儲存電容。 在本發明之第四實施例中,重疊區域1 〇 〇 a、1 〇 〇 b斑 10^係分別對應於補償電容C,A、c,^ C,c(未顯示)。由'於 重疊區域重疊區域l〇〇a、1〇01;)與1〇(^的面積呈遞增變 化,而使相對應的補償電容C,A、C,與c,钓電容的關係為 CA<CB <Cc’,進而可使像素A、『與c,的Vp的關係為(vw ,(V FD) B,《 ( V FD) c,。 此外,在本發明之第四實施例中,各重疊區域 100a、100b與100c的形成亦可利用各掃描線82a延伸至 像素電極90a、90b與90c之下侧,以達到本實施例之目 的。Page 20 594347 Description of the invention (14) 92b and 92c are connected to the scanning lines 82a, respectively. In addition, semiconductor layers 98a, 98b, and 98c are respectively provided between each gate and each source and drain. On the other hand, the pixel electrodes 90a, 90b, and 90c each include extensions 99a, 99b, and 99c, and the extensions 99a, 99b, and 99c all overlap with each of the scanning lines 8 2a, and the area gradually forms. Increased overlapping areas 100a, 100b, and 1000c. In addition, the pixel electrodes 90a, 90b, and 90c are overlapped with the scanning lines 82b in the overlapping areas 102a, 102b, and 102c, respectively, and form the storage capacitances of the pixels A, B ', and C'. In the fourth embodiment of the present invention, the overlapping regions 100a and 100b are respectively corresponding to the compensation capacitors C, A, c, ^ C, c (not shown). The area of the overlapping areas 100a, 1001;) and 10 (^) in the overlapping area changes gradually, so that the relationship between the corresponding compensation capacitors C, A, C, and c, and the fishing capacity is CA <; CB < Cc ', which can further make the relationship between the pixel A, Vp and c, be (vw, (V FD) B, "(V FD) c. In addition, in the fourth embodiment of the present invention For the formation of each of the overlapping regions 100a, 100b, and 100c, each scanning line 82a can also be used to extend below the pixel electrodes 90a, 90b, and 90c to achieve the purpose of this embodiment.
相較於習知技術,本發明係於各像素内加入一補 電谷,而各該補償電容係由各該像素電極與各該像素電Compared with the conventional technology, the present invention is to add a compensation valley in each pixel, and each of the compensation capacitors is electrically connected to each of the pixel electrodes and each of the pixels.
594347 五、發明說明(15) 極所對應之掃描線所重疊的重疊區域所組成,並藉由調 整各該補償電容的電容值,以達到使各該像素之V F約略 相同之目的,並減少液晶顯示面板之閃爍效應,進而提 升液晶顯示面板之顯示品質。 以上所述僅為本發明之較佳實施例,凡依本發明申 請專利範圍所做之均等變化與修飾,皆應屬本發明專利 之涵蓋範圍。 «594347 V. Description of the invention (15) is composed of the overlapping area of the scanning lines corresponding to the poles, and the capacitance value of each compensation capacitor is adjusted to achieve the purpose of making the VF of each pixel approximately the same, and reducing the liquid crystal. The flicker effect of the display panel further improves the display quality of the liquid crystal display panel. The above description is only a preferred embodiment of the present invention, and any equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the patent of the present invention. «
第22頁 594347 圖式簡單說明 圖式之簡單說明 圖一為習知一薄膜電晶體液晶顯示面板的示意圖。 圖二則為一薄膜電晶體液晶顯示面板之單一像素的 等效電路示意圖。 圖三係為各該驅動積體電路晶片的輸出電壓之波形 示意圖。 圖四係為本發明之液晶顯不面板之等效電路圖。 圖五(A )與圖五(B )係為本發明之第一實施例之像素 陣列上視圖。 圖六係為本發明之第二實施例之像素陣列上視圖。 圖七係為本發明之第三實施例之像素陣列上視圖。 圖八係為本發明之第四實施例之像素陣列上視圖。 圖式之符號說明Page 22 594347 Brief description of the drawings Brief description of the drawings Figure 1 is a schematic diagram of a conventional thin film transistor liquid crystal display panel. Figure 2 is a schematic diagram of an equivalent circuit of a single pixel of a thin film transistor liquid crystal display panel. FIG. 3 is a waveform diagram of the output voltage of each driving integrated circuit chip. FIG. 4 is an equivalent circuit diagram of the liquid crystal display panel of the present invention. 5 (A) and 5 (B) are top views of a pixel array according to the first embodiment of the present invention. FIG. 6 is a top view of a pixel array according to a second embodiment of the present invention. FIG. 7 is a top view of a pixel array according to a third embodiment of the present invention. FIG. 8 is a top view of a pixel array according to a fourth embodiment of the present invention. Schematic symbol description
第23頁 10 TFT-LCD 12 下 基 板 14 像素 陣列區 16 掃 描 線 驅 動 電 路區 16a 、16b、 16c 驅動積 體 電 路 晶 片 17 匯流 線 18 資 料 線 驅 動 電 路區 20 像素 40 等 效 電 路 50、 80 像素陣 列 52^ 52a, ‘82a、 82b 掃 描 線 54、 84 掃描線 驅動 電路 594347Page 23 10 TFT-LCD 12 Lower substrate 14 Pixel array area 16 Scan line drive circuit area 16a, 16b, 16c Drive integrated circuit chip 17 Bus line 18 Data line drive circuit area 20 pixels 40 Equivalent circuit 50, 80 pixel array 52 ^ 52a, '82a, 82b scan line 54, 84 scan line drive circuit 594347
第24頁 圖式簡單說明 5 6a、 56b、 5 6c、 8 6a、 86b 資料線 58a、 58b、 58c、 9 0a、 90b" 90c 像素電極 6 0a、 60b、 6 0c、 92a、 92b、 92c 間極 62a、 62b、 62c、 94a〜 94b' 94c 及極 6 4a、 64b、 6 4c- 9 6a、 9 6 b、9 6 c 源極 6 6a、 66b、 6 6c、 98a、 98b、 98c 半導體層 67a、 67b、 67c 區塊 6 8a、 68b、 6 8c' 70a、 70b、 70c、 72a、 72b、 72c、 74a、 74b、 74c、 100a 、100b、 100c、 102a、 102b、 102c 重疊 區域 6 9a、 69b、 6 9c' 71a、 71b、 71c、 99a、 99b' 99c 延伸部分 8 8 資料線驅動電路Schematic description on page 24 5 6a, 56b, 5 6c, 8 6a, 86b Data lines 58a, 58b, 58c, 9 0a, 90b " 90c Pixel electrode 6 0a, 60b, 6 0c, 92a, 92b, 92c 62a, 62b, 62c, 94a ~ 94b '94c and electrode 6 4a, 64b, 6 4c- 9 6a, 9 6 b, 9 6 c source 6 6a, 66b, 6 6c, 98a, 98b, 98c semiconductor layer 67a, 67b, 67c Block 6 8a, 68b, 6 8c '70a, 70b, 70c, 72a, 72b, 72c, 74a, 74b, 74c, 100a, 100b, 100c, 102a, 102b, 102c overlapping area 6 9a, 69b, 6 9c '71a, 71b, 71c, 99a, 99b' 99c extension 8 8 data line drive circuit
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JP (1) | JP4078394B2 (en) |
KR (1) | KR100931876B1 (en) |
TW (1) | TW594347B (en) |
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CN100580536C (en) * | 2007-07-06 | 2010-01-13 | 昆山龙腾光电有限公司 | Array base plate for liquid-crystal display device and its production |
US7763891B2 (en) | 2008-01-09 | 2010-07-27 | Chunghwa Picture Tubes, Ltd. | Pixel structure and active device array substrate |
US7880841B2 (en) | 2006-12-01 | 2011-02-01 | Innocom Technology (Shenzhen) Co., Ltd. | Liquid crystal display panel having dielectric compensating layer |
CN102879967A (en) * | 2012-10-22 | 2013-01-16 | 深圳市华星光电技术有限公司 | Driving circuit of liquid crystal panel |
TWI393974B (en) * | 2009-06-25 | 2013-04-21 | Chunghwa Picture Tubes Ltd | Liquid crystal display panel |
TWI461807B (en) * | 2010-07-08 | 2014-11-21 | Hannstar Display Corp | Pixel structure of in-cell touch display panel and method of forming the same |
US9025102B2 (en) | 2012-10-22 | 2015-05-05 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Drive circuit of liquid crystal panel |
WO2015172491A1 (en) * | 2014-05-16 | 2015-11-19 | 京东方科技集团股份有限公司 | Array substrate and display device |
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CN100414368C (en) * | 2006-09-12 | 2008-08-27 | 友达光电股份有限公司 | Liquid crystal display device and its driving method |
TWI375198B (en) * | 2007-05-17 | 2012-10-21 | Tpo Displays Corp | A system for displaying images |
JP5299063B2 (en) * | 2009-04-24 | 2013-09-25 | 株式会社ジャパンディスプレイ | Liquid crystal display |
CN102053410B (en) * | 2009-10-30 | 2012-11-21 | 群康科技(深圳)有限公司 | Touch display panel, touch display device and flat display panel |
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JPH05232509A (en) * | 1992-02-21 | 1993-09-10 | Sanyo Electric Co Ltd | Liquid crystal display device |
JPH05232512A (en) * | 1992-02-25 | 1993-09-10 | Sanyo Electric Co Ltd | Liquid crystal display device |
JPH06230422A (en) * | 1993-02-03 | 1994-08-19 | Fujitsu Ltd | Liquid crystal panel |
JP4368007B2 (en) * | 1999-07-30 | 2009-11-18 | カシオ計算機株式会社 | Thin film transistor panel |
JP2002072250A (en) * | 2000-04-24 | 2002-03-12 | Matsushita Electric Ind Co Ltd | Display device and driving method thereof |
JP3723747B2 (en) * | 2000-06-16 | 2005-12-07 | 松下電器産業株式会社 | Display device and driving method thereof |
KR20020042898A (en) * | 2000-12-01 | 2002-06-08 | 구본준, 론 위라하디락사 | Liquid crystal display device and method of manufacturing thereof |
-
2003
- 2003-04-21 KR KR1020030025092A patent/KR100931876B1/en active IP Right Grant
- 2003-07-02 TW TW092118129A patent/TW594347B/en not_active IP Right Cessation
- 2003-07-24 JP JP2003201064A patent/JP4078394B2/en not_active Expired - Lifetime
Cited By (11)
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US7880841B2 (en) | 2006-12-01 | 2011-02-01 | Innocom Technology (Shenzhen) Co., Ltd. | Liquid crystal display panel having dielectric compensating layer |
CN100580536C (en) * | 2007-07-06 | 2010-01-13 | 昆山龙腾光电有限公司 | Array base plate for liquid-crystal display device and its production |
US7884889B2 (en) | 2007-07-06 | 2011-02-08 | Infovision Optoelectronics (Kunshan) Co., Ltd. | Fringe field switching type liquid crystal display array substrate and method of manufacturing the same |
US7763891B2 (en) | 2008-01-09 | 2010-07-27 | Chunghwa Picture Tubes, Ltd. | Pixel structure and active device array substrate |
TWI393974B (en) * | 2009-06-25 | 2013-04-21 | Chunghwa Picture Tubes Ltd | Liquid crystal display panel |
TWI461807B (en) * | 2010-07-08 | 2014-11-21 | Hannstar Display Corp | Pixel structure of in-cell touch display panel and method of forming the same |
CN102879967A (en) * | 2012-10-22 | 2013-01-16 | 深圳市华星光电技术有限公司 | Driving circuit of liquid crystal panel |
CN102879967B (en) * | 2012-10-22 | 2015-02-04 | 深圳市华星光电技术有限公司 | Driving circuit of liquid crystal panel |
US9025102B2 (en) | 2012-10-22 | 2015-05-05 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Drive circuit of liquid crystal panel |
WO2015172491A1 (en) * | 2014-05-16 | 2015-11-19 | 京东方科技集团股份有限公司 | Array substrate and display device |
US9490272B2 (en) | 2014-05-16 | 2016-11-08 | Boe Technology Group Co., Ltd. | Array substrate and display device |
Also Published As
Publication number | Publication date |
---|---|
JP4078394B2 (en) | 2008-04-23 |
KR20040016377A (en) | 2004-02-21 |
TW200403509A (en) | 2004-03-01 |
JP2004078194A (en) | 2004-03-11 |
KR100931876B1 (en) | 2009-12-15 |
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