[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

TW563263B - Surface mounting method for high power light emitting diode - Google Patents

Surface mounting method for high power light emitting diode Download PDF

Info

Publication number
TW563263B
TW563263B TW091122418A TW91122418A TW563263B TW 563263 B TW563263 B TW 563263B TW 091122418 A TW091122418 A TW 091122418A TW 91122418 A TW91122418 A TW 91122418A TW 563263 B TW563263 B TW 563263B
Authority
TW
Taiwan
Prior art keywords
base
emitting diode
light
metal contact
patent application
Prior art date
Application number
TW091122418A
Other languages
Chinese (zh)
Inventor
Tzer-Perng Chen
Original Assignee
United Epitaxy Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Epitaxy Co Ltd filed Critical United Epitaxy Co Ltd
Priority to TW091122418A priority Critical patent/TW563263B/en
Priority to DE10305021A priority patent/DE10305021B4/en
Priority to JP2003333088A priority patent/JP3994346B2/en
Application granted granted Critical
Publication of TW563263B publication Critical patent/TW563263B/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/8506—Containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

Disclosed herein is a surface mounting method for high power output light emitting diode (LED). In the first preferred embodiment, the LED is mounted onto a thermal and electrical base-substrate, which has a plurality of trenches formed therein and filled with an insulating layer to isolate two parts of the base-substrate. A reflective frame assembler having a plurality of reflective frame is then adhered to the upper surface of the base-substrate. Each of them is for placing one LED chip. After a LED is with its two electrodes placed on a pair of the first metal contacts, the transparent resin or epoxy is refilled into reflective frame to seal the LED chip. In the second preferred embodiment, the LED has two electrodes on the different side. Hence, the LED is mounted on one metal contact only, the other electrode is in terms of a wire to bond to the other metal contact.

Description

563263 五、發明說明（1) 發明領域： 本發明係關於發光元件，特別是指高功率m -V族發 光二極體的晶片型封裝。 發明背景：563263 V. Description of the invention (1) Field of the invention: The present invention relates to light-emitting elements, and particularly to a chip-type package of high-power m-V family light-emitting diodes. Background of the invention:

傳統發光二極體元件晶片型封裝的第一個典型範例請 參見美國專利案第6, 3 4 5, 9 0 3B1號或第1圖。如圖所示為的 發光組件1 0架構中，發光二極體2 2以底層表面電極經由銀 膠或銲錫層2 0黏著於第一金屬接觸1 3上。位於發光二極體 2 2上層表面之另一電極則透過導線2 3連接至另一第一金屬 電極1 4，這兩個第一金屬接觸1 3，1 4都位在一玻璃纖維基 板1 2的上層表面，並經由貫孔4 0之導體鍍層4 1連接到位在 玻璃纖維基板1 2底面的第二金屬接觸3 3，3 4。 每一個發光二極體晶片係放置於一反射組件中的一碗 型反射板1 7所包圍。該反射板為一向内傾斜的圓錐狀，用 以使發光二極體晶片所投射於該反射板的光反光並朝上射 出，接著第一透明封裝樹脂層1 5注入碗型反射板1 7中，以 保護發光二極體晶片2 2及連接導線2 3。The first typical example of a conventional light-emitting diode chip package is shown in US Patent No. 6, 3 4 5, 9 0 3B1 or Figure 1. In the light-emitting component 10 architecture shown in the figure, the light-emitting diode 22 is adhered to the first metal contact 13 with a bottom surface electrode via a silver paste or a solder layer 20. The other electrode located on the upper surface of the light-emitting diode 22 is connected to another first metal electrode 1 4 through a wire 2 3. The two first metal contacts 1 3 and 1 4 are both located on a glass fiber substrate 1 2 The upper surface of the upper layer is connected to the second metal contact 3 3, 3 4 on the bottom surface of the glass fiber substrate 12 through the conductor plating layer 41 of the through hole 40. Each light-emitting diode wafer is surrounded by a bowl-shaped reflecting plate 17 placed in a reflecting assembly. The reflecting plate has a conical shape inclined inward to reflect the light projected by the light-emitting diode wafer onto the reflecting plate and emit it upward, and then the first transparent packaging resin layer 15 is injected into the bowl-shaped reflecting plate 17 To protect the light emitting diode chip 22 and the connecting wire 23.

在第一封裝樹脂層1 5的上方是一第二封裝樹脂2 7，該 第二封裝樹脂2 7是以樹脂注入於有著多個半球狀凸面的罩 模2 8中，其作用如一透鏡2 9，可用以聚光。當第二封裝樹 脂2 7固接成型（cur i ng )後，罩模2 8即可去除，最後，沿著Above the first encapsulating resin layer 15 is a second encapsulating resin 27. The second encapsulating resin 27 is resin injected into a cover mold 2 8 having a plurality of hemispherical convex surfaces, and functions as a lens 2 9 , Can be used to spotlight. After the second encapsulated resin 2 7 is fixedly formed (cur i ng), the cover mold 2 8 can be removed. Finally,

第5頁 563263 五、發明說明（2) 貫孔4 0中央的切割線4 2切割，以完成多個單一發光二極體 晶片的封裝。 上述以發光二極體表面黏著技術的第一實施例中，發 光二極體晶片的兩個電極分別位於其上表面及下表面。因 此，發光時將會受到上方電極的阻擋。此外，基板1 2本身 為一絕緣體，介由貫孔4 0上的鍍層4 1連結位在上表面的第 一金屬接觸1 3，1 4及位在下表面的第二金屬接觸3 3，3 4。 因此，發光二極體2 2所散發之熱能僅能介由金屬接觸1 3， 3 3處及貫孔的鍍層4 1散逸，因為發光二極體2 2已被樹脂1 5 所包覆。因此，利用此種基板的發光二極體封裝，散熱能 力是不良的。 傳統發光二極體元件晶片型封裝的第二個典型範例是 一種覆晶型的封裝方式，揭露於美國專利案第 6，3 9 6，0 8 2 B 1號，如第2圖所示。 一覆晶型發光二極體7 9以其透明基板朝上的方式以銀 膠或銲錫層87固定於一玻璃環氧基板（glass epoxy substrate )72上。在覆晶型發光二極體79正上方所在之該 玻璃環氧基板7 2有一貫孔7 5形成於其中。該玻璃環氧基板 7 2的土表面7 6 A有兩個接觸7 3，7 4延伸到下表面7 6 B。貫孔 7 5則注入透明樹脂層7 7。覆晶型發光二極體7 9的兩個金屬 電極8 3，8 4分別透過導線8 5，8 6連接到金屬接觸7 3，7 4。Page 5 563263 V. Description of the invention (2) The cutting line 4 2 in the center of the through hole 40 is cut to complete the packaging of a plurality of single light-emitting diode chips. In the above-mentioned first embodiment of the light-emitting diode surface adhesion technology, the two electrodes of the light-emitting diode wafer are respectively located on the upper surface and the lower surface thereof. Therefore, it will be blocked by the upper electrode when emitting light. In addition, the substrate 12 itself is an insulator, and the first metal contact 1 3, 1 4 on the upper surface and the second metal contact 3 3, 3 4 on the lower surface are connected through the plating layer 4 1 on the through hole 40. . Therefore, the thermal energy emitted by the light-emitting diode 22 can only be dissipated through the metal contact 13, 33, and the plated layer 41 of the through hole, because the light-emitting diode 22 has been covered by the resin 15. Therefore, the light emitting diode package using such a substrate has poor heat dissipation ability. A second typical example of a conventional light-emitting diode device chip-type package is a flip-chip packaging method, which is disclosed in US Patent No. 6,3 9 6,0 8 2 B 1, as shown in FIG. 2. A flip-chip type light emitting diode 79 is fixed on a glass epoxy substrate 72 with a silver paste or a solder layer 87 with its transparent substrate facing upward. A through hole 75 is formed in the glass epoxy substrate 72 directly above the flip-chip type light emitting diode 79. The soil surface 7 6 A of the glass epoxy substrate 7 2 has two contacts 7 3, 7 4 extending to the lower surface 7 6 B. The through holes 7 5 are injected into the transparent resin layer 7 7. The two metal electrodes 8 3, 8 4 of the flip-chip type light emitting diode 7 9 are connected to the metal contacts 7 3, 7 4 through wires 8 5, 8 6, respectively.

563263 五 、發明說明 (3) 隨 後 覆 晶 型 發 光 二 極 體 7 9及 導 線 85， 8 6再 藉 由 透 明 的 密 封 體 8 8保 護 著 1=7 取 後 藉 由 密 封 體 8 8植 入 母 板 9 1之 孔 洞 92中 的 方 式 將 玻 璃 環 氧 基 板 7 2上 下 倒 置 黏 著 於 母 板 9 1上 0 由 於 發 光 —一 極 體 倒 置 後 光 線 係 透 過 貫 孔 7 5朝 上 昭 > η、 射 1 並 不 被 金 屬 電 極 83， 8 4所 阻 擋 絕 佳 的 光 線 傳 輸 效 率 是 可 預 期 的 0 缺 而 ， 由 於 玻 璃 環 氧 基 板 7 2的 絕 緣 特 性 使 得 發 光 二 極 體 7 9的 軌 i 僅 能 透 過 金 屬 接 觸 73， 7 4散 逸 〇 因 為 覆 晶 型 發 光 -— 極 體 7 9也 完 全 被 封 封 樹 脂 7 7所 包 覆 〇 因 此 1 如 前 一 實 施 例 利 用 此 種 的 基 板 封 裝 元 件 亦 是 散 孰 能 力 不 良 0 如 此 的 結 果 將 侷 限 了 發 光 二 極 體 的 m 出 功 率 也 使 得 在 沒 有 進 一 步 的 改 善 以 前 高 功 率 的 發 光 二 極 體 將 Μ 法 實 現 〇 本 發 明 之 一一 § 的 因 此 係 提 供 一 種 南 功 率 發 光 -^· 極 體 的 表 面 黏 著 方 法 及 結 構 0 發 明 § 的 及 概 述 ·· 本 發 明 之 § 的 係 提 供 一 種 高 功 率 發 光 二 極 體 晶 片 表 面 黏 著 技 術 可 應 用 於 該 發 光 二 極 體 之 兩 個 電 極 在 同 側 者 〇 本 發 明 之 的 係 提 供 一 種 高 功 率 發 光 二 極 體 晶 片 表 面 黏 著 技 術 可 應 用 於 該 發 光 二 極 體 之 兩 個 電 極 在 不 同 側 者 〇 在 第 一 實 施 例 中 描 繪 兩 個 電 極 位 於 同 一 側 的 發 光 二 極 體 晶 片 固 接 於 一 具 導 電 和 導 軌 的 基 板 的 粘 著 技 術 〇 包 含 下 列 步 驟 • 首 先 將 基 板 以 切 割 或 # 刻 技 術 形 成 包 含 複 數 個 溝 渠 的 圖 案 於 其 中 0 接 著 ， 以 旋 塗 式 玻 璃 (SOG : :Sp: i η 〇] f563263 V. Description of the invention (3) Subsequently, the flip-chip type light-emitting diode 7 9 and the wires 85, 8 6 are protected by a transparent sealing body 8 8 1 = 7. After taking out, the sealing body 8 8 is implanted into the motherboard. The glass epoxy substrate 7 2 is stuck upside down on the mother board 9 1 in the way of the hole 92 of 9 1 because of light emission—the light is transmitted through the through hole 7 5 upward after a polar body is inverted. Η, shot 1 and The excellent light transmission efficiency that is not blocked by the metal electrodes 83, 8 4 is expected. However, due to the insulation characteristics of the glass epoxy substrate 7 2, the track i of the light emitting diode 7 9 can only pass through the metal contact 73 , 7 4 is dissipated. 0 Because the flip-chip type light-emitting body 7 9 is also completely covered with the sealing resin 7 7. Therefore 1 As in the previous embodiment, the substrate packaging component using this type is also poor in dissipating ability. 0 So The result will limit the m output power of the light-emitting diode. The high-power light-emitting diode will realize the M method without further improvement. One of the present invention § therefore provides a south-power light-emitting surface adhesion method and structure of the polar body 0 invention § and overview ·· The system of § of the present invention provides a high-power light-emitting diode wafer surface adhesion technology that can be applied to the two electrodes of the light-emitting diode on the same side. The system of the present invention provides a high-power light-emitting diode The wafer surface adhesion technology can be applied to the two electrodes of the light-emitting diode on different sides. In the first embodiment, the light-emitting diode wafer with two electrodes on the same side is depicted as being fixed to a substrate with a conductive and guide rail The adhesion technology includes the following steps: First, the substrate is cut or etched to form a plurality of trenches. The pattern of 0 is followed by a spin-on glass (SOG :: Sp: i η 〇) f

第7頁 563263 五、發明說明（4)Page 7 563263 V. Description of the invention (4)

Glass)或聚驢亞胺（polyimide)或 BCB(B-staged bisbenzocyclobutene )才封月旨膜回填溝渠〇 隨後，形成第一金屬接 溝渠的左右兩側分別有一金 晶片兩個電極之接觸。緊接 術，用以裸露溝渠底部。之 板背面的左右兩侧，用以連 接著’再將一反射模組件黏 組具有多個碗型反射板，分 片0 觸於基板的上表面，其中每一 屬接觸，用以提供發光二極體 著，再對基板施以背向研磨技 後，再形成第二金屬接觸於基 接外部電極。 著於基板的上表面，此反射模 別用以容置一發光二極體晶 隨後’發光二極體晶片倒 錫球或銲錫層使其P型電極$ 側的一對第一金屬接觸上。最 化物於碗型反射板，完成發光 反射板的上半部亦可以再开^成 置於碗型反射板，並利用 η型電極分別粘著於一溝渠 後，再注入透明樹脂或環 二極體晶片封裝保護，碗 一透鏡以利聚光。 銲 兩 氧 型 第二實施例的方法中 發光二極體晶片固接於—呈Ϊ描繪兩個電極位於不同側的 術。步驟如下所述：首先具導電和導熱的基板㈣著技 電和導熱良好的金屬基;。=如=述形成溝渠圖案於一導 胺或BCB。隨後，再形成第並八回/以旋塗式玻璃或聚酸亞 叫刀別有一面積可以不相等大小的Glass) or polyimide or BCB (B-staged bisbenzocyclobutene) was then used to seal the moon and fill the trenches. Subsequently, the left and right sides of the first metal trench were formed with a gold chip and two electrodes in contact. Immediately following the procedure to expose the bottom of the ditch. The left and right sides of the back of the plate are used to connect a 'reflection module assembly' with a plurality of bowl-shaped reflection plates, and the segment 0 touches the upper surface of the substrate, each of which is in contact to provide light After the diode is applied, the substrate is subjected to a back-grinding technique, and then a second metal is formed to contact the base and the external electrode. Focusing on the upper surface of the substrate, this reflection mode is used to house a light-emitting diode crystal and then the light-emitting diode wafer is inverted with a solder ball or a solder layer to make a pair of first metals on the P-type electrode side contact. It is most suitable for a bowl-shaped reflector. The upper half of the light-emitting reflector can be re-opened and placed in a bowl-shaped reflector. After using η-type electrodes to adhere to a trench, a transparent resin or ring diode is injected. The body chip is packaged and protected, and a lens is used to facilitate light collection. In the method of the second embodiment, the light-emitting diode wafer is fixed to the second embodiment, and the two electrodes are located on different sides. The steps are as follows: First, the substrate with electrical and thermal conductivity is supported on a metal substrate with good electrical and thermal conductivity; = Such as described in the formation of trench patterns in a amine or BCB. Then, the eighth round / spin-coated glass or polyacrylic acid is formed. There is an area that can be unequal in size.

第8頁 563263 五、發明說明（5) 金屬接觸，較大的金屬接觸用以承載一發光二極體晶片並 連接其底部的電極；較小的金屬接觸用以及提供一釘線 (b ο n d i n g w i r e )與該發光二極體晶片頂部電極的連接。緊 接著，再對基板施以背向研磨技術，用以裸露溝渠底部。 之後，再形成第二金屬接觸於基板背面的左右兩側，用以 連接外部電極。 接著，再將一反射模組件黏著於基板的上表面，此反 射反射模組具有多個碗型反射板，分別用以容置一發光二 極體晶片。此時，大的金屬接觸大致位於碗型反射板的中 心位置。 隨後，再將發光二極體晶片置於碗型反射板之中，並 利用銲錫球或銲錫層使其底部電極粘著於大的金屬接觸 上。發光二極體晶片之另一位於上表面的電極，則再於釘 線連接於小的金屬接觸上。最後，再注入透明樹脂或環氧 化物於碗型反射板，完成發光二極體晶片封裝保護，同樣 地，碗型反射板的上半部亦可以再形成'透鏡以利聚光。 發明詳細說明： 如前述之習知技藝，不論何種晶片型封裝的發光二極 體皆固定於一絕緣基板上的金屬接觸上再藉由上表面延伸 至下表面金屬鍍層作為與外部電極連接之金屬接觸。這樣 的絕緣基板所提供的散熱路徑必然不佳，發光二極體將因Page 8 563263 V. Description of the invention (5) Metal contact, the larger metal contact is used to carry a light-emitting diode wafer and connected to the bottom electrode; the smaller metal contact is used to provide a nail wire (b ο ndingwire) ) Connection to the top electrode of the light-emitting diode wafer. Next, a back-grinding technique is applied to the substrate to expose the bottom of the trench. After that, a second metal is formed to contact the left and right sides of the back surface of the substrate for connecting external electrodes. Then, a reflective module is adhered to the upper surface of the substrate. The reflective module has a plurality of bowl-shaped reflective plates for receiving a light-emitting diode chip, respectively. At this time, the large metal contact is located approximately at the center of the bowl-shaped reflector. Subsequently, the light-emitting diode wafer is placed in a bowl-shaped reflector, and the bottom electrode is adhered to a large metal contact by using a solder ball or a solder layer. The other electrode on the upper surface of the light-emitting diode wafer is connected to a small metal contact with a nail wire. Finally, a transparent resin or epoxy is injected into the bowl-shaped reflector to complete the packaging and protection of the light-emitting diode chip. Similarly, the upper part of the bowl-shaped reflector can also be formed into a 'lens to facilitate light collection. Detailed description of the invention: As mentioned above, no matter what kind of chip-type package, the light-emitting diodes are fixed on the metal contacts on an insulating substrate and then extended from the upper surface to the lower surface with a metal plating layer as a connection with the external electrode. Metal contact. The heat dissipation path provided by such an insulating substrate is necessarily poor.

563263563263

五、發明說明（6) 此 被限 制在 低 功率的 範圍。 第 3 J圖 為 根據本 發明之第 一 實施 例，尚未切割前的高 功 率發 光二 極 體晶片 型封裝的 結 構， 相較於前述習知技藝 之 表面 黏著 封 裝，此 基板1 0 0為- -具導電和導熱的基底， 如 此即 提供 絕 佳的散 熱能力。 如 圖所 示，每一覆晶型透明 基 板發 光二 極 體晶片 1 0 3的p型 電 極和 η型電極，分別黏著 於 具導 電和 導 熱的基 板上的兩 個 第一 金屬接觸1 1 0 Α。溝渠 1 0 5的位置在兩個第- -金屬接觸： 1 1 0 A之間，且填入絕緣物 質 1 0 6用以絕緣溝渠 L 0 5兩側的 第 一金 屬接觸1 1 0 A。 接 著置 入 發光二 極體晶片 1： 3 0於碗型反射板1 20中，並 注 入封 裝樹 脂 1 3 0或環氧化物膜使成凸透鏡狀以利聚光。 參 照第 3 A圖 ， 為一具 複數道溝 渠 10 5的導電導熱基板100的 剖 面側 視圖 〇 具南導 電導熱率 的 材質 ,如：銅、铭、石夕 等 ，都 是理 相 的材料 〇 表一為 銅 、鋁 、矽三種材質在導熱 率 及導 電率 的 比較。 表- 導熱率W(m-K) 導電率（Ω -cm)-1 銅 398 581395 鋁 156 353356 矽 125 〜150 1005. Description of the invention (6) This is limited to the low power range. Figure 3J shows the structure of a high-power light-emitting diode chip-type package before cutting according to the first embodiment of the present invention. Compared with the surface-adhesive package of the conventional technique, this substrate 100 is-- A conductive and thermally conductive substrate that provides excellent heat dissipation. As shown in the figure, the p-type electrode and the η-type electrode of each flip-chip transparent substrate light-emitting diode wafer 103 are adhered to two first metal contacts 1 1 0 Α on a substrate having conductivity and heat conduction, respectively. . The ditch 1 0 5 is located between two first-metal contacts: 1 1 0 A and filled with insulation material 1 0 6 to insulate the first metal contact 1 1 0 A on both sides of the ditch L 0 5. Next, a light-emitting diode wafer 1: 30 is placed in a bowl-shaped reflecting plate 120, and a packing resin 130 or an epoxy film is formed into a convex lens shape to facilitate light collection. Referring to FIG. 3A, it is a cross-sectional side view of a conductive and thermally conductive substrate 100 having a plurality of trenches 105. Materials with a southern thermal conductivity, such as copper, Ming, Shi Xi, etc., are all materials of rational phase. Table The first is the comparison of thermal conductivity and electrical conductivity of three materials: copper, aluminum, and silicon. Table-Thermal conductivity W (m-K) Electrical conductivity (Ω -cm) -1 Copper 398 581395 Aluminum 156 353356 Silicon 125 ~ 150 100

第10頁 563263 五、發明說明（7) 每道溝渠1 0 5的長度都比發光二極體封裝尺寸來的大 或於基板1 0 0上切割長距離的溝渠，如第3 B圖和第3 C圖所 示的平面圖，前者的溝渠是以微影成像及蝕刻的製程來形 成或以線鋸、雷射切割或放電加工等技術。各溝渠的間距 L約為發光二極體封裝尺寸的大小，為保存基板1 〇 〇的完 整，形成溝渠1 0 5時將不會切穿基板，而溝渠的深度約在 1 0 0至5 0 0微米。 參照第3D圖，一絕緣層1 0 6接著回填溝渠1 0 5。絕緣層 10 6的材料可以選自旋塗式玻璃SOG(spin of glass)或聚 驢亞胺（polyimide)或是 BCB(B-staged bisbenzocyclobutene)樹脂膜等具有易塗佈、不殘留空 隙、耐高溫等特性的材質。 第3 E圖所示，形成第一金屬接觸層11 0 A於基板每一道 溝渠的兩側，該第一金屬接觸層11 0 A是以化學氣相沉積’ (CVD )、濺鍍、熱蒸鍍、電子搶蒸鍍等傳統的製程沉積金 屬於基板上表面1 0 0 A，接著以微影製程成像及蝕刻的技術 圖案化，也可以先形成罩幕再接著做電鍍或無電電鍍。 之後，參照第3 F圖，對基板施以背向研磨技術，至少 到絕緣層1 0 6可以將溝渠1 0 5兩邊完全隔絕。Page 10 563263 V. Description of the invention (7) The length of each trench 105 is larger than the size of the light emitting diode package or the trench is cut on the substrate 100 for a long distance, as shown in Figure 3B and The plan view shown in Figure 3C. The former trench is formed by lithography and etching processes, or by wire sawing, laser cutting, or electrical discharge machining. The spacing L of each trench is about the size of the light emitting diode package size. In order to preserve the integrity of the substrate 100, the substrate will not be cut through when the trench 105 is formed, and the depth of the trench is about 100 to 50. 0 microns. Referring to FIG. 3D, an insulating layer 10 6 then backfills the trench 105. The material of the insulating layer 106 can be selected from spin-on-glass (SOG), polyimide or BCB (B-staged bisbenzocyclobutene) resin film, etc. And other characteristics of the material. As shown in FIG. 3E, a first metal contact layer 11 0 A is formed on both sides of each trench of the substrate. The first metal contact layer 110 A is formed by chemical vapor deposition (CVD), sputtering, and thermal evaporation. Conventional processes such as electroplating and electronic flash deposition deposit metal on the top surface of the substrate at 100 A, and then pattern it with a photolithographic process for imaging and etching. It is also possible to form a mask first and then perform electroplating or electroless plating. Then, referring to FIG. 3F, the substrate is subjected to back grinding technology, and at least the insulating layer 106 can completely isolate both sides of the trench 105.

563263 五、發明說明（8) 如第3 G圖所示，形成第二金屬接觸層Π Ο B於基板1 0 0 上已背向研磨的表面1 Ο Ο B。形成第二金屬接觸層的步驟就 如同先前形成第一金屬接觸層，然而，溝渠1 0 5兩側的第 二金屬接觸層的距離較溝渠1 0 5兩側的第一金屬接觸層的 距離為大，這是因為第一金屬接觸層Π Ο A是用以接觸發光 二極體晶片的兩極；而第二金屬接觸層1 1 Ο B是用以接觸外 部電極。因此，此並不形成限制條件，兩個第二金屬接觸 層1 1 Ο B的距離可以依據外部電極而調整。 之後，參照第3 Η圖，含複數個碗型反射板1 2 Ο A的反射 板組件1 2 0是黏著在基板1 0 0的上表面1 0 0 A，該碗型反射板 1 2 Ο A的中央部位是對準溝渠1 0 5的中央位置，且對應到固 定在金屬接觸的發光二極體晶片的中央部位。 如第3 I圖所示，倒置發光二極體且其電極1 0 1，1 0 2分 別藉由銲錫球或銲錫層1 0 4黏著於金屬接觸1 1 Ο A上。 參照第3 J圖，於碗型反射板1 2 Ο A中填入透明樹脂或環氧化 物層1 3 0用以保護發光二極體晶片，為改善聚光，透明樹 脂或環氧化物層的上半部可用具透鏡狀凹面的罩模做成透 鏡狀。最後，參照第3 J圖，沿著水平方向的切割線1 4 0 (垂 直方向的圖上未顯示）將基板組件切割成矩形狀。 上述利用導電導熱材質做為基板的發光二極體表面黏 者技術也可用在P型電極和η型電極分別位在晶片上下兩側563263 V. Description of the invention (8) As shown in FIG. 3G, a second metal contact layer Π 0 B is formed on the substrate 1 0 0 and the back surface 1 Ο B. The step of forming the second metal contact layer is the same as the formation of the first metal contact layer. However, the distance between the second metal contact layers on both sides of the trench 105 is longer than the distance between the first metal contact layers on both sides of the trench 105. This is because the first metal contact layer Π OA is used to contact the two poles of the light emitting diode wafer, and the second metal contact layer 1100 B is used to contact the external electrode. Therefore, this does not form a limiting condition, and the distance between the two second metal contact layers 1 1 0 B can be adjusted according to the external electrode. Then, referring to FIG. 3, the reflection plate assembly 1 2 0 including a plurality of bowl-shaped reflection plates 1 2 〇 A is adhered to the upper surface 1 0 0 A of the substrate 1 0 0, and the bowl-shaped reflection plate 1 2 〇 A The central portion of is the central position of the alignment trench 105, and corresponds to the central portion of the light-emitting diode wafer fixed in metal contact. As shown in FIG. 3I, the light-emitting diodes are inverted and the electrodes 1 0, 10 2 are adhered to the metal contacts 1 1 0 A through a solder ball or a solder layer 1 0 4 respectively. Referring to Figure 3J, a transparent resin or epoxide layer 1 3 0 is filled in the bowl-shaped reflecting plate 1 2 0 A to protect the light-emitting diode wafer. In order to improve the light concentration, the transparent resin or epoxide layer The upper half can be made lenticular with a lenticular concave mask. Finally, referring to FIG. 3J, the substrate assembly is cut into a rectangular shape along a horizontal cutting line 1 40 (not shown in the vertical direction). The above-mentioned light emitting diode surface bonding technology using a conductive and thermally conductive material as a substrate can also be used for P-type electrodes and η-type electrodes on the upper and lower sides of the wafer, respectively.

第12頁 563263 五、發明說明（9) 的發光二極體。如第4 F圖所示，此第二實施例為一基板尚 未切割之高功率發光二極體晶片型封裝的組件結構。與第 一實施例有相同的基板1 〇 〇用以做發光二極體晶片黏著之 用’而兩個第一金屬接觸110AA和110AB形成於基板1〇〇的 上表面1 0 0 A ;兩個第二金屬接觸1 1 〇 B則形成於基板1 〇 〇的 下表面1 〇 〇 B。每個發光二極體晶片1 〇 3之一電極固接於第 一金屬接觸1 1 〇 A A，而位在絕緣溝渠1 〇 5另一側的另一第一 金屬接觸1 1 〇 A B則藉導線1 3 5連接到發光二極體晶片1 〇 3上 表面的電極。 為使發光二極體晶片1 〇 3的位置處於碗型反射板1 2 0 A 的中央部位，則溝渠1 〇 5的位置需略偏離碗型反射板1 2 〇 A 的中央部位。接著以透明樹脂或環氧化物層1 3 0封裝保護 發光二極體晶片及導線1 3 5，可使透明樹脂或環氧化物層 的上半部分形成透鏡狀以利聚光。每一發光二極體組件結 構的基板1 0 0下表面1 0 0 8都有兩個第二金屬接觸1 1 0 B。 整個表面黏著製程步驟如第4A圖至第4G圖所示。如前 述的第一實施例，基板1 0 0以線鋸或切割形成溝渠1 〇 5圖案 於其中，接著旧填旋塗式玻璃或聚醯亞胺於溝渠1 〇 5，而 溝渠1 0 5的深度及間距L則同第一實施例，結果如第4 A圖所 y (> 0 參照第4B圖’以沉積金屬層和圖案化的製程或是光罩Page 12 563263 V. Light-emitting diode of invention description (9). As shown in FIG. 4F, this second embodiment is a component structure of a high-power light-emitting diode chip-type package in which a substrate has not been cut. The substrate 100, which is the same as the first embodiment, is used for the adhesion of the light-emitting diode wafer, and two first metal contacts 110AA and 110AB are formed on the upper surface 100A of the substrate 100; two The second metal contact 1 10B is formed on the lower surface 100B of the substrate 100. One of the electrodes of each light emitting diode wafer 103 is fixed to the first metal contact 1 10AA, and the other first metal contact 1 1 0AB located on the other side of the insulation trench 105 is borrowed by a wire 1 3 5 An electrode connected to the upper surface of the light emitting diode wafer 103. In order that the position of the light emitting diode wafer 103 is at the center of the bowl-shaped reflection plate 120 A, the position of the trench 105 needs to be slightly deviated from the center of the bowl-shaped reflection plate 120 A. The transparent resin or epoxide layer 130 is then used to encapsulate and protect the light-emitting diode chip and the wires 135, so that the upper half of the transparent resin or epoxide layer can be formed into a lens shape to facilitate light collection. The lower surface 100 of the substrate 100 of each light emitting diode assembly structure has two second metal contacts 1 110B. The entire surface adhesion process steps are shown in Figs. 4A to 4G. As in the aforementioned first embodiment, the substrate 100 is formed with a trench 105 pattern by wire sawing or cutting, and then spin-coated glass or polyimide is filled in the trench 105, and the trench 105 The depth and pitch L are the same as in the first embodiment, and the result is as shown in Figure 4A (> 0 with reference to Figure 4B 'to deposit a metal layer and a patterned process or a mask

第13頁 563263 五、發明說明（ίο) 和電锻製程，在基板1 〇 〇 A的上表面處形成複數個金屬接觸 對，由於第一金屬接觸1 1 0 A A是用以固接發光二極體晶 片，而另一第一金屬接觸1 1 0AB是連接導線之用，因此， 第一金屬接觸Π0ΑΑ的面積可能大於第一金屬接觸11〇〇的 面積。 對基板的底部施以背向研磨技術至少到溝渠裸露為 止，之後，形成複數個金屬接觸1 1 0 B於基板上，如第4 C圖 所示。 參照第4 D圖，反射組件1 2 〇是黏著於基板1 〇 〇上表面 1 0 0 A的複數個碗型反射板1 2 0 A。每個碗型反射板1 2 0 A包圍 兩個金屬接觸，然而，只有一個金屬接觸是位在碗型反射 板的中央位置以使隨後钻著的發光二極體元件可以約略位 於碗型反射板的中央位置。 如第4 E圖所示，一發光二極體晶片1 〇 3隨後放置於碗 型反射板1 2 0 A之中，該發光二極體晶片1 〇 3的底部電極則 利用銲錫層1 0 4黏著於約略位於碗型反射板的中央位置的 第一金屬接觸1 1 0 A A上，接著以導線1 3 5連結發光二極體晶 片10 3的上表面的另一電極與另一第一金屬電極110AB。 最後’以樹脂或封裝環氧化物1 3 〇注入碗型反射板封裝發 光一極體晶片103’如第4F圖所示。Page 13 563263 V. Description of the invention and electric forging process, a plurality of metal contact pairs are formed on the upper surface of the substrate 100A, because the first metal contact 1 1 0 AA is used to fix the light emitting diode The second metal contact 110B is used for connecting wires, so the area of the first metal contact Π0AA may be larger than the area of the first metal contact 1100. A back-grinding technique is applied to the bottom of the substrate at least until the trench is exposed. After that, a plurality of metal contacts 1 1 0 B are formed on the substrate, as shown in FIG. 4C. Referring to FIG. 4D, the reflective component 12 is a plurality of bowl-shaped reflective plates 12 A that are adhered to the upper surface 100 A of the substrate 100. Each bowl-shaped reflector 1 2 0 A surrounds two metal contacts, however, only one metal contact is located in the center of the bowl-shaped reflector so that the light-emitting diode element that is subsequently drilled can be positioned approximately on the bowl-shaped reflector Central location. As shown in FIG. 4E, a light-emitting diode wafer 1 03 is then placed in a bowl-shaped reflecting plate 1 2 0 A, and the bottom electrode of the light-emitting diode wafer 1 0 3 uses a solder layer 1 0 4 Adhere to the first metal contact 1 1 0 AA located approximately at the center of the bowl-shaped reflecting plate, and then connect another electrode on the upper surface of the light-emitting diode wafer 103 with another first metal electrode with a wire 1 3 5 110AB. Finally, the resin- or encapsulated epoxy 130 is injected into the bowl-shaped reflective plate to encapsulate the light-emitting polar wafer 103 'as shown in FIG. 4F.

第14頁 563263 五、發明說明（11) 前述第一實施例中，以絕緣層1 〇 6隔離導體基板1 0 0上 的兩個金屬接觸1 1 ΟA的方法或兩個金屬接觸1 1 0AA和1 1 ΟAB 如第二實施例所述的方法，只是為了方便說明而非用以限 制本發明的範圍，例如：也可以毋須背向研磨步驟即可以 絕緣層絕緣導體基板的兩部分。例如以可分離膠膜 (release film)粘著於基板10 0的一表面，接著由未黏膠 帶一面施以切割或蝕刻製程至的基板1 0 0直到膠帶處。隨 後回填以絕緣層，用以將切割道的兩邊粘著，最後，再移 除可分離膠膜，而隨後的製程步驟都一如前述。 本發明的優點： 1 .相較於習知技藝，由於基板係具導電導熱的金屬基 板因此可提供絕佳的散熱能力。 2.製程步驟亦比習知技藝簡單，例如，基板為一導體 時，則毋須貫孔及貫孔電鍍的製程。 以上所述僅為本發明之較佳實施例而已，並非用以限 定本發明之申請專利範圍；凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾，均應包含在下述之申請 專利範圍内。Page 14 563263 V. Description of the invention (11) In the foregoing first embodiment, a method for isolating two metal contacts 1 1 0A on a conductor substrate 1 0 0 or two metal contacts 1 1 0AA and 1 1 OOAB The method described in the second embodiment is only for convenience of explanation and is not intended to limit the scope of the present invention. For example, the two parts of the conductor substrate can be insulated without the need for a back-grinding step. For example, a release film is adhered to one surface of the substrate 100, and then the substrate 100 is subjected to a cutting or etching process from the non-adhesive tape side to the tape. Then it is backfilled with an insulating layer to adhere the two sides of the cutting path. Finally, the separable adhesive film is removed, and the subsequent process steps are the same as described above. Advantages of the present invention: 1. Compared with the conventional technology, since the substrate is a conductive metal substrate, it can provide excellent heat dissipation capability. 2. The process steps are also simpler than conventional techniques. For example, when the substrate is a conductor, there is no need for through-hole and through-hole plating processes. The above are merely preferred embodiments of the present invention, and are not intended to limit the scope of patent application for the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following Within the scope of patent application.

第15頁 563263 圖式簡單說明 第一圖示傳統發光二極體兩電極不同側之表面粘著封 裝技術的示意圖。 第二圖示傳統發光二極體兩電極同側之表面粘著封裝 技術的示意圖。 第三A圖示依據本發明第一實施例的方法，在一導電 導熱基板中形成複數個溝渠的橫截面示意圖。 第三B圖及第三C圖分別示依據本發明第一實施例的方 法所形成兩種形式溝渠的俯視圖。 第三D圖示依據本發明第一實施例的方法以絕緣材料 回填複數個溝渠的橫截面示意圖。 第三E圖示依據本發明第一實施例的方法在溝渠兩側 各分別形成一第一金屬接觸的橫截面示意圖。 第三F圖示依據本發明第一實施例的方法，施以背向 研磨至溝渠底部後在溝渠兩侧再各分別形成一第二金屬接 觸的橫截面示意圖。 第三G圖示依據本發明第一實施例的方法，基板背面 之溝渠兩侧再各分別形成一第二金屬接觸的橫截面示意 圖。 第三Η圖示依據本發明第一實施例的方法，粘著一反 射模組於基板上表面，該反射模組具有多個碗型反射板， 分別包圍一第一金屬接觸對的示意圖。 第三I圖示依據本發明第一實施例的方法，固接一兩 電極同側之發光二極體之以固接於第一金屬接觸對的示意 圖0Page 15 563263 Brief description of the drawings The first diagram is a schematic diagram of the traditional surface-mounting and packaging technology of two electrodes of a conventional light-emitting diode. The second diagram is a schematic view of the conventional surface-adhesive packaging technology of the two electrodes of the light-emitting diode. The third A is a schematic cross-sectional view of a method for forming a plurality of trenches in a conductive substrate according to the first embodiment of the present invention. Figures 3B and 3C respectively show top views of two types of trenches formed by the method according to the first embodiment of the present invention. The third D is a schematic cross-sectional view of a method for backfilling a plurality of trenches with an insulating material according to the method of the first embodiment of the present invention. The third E shows a schematic cross-sectional view of the method according to the first embodiment of the present invention, each of which forms a first metal contact on each side of the trench. The third F is a schematic cross-sectional view of the method according to the first embodiment of the present invention, in which a second metal contact is formed on each side of the trench after grinding to the bottom of the trench. The third G shows a schematic cross-sectional view of the method according to the first embodiment of the present invention, and a second metal contact is formed on each side of the trench on the back surface of the substrate. The third figure shows a schematic diagram of a method according to the first embodiment of the present invention, in which a reflective module is adhered to the upper surface of the substrate. The reflective module has a plurality of bowl-shaped reflective plates, each of which surrounds a first metal contact pair. The third I shows a schematic diagram of a method for fixing a light emitting diode on the same side of one or two electrodes to the first metal contact pair according to the method of the first embodiment of the present invention.

第16頁 563263 圖式簡單說明 第三J圖示依據本發明第一實施例的方法，注入透明 樹脂或環氧化物於碗型反射板，完成發光二極體晶片封裝 保護的示意圖。 第四A圖示依據本發明第二實施例的方法形成複數個 溝渠於一導電導熱基板後，再以絕緣材料回填複數個溝渠 的橫截面示意圖。 第四B圖示依據本發明第二實施例的方法形成複數個 第一金屬接觸對，並使第一金屬接觸對的兩個第一金屬接 觸形成於溝渠的兩側後，再施以背向研磨的橫截面示意 圖。 第四C圖示依據本發明第二實施例的方法，形成一第 二金屬接觸於研磨後的表面之示意圖。 第四D圖示依據本發明第二實施例的方法，粘著一反 射模組於基板上表面，該反射模組具有多個碗型反射板， 分別包圍一第一金屬接觸對的示意圖，其中面積較大的一 第一金屬接觸位於該碗型反射板的中心。 第四E圖示依據本發明第二實施例的方法，固接一兩 電極不同側之發光二極體，以底部電極固接於面積較大的 第一金屬接觸，發光二極體晶片之另一位於上表面的電 極，則再於釘線連接於小的金屬接觸上的示意圖。 第四F圖示依據本發明第二實施例的方法，注入透明 樹脂或環氧化物於碗型反射板，完成發光二極體晶片封裝 保護的亏意圖。 圖號對照表：Page 16 563263 Brief description of the drawings The third J shows a schematic diagram of a method for injecting a transparent resin or an epoxide into a bowl-shaped reflector according to the method of the first embodiment of the present invention to complete the packaging and protection of a light emitting diode chip. The fourth A is a schematic cross-sectional view of forming a plurality of trenches on a conductive substrate according to the second embodiment of the present invention, and then backfilling the plurality of trenches with an insulating material. The fourth B diagram illustrates the method of forming a plurality of first metal contact pairs according to the second embodiment of the present invention, and after two first metal contacts of the first metal contact pair are formed on both sides of the trench, the back is applied. Schematic illustration of a milled cross section. The fourth C is a schematic diagram of forming a second metal in contact with the polished surface according to the method of the second embodiment of the present invention. The fourth D shows a schematic diagram of a method according to the second embodiment of the present invention, a reflective module is adhered to the upper surface of the substrate, the reflective module has a plurality of bowl-shaped reflective plates, each of which surrounds a first metal contact pair, wherein A larger first metal contact is located at the center of the bowl-shaped reflecting plate. The fourth E illustrates a method according to the second embodiment of the present invention, which fixes one or two electrodes on different sides of the light emitting diode, and uses a bottom electrode to fix the first metal contact with a larger area. A schematic diagram of an electrode on the upper surface connected to a small metal contact at the nail line. The fourth F illustrates a method according to the second embodiment of the present invention, injecting a transparent resin or an epoxide into a bowl-shaped reflecting plate to complete a light-emitting diode chip package protection intention. Drawing number comparison table:

563263 圖式簡單說明 10 發光組件 12 基板 13、14 第一金屬接觸 15 第一封裝樹脂層 17 碗型反射板 20 銀膠或銲錫層 22 發光二極體 23 導線 27 第二封裝樹脂 28 罩模 29 透鏡 40 貫孔 33、34 第二金屬接觸 41 鍍層 42 切割線 72 玻璃環氧基板 73、74 金屬接觸 75 貫孔 76a、 76b 、玻璃環氧基板的上表面及 下表面 77 透明樹脂層 83、84 金屬電極 79 發光二極體 85、86 導線 88 密封體 87 銀膠或鲜錫層 91 母板 92 母板之孔洞 100 基板 100A 基板的上表面、 100B基板的下表面 105 溝渠 106 絕緣層 110A、第 一金屬接觸 110B 第二金屬接觸 1(H、102 電極 1 2 0 A碗型 反射板 103 發光二極體晶片 104 銀膠或鲜錫層 120 碗型反射板組件 130 發光二極體晶片 140 切割線 110AA較大的第一金屬接觸 1 1 0 A B較小 的第一金屬接觸563263 Brief description of the drawings 10 Light-emitting components 12 Substrates 13, 14 First metal contact 15 First encapsulation resin layer 17 Bowl-shaped reflector 20 Silver glue or solder layer 22 Light-emitting diode 23 Wire 27 Second encapsulation resin 28 Cover mold 29 Lens 40 Through holes 33, 34 Second metal contact 41 Plating layer 42 Cutting line 72 Glass epoxy substrate 73, 74 Metal contact 75 through holes 76a, 76b, upper and lower surfaces of glass epoxy substrate 77 Transparent resin layers 83, 84 Metal electrode 79 Light-emitting diode 85, 86 Lead 88 Sealing body 87 Silver glue or fresh tin layer 91 Mother board 92 Holes of mother board 100 substrate 100A upper surface of substrate, 100B lower surface 105 trench 106 insulation layer 110A, first One metal contact 110B second metal contact 1 (H, 102 electrode 1 2 0 A bowl-shaped reflector 103 light-emitting diode wafer 104 silver glue or fresh tin layer 120 bowl-shaped reflector assembly 130 light-emitting diode wafer 140 cutting line 110AA larger first metal contact 1 1 0 AB smaller first metal contact

第18頁Page 18

563263563263

圖式簡單說明 13、 14 第一金屬接觸 15 第一封裝樹脂層 17 碗型反射板 20 銀膠或銲錫層 22 發光二極體 23 導線 27 第二封裝樹脂 28 罩模 29 透鏡 40 貫孔 33^ 34 第二金屬接觸 41 鑛層 42 切割線 72 玻璃環氧基板 73^ 74 金屬接觸 75 貫孔 76a、 76b 、玻璃環氧基板的 上表面及 下表面 77 透明樹脂層 83> 84 金屬電極 79 發光二極體 85、 86 導線 88 密封體 87 銀膠或鲜錫層 91 母板 92 母板之孔洞 100 基板 100A 基板的上表面、 1 0 0 B基板的下表面 105 溝渠 106 絕緣層 1 10A 、第 一金屬接觸 1 10B 第二金屬接觸 10卜 102 電極 1 2 0 A碗型 反射板 103 發光二極體晶片 104 銀膠或鮮錫層 120 碗型反射板組件 130 發光二極體晶片 140 切割線 1 1 0ΑΑ較大的第一金屬接觸 1 1 0ΑΒ較小 的第一金屬接觸Brief description of the drawings 13, 14 First metal contact 15 First encapsulation resin layer 17 Bowl-shaped reflector 20 Silver glue or solder layer 22 Light-emitting diode 23 Wire 27 Second encapsulation resin 28 Cover mold 29 Lens 40 Through hole 33 ^ 34 Second metal contact 41 Ore layer 42 Cutting line 72 Glass epoxy substrate 73 ^ 74 Metal contact 75 through holes 76a, 76b, upper and lower surfaces of the glass epoxy substrate 77 Transparent resin layer 83> 84 metal electrode 79 light emitting two Polar body 85, 86 Lead wire 88 Seal body 87 Silver glue or fresh tin layer 91 Mother board 92 Holes of mother board 100 Substrate 100A Upper surface of substrate, 1 0 0 Lower surface of B substrate 105 Trench 106 Insulation layer 1 10A, first Metal contact 1 10B Second metal contact 10 BU 102 Electrode 1 2 0 A bowl-shaped reflector 103 light-emitting diode wafer 104 silver glue or fresh tin layer 120 bowl-shaped reflector assembly 130 light-emitting diode wafer 140 cutting line 1 1 0ΑΑ Large first metal contact 1 1 0ΑΒ Small first metal contact

Claims (1)

563263 六、申請專利範圍 1. 一種P型電極與η型電極位於同側之發光二極體表面黏著 方法，至少包含： 提供一導電導熱基座； 形成複數個溝渠於該基座中； 回填該溝渠以一絕緣層； 形成複數個第一金屬接觸對（pa i r )於該基座的上表 面，每一該第一金屬接觸對之一個形成於該溝渠左侧，另 一個形成於該溝渠右侧，用以固接一發光二極體；563263 6. Application patent scope 1. A method for adhering a light emitting diode on the same side of a P-type electrode and an η-type electrode, comprising at least: providing a conductive and thermally conductive base; forming a plurality of trenches in the base; backfilling the The trench has an insulating layer; a plurality of first metal contact pairs (pa ir) are formed on the upper surface of the base, one of each of the first metal contact pairs is formed on the left side of the trench, and the other is formed on the right side of the trench. Side for fixing a light emitting diode; 施以背向研磨技術，用以研磨該基座之下表面直到該 溝渠底部皆已裸露，因此，使每一第一金屬接觸對的兩個 第一金屬接觸被該絕緣層隔離；及 將複數個發光二極體——分別固接於該第一金屬接觸 對，該發光二極體係以覆晶的方式將其p型電極與η型電極 以焊錫層或銲球固接於該第一金屬接觸對上。 2. 如申請專利範圍第1項之方法，更包含在施以背向研磨 技術後形成第二金屬接觸對在該基板的下表面，每一第二 金屬接觸對的兩個亦各自分別被形成於該溝渠左、右兩 側，用以連接外部電極。Applying a back-grinding technique to polish the lower surface of the base until the bottom of the trench is exposed; therefore, two first metal contacts of each first metal contact pair are isolated by the insulating layer; and a plurality of Light-emitting diodes—fixed to the first metal contact pair, respectively, the light-emitting diode system fixes its p-type electrode and n-type electrode to the first metal in a flip-chip manner with a solder layer or a solder ball Touch up. 2. If the method of claim 1 of the patent application scope further includes forming a second metal contact pair on the lower surface of the substrate after applying the back-grinding technique, two of each second metal contact pair are also formed separately. The left and right sides of the trench are used to connect external electrodes. 3. 如申請專利範圍第1項之方法，更包含在將複數個發光 二極體--分別固接於該第一金屬接觸對步驟之前先黏著 一反射組件於該基座的上表面，該反射組件包含複數個碗 型反射板分別用以容置一個發光二極體，使得每個該第一3. If the method of claim 1 of the scope of patent application, further comprises affixing a reflective component to the upper surface of the base before the plurality of light emitting diodes are respectively fixed to the first metal contact pairing step, the The reflecting assembly includes a plurality of bowl-shaped reflecting plates respectively for accommodating a light-emitting diode, so that each of the first 第19頁 563263 六、申請專利範圍 金屬接觸對都為一個碗型反射板所包圍，且位置對準該碗 型反射板的中央位置，再以一透明樹脂或環氧樹脂層注入 該碗型反射板，以完成該複數個發光二極體之封裝。 4.如申請專利範圍第3項之方法，更包含在該複數個發光 二極體封裝後分割之，以形成單一發光二極體封裝體。 5 .如申請專利範圍第1項之方法，其中上述之基座係選自 矽、銅、鋁等材料之一種。Page 19 563263 VI. Patent application metal contact pairs are all surrounded by a bowl-shaped reflector, aligned with the center of the bowl-shaped reflector, and then injected into the bowl-shaped reflection with a transparent resin or epoxy resin layer Board to complete the packaging of the plurality of light emitting diodes. 4. The method according to item 3 of the patent application scope, further comprising dividing the plurality of light emitting diodes to form a single light emitting diode package. 5. The method according to item 1 of the scope of patent application, wherein the above-mentioned base is one selected from silicon, copper, aluminum and other materials. 6. 如申請專利範圍第1項之方法，其中上述之每一溝渠係 以微影蝕刻製程、放電加工、雷射切割或刀具切割其中任 一種製程形成，其深度約1 0 0至5 0 0微米之溝渠。 7. 如申請專利範圍第1項之方法，其中上述之絕緣層材料 係選自旋塗式玻璃 （300)或聚醯亞胺（？〇17丨111丨(16)或 BCB(B-staged bisbenzocyclobutene)樹脂等材料之一 種。6. The method according to item 1 of the patent application, wherein each of the trenches described above is formed by any one of a lithographic etching process, an electric discharge machining, a laser cutting, or a cutter cutting process, and has a depth of about 100 to 500. Micron channel. 7. The method according to item 1 of the patent application, wherein the above-mentioned insulating layer material is selected from the group consisting of spin-on glass (300) or polyimide (? 17 丨 111 丨 (16) or BCB (B-staged bisbenzocyclobutene) ) One of materials such as resin. 8. —種p型電極與η型電極位於同侧之發光二極體表面黏著 方法，該方法至少包含以下步驟： 提供一導電導熱基座； 形成複數個隔離區域於該基座中，用以將該基座隔離 成複數個部分；8. —A method for attaching a p-type electrode and an n-type electrode on the same side of a light-emitting diode. The method includes at least the following steps: providing a conductive and thermally conductive base; and forming a plurality of isolation regions in the base for Isolate the base into a plurality of sections; 第20頁 563263 六、申請專利範圍 形成複數個第一金屬接觸對（pair)於該基座的上表 面，每一該第一金屬接觸對之一個形成於該溝渠左側，另 一個形成於該溝渠右側，用以固接一發光二極體； 黏著一反射組件於該基座的上表面，該反射組件包含 複數個碗型反射板分別用以容置一個發光二極體； 將複數個發光二極體分別——置入複數個碗型反射板 之中，且使該每一發光二極體之該p型電極與η型電極分別 和和第一金屬接觸對的兩個金屬接觸以焊球或焊錫層形成 電性連接；及 注入透明樹脂或環氧樹脂層其中之一種於該碗型反射 板，以完成該複數個發光二極體之封裝。 9.如申請專利範圍第8項之方法，更包含在黏著一反射組 件前，形成第二金屬接觸對在該基座的下表面，每一該第 二金屬接觸對的兩個亦各自分別被形成於該溝渠左、右兩 側，用以連接外部電極。 1 0 .如申請專利範圍第8項之方法，其中上述之基座係選自 石夕、銅、铭等材料之一種。 1 1.如申請專利範圍第8項之方法，其中上述之形成複數個 隔離區域的步驟至少包含： 黏著一膠帶於該基座的上表面； 形成複數個狹缝於該基座上；Page 20 563263 6. The scope of the patent application forms a plurality of first metal contact pairs on the upper surface of the base, one of each of the first metal contact pairs is formed on the left side of the trench, and the other is formed on the trench. On the right side, a light-emitting diode is fixedly attached; a reflective component is adhered to the upper surface of the base, and the reflective component includes a plurality of bowl-shaped reflective plates for accommodating one light-emitting diode, respectively; The polar bodies are respectively placed in a plurality of bowl-shaped reflecting plates, and the p-type electrode and the n-type electrode of each light-emitting diode are respectively contacted with the two metals in contact with the first metal to form a solder ball. Or a solder layer to form an electrical connection; and injecting one of a transparent resin or epoxy resin layer into the bowl-shaped reflector to complete the packaging of the plurality of light emitting diodes. 9. The method according to item 8 of the scope of patent application, further comprising forming a second metal contact pair on the lower surface of the base before adhering a reflective component, and two of each of the second metal contact pair are separately respectively The left and right sides of the trench are formed to connect external electrodes. 10. The method according to item 8 of the scope of patent application, wherein the above-mentioned base is one selected from materials such as Shi Xi, copper, and Ming. 1 1. The method of claim 8 in the scope of patent application, wherein the step of forming a plurality of isolation areas at least includes: adhering an adhesive tape to the upper surface of the base; forming a plurality of slits on the base; 第21頁 563263 六、申請專利範圍 以一絕緣層回填該狹縫；及 移除該膠帶。 1 2 .如申請專利範圍第8項之方法，其中上述之形成複數個 隔離區域的步驟至少包含： 形成複數個溝渠於該基座中； 以一絕緣層回填該溝渠；及 施以背向研磨技術，研磨該基座之下表面直到該溝渠 底部皆已裸露，因此，使該每一第一金屬接觸對的兩個第 一金屬接觸被該絕緣層隔離。 1 3 .如申請專利範圍第8項之方法，其中上述之隔離區係以 選自旋塗式玻璃 （300)或聚醯亞胺（？〇17丨111丨(16)或 BCB(B-staged bisbenzocyclobutene)樹脂等材料之一種 作為隔離材料。 1 4. 一種p型電極與η型電極位於不同側之發光二極體的表 面黏著方法，至少包含： 提供一導電導熱基座； 形成複數個隔離區域於該基座中，用以將該基座隔離成複 數個部分； 形成複數個第一金屬接觸對（pa i r )於該基座的上表 面，每一該第一金屬接觸對之一個形成於該溝渠左側，另 一個形成於該溝渠右側，用以固接一發光二極體；Page 21 563263 6. Scope of patent application Backfill the slit with an insulating layer; and remove the tape. 12. The method according to item 8 of the scope of patent application, wherein the step of forming a plurality of isolation areas at least includes: forming a plurality of trenches in the base; backfilling the trenches with an insulating layer; and applying back grinding Technology, the lower surface of the base is polished until the bottom of the trench is exposed, so the two first metal contacts of each first metal contact pair are isolated by the insulating layer. 13. The method according to item 8 of the scope of patent application, wherein the above-mentioned isolation zone is selected from spin-on glass (300) or polyimide (? 17 丨 111 丨 (16) or BCB (B-staged One of materials such as bisbenzocyclobutene) resin is used as an isolation material. 1 4. A surface adhesion method of a light-emitting diode with p-type electrodes and η-type electrodes on different sides, at least comprising: providing a conductive thermal base; forming a plurality of isolation regions The base is used for isolating the base into a plurality of parts; a plurality of first metal contact pairs (pa ir) are formed on an upper surface of the base, and each of the first metal contact pairs is formed on The left side of the trench, and the other formed on the right side of the trench, for fixing a light emitting diode; 563263 六、申請專利範圍 黏著一反射組件於該基座的上表面，該反射組件包含 複數個碗型反射板分別用以容置一個發光二極體，其中每 一碗型反射板的中心與該第一金屬接觸對之其中一個對 準，用以使得當容置該發光二極體後，該發光二極體約在 該碗型反射板的中心位置； 將複數個發光二極體分別——置入複數個碗型反射板 之中，且使該每一發光二極體之底部電極與該碗型反射板 的中心的一個第一金屬接觸固接，該發光二極體之頂部電 極則以一導線連接至另一第一金屬接觸；及 注入透明樹脂或環氧樹脂層其中之一種於該碗型反射 板，以完成該複數個發光二極體之封裝。 1 5 .如申請專利範圍第1 4項之方法，更包含在黏著一反射 組件前，形成第二金屬接觸對在該基座的下表面，每一該 第二金屬接觸對的兩個亦各自分別被形成於該溝渠左、右 兩侧，用以連接外部電極。 1 6 .如申請專利範圍第1 4項之方法，其中上述之基座係選 自矽、銅、鋁等材料之一種。 1 7 .如申請專利範圍第1 4項之方法，其中上述之形成複數 個隔離區域的步驟至少包含： 黏著一膠帶於該基座的上表面； 形成複數個狹缝於該基座上；563263 6. Scope of patent application: A reflective component is adhered to the upper surface of the base. The reflective component includes a plurality of bowl-shaped reflective plates for accommodating a light-emitting diode, respectively. The center of each bowl-shaped reflective plate and the One of the first metal contact pairs is aligned so that when the light-emitting diode is contained, the light-emitting diode is approximately at the center of the bowl-shaped reflector; the plurality of light-emitting diodes are respectively-- It is placed in a plurality of bowl-shaped reflectors, and the bottom electrode of each light-emitting diode is fixedly contacted with a first metal in the center of the bowl-shaped reflector, and the top electrode of the light-emitting diode is A wire is connected to another first metal contact; and one of a transparent resin or an epoxy resin layer is injected into the bowl-shaped reflector to complete the packaging of the plurality of light emitting diodes. 15. The method according to item 14 of the scope of patent application, further comprising forming a second metal contact pair on the lower surface of the base before adhering a reflective component, and two of each of the second metal contact pair are also respectively The left and right sides of the trench are formed to connect external electrodes. 16. The method according to item 14 of the scope of patent application, wherein the above-mentioned base is selected from silicon, copper, aluminum and other materials. 17. The method according to item 14 of the scope of patent application, wherein the step of forming a plurality of isolation regions at least includes: adhering an adhesive tape to the upper surface of the base; forming a plurality of slits on the base; 第23頁 563263 六、申請專利範圍 以一絕緣層回填該狹縫；及 移除該膠帶。 1 8 .如申請專利範圍第1 4項之方法，其中上述之形成複數 個隔離區域的步驟至少包含： 形成複數個溝渠於該基座中； 以一絕緣層回填該溝渠；及 # 施以背向研磨技術，研磨該基座之下表面直到該溝渠 底部皆已裸露，因此，使該每一第一金屬接觸對的兩個第 一金屬接觸被該絕緣層隔離。 1 9 .如申請專利範圍第1 4項之方法，其中上述之隔離區係 以選自旋塗式玻璃 （SOG)或聚醯亞胺（poly imide)或 BCB(B-staged bisbenzocyclobutene )樹脂等材料之一種 作為隔離材料。 2 0. —種發光二極體表面黏著結構，該結構至少包含： 一導電導熱基座，具有一隔離區域形成於其中，將該 基座絕緣成兩部分；Page 23 563263 6. Scope of patent application Backfill the slit with an insulating layer; and remove the tape. 18. The method according to item 14 of the scope of patent application, wherein the step of forming a plurality of isolation areas includes at least: forming a plurality of trenches in the base; backfilling the trenches with an insulating layer; and # 施以 背Toward the grinding technique, the lower surface of the base is polished until the bottom of the trench is exposed, so the two first metal contacts of each first metal contact pair are isolated by the insulating layer. 19. The method according to item 14 of the scope of patent application, wherein the isolation zone is made of a material selected from spin-on glass (SOG), polyimide, or BCB (B-staged bisbenzocyclobutene) resin. One kind is used as insulation material. 2 0. A light-emitting diode surface adhesion structure, the structure includes at least: a conductive and thermally conductive base with an isolation region formed therein, the base is insulated into two parts; 兩個第一金屬接觸，分別形成於該基座的該兩部分的 上表面 ； 兩個第二金屬接觸，分別形成於該基座的該兩部分的 下表面，用以連接兩外部電極； 一發光二極體，該發光二極體之P型電極與η型電極位Two first metal contacts are respectively formed on the upper surfaces of the two parts of the base; two second metal contacts are respectively formed on the lower surfaces of the two parts of the base for connecting two external electrodes; Light-emitting diode, P-type electrode and n-type electrode position of the light-emitting diode 第24頁 563263 六、申請專利範圍 於同側經倒置後分別固接於該兩個第一金屬接觸； 一碗型反射板，包圍該發光二極體並固定於該基座的 上表面；及 一透明樹脂或環氧樹脂層封裝該發光二極體。 2 1.如申請專利範圍第2 0項之結構，其中上述之基座係選 自矽、銅、鋁等材料之一種。Page 24 563263 6. The scope of the patent application is fixed to the two first metal contacts respectively after being inverted on the same side; a bowl-shaped reflecting plate surrounds the light-emitting diode and is fixed on the upper surface of the base; and A transparent resin or epoxy resin layer encapsulates the light emitting diode. 2 1. The structure of item 20 in the scope of patent application, in which the above-mentioned base is selected from silicon, copper, aluminum and other materials. 2 2 .如申請專利範圍第2 0項之結構，其中上述之隔離區域 填入旋塗式玻璃 （SOG)或聚醯亞胺（poly imide)或 BCB(B — staged bisbenzocyclobutene)榷于月旨等材料之一 種。 2 3. —種發光二極體表面黏著結構，該結構至少包含： 一導電導熱基座’具有一隔離區域形成於其中’將該 基座絕緣成兩部分； 兩個第一金屬接觸，分別形成於該基座的該兩部分的 上表面 ；2 2. If the structure of the 20th item of the scope of patent application, the above-mentioned isolation area is filled with spin-on glass (SOG) or polyimide or BCB (B — staged bisbenzocyclobutene). One of the materials. 2 3. A light-emitting diode surface adhesion structure, the structure includes at least: a conductive and thermally conductive base 'having an isolation region formed therein' to insulate the base into two parts; two first metal contacts are formed respectively On the upper surface of the two parts of the base; 兩個第二金屬接觸，分別形成於該基座的該兩部分的 下表面，用以連接兩外部電極； 一發光二極體，且該發光二極體之一第一電極與一第 二電極分別位於下表面與上表面； 該發光二極體之該第一電極固接於該第一金屬接觸之 一個，而該第二電極透過釘線接觸餘下的該第一金屬接Two second metal contacts are respectively formed on the lower surfaces of the two parts of the base for connecting two external electrodes; a light emitting diode, and one of the first electrode and a second electrode of the light emitting diode Respectively located on the lower surface and the upper surface; the first electrode of the light-emitting diode is fixedly connected to one of the first metal contacts, and the second electrode contacts the remaining first metal connection through a nail line; 第25頁 563263Page 563 263 第26頁Page 26
TW091122418A 2002-09-27 2002-09-27 Surface mounting method for high power light emitting diode TW563263B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW091122418A TW563263B (en) 2002-09-27 2002-09-27 Surface mounting method for high power light emitting diode
DE10305021A DE10305021B4 (en) 2002-09-27 2003-02-07 Method of producing surface-mountable high-power light-emitting diodes
JP2003333088A JP3994346B2 (en) 2002-09-27 2003-09-25 Light-emitting diode surface mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW091122418A TW563263B (en) 2002-09-27 2002-09-27 Surface mounting method for high power light emitting diode

Publications (1)

Publication Number Publication Date
TW563263B true TW563263B (en) 2003-11-21

Family

ID=31989796

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091122418A TW563263B (en) 2002-09-27 2002-09-27 Surface mounting method for high power light emitting diode

Country Status (3)

Country Link
JP (1) JP3994346B2 (en)
DE (1) DE10305021B4 (en)
TW (1) TW563263B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577270B (en) * 2008-05-06 2012-11-21 鸿富锦精密工业（深圳）有限公司 Semi-conductor luminescence component
CN103875084A (en) * 2011-10-05 2014-06-18 普因特工程有限公司 Method for manufacturing a can package-type optical device, and optical device manufactured thereby
CN106663731A (en) * 2014-08-05 2017-05-10 西铁城电子株式会社 Semiconductor device and method for manufacturing same

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4557613B2 (en) * 2004-06-28 2010-10-06 京セラ株式会社 Light emitting element storage package, light emitting device, and lighting device
WO2006043796A1 (en) 2004-10-22 2006-04-27 Seoul Opto-Device Co., Ltd. Gan compound semiconductor light emitting element and method of manufacturing the same
JP4757477B2 (en) * 2004-11-04 2011-08-24 株式会社 日立ディスプレイズ Light source unit, illumination device using the same, and display device using the same
KR100696063B1 (en) 2005-01-05 2007-03-15 엘지이노텍 주식회사 Array light emitting device
KR100600372B1 (en) 2005-06-08 2006-07-18 엘지전자 주식회사 Light emitting device package and its manufacturing method
KR100638868B1 (en) 2005-06-20 2006-10-27 삼성전기주식회사 LED package having a metal reflective layer and a method of manufacturing the same
KR100629496B1 (en) 2005-08-08 2006-09-28 삼성전자주식회사 LED package and manufacturing method thereof
KR100616695B1 (en) * 2005-10-04 2006-08-28 삼성전기주식회사 High Power LED Package
KR100699161B1 (en) 2005-10-06 2007-03-22 엘지전자 주식회사 Light emitting device package and manufacturing method thereof
KR100650263B1 (en) 2005-11-24 2006-11-27 엘지전자 주식회사 Light emitting device package and manufacturing method thereof
JP4828248B2 (en) * 2006-02-16 2011-11-30 新光電気工業株式会社 Light emitting device and manufacturing method thereof
TWI351115B (en) 2007-05-18 2011-10-21 Everlight Electronics Co Ltd Light-emitting diode module and the manufacturing method thereof
KR100926931B1 (en) 2008-04-10 2009-11-19 주식회사 디에스엘시디 Lead frame for package base, electrical and electronic device package using same and manufacturing method thereof
CN101581404B (en) * 2008-05-13 2015-05-20 晶元光电股份有限公司 Light-emitting element module
TW201117428A (en) 2009-11-12 2011-05-16 Ind Tech Res Inst Method of manufacturing light emitting diode packaging
KR20110114494A (en) * 2010-04-13 2011-10-19 박재순 Light emitting module and manufacturing method of light emitting module
KR101897308B1 (en) * 2011-01-17 2018-09-10 루미리즈 홀딩 비.브이. A method for producing a light emitting device and a structure comprising the same
KR101262916B1 (en) 2011-10-05 2013-05-09 (주)포인트엔지니어링 method for light emitting device with can package and the light emitting device
WO2013061228A1 (en) * 2011-10-28 2013-05-02 Koninklijke Philips Electronics N.V. Light emitting device with integral shaped reflector
KR102005235B1 (en) * 2013-03-06 2019-07-30 삼성전자주식회사 Light Emitting diode package having flip-chip bonding structure
KR20150031849A (en) 2013-09-17 2015-03-25 (주)포인트엔지니어링 Substrate for mounting a chip and chip package
CN104576883B (en) 2013-10-29 2018-11-16 普因特工程有限公司 Chip installation array substrate and its manufacturing method
CN107210342B (en) * 2015-02-13 2019-01-18 西铁城电子株式会社 Light emitting device and its manufacturing method
US9666558B2 (en) 2015-06-29 2017-05-30 Point Engineering Co., Ltd. Substrate for mounting a chip and chip package using the substrate

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3146452B2 (en) * 1995-08-11 2001-03-19 スタンレー電気株式会社 Surface mount type LED element and method of manufacturing the same
DE19901918A1 (en) * 1998-01-28 1999-07-29 Rohm Co Ltd Light emitting semiconductor device e.g. an LED component
JP4065051B2 (en) * 1998-04-17 2008-03-19 スタンレー電気株式会社 Surface mount LED and manufacturing method thereof
WO2001009963A1 (en) * 1999-07-29 2001-02-08 Citizen Electronics Co., Ltd. Light-emitting diode
US6345903B1 (en) * 2000-09-01 2002-02-12 Citizen Electronics Co., Ltd. Surface-mount type emitting diode and method of manufacturing same
US20030057421A1 (en) * 2001-09-27 2003-03-27 Tzer-Perng Chen High flux light emitting diode having flip-chip type light emitting diode chip with a transparent substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577270B (en) * 2008-05-06 2012-11-21 鸿富锦精密工业（深圳）有限公司 Semi-conductor luminescence component
CN103875084A (en) * 2011-10-05 2014-06-18 普因特工程有限公司 Method for manufacturing a can package-type optical device, and optical device manufactured thereby
US10062812B2 (en) 2011-10-05 2018-08-28 Point Engineering Co., Ltd. Substrate for can package-type optical device and optical device using same
CN103875084B (en) * 2011-10-05 2018-11-13 普因特工程有限公司 Manufacture the method for shell encapsulation type optical device and the optical device using this method manufacture
CN106663731A (en) * 2014-08-05 2017-05-10 西铁城电子株式会社 Semiconductor device and method for manufacturing same
CN106663731B (en) * 2014-08-05 2019-08-06 西铁城电子株式会社 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
DE10305021B4 (en) 2005-10-06
JP2004119981A (en) 2004-04-15
JP3994346B2 (en) 2007-10-17
DE10305021A1 (en) 2004-04-08

Similar Documents

Publication Publication Date Title
TW563263B (en) Surface mounting method for high power light emitting diode
US6599768B1 (en) Surface mounting method for high power light emitting diode
US6730533B2 (en) Plastic packaging of LED arrays
TWI656615B (en) Three-dimensional integrated heat dissipation gain type semiconductor group and manufacturing method thereof
US10475778B2 (en) Optoelectronic component and method for producing an optoelectronic component
US9564568B2 (en) Flexible LED device with wire bond free die
TW535307B (en) Package of light emitting diode with protective diode
JP2557324B2 (en) Reflected light barrier and method of manufacturing the same
US20090127702A1 (en) Package, subassembly and methods of manufacturing thereof
CN101997074A (en) LED (Light Emitting Diode) surface patch type encapsulating structure based on silicon base plate and encapsulating method thereof
US20050225222A1 (en) Light emitting diode arrays with improved light extraction
KR20070113991A (en) Substrate processing method and method of manufacturing semiconductor device
KR20060129526A (en) Flip-chip LED Device without Submount
CN201904369U (en) LED (light emitting diode) surface-mounting package structure based on silicon substrate
KR20140004755A (en) Flexible Light Emitting Semiconductor Device
CN101958389A (en) A silicon substrate integrated LED surface mount structure with functional circuits and packaging method thereof
TW200425444A (en) Semiconductor package with build-up layers formed on chip and fabrication method of the semiconductor package
JP2010539676A (en) Semiconductor light emitting device package and method
JP2001230448A (en) Light-emitting element, light-emitting device, and manufacturing method thereof
JP2006012868A (en) Package for semiconductor light emitting device and semiconductor light emitting device using the same
US6075279A (en) Semiconductor device
JP2014154172A (en) Solar powered ic chip
US8722465B1 (en) Method of assembling semiconductor device including insulating substrate and heat sink
JPH08330352A (en) Semiconductor device
TW202322323A (en) Semiconductor module and manufacturing method thereof, electroic device, electroic module and manufacturing method of electroic module

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MK4A Expiration of patent term of an invention patent