五、發明說明（1 ) 【發明所屬技術領域】 本發明係關於一種m族氮化物半導體發光LED及其製造 方法’其係爲以s1單結晶當做基板之瓜族氮化物半導體 發光二極體（LED )，因單結晶基板吸收發光而減低高發光 強度之pn接合型異種構造型態之m族氮化物半導體發光 =極體。 【習用技術】 向來能呈現優良的元件驅動電源入出力導電性，同時能 呈現出切斷個別元件之便利的劈開性之代表性半導體基板 材料，眾所周知的係有矽（S i )單結晶等。近年來，已揭示 〜種以矽單結晶（矽）當做基板之瓜族氮化物半導體發光二 極體（LED)之技術構成（請參照電子文獻；第3 3 ( 2 3 )期 (1 9 9 7 年），第 1986〜1 987 頁）。 在以S !單結晶做爲基板之m族氮化物半導體發光LED 中，係配備有（例如）由氮化鋁•鎵（AlaGai-aN ; 0 S a S 1 ) 、與氮化鎵•銦（G a a I η !. a N ; 0 S a S 1 )、所構成之ρ η接合 型（DH )構造之發光部（請參照應用物理文獻；第72 ( 4 )期 (1 998 年），第 415〜417 頁）。 在以S 1單結晶當做基板與發光部來構成ΠΙ族氮化物半 導體時，係會有晶格不整合之關係。向來技術上之做法， 以提議在該單結晶基板與LED發光部間設置緩衝不整合之 中間層佔大多數。 例如，曾提議設置一以緩衝晶格不整合性之良質發光部 523940 五、發明說明（2) 構成層所得到的氮化鋁（A 1 N )之中間層（請參照上述之應用 物理文獻；以及特開平1 0 - 242586號公報）。 再者，已知有在如磷化鎵（GaP)或Si之閃鋅礦型（摻雜 鋅）之單結晶基板上，設置磷化硼（BP )之緩衝層之技術（請 參照特開平2 - 27 5682號、特開平2 - 288 3 7 1號、特開平2-2δδ；3δδ號各公幸g之說明書）。 更且，曾有在S i單結晶基板上設置鈦（T :)等金屬膜來 做爲中間層之提案（請參照特開2000 - 26 1 03 3號公報說明 書）。 此外，曾揭不一種在面方位{ 11 1 }之S i單結晶基板上配 置氮化鈦（ΤιΝ)層、或鈷（Co)等氮化物層來做爲中間層之 技術（請參照特開2000 - 286449號公報說明書）。 一方面，S i單結晶之禁止帶寬約1 . 1電子伏特（單位： eV)(請參照寺本嚴著，「半導體裝置槪論」（ 1 99 5年3月 30曰，培風館出版公司發行，初版，第28頁））。該禁止 帶寬（band gap)(例如）係比對應於藍色帶發光之遷移能小 半分以下。因此，以S i單結晶當做基板構成之LED，因1C 族氮化物半導體發光部所放射出之短波長發光，將會有被 S 1單結晶基板所吸收之缺點。也就是說，以S i當做基板 材料之瓜族氮化物半導體發光LED，因爲在S !單結晶基板 無法避免吸收發光，而會有難以得到高亮度之ΙΠ族氮化物 半導體LED。 爲了使以S!當做基板之ΠΙ族氮化物半導體LED的發光 523940 五、發明說明（3) 強度變高，則有設置一使s:基板和發光部間之發光向外 部反射之（Bragg)反射（DBR)構造層之公知的技術手段（請 參照 Mat. Res. Soc. Symp. Proc·，第 449 冊（1997 年）， 第79〜84頁）。DBR的習用例子，係以鋁之組成比（ = a)不同 之薄層反復重合之周期的積層構造來構成的。由DBR而來 之發光的反射率，雖然藉由增加積層之周期單位而增大， 但是會有積層操作繁雜之問題點。 又，向來，以除去LED基板而使LED發光強度提高之提 案佔大多數，但是，單方面地除去LED之基板部時將會損 及LED之機械強度，而不得不想出避免之合理對應策略。 爲此，期望利用簡便的技術手段而開發出一種具有充分機 械強度之高發光強度的ΙΠ族氮化物半導體發光LED。 【解決課題之發明】 本發明之目的係開發出一種高亮度的S i基板系ffl族氮 化物半導體LED等技術手段，其係以S i單結晶當做基板 之瓜族氮化物半導體LED，但不會失去LED之機械強度； 從LED除去S !單結晶基板，並適當地減低由發光部而來 之發光爲S !基板所吸收的程度。 【解決課題之手段】 意即，本發明是： [1 ] 一種m族氮化物半導體發光二極體，其特徵在於： 其係在一導電性矽（S i )單結晶基板之表面上，使至少含有 積層在介於由金屬或半導體所成之中間層間之由ΙΠ族氮化 523940 五、發明說明（4) 物半導體所構成的ρ η接合型異接合構造之發光部；該單 結晶基板之裡面上係備有裡面電極、以及在表面側的發光 部上之表面電極、和經除去上述單結晶基板裡面之裡面電 極以外領域的S i單結晶基板所形成之芽孔部。 [2 ]如上述[1 ]所記載之瓜族氮化物半導體發光二極體 ，其中S i單結晶基板之裡面電極，係爲連續一體成形的 金屬被覆電極。 [3 ]如上述[1 ]或[2 ]所記載之m族氮化物半導體發光二 極體，其中s i單結晶基板之裡面電極，係爲在穿孔部外 周上之連續一體成形的金屬被覆電極。 [4 ]如上述[1 ]至[3 ]中任一項所記載之ΠΙ族氮化物半導 體發光二極體，其中穿孔部之底面係具有上述之中間層。 [5 ]如上述[4 ]所記載之ΙΠ族氮化物半導體發光二極體 ，其中之中間層係具有由含有磷（P)之ΙΠ-V族元素之半導 體膜所構成之物件。 [6 ]如上述[4 ]或[5 ]所記載之m族氮化物半導體發光二 極體，其中之中間層係具有由ΜΝρχΡχ (式中，Μ係代表硼 以外之m族元素；X之範圍係爲〇<x s 1)所構成之物件。 [7 ]如上述[4 ]或[5 ]所記載之瓜族氮化物半導體發光二 極體’其中之中間層係具有由Β X M j _ χ Ρ (式中，Μ係代表硼 以外之m族元素；X之範圍係爲〇<χ $ 1 )所構成之物件。 [8 ]如上述[7 ]所記載之瓜族氮化物半導體發光二極體 ’其中之中間層係具有以瓜族構成元素、或V族構成元素 523940 五、發明說明（5) 之濃度成坡降來做爲組成坡降層之物件。 [9 ] 一種m族氮化物半導體發光二極體之製造方法，其 特徵在於：其係在導電性s i單結晶基板上設置由低溫緩 衝層、高溫緩衝層所成之中間層；接著在設置由pn接合 型異接合構造之下部接合層、發光層及上部接合層所成之 發光部之前、或在設置發光部之後，設置將單結晶基板裡 面予以穿孔成中空筒狀之穿孔部；同時在殘留的S i單結 晶基板裡面上設置第1導電型電極，於上部接合層上面設 置第2導電型電極。 [1 〇 ]如上述[9 ]所記載之m族氮化物半導體發光二極體 之製造方法，其中低溫緩衝層係藉M0CVD手段在250〜550 °C下成長之層，而高溫緩衝層係藉 MOCVD手段在 7 50〜1 2000°C下成長之層。 [1 1 ] 一種m族氮化物半導體發光二極體之製造方法， 其特徵在於：其係在導電性S i單結晶基板上設置由組成 坡降層所成之中間層；接著在設置由pn接合型異接合構 造之下部接合層、發光層及上部接合層所成之發光部之前 、或在設置發光部之後，設置將單結晶基板裡面予以穿孔 成中空筒狀之穿孔部；同時在殘留的S i單結晶基板裡面 上設置第1導電型電極，於上部接合層上面設置第2導電 型電極。 Π 2 ]如上述[9 ]至[1 1 ]中任一項所記載之瓜族氮化物半 導體發光二極體之製造方法，其中導電性s i單結晶基板 523940 五、發明說明（6) 之面方位係爲{ 111 }。 [1 3 ]如上述[9 ]至[1 2 ]中任一項所記載之瓜族氮化物半 導體發光二極體之製造方法’其係在Si單結晶基板表面 面上設置中間層之後，再設置將前述S1單結晶基板裡面 予以硏削成3 0 0〜8 0微米厚、接著除去敷設歐姆電極以外 部分之單結晶基板所成的穿孔部。 【發明之具體實施例】 本發明之ΙΠ族氮化物半導體發光二極體（led )，其係可 以在{ 1 00 }、{ 1 11 }、或{ 1 1 0 }等之面方位爲導電性s i單結 晶做爲基板而構成。可利用來做爲基板者有：具有電阻係 數在103Ω ·公分以下，較宜在ΙίΓΩ ·公分以下之導電性 的η型、ρ型物件中任何一者之S i結晶。因爲有必要利用 Si基板之導電性，在裡面舖設歐姆（omic)電極之簡易LED 構成，則不利用摻雜高電阻物之S i單結晶來當做基板較 佳。 由於在{ 1 1 1 }之結晶面上比在U 〇〇}等之結晶面上係存在 有更稠密的S 1原子，在利用{ 1 1 1丨之結晶面之S 1單結晶 來做爲基板時，由於更能夠抑制由中間層來的該構成元素 會向S i單結晶擴散、入侵，而可以方便地取得化學量上 之均衡。 當在舖設S 1單結晶基板裡面之歐姆電極（裡面電極=第1 電極）之區域上殘存有S i單結晶殘存時’則可利用公知的 蝕刻技術來除去該區域以外的S ί單結晶材料。與除去基 523940 五、 發明說明 ( 7) 板 全 部 的 情 形 比較起來，若使殘存的基板材料 限 定在形 成 裡 面 電 極 (第 1電極）之區域上，則可利用殘存 基 板 材料所 保有的 機 械 強 度，來更強固地支撐LED的效果 0 又 且 ， 藉 由 使 導 電 性 之 基板材料殘存，則其上會有造成低 接 觸 電 阻 之 歐 姆 性 優 異 的裡面電極（第1電極）之效果。 例 如 利 用 氯（C1)系氣體之電漿飩刻法而除 去 或 者 例 如 使 用 氟 酸（HF)和硝酸（HN03)之混合液， 以 溼 式 蝕 刻 技 術 而 除 去 較 佳。 也 就 是 說 選擇地除去存在於上述裡面電極 以 外 的 積 層 1¾ 域 上 的 Si 單結晶時，可以透過利用公知的 光 刻 而 々巳巳 擇 地 圖 樣 化 來 實 施。除去S i單結晶之區域，視 情 況 需 要 ， 可 望 達 到 裡 面 電極以外之可達到的範圍。經除 去 Si 單 結 晶 的 區 域 斷 面 積擴大程度，爲了避免由發光部 而 來 之 發 光 爲 Si 基 板材料所吸收，令向外部透光之面積 增 大 ? 將 可 提 昇 發 光 強 度 〇 實 施 C巳巳 进 擇 圖 樣化區域之斷面形狀中，則可依 照 上 述 理 由 之 鈾 刻加 工 容 易性、斷面積大小、以及瓜族氮 化 物 半 導 體 LED 之 機 械 強 度容許範圍內，而任意地選擇形 狀 〇 例 如 如 第 1 圖 所 示 LED基板1 1之裡面1 1 b之構成 該 LED 基 板 1 1係在裡面電極1 2以外之S 1單結晶1 1之 裡 面 Ts 域 上 設 置 唯 一 的 穿 孔部1 3。也可以配置複數個圓形 之 穿 孔 部 0 例 子 之 1 係 第 2圖所示之在S i單結晶基板1 1 之 .裡 面 lb 上 7 設 置 複 數 個圓形穿孔部1 3的例子。雖然在第 -9- 1 圖 和 523940 五、發明說明（8) 弟2圖例不之穿孔部1 3的水平斷面形狀係爲圓形，但橢 圓形或一部圓形所成之扇形等可簡便地選擇地圖樣化而達 成，較宜是以鈾刻加工成真正之圓狀。 做成任何之形狀，就增大發光強度而言，因穿孔部形狀 之影響，發光強度會隨著穿孔部之總斷面積之面積比例而 增加。因此，使除去S!單結晶之部分的斷面積，擴大到 不會因除去基板而使發光部的機械支撐力變得極端地低之 程度，將變得重要了。 又，穿孔部之斷面形狀，例如正方形、長方形、菱形、 或平行四邊形等，以設置方形之穿孔部爲佳。無論如何， 與上述實施例所記載之圓形狀穿孔部同樣地，可以藉由蝕 刻加工穿孔部之斷面形狀來改變形狀。 在第3圖中所示之構成例子，係爲將{ 1 1 1 ) - S i單結晶基 板11之裡面lib上設置一斷面形狀爲長方形帶狀之穿孔 部1 3之情況。設置斷面形狀爲方形之穿孔部時，使穿孔 部之總斷面積，擴大到不會因除去基板而使發光部的機械 支撐力變得極端地低之程度，就變得重要了。若期待經除 去S i基板之斷面積擴大時，則可以設置複數個方形狀之 穿孔部來達成。 又，也可以設置幾個穿孔部連結形狀之帶狀穿孔部。圓 形和方形之穿孔部也可沒有障礙地連結而成爲帶狀穿孔部 。若圓形和方形之穿孔部係如第4圖之組合時，與設置單 一之方形穿孔部之情況比較起來，可使基板之除去面積擴 -10- 523940 五、發明說明（9) 大’而具有使可透過發光面積擴大之效果。 上述任何水平斷面形狀之穿孔部之周圍上，係配置有做 爲基板裡面電極之歐姆電極。在p形之S 1基板上係被覆 有金（Au )等金屬被膜而形成裡面p形歐姆電極。在n形s i 基板上，例如，係構成由鋁（A1 )或鋁•銻（A1-Sb)合金所 成之η形歐姆電極。裡面電極雖然也可以是在S 1基板裡 面之相互孤立位置上設置複數個電極，但期盼設計成電氣 相互連續之一體模樣。 本發明m族氮化物半導體LED中之穿孔部，其底面係爲 上述中間層之結晶面。意即，穿孔部係停止在到達構成中 間層部位（可保要強度之地點）之時點，而露出做爲穿孔部 底面之中間層構成層。在此場合下，做爲底面之中間層之 穿孔部深度係約略等同於S i單結晶基板之厚度。又，在 中間層係可以設置有做爲穿孔部底面之發光部層構成層之 構成。但是，當對底面之發光部構成層進行穿孔時，雖然 可以增大發光強度，但由於會削弱支撐中間層之LED機械 強度，而使得全部之LED薄層化，以致機械強度劣化；因 而會成爲機械支撐發光部之障礙。從而，使以S i單結晶 做爲基板之穿孔部停在發光部下方之中間層時，如果以中 間層構成層當做底面而機械地支撐發光部，係爲較佳之構 成。 以中間層當做底面之穿孔部，係可以在S!單結晶基板 表面上積層中間層之後再設置，於中間層上設置單一 -11- 523940 五、發明說明（1〇) (si n gle)或2重（double)異種接合之發光部形成以則g受置 也可以。然而，此場合下，在穿孔部形成過程之積層步驟 中途上，因應需要而插入不連續之積層步驟，則步驟會變 得冗長。又，形成發光部之後再使形成也可以。 一方面，S i單結晶基板之厚度若是薄的時候，係可以比 較簡單地形成穿孔部。從而，在Si單結晶基板上成長積 層膜構造體（pn接合型異種構造之發光部）之後，對Si單 結晶基板裡面進行硏磨加工使厚度減少後再穿孔，係可以 簡單地形成穿孔部。 又，藉由以凹陷化（lapp mg)等硏削手段來減少Si單結 晶基板之厚度，由於使得積層膜構造體之總厚度減少，因 而具有可容易地進行個別元件之裁斷。 使S i單結晶基板之硏削量極大化以減少基板之厚度時 ，雖然穿孔部之形成及個別元件之裁斷變得容易，但支撐 LED之機械強度會變得不夠充分。殘存的S 1基板之厚度係 約300〜80微米，較宜是250〜100微米較爲適當。 構成中間層之手段係可考慮由氮化鈦（T i N )、氮化锆 (Z rN )等高熔點金屬氮化物、或者是鋁或金等單體金屬來 構成。 但是，在中間層係由金屬膜構成時，由於利用單體金屬 膜吸收發光部發光之程度會顯著地大，因而當以中間層吸 收或遮蔽發光，則會發生向穿孔部附近外部放出發光之強 度變得極度地低下之不合適的情況。 -12- 523940 五、 發明說明 (11) 又 著 色 的情形係端視高溶點金屬氮化物中 氮 與金屬元 素 之 化 學 量 論當量比而定。從而，使用金屬氮 化 物材料來 構 成 中 間 層 時，依照其著色程度，由穿孔部所 發 出的發光 強 度 會 有 不 安定的情形。形成ΙΠ族氮化物半導 體 發光LED 發 光 部 > 大 體上不是一般的m族氮化物半導體 與 具有大略 同 等 晶 格 常 數之單體金屬或金屬氮化物◦因此 之 故，由單 體 金 屬 或 金 屬氮化物所成之中間層，不需要藉 著 格不整合 來 構 成 優 異 的結晶性發光部以積層m族氮化物 半 導體層， 應 該 是 最 恰 當的。一方面，由半導體材料來構 成 中間層時 會 得 到 減 低不是藉著上述之金屬材料等之中 間 層而吸收 發 光 之 效 果 〇 從而 ， 因 爲含磷之m族氮化物半導體，與以 砷 (As)當做 構 成 元 素 之 Π - V族化合物半導體比較起來， 係 可以構成 較 優 越 機 械 強度之強固的中間層。又，硼化砷（B A s )之熔 點 大 約 爲 1 〇00°C，相對的磷化硼（BP)之熔點 大 約是高達 3000 °C (請參照寺本巖著，「半導體裝置槪 δ冊 」，1995 年 3 月 3 0日，培風館股份有限公司發行，初版， 第28頁） 〇 因 此 ? 含 磷之m -v族化合物半導體，在堆 積 上層之m 族 氮 化 物 半 導體時之超過約lOOOt之高溫步驟 上 ，係具有 可以 發 揮 中 間層構成之耐熱性之優點。 含 磷 之 Π -V族化合物半導體之實施例，係有磷化硼（b P ) N 氮 磷 化 鎵 (GatVxPx，0<X‘ 1 )、氮磷化鋁（Α1Νι -XPX，0<X 1) 、 氮 磷 化銦（InUx，0<XS 1 )、及氮磷化硼（ΒχΝι χΡ -13- 523940 五、發明說明（12) ，〇<Χ€ 1 )、磷化硼鎵（BxGa^xP，0<XS 1 )、以及磷化硼銦 (ΒχΙη^χΡ，0<XS 1 )等。中間層之傳導形式通常是與當做 基板之導電性單結晶之傳導形式一致。 S i單結晶與晶格常數相異的例子，如在由磷化硼（BP )所 成之緩衝層構成的情況下，以比較低溫來成長之緩衝層（ 低溫緩衝層），係會使得S 1單結晶和多層構造體構成層間 之晶格不整合性緩和，而造成結晶性優異的構成層之有效 作用。例如，以250 °C以上500°C以下之比較低的溫度成 膜之BP低溫緩衝層，係使S 1單結晶之晶格不整合緩和約 16.5%(請參照莊野克房著「半導體裝置技術（上卷）」， 財團法人東京大學出版社，1 992年6月25日發行，第9 刷，第7 7頁），而達成不匹配轉位等結晶缺陷密度少之良 質多層構造體之構造層之效果（請參照美國專利第606902 1 號）。 當中間層係由m族構成元素或v族構成元素濃度坡降的 結晶層構成時，s 1單結晶與上之例子，係會使得與m族氮 化物半導體層之晶格不整合性可以適當地緩和。例如，使 在S i單結晶基板之接合界面上銦之組成比爲0 . 67，因爲 在表面上之銦組成比減少之磷化硼•銦（ΒχΙη^χΡ，0<XS 1 ) 層，係會緩和與S!單結晶之不整合性；上層之優異的結 晶性，例如係可以構成氮磷化鎵（GaIVxPx，0<X ‘ 1 )所成 之中間層。引起晶格不整合之轉位等結晶缺陷少的優良結 晶性之ΠΙ族氮化物半導體層所成之組成坡降之中間層，係 一 14- 523940 五、發明說明（13) 可以由氮磷化鋁（A1IVXPX，〇<X s 1 )、氮磷化銦（Ini ·χρχ ，〇<XS 1)等來構成。 本發明HI族氮化物半導體LED中間層中之組成坡降層之 構成，例如具有氮磷化鎵（GaIVxPx，〇<χ $ 1 )等組成式 1，Μ係代表m族元素）之混晶，係在層厚增 加方向上使減少構成元素中氮（N)以外的磷（P)之組成比 (二X )，而其相對應的氮組成比（=1 - X )則會增加。組成坡降 之樣式可以是直線狀、曲線狀、或段階狀等。具有組成坡 降之中間層，其係可以在同層成膜時添加成長反應系內之 氮，藉由磷供給源添加量之時序變化而形成。具V族元素 組成坡降之中間層，係會具有緩如與S i單結晶之晶格不 整合性，而形成結晶優良之m族氮化物半導體層之作用。 又，中間層係可以由具有瓜族構成元素之組成坡降之含 有磷的m - v族氮化物半導體層來構成。特別是含有當做 瓜族構成元素之硼（B)，例如自磷化硼鎵（BxGapXP，0<X $ 1)、磷化硼銦（ΒχΙη^χΡ，0<XS 1)等組成式 BXM!.XP (0<X S 1，Μ係代表瓜族元素）所表示之磷化硼系混晶所成的S i 單結晶基板，而有效地緩和晶格不整合性係可以構成中間 層。以複數個m族構成元素與唯一的v族構成元素來構成 m - v族化合物半導體時，係可構成硼或其他in族構成元 素之組成坡降的中間層。 特別是在以s i單結晶當做基板之場合下，係可以利用 在層厚增加方向上使硼（B )之組成比（)增加，相反的， -15- 523940 五、發明說明（14) 減少鎵（Ga )或銦（I η )等他種ΠΙ族構成元素之組成比，依這 樣的組成坡降之組成坡降層來當做中間層較爲合宜。 舉例來說，可使用在與S:單結晶基板接合之界面上之 硼組成比（=X )爲0 . 0 2，而在表面之硼組成比爲1 . 0之 8}^31_)^，0<7<1)，則在31單結晶（晶格常數=：5.431人）基 板爲晶格整合，而且氮組成比爲 0 . 97之氮磷化鎵 (GaNmP。.^，晶格常數=4.5 3 8人）亦爲晶格整合者’來當 做實質的中間層。 具有m族元素組成坡降之中間層，舉例來說，係可以藉 由在以M0CVD法之中間層成膜時，使做爲反應系中ΙΠ族構 成元素原料之有機金屬化合物的供給量，經時變化而形成 本發明之]Π族氮化物半導體LED之構成，係含有透過由 導電性矽（S i )單結晶基板之表面上的半導體所成之中間層 所積層之m族氮化物半導體導電體所構成之pn接合型異 種接合構造之發光部，該單結晶基板之裡面上係備有裡面 電極、以及在表面側的發光部上之表面電極、和經除去上 述單結晶基板裡面之裡面電極以外領域的S i單結晶基板 所形成之穿孔部，取出發光部賴以發光之外部而構成。 構成本發明m族氮化物半導體發光二極體之穿孔部底面 之中間層，係具有強固支撐在穿孔部上所設置的發光部之 作用。 尤其，成爲本發明穿孔部底面之面方位{ 1 1 1 }面之中間V. Description of the Invention (1) [Technical Field of the Invention] The present invention relates to an m-group nitride semiconductor light-emitting LED and a method for manufacturing the same. LED), a m-type nitride semiconductor light-emitting = polar body of a pn-junction heterogeneous structure type that reduces the high light-emitting intensity because a single crystal substrate absorbs light. [Conventional Technology] A representative semiconductor substrate material that has always exhibited excellent element drive power input and output conductivity, and at the same time, it can exhibit convenient cleavability for cutting off individual components. Silicon (Si) single crystals are well known. In recent years, a technical composition of a melons nitride semiconductor light-emitting diode (LED) using silicon single crystal (silicon) as a substrate has been revealed (please refer to the electronic literature; Issue 3 3 (2 3) (1 9 9 7 years), pages 1986 ~ 1 987). The m group nitride semiconductor light-emitting LED using S! Single crystal as a substrate is provided with, for example, aluminum nitride gallium (AlaGai-aN; 0 S a S 1), and gallium nitride • indium ( G aa I η!. A N; 0 S a S 1), the light emitting part of the ρ η junction type (DH) structure (refer to the Applied Physics Literature; 72 (4) (1 998), No. 415 ~ 417 pages). When S 1 single crystal is used as a substrate and a light-emitting portion to form a group III nitride semiconductor, there is a relationship of lattice mismatch. It has always been technically proposed to provide a buffered non-integrated intermediate layer between the single-crystal substrate and the LED light-emitting portion. For example, it has been proposed to provide a good-quality light-emitting portion that buffers lattice inconsistency 523940 5. Invention Description (2) The intermediate layer of aluminum nitride (A 1 N) obtained by constituting the layer (please refer to the above-mentioned applied physics literature; And Japanese Patent Application Laid-Open No. 10-242586). Furthermore, a technique is known in which a buffer layer of boron phosphide (BP) is provided on a single crystal substrate such as gallium phosphide (GaP) or a sphalerite type (zinc-doped zinc) such as Si (see JP 2) -27 No. 5682, JP 2-288 3 7 No. 1, JP 2-2δδ; No. 3δδ (explained by each gong). Furthermore, a proposal has been made to provide a metal film such as titanium (T :) on the Si single crystal substrate as an intermediate layer (refer to the specification of Japanese Patent Application Laid-Open No. 2000-26 1 03 3). In addition, there has not been disclosed a technology in which a titanium nitride (Ti) layer or a cobalt (Co) nitride layer is used as an intermediate layer on an Si single crystal substrate with a plane orientation of {11 1} (please refer to Japanese Patent Application Laid-Open) 2000-286449 Specification). On the one hand, the forbidden bandwidth of Si single crystal is about 1.1 electron volts (unit: eV) (please refer to Teramoto's book, "Semiconductor Devices" (March 30, 1995, issued by Peifengguan Publishing Company, first edition) , P. 28)). The forbidden band gap (for example) is less than half a minute smaller than the migration energy corresponding to the emission of a blue band. Therefore, LEDs with Si single crystals as substrates will have the disadvantage of being absorbed by S 1 single crystal substrates due to the short-wavelength light emitted from the 1C nitride semiconductor light-emitting portion. That is to say, a Si nitride semiconductor light-emitting LED using Si as a substrate material cannot absorb light in the Si single crystal substrate, and it is difficult to obtain a III-II nitride semiconductor LED with high brightness. In order to make the III-nitride semiconductor LED with S! As the substrate emit light 523940 V. Description of the invention (3) The intensity is increased, so that there is a reflection (Bragg) reflection between the s: substrate and the light-emitting part to the outside (DBR) well-known technical means of the structural layer (see Mat. Res. Soc. Symp. Proc., Vol. 449 (1997), pp. 79-84). The conventional example of DBR is constituted by a laminated structure of a cycle in which thin layers with different aluminum composition ratios (= a) are repeatedly overlapped. Although the reflectance of light emitted from DBR is increased by increasing the period unit of the stack, there is a problem that the stack operation is complicated. In addition, conventionally, proposals for improving the light emitting intensity of LEDs by removing the LED substrates have taken the majority. However, unilaterally removing the substrate portion of the LEDs will damage the mechanical strength of the LEDs and it is necessary to come up with a reasonable countermeasure for avoidance. For this reason, it is desirable to develop a group III nitride semiconductor light-emitting LED with high luminous intensity with sufficient mechanical strength by using simple technical means. [Invention to Solve the Problem] The purpose of the present invention is to develop a high-brightness Si substrate based on ffl group nitride semiconductor LED and other technical means, which uses Si single crystal as the substrate of the melons nitride semiconductor LED, but not The mechanical strength of the LED will be lost; the S! Single crystal substrate is removed from the LED, and the degree of absorption of light emitted from the light emitting portion by the S! Substrate is appropriately reduced. [Means for solving the problem] That is, the present invention is: [1] A m-type nitride semiconductor light-emitting diode, which is characterized in that it is attached to the surface of a conductive silicon (S i) single crystal substrate so that A light-emitting part including at least a p-n-junction type heterojunction structure composed of a metal semiconductor or an intermediate layer made of a metal or a semiconductor, and a nitride of a group Π, 940,940. V. Description of the invention (4) A physical semiconductor; The back surface is provided with a back electrode, a surface electrode on the light emitting portion on the front side, and a bud hole portion formed by an Si single crystal substrate in a region other than the back surface electrode on the single crystal substrate. [2] The guar nitride semiconductor light emitting diode described in [1] above, wherein the inner electrode of the Si single crystal substrate is a continuous and integrally formed metal-coated electrode. [3] The m-nitride semiconductor light-emitting diode according to the above [1] or [2], in which the inner electrode of the si single crystal substrate is a continuous and integrally formed metal-coated electrode on the periphery of the perforated portion. [4] The III-nitride semiconductor light-emitting diode according to any one of the above [1] to [3], wherein the bottom surface of the perforated portion has the above-mentioned intermediate layer. [5] The III-nitride semiconductor light-emitting diode according to the above [4], wherein the intermediate layer has an object composed of a semiconductor film containing a III-V element of phosphorus (P). [6] The m-group nitride semiconductor light-emitting diode according to the above [4] or [5], wherein the intermediate layer has MNρχΡχ (where M is a group m element other than boron; the range of X It is an object composed of 0 < xs 1). [7] The melon-based nitride semiconductor light-emitting diode according to [4] or [5] above, wherein the intermediate layer has a group consisting of B XM j _ χ P (where M represents a group m other than boron Element; the range of X is an object composed of 0 < χ $ 1). [8] The melon-based nitride semiconductor light-emitting diode according to [7] above, wherein the intermediate layer has melon-based constituent elements or V-group constituent elements 523940 5. The concentration of the invention (5) is sloped Drops are used as objects that make up the slope. [9] A method for manufacturing a group m nitride semiconductor light-emitting diode, which is characterized in that: an intermediate layer made of a low-temperature buffer layer and a high-temperature buffer layer is provided on a conductive si single crystal substrate; In the pn junction type heterojunction structure, before or after the light emitting portion formed by the lower bonding layer, the light emitting layer, and the upper bonding layer, or after the light emitting portion is provided, a perforated portion that perforates the inside of the single crystal substrate into a hollow tube shape is provided. A first conductive type electrode is provided on the inside of the Si single crystal substrate, and a second conductive type electrode is provided on the upper bonding layer. [10] The method for manufacturing a group m nitride semiconductor light-emitting diode as described in [9] above, wherein the low-temperature buffer layer is a layer grown at 250 to 550 ° C by MOCVD, and the high-temperature buffer layer is borrowed MOCVD means a layer grown at 7 50 ~ 1 2000 ° C. [1 1] A method for manufacturing a group m nitride semiconductor light-emitting diode, which is characterized in that an intermediate layer made of a composition gradient layer is provided on a conductive Si single crystal substrate; A joint type heterojunction structure is provided before or after the light emitting part formed by the lower bonding layer, the light emitting layer, and the upper bonding layer, and the single crystal substrate is perforated into a hollow cylindrical perforated portion; at the same time, the remaining A first conductivity type electrode is provided on the inside of the Si single crystal substrate, and a second conductivity type electrode is provided on the upper bonding layer. Π 2] The method for producing a melons nitride semiconductor light-emitting diode as described in any one of [9] to [1 1] above, wherein the conductive si single crystal substrate 523940 5. Aspect of the invention description (6) The bearing system is {111}. [1 3] The method for producing a guar nitride semiconductor light-emitting diode according to any one of [9] to [1 2] above, wherein an intermediate layer is provided on the surface of a Si single crystal substrate, and then A perforated portion formed by cutting the inside of the S1 single crystal substrate to a thickness of 300 to 80 micrometers, and excluding a portion except for the ohmic electrode, is provided. [Specific embodiment of the invention] The III-nitride semiconductor light-emitting diode (LED) of the present invention can be conductive in a plane orientation of {1 00}, {1 11}, or {1 1 0} The si single crystal is configured as a substrate. Usable as the substrate are S i crystals of any of n-type and p-type objects having a conductivity of 103Ω · cm or less, preferably ΓΩ · cm or less. Because it is necessary to use the conductivity of the Si substrate, a simple LED structure with an ohmic electrode laid inside, it is better not to use S i single crystal doped with a high resistance material as the substrate. Since there are denser S 1 atoms on the crystal surface of {1 1 1} than on the crystal surface of U 〇〇} etc., S 1 single crystals using the crystal surface of {1 1 1 丨 are used as In the case of a substrate, the constituent element from the intermediate layer can be more inhibited from diffusing and invading into the Si single crystal, so that the chemical balance can be easily obtained. When the S i single crystal remains on the area of the ohmic electrode (the inner electrode = the first electrode) inside the S 1 single crystal substrate, the S single crystal material outside the area can be removed by a known etching technique. . Compared with the case of removing all of the substrate 523940 V. Invention description (7), if the remaining substrate material is limited to the area where the inner electrode (the first electrode) is formed, the mechanical strength retained by the remaining substrate material can be used. The effect of supporting the LED more strongly is 0. Furthermore, by leaving the conductive substrate material, there will be an effect of an inner electrode (first electrode) having excellent ohmicity and low contact resistance. For example, it can be removed by plasma engraving with chlorine (C1) -based gas, or it can be removed by a wet etching technique using a mixed solution of hydrofluoric acid (HF) and nitric acid (HN03). That is to say, when the Si single crystal existing on the layer 1¾ of the layer outside the inner electrode is selectively removed, it can be implemented by selectively patterning it by using a known photolithography. Except for the Si single crystal region, it is expected to reach the reachable range beyond the inner electrode, if necessary. After the Si single crystal is removed, the area of the cross-sectional area is enlarged. In order to avoid the light emitted from the light-emitting part to be absorbed by the Si substrate material, the area that transmits light to the outside is increased. Will increase the light-emitting intensity. In the cross-sectional shape of the patterned area, the shape can be arbitrarily selected in accordance with the easiness of uranium engraving, the size of the cross-sectional area, and the mechanical strength of the cucurbit nitride semiconductor LED for the reasons described above. The structure of the inner surface 1 1 b of the LED substrate 11 shown is that the LED substrate 11 is provided with a single perforated portion 13 on the inner Ts field of the S 1 single crystal 1 1 other than the inner electrode 12. It is also possible to arrange a plurality of circular perforated portions. For example, 1 is an example in which a plurality of circular perforated portions 13 are provided on the inner surface lb of the Si single crystal substrate 1 1 shown in FIG. 2. Although the horizontal cross-sectional shape of the perforated part 1 3 shown in Fig. -9-1 and 523940 V. Description of the Invention (8) Brother 2 is not circular, the ellipse or a sector formed by a circle may be It can be achieved by simply selecting the map sample, and it is more suitable to use uranium carving to make a true circle. With any shape, in terms of increasing the luminous intensity, due to the influence of the shape of the perforated portion, the luminous intensity will increase with the area ratio of the total cross-sectional area of the perforated portion. Therefore, it is important to enlarge the cross-sectional area of the portion where the S! Single crystal is removed to such an extent that the mechanical support force of the light-emitting portion is not extremely reduced by removing the substrate. The cross-sectional shape of the perforated portion, such as a square, rectangle, rhombus, or parallelogram, is preferably a square perforated portion. In any case, similarly to the circular perforated portion described in the above embodiment, the shape can be changed by etching the cross-sectional shape of the perforated portion. The configuration example shown in FIG. 3 is a case where a perforated portion 13 having a rectangular shape in cross section is provided on the inner surface lib of the {1 1 1)-Si single crystal substrate 11. When a perforated portion having a square cross-section is provided, it is important to increase the total cross-sectional area of the perforated portion to such an extent that the mechanical support of the light emitting portion is not extremely reduced by removing the substrate. If it is desired to expand the cross-sectional area by removing the Si substrate, a plurality of square-shaped perforations can be provided. Further, a plurality of band-shaped perforated portions may be provided in a shape in which the perforated portions are connected. Round and square perforations can also be connected without obstacles to form band-shaped perforations. If the round and square perforated parts are combined as shown in Fig. 4, compared with the case where a single square perforated part is provided, the removal area of the substrate can be expanded -10- 523940 V. Description of the invention (9) Large It has the effect of increasing the area through which light can be transmitted. An ohmic electrode is disposed around the perforated portion of any of the above-mentioned horizontal cross-sectional shapes as an electrode on the back surface of the substrate. A p-shaped S 1 substrate is covered with a metal film such as gold (Au) to form a p-shaped ohmic electrode on the inside. On the n-shaped si substrate, for example, an n-shaped ohmic electrode made of aluminum (A1) or aluminum-antimony (A1-Sb) alloy is formed. Although the inner electrode may be provided with a plurality of electrodes at mutually isolated positions on the inside of the S1 substrate, it is expected to be designed to be electrically continuous. In the m-nitride semiconductor LED of the present invention, the bottom surface of the perforated portion is the crystal surface of the intermediate layer. This means that the perforated portion stops at the point where it reaches the intermediate layer portion (a place where strength can be maintained), and the intermediate layer constituting layer serving as the bottom surface of the perforated portion is exposed. In this case, the depth of the perforated portion of the intermediate layer serving as the bottom surface is approximately equal to the thickness of the Si single crystal substrate. The intermediate layer may be provided with a light-emitting portion layer constituting layer as a bottom surface of the perforated portion. However, when perforating the light-emitting part constituent layer on the bottom surface, although the luminous intensity can be increased, the mechanical strength of the LED supporting the intermediate layer will be weakened, so that all the LEDs will be thinned and the mechanical strength will be deteriorated; Obstacles that mechanically support the light emitting part. Therefore, when the perforated portion using Si single crystal as the substrate is stopped at the intermediate layer below the light emitting portion, it is preferable to use the intermediate layer constituting layer as the bottom surface to mechanically support the light emitting portion. The intermediate layer is used as the perforated part of the bottom surface, which can be set after the intermediate layer is laminated on the surface of the S! Single crystal substrate, and a single -11-523940 is set on the intermediate layer. 5. Description of the invention (10) (single) or It is also possible to place the light emitting part of a double (double) heterojunction so that g can be placed. However, in this case, if a discontinuous lamination step is inserted in the middle of the lamination step in the process of forming the perforated portion as necessary, the step becomes lengthy. Alternatively, the light emitting portion may be formed after the light emitting portion is formed. On the one hand, if the thickness of the Si single crystal substrate is thin, the perforated portion can be formed relatively easily. Therefore, after a laminated film structure (a light emitting portion of a pn junction type heterostructure) is grown on the Si single crystal substrate, the inside of the Si single crystal substrate is subjected to honing to reduce the thickness and then perforated, so that the perforated portion can be simply formed. In addition, by reducing the thickness of the Si single crystal substrate by means of lapping (lapp mg) or the like, the total thickness of the laminated film structure is reduced, so that individual components can be easily cut. When the cutting amount of the Si single crystal substrate is maximized to reduce the thickness of the substrate, although the formation of the perforated portion and the cutting of individual components become easy, the mechanical strength to support the LED becomes insufficient. The thickness of the remaining S 1 substrate is about 300 to 80 microns, and more preferably 250 to 100 microns. The means for forming the intermediate layer may be composed of a high melting point metal nitride such as titanium nitride (T i N) or zirconium nitride (Z rN), or a single metal such as aluminum or gold. However, when the intermediate layer is composed of a metal film, the degree of absorption of light emitted from the light-emitting portion by the single-layer metal film is significantly large. Therefore, when the intermediate layer absorbs or shields light emission, the light-emitting portion is emitted to the outside of the vicinity of the perforated portion. It is not appropriate that the intensity becomes extremely low. -12- 523940 V. Description of the invention (11) The coloring situation depends on the stoichiometric equivalent ratio of nitrogen and metal elements in the high melting point metal nitride. Therefore, when a metal nitride material is used to form the interlayer, the luminous intensity emitted from the perforated portion may be unstable depending on the degree of coloration. Forming a III-nitride semiconductor light-emitting LED light-emitting part> Generally, it is not an ordinary m-nitride semiconductor and a single metal or metal nitride having a substantially equal lattice constant. Therefore, a single metal or metal nitride The intermediate layer thus formed does not need to constitute an excellent crystalline light-emitting portion by lamination to form an m-group nitride semiconductor layer, which should be the most appropriate. On the one hand, when the intermediate layer is formed of a semiconductor material, the effect of reducing light absorption is not obtained through the above-mentioned intermediate layer of a metal material or the like. Therefore, the phosphorous-containing m-type nitride semiconductor is used as arsenic (As). In comparison, the Π-V compound semiconductors constituting elements can form a strong intermediate layer with superior mechanical strength. In addition, the melting point of arsenic boride (BA s) is approximately 1,000 ° C, and the melting point of the corresponding boron phosphide (BP) is approximately 3000 ° C (refer to Teramoto Iwa, "Semiconductor Device 槪 vol.", Published on March 30, 1995 by Peifeng Pavilion Co., Ltd., First Edition, p. 28) ○ Therefore? Phosphorus-containing m-v group compound semiconductors, a high temperature step exceeding approximately 1,000 t when stacking m-type nitride semiconductors in the upper layer It has the advantage that the heat resistance of the intermediate layer structure can be exhibited. An embodiment of a phosphorus-containing group III-V compound semiconductor is boron phosphide (b P) N gallium nitride phosphide (GatVxPx, 0 < X '1), aluminum nitride phosphide (Α1Νι-XPX, 0 < X 1 ), Indium nitrogen phosphide (InUx, 0 < XS 1), and boron nitrogen phosphide (BχNι χP -13- 523940) V. Description of the invention (12), 0 < χ € 1 xP, 0 < XS 1), and indium boron phosphide (BχΙη ^ χP, 0 < XS 1), and the like. The conductive form of the intermediate layer is usually the same as the conductive single crystal of the substrate. Examples of different Si single crystals and lattice constants. For example, in the case of a buffer layer made of boron phosphide (BP), a buffer layer (low-temperature buffer layer) grown at a relatively low temperature will make S 1Single crystal and multi-layered structural bodies have a reduced lattice unconformity, which results in an effective effect of a structural layer having excellent crystallinity. For example, a BP low-temperature buffer layer formed at a relatively low temperature of 250 ° C to 500 ° C can reduce the lattice unconformity of S 1 single crystal by about 16.5% (see "Semiconductor Devices" Technology (Vol. 1) ", Tokyo University Press, June 25, 992, 9th issue, page 7-7), to achieve good quality multilayer structures with low density of crystal defects such as mismatched indexing. The effect of the structure layer (see US Pat. No. 6069021). When the intermediate layer is composed of a crystalline layer whose concentration of the m-group constituent element or the v-group constituent element decreases, the s 1 single crystal and the above example will make the lattice mismatch with the m-nitride semiconductor layer appropriate. To ease. For example, the composition ratio of indium on the bonding interface of the Si single crystal substrate is 0.67, because the boron phosphide • indium (ΒχΙη ^ χΡ, 0 < XS 1) layer with a reduced indium composition ratio on the surface is It will alleviate the unconformity with the S! Single crystal; the superior crystallinity of the upper layer, for example, can form an intermediate layer made of gallium nitride phosphide (GaIVxPx, 0 < X'1). The intermediate layer formed by the group III nitride semiconductor layer with excellent crystallinity, which has few crystal defects, such as the inconsistency of the crystal lattice, is a 14-523940. 5. Description of the invention (13) It can be phosphorized by nitrogen It is composed of aluminum (A1IVXPX, 0 < X s 1), indium nitrogen phosphide (Ini · χρχ, 0 &X; 1), and the like. The composition of the gradient layer in the intermediate layer of the HI group nitride semiconductor LED according to the present invention includes, for example, a mixed crystal having a composition formula 1 such as gallium nitride phosphide (GaIVxPx, 0 < χ $ 1), and M is a group m element In the direction of increasing the layer thickness, the composition ratio (two X) of phosphorus (P) other than nitrogen (N) in the constituent elements is reduced, and the corresponding nitrogen composition ratio (= 1-X) will increase. The pattern that composes the slope can be straight, curved, or stepped. The intermediate layer with a composition gradient can be formed by adding nitrogen in the growth reaction system during film formation in the same layer, and formed by a time series change of the addition amount of the phosphorus supply source. The intermediate layer with a Group V element forming a gradient will have the effect of slowing the unconformity with the Si single crystal lattice and forming a group m nitride semiconductor layer with excellent crystallinity. The intermediate layer may be composed of a m-v group nitride semiconductor layer containing phosphorus, which has a composition gradient of a melon group constituent element. In particular, it contains boron (B) as a constituent element of the melon family, such as boron gallium phosphide (BxGapXP, 0 < X $ 1), indium boron phosphide (ΒχΙη ^ χΡ, 0 < XS 1) and other composition formulas BXM !. S i single crystal substrate made of boron phosphide-based mixed crystals represented by XP (0 < XS 1, where M is a melon group element), and an intermediate layer can be formed by effectively mitigating lattice non-conformity. When a plurality of m-group constituent elements and the sole v-group constituent element are used to constitute a m-v compound semiconductor, the intermediate layer that can form a composition slope of boron or other in-group constituent elements is formed. Especially when the si single crystal is used as the substrate, it can be used to increase the composition ratio () of boron (B) in the direction of increasing layer thickness. Conversely, -15-523940 V. Description of the invention (14) Reduction of gallium (Ga) or indium (I η) and other types of composition elements of the III group of elements, it is more appropriate to use such a composition slope gradient composition gradient layer as an intermediate layer. For example, a boron composition ratio (= X) at the interface bonded to the S: single crystal substrate can be used, and the boron composition ratio at the surface is 1.0 of 8} ^ 31 _) ^, 0 < 7 < 1), then the 31 single crystal (lattice constant = 5.431 persons) substrate is lattice-integrated, and the nitrogen composition ratio is 0.997 for gallium nitride phosphide (GaNmP .. ^, lattice constant = 4.5 3 8 people) are also the lattice integrator's as the substantial middle layer. The intermediate layer with a group m element composition gradient, for example, can be obtained by forming the intermediate layer of the MOCVD method by using the supply amount of the organometallic compound as a raw material of the group Π element in the reaction system. The structure of the group III nitride semiconductor LED according to the present invention is formed by changing over time. The group III nitride semiconductor LED includes a conductive group m nitride semiconductor that is laminated through an intermediate layer formed by a semiconductor on the surface of a conductive silicon (S i) single crystal substrate. A light-emitting part of a pn junction type heterojunction structure composed of a body, the inside of the single-crystal substrate is provided with an inside electrode, a surface electrode on the light-emitting part on the surface side, and an inside electrode removed from the single-crystal substrate. The perforated portion formed on the Si single crystal substrate in the other field is configured by taking out the light emitting portion on which the light emitting portion depends. The intermediate layer constituting the bottom surface of the perforated portion of the group m nitride semiconductor light-emitting diode of the present invention has the function of strongly supporting the light-emitting portion provided on the perforated portion. In particular, it becomes the middle of the plane orientation {1 1 1} plane of the bottom surface of the perforated part of the present invention.
-16- 523940 五、發明說明（15) 層，係可控制構成中間層之元素向S1單結晶基板擴散侵 入，同時成爲比較強固地支撐在上部所設置的發光部之構 成部分。 由本發明in族氮化物半導體發光二極體之含有磷（P)的 HI - V族化合物半導體膜所構成之中間層，其係可形成能 防止伴隨著在之S 1單結晶基板之裡面施行穿孔時之損傷 、防止侵蝕發光部等優良耐化學性等之中間層。 特別是由具有ΠΙ族構成元素或V族構成元素之組成坡降 的組成坡降層所構成之中間層，係爲具有緩和s i單結晶 基板和上層HI族氮化物半導體層間之晶格不整合性、並形 成結晶缺陷密度小的良質m族氮化物半導體層，同時可強 固地支撐構成發光部之in族氮化物半導體層之作用。 由低溫緩衝層及高溫緩衝層所成之中間層之]π族氮化物 半導體LED，舉例來說，係可藉由以下之方法來製造。 使用η形或p形{ 1 1 1 } - S 1單結晶基板來當做基板材料， 在其上設置由在比高溫緩衝層之低溫所形成之低溫緩衝層 ’以及在前前述低溫緩衝層上設置在比低溫緩衝層高溫所 形成之高溫緩衝層所成之中間層。低溫緩衝層之成長，係 藉由M0CVD手段在約250〜5 50°C中使低溫成長成以非晶質 爲主的磷化硼層，接著在約7 50〜1 200°C中藉由MOCVD手段 使成長成單體之磷化硼層。由於高溫緩衝層保持了 LED之 機械強度，若自m-v族化合物半導體中選取機械強度比 較優良者，則低溫緩衝層係可做爲補助基板和高溫緩衝層 -17- 523940 五、發明說明（16) 之積層的化合物層來使用。 在中間層之上，係積層由下部接合層、發光層及上部接 合層所成之發光部。下部接合層係爲對高溫緩衝層晶格整 合之η形或p形HI族氮化物半導體結晶層，例如，在 850〜120CTC中設置對BP高溫緩衝層整合之GaNmP。.^結 晶層。其上，使在比上述下部接合層更低溫中形成η形或 Ρ形m族氮化物半導體結晶層之成膜。該發光層也較宜是 具有量子井構造。上部接合層係呈現與下部接合層相反傳 導系之P形或η形ΙΠ族氮化物半導體結晶層。其次，在經 蝕刻的基板殘部上設置第1導電性電極、在下部接合層上 設置第2導電性電極，來做爲ΙΠ族氮化物半導體LED。 另外，穿孔部也可以是在基板上積層中間層以後，於積 層基板、中間層及發光部之後、之間的任何步驟中進行穿 孔。再者，穿孔之前，於將s i基板裡面予以台陷化使硏 磨成約300〜80微米之厚度後，較宜是使用氟酸及硝酸之 混合液，在約1 〇〜3 0 °C下藉淫式餓刻使之穿孔。 又，具有以組成坡降緩衝層當做中間層之m族氮化物半 導體LED，舉例來說，其係可藉由以下之方法來製造。 使用η形或ρ形{ 111 } - S i單結晶基板來當做基板材料， 在其上設置藉由MOCVD手段在層厚增加方向上增加硼含量 而成膜成一組成坡降緩衝層。控制在成長時之S i單結晶 和相同晶格常數所得到的硼濃度，最終時，藉由在該上層 上所得到的與下部接合層相同程度的晶格常數，來使鉀 -18- 523940 五、發明說明（17) 源減量。組成坡降緩衝層係可以在大約600〜1 200°C之溫度 中成長。成長時，溫度較宜是保持一定，中途變化也可以 〇 在該組成坡降緩衝層上，積層由下部接合層、發光層及 上部接合層所成之發光部。 下部接合層係爲對組成坡降層晶格整合之P型]Π族氮化 物半導體，係可藉由MOCVD手段在約850〜1 200°C中成長。 其次，發光層係爲與接合層晶格整合之P型m族氮化物半 導體，該層也可以是具有量子井之構造。 第1導電性電極係使用鋁或其合金，而第2導電性電極 係使用金或其合金。 藉由以下之實施例來具體地說明本發明。 【實施例】 (實施例1 ) 以在裡面上設置圓形穿孔部之S i單結晶當做基板之瓜 族氮化物半導體LED爲例來具體地說明本發明。在第5圖 中所示者，係爲關於本實施例之LED1 0之斷面構造模式。 在基板1 0 1中係使用硼（B )摻雜p型（1 00 ) - S i單結晶。 在基板上堆積由磷化硼（BP)所成之低溫緩衝層102。該低 溫緩衝層係爲三乙基硼（（C2H5)3B) /磷化氫（PH3) /氫 (H2)系，乃藉由MOCVD法，在3 50 °C下成長而成。 緩衝層102之層厚係約14奈米厚。在低溫緩衝層102 之表面上，係利用上述MOCVD氣相成長手段，在950°C下 -19- 523940 五、發明說明（18) 積層摻雜鎂（Mg)之p型BP層來做爲高溫緩衝層103。在鎂 之摻雜源中，係使用雙環戊二炔化鎂（分子式：13^-(C5H4)2Mg)。高溫緩衝層之載體濃度約爲7X1018公分·3。 層厚度爲約3 50奈米。 高溫緩衝層上係積層磷組成比爲0.03 (Χ = 3%)的鎂摻雜 Ρ型磷化鎵（組成式：GaN^P^u)層來當做下部接合層 104。該 GaN^P。.” 層係以三甲基鎵（（CH3)3Ga) / 氨（NH3) /磷化氫（PH3) /氫（H2)系，常壓下，藉由MOVCD法，在 950 °C下成長。變爲立方晶之GaN。. μ層之載體濃度爲 約8X1 017公分_3，層厚度爲約3 50奈米。 下部接合層1 〇 4上係積層由η型氮化鎵•銦（組成式爲 GaxIn^N，0<Χ€ 1 )所成之發光層1〇5。發光層105所成之 矽（Si )摻雜GaxInuxN層，係以 （CH3) 3G a /三甲基銦 ((CH3)3In) / 二矽烷（Si2H6) / 氨（NH3) / 氫（H2)系，常 壓下，藉由MOVCD法，在85(TC下成長。發光層之平均銦 (I η )的組成爲0 . 1 0。發光層1 〇 5之厚度爲約8 0奈米。載 體濃度爲約3Χ1018公分。 Gao.^Ino.^N層105上積層坡降鋁（Α1)組成之矽（Si)摻 雜η型氮化銘•鎵（Alr Gan N)層來做爲上部接合層1〇6 。鋁組成比（=r )在層厚增加方向上係由〇 . 2到〇 (零）大略 地以單調的直線減少。層厚度爲2 0 0奈米。 以由上述之p型GaN〇.97pQ Q3下部接合層1〇4、n型 Gao^IiiG. 1()Ν發光層1〇5、及η型T Ga!_ r Ν組成坡降層 -20- 523940 五、發明說明（19) 所成之上邰接合層1 〇 6，來構成ρ η型接合型之二重異種接 合構造之發光部107。 如第6圖所示，利用公知的光刻技術和選擇性鈾刻技術 ，使Ρ型S i單結晶基板1 〇 1裡面之中央部分穿孔成底面 直徑爲約1 5 0微米之中空筒狀。穿孔部1 〇 9係藉由酸 (HF )和硝酸（HN03)之混合液蝕刻除去S i單結晶而形成。 穿孔部109之深度相當於基板101之層厚爲約300微米。 鈾刻係進行到在穿孔部1 0 9之底面1 0 9 a上露出BP低溫緩 衝層爲止。在穿孔部1 09周圍所殘存的S i單結晶基板1 0 1 上，係配置由金（Au)被膜所成之ρ型歐姆電極1 10。上部 接合層106之表面中央上，係配置由金（Au)被膜所成之圓 形歐姆電極108。！^型歐姆電極108之直徑爲約130微米 。穿孔部109之圓形底面109a之中心，與表面歐姆電極 1 08之水平形狀之中心係相合一致。 兩歐姆電極1 08、1 1 0間係有LED驅動用電流流通。電 流-電壓（I - V特性）方面，基於發光部1 08之良好的pn接 合特性，而顯示正常的整流特性。由I -V特性所求得之順 向電壓（即所謂的Vf)係爲約3V(順向電流=20毫安培）。又 ，逆向電壓爲約1 5 V (順向電流=1 0微安培）。當在順向上 流通20毫安培之作動電流時，係發射出發光中心波長爲 約47 0奈米之藍色光。發光光譜之半値寬度爲約18奈米 。利用一般的積分球測定晶片狀態時，其發光強度爲約1 8 微瓦特（A W )，因而提供了一高發光強度之m族氮化物半 -21 - 523940 五、發明說明（2〇) 導體發光元件。 (實施例2) 在磷（P )摻雜η型{ 111 ) - S i單結晶基板20 1上，藉由二 硼烷（分子式：B 2H6 ) / (CH3)3Ga / PH3 / H2系減壓， MOCVD法，在6 50 °C下，積層由在層厚增加方向上增加硼 (B)之組成比（=X)之磷化硼•鎵（組成式：BxGauP)組成坡 降層所成之緩衝層202。成長時之反應系壓力係設定爲約 3X104巴（單位：Pa)。緩衝層202之層厚係約0.8微米厚 。BxGaqP組成坡降層202之S!單結晶201間之接合面之 硼（B )之組成比（=X )，由S i單結晶相同晶格常數（=5 . 43 1 A ) 所得到者係爲0.02。又，在表面上之硼組成比，由上層之 GaNmP。.^與下部接合層相同晶格常數（=4. 538A)所得到 者係爲1.0。硼組成比（=X)係在緩衝層202之層厚增加方 向上以直線增加。硼組成比（=X )之變化，係經時地增加做 爲M0CVD反應系硼源之二硼供給量，相反的減少做爲鎵 (Ga)之（CH3)3Ga供給量。BxGa]_xP組成坡降層202成長時 ，係使用（Si2H6) -H2之混合氣體來摻雜矽（Si )。 BxGai_xP組成坡降層202上，係積層磷（P)組成比爲 〇.03 (X = 3%)的鎂摻雜p型磷化鎵（組成式：GaUo.03) 層來當做下部接合層204。該〇8心.97?().()3層係以三甲基鎵 ((CH3)3Ga) / PH3 / NH3 / H2 系，常壓下，藉由 M0VCD 法 ，在950°C下成長。變爲立方晶之GaNQ.97PQ.Q3層之載體濃 度爲約8X1 017公分_3，層厚度爲約85奈米。 -22- 523940 五、發明說明（2〇 下部接合層204上係積層由n型氮化鎵•銦（組成式爲 GaxIiiuN，〇<Χ$ 1)所成之發光層205。發光層205所成之 矽（Si)摻雜 GaxIn^xN 層，係以（CH3)3Ga/CH3)3In/Si2H6/ NH3/H2系，常壓下，藉由MOVCD法，在850°C下成長。發 光層之平均銦（In )的組成爲0 . 10。發光層20 5之厚度爲約 80奈米。載體濃度爲約3X1 018公分。 Gao.^InuoN層205上，係積層由鋅（Ζη)和鎂（Mg)共同 摻雜之P型G a N混晶所成之上部接合層2 0 6。 以由上述之P型GaNmP。.^下部接合層204、η型 Ga^oln。.^發光層205、及ρ型Ga Ν所成之上部接合層 206，來構成pn型接合型之二重異種接合構造之發光部 207。在第7圖中所示者，係爲本實施例之積層構造體之 斷面構造模式。 接著，硏磨{ 111 }-Si單結晶基板201之裡面，由約350 微米之基板厚度薄化成約1 50微米。然後，利用公知的光 刻技術和選擇性蝕刻技術，使η型S i單結晶基板201裡 面之中央部分穿孔，而設置如第8圖所示之長方形狀穿孔 部209。穿孔部209之短邊長爲200微米而長邊爲250微 米。穿孔部209係利用氯系氣體藉由蝕刻除去S i單結晶 201而形成。穿孔部209從基板裡面開始之深度爲約150 微米。在穿孔部109之底面109a上，係露出利用面方位 爲{111}之Si單結晶來做爲基板201所得到之{111}-BXGa !. XP緩衝層20 2。在穿孔部2 0 9周圍所殘存的S i單結 -23- 523940 五、發明說明（22) 晶上，係配置由金（Au)所成之η型歐姆電極208。 上部接合層206表面之大略全面上，係配置由金（Au)和 氧化鎳（N 1 0 )之重層構造厚膜所成之p型歐姆電極2 1 0。金 被膜之厚度爲約2微米，氧化鎳之厚度爲約0 . 5微米。 經對如上述構成之LED20之p型歐姆電極2 1 0間側之支 撐體導通接著後，測定通過穿孔部209之外部所射出的發 光強度。利用一般的積分球測定固定狀態時之發光強度爲 約1 6微瓦特（// W)，因而提供了一高發光強度之ΙΠ族氮化 物半導體發光元件。發光中心波長爲約470奈米。發光光 譜之半値寬度爲約20奈米。順向電壓（Vf)係爲約3V(順向 電流=20毫安培）。又，逆向電壓爲約15V(順向電流=10微 安培）。 【發明效果】 本發明係提供一種m族氮化物半導體led，其係在一導 電性矽（s 1 )單結晶基板之表面上，使至少含有積層在介於 由金屬或半導體所成之中間層間之由κ族氮化物半導體所 構成的pn接合型異接合構造之發光部；該單結晶基板之 裡面上係備有裡面電極、以及在表面側的發光部上之表面 電極、和經除去上述單結晶基板裡面之裡面電極以外領域 的s i單結晶基板所形成之穿孔部；同時由於在穿孔部之 周圍殘存之導電性s1單結晶基板上配置歐姆電極來做爲 LED之構成，因而完全地或大幅地減低因以失去機械強度 之S:單結晶基板做爲LED對發光之吸收；因爲取出會通 -24 - 523940 五、發明說明（23) 過LED發光之穿孔部的外部，而爲一種發光強度優良之瓜 族氮化物半導體LED。 又，在此等場合下，確實地除去露出爲穿孔部底面之中 間層結晶面那樣之S i單結晶時，可完全地避免在穿孔部 由於S i單結晶所引起之發光吸收，因爲可以不使發光強 度不致變低地發光之外部，因而得以提供一種高發光強度 之m族氮化物半導體LED。 再者，當確地除去穿孔部之S i單結晶，而在底面上露 出中間層之{ 111 }結晶面之構成時，係可以避免在穿孔部 由於S i單結晶所引起之發光吸收，同時配備有可以補足 因除去S i單結晶基板所引起的發光部支撐力下降而強固 地保持之發光部，因而得以提供一種基板除去型之m族氮 化物半導體LED。 尤其，在由含磷（P)之瓜-V族化合物半導體膜所成之中 間層構成之情況下，與以砷與構成元素之m - V族化合物 半導體比起來，由於機械強度更強固，又且熔點極高，因 而構成一種配備有可以強固地支撐發光部，而且耐熱性優 良之中間層之ΠΙ族氮化物半導體LED。 更且，藉由坡降m族構成元素或v族構成元素之組成所 成之組成坡降層來做爲中間層，因爲可以構成s i單結晶 和上層之m族氮化物半導體層雙方晶格整合之中間層，而 可以得到能減少因發光層與其界面間之晶格不整合性所引 起的結晶缺陷密度之良好結晶性的瓜族氮化物半導體層’ -25- 523940 五、發明說明（24) 而成爲一種高發光強度之m族氮化物半導體led。 【圖式之簡單說明] 第1圖所例示者，係爲穿孔部穿孔形狀之平面模式圖。 第2圖所例示者，係爲穿孔部穿孔形狀之平面模式圖。 第3圖所例示者，係爲穿孔部穿孔形狀之平面模式圖。 第4圖所例示者，係爲穿孔部穿孔形狀之平面模式圖。 第5圖所示者，係爲在實施例1中所記載之LED的斷面 模式圖。 第6圖所示者，係爲在實施例1中所記載之LED裡面構 造之模式圖。 第7圖所示者，係爲在實施例2中所記載之LED的斷面 模式圖。 第8圖所示者，係爲在實施例2中所記載之LED裡面構 造之模式圖。 【符號說明】 10、 20 m族氮化物半導體 1卜 1〇1 、 201 S i單結晶基板 lib 基板裡面 12 裡面電極 13 穿孔部 102 磷化硼（BP )低溫緩衝層 103 咼溫結晶層 104 、204 下方接合層 -26- 523940 五、發明說明（25) 1〇5 、 205 發光層 106 、 206 上方接合層 107 、 207 發光部 1〇8 、 208 η型歐姆電極 109 、 209 穿孔部 1 0 9 a、2 0 9 a 穿孔部底面 110、 210 ρ型歐姆電極 -27--16- 523940 V. Description of the invention (15) The layer can control the elements in the middle layer to diffuse into the S1 single crystal substrate, and at the same time, it becomes a component part that supports the light-emitting part provided on the upper part more firmly. The intermediate layer composed of the HI-V group compound semiconductor film containing phosphorus (P) of the in-group nitride semiconductor light-emitting diode of the present invention can be formed to prevent the perforation in the S 1 single-crystal substrate accompanying it. Intermediate layer with excellent chemical resistance, such as scratch resistance, erosion prevention, etc. In particular, the intermediate layer composed of a composition gradient layer having a composition gradient of a group III element or a group V composition element is for mitigating the lattice inconsistency between the si single crystal substrate and the upper HI group nitride semiconductor layer. And form a good m-group nitride semiconductor layer with a small crystal defect density, and at the same time can strongly support the role of the in-group nitride semiconductor layer constituting the light-emitting portion. An intermediate π-nitride semiconductor LED composed of a low-temperature buffer layer and a high-temperature buffer layer can be manufactured, for example, by the following method. A η-shaped or p-shaped {1 1 1}-S 1 single crystal substrate is used as the substrate material, and a low-temperature buffer layer formed at a lower temperature than the high-temperature buffer layer is provided thereon, and the aforementioned low-temperature buffer layer is provided. An intermediate layer formed by a high-temperature buffer layer formed at a higher temperature than a low-temperature buffer layer. The growth of the low-temperature buffer layer is achieved by MOCVD at a temperature of about 250 ~ 5 50 ° C to grow into an amorphous boron phosphide layer at low temperature, and then by MOCVD at about 7 50 ~ 1 200 ° C Means to grow into a single boron phosphide layer. Since the high-temperature buffer layer maintains the mechanical strength of the LED, if a mechanical strength is selected from the mv group compound semiconductor, the low-temperature buffer layer can be used as a supplementary substrate and high-temperature buffer layer -17-523940 V. Description of the invention (16) Use it as a compound layer. Above the intermediate layer, the ensemble layer is a light emitting portion formed by a lower bonding layer, a light emitting layer, and an upper bonding layer. The lower bonding layer is a η-shaped or p-shaped HI group nitride semiconductor crystal layer integrated with a lattice of a high-temperature buffer layer. For example, GaNmP integrated with a BP high-temperature buffer layer is provided in 850 ~ 120CTC. . ^ Crystalline layer. On this, a film of an n-shaped or P-shaped m-group nitride semiconductor crystal layer is formed at a lower temperature than the lower bonding layer. It is also preferable that the light emitting layer has a quantum well structure. The upper bonding layer is a P-shaped or n-shaped group III nitride semiconductor crystal layer having a conduction system opposite to the lower bonding layer. Next, a first conductive electrode is provided on the etched substrate stub, and a second conductive electrode is provided on the lower bonding layer as a group III nitride semiconductor LED. In addition, the perforated portion may be perforated in any step between the substrate, the intermediate layer, and the light-emitting portion after the intermediate layer is laminated on the substrate. In addition, before perforating, after the si substrate is trapped inside to be honed to a thickness of about 300 to 80 microns, it is more suitable to use a mixed solution of hydrofluoric acid and nitric acid at about 10 to 30 ° C. Kinky hungry carved to make it pierced. In addition, a group m nitride semiconductor LED having a gradient buffer layer as an intermediate layer can be manufactured, for example, by the following method. A η-shaped or ρ-shaped {111} -S i single crystal substrate is used as a substrate material, and a boron content is increased by MOCVD in the direction of increasing the layer thickness to form a gradient buffer layer. Control the boron concentration obtained by the Si single crystal and the same lattice constant during growth, and finally, make potassium-18-523940 by the same lattice constant as that of the lower bonding layer obtained on the upper layer. V. Description of the invention (17) Source reduction. The gradient buffer layer can grow at a temperature of about 600 ~ 1 200 ° C. During growth, the temperature is preferably kept constant, and changes can be made halfway. On this composition gradient buffer layer, a light-emitting portion formed by a lower bonding layer, a light-emitting layer, and an upper bonding layer is laminated. The lower bonding layer is a P-type] group III nitride semiconductor that is integrated into the lattice of the descending layer and can be grown by MOCVD at about 850 ~ 1 200 ° C. Secondly, the light-emitting layer is a P-type m-type nitride semiconductor integrated with the lattice of the bonding layer, and the layer may have a structure of a quantum well. The first conductive electrode is aluminum or an alloy thereof, and the second conductive electrode is gold or an alloy thereof. The present invention is specifically explained by the following examples. [Embodiment 1] (Embodiment 1) The present invention will be specifically described by taking a Si single crystal having a circular perforated portion on the inside as a substrate of a melon nitride semiconductor LED. The one shown in FIG. 5 is a sectional structure pattern of the LED 10 of this embodiment. In the substrate 101, p-type (100) -Si single crystal doped with boron (B) is used. A low-temperature buffer layer 102 made of boron phosphide (BP) is deposited on the substrate. The low-temperature buffer layer is a triethylboron ((C2H5) 3B) / phosphine (PH3) / hydrogen (H2) system, which was grown by MOCVD at 3 50 ° C. The layer thickness of the buffer layer 102 is about 14 nm. On the surface of the low-temperature buffer layer 102, the above-mentioned MOCVD vapor phase growth method is used at 950 ° C to -19-523940. V. Description of the invention (18) A p-type BP layer doped with magnesium (Mg) is used as a high temperature. Buffer layer 103. In the magnesium doping source, dicyclopentadiynyl magnesium (molecular formula: 13 ^-(C5H4) 2Mg) was used. The carrier concentration of the high-temperature buffer layer is approximately 7 × 1018 cm · 3. The layer thickness is about 3 50 nm. On the high-temperature buffer layer, a magnesium-doped P-type gallium phosphide (composition formula: GaN ^ P ^ u) layer with a phosphorus composition ratio of 0.03 (X = 3%) is used as the lower bonding layer 104. The GaN ^ P. . "The layer is made of trimethylgallium ((CH3) 3Ga) / ammonia (NH3) / phosphine (PH3) / hydrogen (H2)). Under normal pressure, it is grown at 950 ° C by MOVCD method. Cubic GaN .. The carrier concentration of the μ layer is approximately 8X1 017 cm_3, and the layer thickness is approximately 3 50 nm. The lower bonding layer 104 is composed of n-type gallium nitride • indium (composition formula It is a light emitting layer 105 formed by GaxIn ^ N, 0 < χ 1). The silicon (Si) formed by the light emitting layer 105 is doped with a GaxInuxN layer, which is (CH3) 3G a / trimethylindium ((CH3 ) 3In) / Disilane (Si2H6) / Ammonia (NH3) / Hydrogen (H2) system, grown at 85 (TC) by MOVCD method under normal pressure. The average indium (I η) composition of the light emitting layer is 0 10. The thickness of the light emitting layer 105 is about 80 nm. The carrier concentration is about 3 × 1018 cm. The Gao. ^ Ino. ^ N layer 105 is doped with silicon (Si) doped with a layer of aluminum (Al). η-type nitride indium gallium (Alr Gan N) layer is used as the upper bonding layer 106. The aluminum composition ratio (= r) is approximately monotonic from 0.2 to 0 (zero) in the direction of increasing layer thickness. The straight line decreases. The layer thickness is 200 nanometers. The lower part of the p-type GaN is 0.97pQ Q3. The bonding layer 104, n-type Gao ^ IiiG. 1 () N light-emitting layer 105, and η-type TGa! _RN form a slope-down layer-20- 523940 V. Description of the invention (19) The plutonium bonding layer 10 is used to form the light emitting portion 107 of the ρ η-type double-type heterojunction bonding structure. As shown in FIG. 6, the P-type Si is formed using a known photolithography technique and a selective uranium etching technique. The central portion of the single crystal substrate 1 〇1 is perforated into a hollow cylindrical shape with a bottom surface diameter of about 150 microns. The perforated portion 109 is etched to remove Si single by a mixed solution of acid (HF) and nitric acid (HN03). It is formed by crystallization. The depth of the perforated portion 109 is equivalent to the layer thickness of the substrate 101 of about 300 microns. The uranium engraving is performed until the BP low-temperature buffer layer is exposed on the bottom surface 1 0 9 a of the perforated portion 10. On the Si single crystal substrate 1 0 1 remaining around 09, a ρ-type ohmic electrode 1 made of a gold (Au) film is arranged. On the center of the surface of the upper bonding layer 106, a gold (Au) film is arranged. The resulting circular ohmic electrode 108. The diameter of the ^ -type ohmic electrode 108 is about 130 microns. The center of the circular bottom surface 109a of the perforated portion 109 and the surface The center of the horizontal shape of the ohmic electrode 108 is consistent. The two ohmic electrodes 108 and 110 have a current for driving the LED. The current-voltage (I-V characteristics) is based on the good performance of the light emitting unit 108. pn junction characteristics, while showing normal rectification characteristics. The forward voltage (the so-called Vf) obtained from the I-V characteristic is about 3V (forward current = 20 mA). In addition, the reverse voltage is about 15 V (forward current = 10 microamperes). When an operating current of 20 milliamperes flows in the forward direction, the system emits blue light with a center wavelength of about 470 nm. The half-width of the emission spectrum is about 18 nm. When using a general integrating sphere to determine the state of the wafer, its luminous intensity is about 18 microwatts (AW), so it provides a high luminous intensity of m-nitride semi--21-523940. 5. Description of the invention (20) Conductor luminescence element. (Example 2) On a phosphorus (P) -doped n-type {111) -Si single crystal substrate 201, diborane (molecular formula: B 2H6) / (CH3) 3Ga / PH3 / H2 system was decompressed. , MOCVD method, at 6 50 ° C, the build-up layer is composed of boron phosphide • gallium (composition formula: BxGauP) which increases the composition ratio (= X) of boron (B) in the direction of increasing layer thickness. Buffer layer 202. The response pressure during growth is set to approximately 3 × 104 bar (unit: Pa). The layer thickness of the buffer layer 202 is about 0.8 micrometers. The composition ratio (= X) of boron (B) at the junction surface between the S! Single crystal 201 of BxGaqP forming the gradient layer 202 is obtained from the same lattice constant (= 5.43 1 A) of the Si single crystal. Is 0.02. The boron composition ratio on the surface is determined by the upper layer of GaNmP. The same lattice constant (= 4.538A) as that of the lower bonding layer is obtained as 1.0. The boron composition ratio (= X) increases linearly in the direction of increasing the layer thickness of the buffer layer 202. The change in the boron composition ratio (= X) increases with time the supply of diboron as a boron source for the MOCVD reaction system, and decreases in the opposite direction as the supply of (CH3) 3Ga for gallium (Ga). BxGa] _xP is composed of (Si2H6) -H2 mixed gas to dope silicon (Si) when the gradient layer 202 grows. BxGai_xP is composed of a graded layer 202 with a phosphorous (P) composition ratio of 0.03 (X = 3%) and a magnesium-doped p-type gallium phosphide (composition formula: GaUo.03) layer as the lower bonding layer 204 . The 〇8 heart. 97? (). () 3 layer is trimethylgallium ((CH3) 3Ga) / PH3 / NH3 / H2 series, under normal pressure, by the MOCD method at 950 ° C. The carrier concentration of the cubic GaNQ.97PQ.Q3 layer was about 8 × 1 017 cm_3, and the layer thickness was about 85 nm. -22- 523940 V. Description of the invention (20) The light-emitting layer 205 made of n-type gallium nitride • indium (composition formula: GaxIiiuN, 0 < χ $ 1) on the lower bonding layer 204. The light-emitting layer 205 The resulting silicon (Si) -doped GaxIn ^ xN layer is based on (CH3) 3Ga / CH3) 3In / Si2H6 / NH3 / H2 system. Under normal pressure, it is grown at 850 ° C by the MOVCD method. The average indium (In) composition of the light-emitting layer was 0.10. The thickness of the light emitting layer 20 5 is about 80 nm. The carrier concentration was about 3X1 018 cm. On the Gao.InuoN layer 205, the ensemble layer is an upper bonding layer 206 formed of a P-type G a N mixed crystal doped with zinc (Zη) and magnesium (Mg). Based on the above-mentioned P-type GaNmP. . ^ Lower bonding layer 204, n-type Ga ^ oln. The light emitting layer 205 and the upper bonding layer 206 formed by the p-type GaN constitute the light-emitting portion 207 of the double heterojunction bonding structure of the pn-type bonding type. The structure shown in Fig. 7 is a sectional structure pattern of the laminated structure of this embodiment. Next, the inside of the {111} -Si single crystal substrate 201 was honed, and the thickness of the substrate was reduced from about 350 μm to about 150 μm. Then, the central portion of the inner surface of the n-type Si single crystal substrate 201 is perforated by a known photolithography technique and selective etching technique, and a rectangular perforated portion 209 as shown in Fig. 8 is provided. The short side of the perforated portion 209 is 200 m and the long side is 250 m. The perforated portion 209 is formed by removing Si single crystal 201 by etching using a chlorine-based gas. The depth of the perforated portion 209 from the inside of the substrate is about 150 microns. On the bottom surface 109a of the perforated portion 109, a {111} -BXGa !. XP buffer layer 202 obtained by using a Si single crystal having a plane orientation of {111} as the substrate 201 is exposed. The Si single junction remaining around the perforated portion 209 -23- 523940 V. Description of the invention (22) A n-type ohmic electrode 208 made of gold (Au) is arranged on the crystal. On the surface of the upper bonding layer 206, a p-type ohmic electrode 2 1 0 formed of a thick film of a heavy layer structure of gold (Au) and nickel oxide (N 1 0) is arranged on a substantially comprehensive surface. The thickness of the gold coating was about 2 microns, and the thickness of the nickel oxide was about 0.5 microns. After the support on the p-type ohmic electrode 210 between the LED 20 having the above-mentioned configuration is turned on, the intensity of light emitted through the outside of the perforated portion 209 is measured. The luminous intensity in a fixed state measured by a general integrating sphere is about 16 microwatts (// W), thus providing a group III nitride semiconductor light-emitting device with high luminous intensity. The emission center wavelength is about 470 nm. The half-width of the luminescence spectrum is about 20 nm. The forward voltage (Vf) is about 3V (forward current = 20 mA). The reverse voltage was about 15V (forward current = 10 microamperes). [Effects of the Invention] The present invention provides an m group nitride semiconductor LED, which is on the surface of a conductive silicon (s 1) single crystal substrate with at least a laminated layer interposed between an intermediate layer made of a metal or a semiconductor. A light-emitting portion of a pn-junction heterojunction structure composed of a κ group nitride semiconductor; a back surface electrode and a surface electrode on the light-emitting portion on the surface side are provided on the inside of the single crystal substrate; A perforated portion formed by a si single crystal substrate in a field other than the inner electrode inside the crystalline substrate; meanwhile, since the ohmic electrode on the conductive s1 single crystal substrate remaining around the perforated portion is used as the structure of the LED, it is completely or substantially The ground is reduced due to the loss of mechanical strength of the S: single crystal substrate as the absorption of light from the LED; because it will pass through -24-523940 V. Description of the invention (23) The outside of the perforated part that emits light through the LED is a kind of light emission intensity Excellent melon nitride semiconductor LED. Also, in such cases, when S i single crystals such as the intermediate layer crystal surface exposed as the bottom surface of the perforated portion are reliably removed, the luminous absorption due to the S i single crystal in the perforated portion can be completely avoided, because An outer portion that emits light without reducing the luminous intensity, thereby providing a m-nitride semiconductor LED with high luminous intensity. In addition, when the S i single crystal of the perforated portion is exactly removed, and the {111} crystal surface of the intermediate layer is exposed on the bottom surface, the luminous absorption caused by the S i single crystal in the perforated portion can be avoided, and at the same time, The m-nitride semiconductor LED with a substrate-removing type is provided because it is equipped with a light-emitting part that can compensate for the decrease in the light-emitting part supporting force caused by the removal of the Si single crystal substrate and is strongly held. In particular, in the case where the intermediate layer is made of a melon-V compound semiconductor film containing phosphorus (P), the mechanical strength is stronger than that of the m-V compound semiconductor composed of arsenic and constituent elements. In addition, the melting point is extremely high, so that a group III nitride semiconductor LED equipped with an intermediate layer that can strongly support the light emitting portion and has excellent heat resistance is constructed. In addition, the intermediate layer is formed by a composition gradient layer formed by the composition of the gradient m group constituent elements or the group V constituent elements, because the si single crystal and the upper group nitride semiconductor layer can be integrated into a lattice. Intermediate layer to obtain a good crystalline melon nitride semiconductor layer that can reduce the density of crystal defects caused by lattice mismatch between the light emitting layer and its interface '-25- 523940 V. Description of the invention (24) It becomes a m-type nitride semiconductor led with high luminous intensity. [Brief description of the drawings] The example illustrated in FIG. 1 is a plan view of the perforated shape of the perforated portion. The example illustrated in FIG. 2 is a schematic plan view of the perforated shape of the perforated portion. The example illustrated in FIG. 3 is a schematic plan view of the perforated shape of the perforated portion. The example illustrated in FIG. 4 is a schematic plan view of the perforated shape of the perforated portion. The figure shown in Fig. 5 is a schematic sectional view of the LED described in the first embodiment. The diagram shown in FIG. 6 is a schematic diagram of the structure constructed in the LED described in the first embodiment. FIG. 7 is a schematic cross-sectional view of the LED described in the second embodiment. The diagram shown in FIG. 8 is a schematic diagram of the structure constructed in the LED described in the second embodiment. [Explanation of symbols] 10, 20 m group nitride semiconductors 101, 101, 201 Si single crystal substrate lib substrate inside 12 inner electrode 13 perforated part 102 boron phosphide (BP) low temperature buffer layer 103 high temperature crystal layer 104, 204 Lower bonding layer-26- 523940 V. Description of the invention (25) 105, 205 Light emitting layer 106, 206 Upper bonding layer 107, 207 Light emitting portion 108, 208 n-type ohmic electrode 109, 209 Perforated portion 1 0 9 a, 2 0 9 a 110, 210 ρ-type ohmic electrode