經濟部中央標準局員工消背合作社印11 »54 3 9 2 4 - 4M3twfd〇c/006 A7 ______ B7 五、發明説明（/ ) 本發明是有關於一種導線架(Lead Frame)的結構，且特 別是有關於一種具有分離式晶片座（Die Pad)的導線架結 構。 在半導體產業中，積體電路（Integrated Circuits, 1C)的 生產，主要分爲三個階段：矽晶片的製造、積體電路的製 作以及積體電路的封裝(Package)等。就積體電路的封裝而 言1此即是完成積體電路成品的最後步驟。在封裝製程中， 導線架是提供晶片(Die)安放於導線之基座，並作爲晶片與 印刷電路板(Printed Circuit Board, PCB)或其他適當元件之 間電性連接的媒介。 請參照第1圖，其所繪示的是一種導線架的平面結構 示意圖。一般未經加工之導線架10係呈片狀結構，可槪 略區分爲兩部份：平坦部與導腳部份。平坦部就是一般習 稱的晶片座12(Bar Pad, Die Pad)，其功用爲承載晶片。而 導腳部份又可再細分爲：內導腳部份14(Iiuernal Lead)、腳 肩部份 16(Lead Shoulder)及外導腳部份 18(External Lead)。 就導線架整體而言，還可區分出包裝區22(Package Area)， 此即積體電路(1C)包裝之區域，而包裝區22內又包含打導 線區20(Bonding Area or Coin Area)，，亦即打導線用之區域。 內導腳' 14位於打導線區20內的部份又稱爲打平腳尖端 24(Cdn Lead Ήρ)，可將連接晶片之導線固定於導腳上。 爲了配合裝配及自動化，導線架10還有連接各片導線架 之導軌26(Side Rail) ’以及裝配時對準用的導引孔28(Pil〇t Hole)。此外，導線架10上之連接桿30(Tie Bar)係用以連 3 -裝 訂 ^ (請先閱讀背面之注意事項再填寫本頁)The staff of the Central Standards Bureau of the Ministry of Economic Affairs has printed a copy of the cooperative seal 11 »54 3 9 2 4-4M3twfd〇c / 006 A7 ______ B7 V. Description of the invention (/) The present invention relates to a lead frame structure, and is particularly The utility model relates to a lead frame structure with a separate die pad. In the semiconductor industry, the production of integrated circuits (1C) is mainly divided into three stages: the manufacture of silicon wafers, the manufacture of integrated circuits, and the packaging of integrated circuits. As far as the packaging of integrated circuits is concerned, this is the final step to complete the finished integrated circuit. In the packaging process, the lead frame is used to provide a die to be placed on the base of the wire, and serves as a medium for the electrical connection between the chip and the printed circuit board (PCB) or other appropriate components. Please refer to FIG. 1, which shows a schematic plan view of a lead frame. Generally, the unprocessed lead frame 10 has a sheet-like structure and can be divided into two parts: a flat part and a guide leg part. The flat portion is generally called a wafer pad 12 (Bar Pad, Die Pad), and its function is to carry a wafer. The guide part can be further subdivided into: inner guide foot part 14 (Iiuernal Lead), shoulder part 16 (Lead Shoulder) and outer guide foot part 18 (External Lead). As for the lead frame as a whole, it can also distinguish the Package Area 22 (Package Area), which is the area where the integrated circuit (1C) is packaged, and the Packaging Area 22 contains the Bonding Area or Coin Area. , That is, the area where the wire is used. The part of the inner guide pin '14 located in the lead wire area 20 is also called a flat pin tip 24 (Cdn Lead Leadρ), which can fix the wire connected to the chip to the guide pin. In order to cooperate with assembly and automation, the lead frame 10 also has a guide rail 26 (Side Rail) to which each lead frame is connected, and a guide hole 28 (Pilot Hole) for alignment during assembly. In addition, the connecting rod 30 (Tie Bar) on the lead frame 10 is used to connect 3-binding ^ (Please read the precautions on the back before filling this page)
本紙張尺度適用中國國家標準（CNS ) A4規格（：1 OX 4 1 1 3 t w f. d 〇 c/0 0 6 A7 B7 五、發明説明（J) 接晶片座丨2與導軌26並固定晶片座12 ’而止洩桿32(Dam Bar)則是用以連接各導腳與導軌26’並在封裝時防ih樹脂 外溢。 請參照第2圖，其所繪示的是利用習知導線架使用絕 緣材料進行封裝製程中途之剖面示意圖。在進行半導體封 裝時，係將晶片40置於晶片座12上’並以絕緣膠(Epcxy)42 將其固定。一般而言，晶片座12的面積皆略大於其所承 載之晶片40的面積，而且晶片座12採用下凹配置 (Downset)，以降低封裝厚度。晶片40上的焊墊（Bonding Pad, 未顯示於圖中）與導腳之間則是以打線接合（Wire Bonding) 的方式，用金線或鋁線等金屬線加以連接°然後再將晶片 40及導線架放入模具44內，經由灌膠注入口 48將封裝樹 脂46注入包裝區（如第1圖中.22所示）內進行封裝。 在封裝過程中，由於晶片座12係採用下凹設計，封 裝樹脂46在半導體晶片40上下側的流路幅寬不同，而且 封裝樹脂46對於晶片座12之摩擦係數大於對晶片40之 摩擦係數’因此導致封裝樹脂46在半導體晶片40上側與 晶片座12下側的流動速度不同。如第2圖所示，於封裝 過程中的某一時間點，封裝樹脂46在半導體晶片40上側 的流動距離50與在晶片座12下側的流動距離52有極大 的差異。所以半導體晶片40及晶片座12將承受來自上側 與下側通裝樹脂46所造成之不同壓力，由於壓力差之緣 故’因而容易導致導線架變形，使得封裝成品中有晶片座 12外露之情形產生。而且即使在其他封裝應用中，晶片座 4 本紙法尺度用+ g财:標旬CNS ) A4規‘_( 公釐ΐ '~~ --------二衣---：---IT------ii (請先閲讀背面之注意事項再填寫本頁) 經綦部中央標準局負工消費合作社印製 經濟部中央榡準局員工消費合作社印製 4il3UVfd〇C/〇°6 A7 __B7 五、發明説明（彡） 使用上凹配置(Upset)設計時，仍會發生上述情形。 此外’習知導線架係使臟大的晶片座以承載半導體 會^成HB片接合材料及晶片座材料的浪費。爲了提 ，封裝產品的可靠度，目前大部份是使用貼帶(Tape)作爲 晶片接合材料。但是貼帶之價格昂貴，若導線架的晶片座 之面擯較大，則所需之貼帶亦較多，將使得封裝成本增加。 因此’本發明的目的就是在提供一種導線架結構，在 進行封裝時，使注入之封裝樹脂在半導體晶片上側與下側 的模流速度差異減小’以降低來自半導體晶片上下兩側封 裝樹脂所造成之淨壓力差，防止導線架變形。 本發明的另一目的則是在提供一種導線架結構，可以 節省封裝的成本，並提高封裝產品的可靠度。 根據上述之目的，本發明提出一種具有分離式晶片座 之導線架，用以承載晶片進行封裝。此種導線架具有向導 線架中央延伸之多個導腳，其中部份爲具有分支腳的分叉 導腳。而各分支腳則是向導線架中心延伸，並在末端延展 以形成晶片座，因此導線架中具有數個分離式的晶片座， 而導腳則是分別配置於這些晶片座之周圍。利用分離式晶 片座的配置方式，可降低封裝樹脂流經晶片座下側之平均 摩擦力，使其與晶片上側之流速平衡’以抑制導線架變形。 根據上述之目的，本發明提出一種具有分離式晶片座 之導線架，可用以承載多個晶片進行封裝。此種導線架具 有向導線架中央延伸之多個導腳，其中部份爲具有分支腳 的分叉導腳。各分支腳皆向導線架中心延伸’並在末端延 5 本紙张尺度適用中國國家標隼（CNS ) A4規格（210X 297公釐） -¾衣 訂------^ (請先閱讀背面之注意事項再填寫本頁) • ] I 3 1 Γ. d 〇 c / 0 0 6 Α7 Β7 五、發明説明（β) 展形成分離式的晶片座，因此在導線架中具有數個晶片 座，而導腳則是分別配置於這些晶片座之周圍。利用分離 式晶片座的配置方式，可降低封裝樹脂流經晶片座下側之 平均摩擦力，使其與晶片上側之流速平衡，以抑制導線架 變形。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉較佳實施例，並配合所附圖式，分別詳 細說明如下： 圖式之簡單說明： 第1圖繪示習知導線架之平面結構示意圖； 第2圖繪示利用習知導線架進行封裝時之剖面示意 圖； 第3圖繪示依照本發明之第一實施例，一種具有分離 式晶片座之導線架的平面結構示意圖； 第4A圖至第4C圖繪示依照本發明之第一實施例’具 有不同結構分離式晶片座之導線架的平面示意圖； 第5圖繪示依照本發明之第一實施例’使用具有分離 式晶片座之導線架進行封裝時之剖面示意圖；以及 第6圖繪示依照本發明之第一貫施例’使用具有分離 式晶片座之導線架進行多個晶片封裝之俯視圖。 圖式之標記說明： 10、60 :導線架 12 :晶片座 14 :內導腳部份 I. I —1 - I I ^^1 - -^6 I I I -I 1^1 I- - - V/ 1^1 ·- - -- I- - —u n p (锖先聞读背面之法意事項存填寫本寅) 經濟部中央標準局員工消費合作社印製 本紙張尺度逋用中國國家標毕（CNS ) A4規格（210X 297公釐） 經濟部中央標準局員工消f合作杜印製 陷4392 4 Ο 4 1 I 3 t wi'. doc/0 06 , n A7 B7 ~ — 1 _ __________ — _ 五、發明説明（7 ) 16 :腳肩部份 18 :外導腳部份 20 :打導線區 22 :包裝區 24 :打平腳尖端 26 =導軌 28 :導引孔 30 =連接桿 32 :止洩桿 40、80、100a ' 100b :晶片 42 :絕緣膠 44、84 :模具 46、86 :封裝樹脂 48、88 :灌膠注入口 50、52、90、92 :封裝樹脂流動距離 62、72、74 ' 76、102a、102b :分離式晶片座 64 :欲封裝晶片之位置 66、104 :導腳 68 :分叉導腳 70 :分支腳 82 :貼帶（絕緣膠、導電膠） 106 :金屬連線 第一實施例 請參照第3圖，其所繪示的是依照本發明之第一實施 本紙張尺度適用中國國家樣华（CNS ) A4規格（2ΐ〇χ29?公釐〉 --------A 丨^--^---訂------- 0 c請先閲讀背面之注意事項再填寫本頁) 14 14 N 1 3twt'.doc/0 06 A7 B7 五、發明説明（6) 例，一種具有分離式晶片座之導線架的平面結構示意圖。 如圖所示，本實施例之導線架的中包括向中央部份延伸 的多個導腳66,其位置分別配置於欲封裝晶片之位置64 的周圔。在這些導腳66之中還包括分叉導腳68，而分叉 導腳68中則具有向導線架60中心部份延伸的分支腳70， 並且在分支腳70的末端延展形成分離式晶片座62，配置 於欲封裝晶片位置64的中央部份。這些分離式晶片座石2 之面積總和可小於或大於其所承載之晶片的底面積，亦即 可小於或大於欲封裝晶片位置64之面積。 其次請參照第4Α圖至第4C圖，分別繪示的是依照本 發明之第一實施例，具有不同結構分離式晶片座之導線架 的平面示意圖。在第3圖中，晶片座的設計是置於晶片的 中央，使所承載之晶片可以平穩地固定於其上，然而此種 設計並非用以限制本發明之晶片座構型。如第4Α圖至第 4C圖所示，其中繪示幾種不同構型之分離式晶片座，導 線架之主體部份與第3圖相同，晶片所涵蓋區域即爲欲封 裝晶片之位置64，而晶片座72、74、76是以分離方式設 置於晶片的側邊或中央。如第4Α圖所示。分離式晶片座 72係配置於晶片的兩端，其分叉導腳之位置與第3圖中所 示不同。又如第4B圖及第4C圖所示，分離式晶片座74 及76亦可由數個分支腳延展共同形成，而晶片座之外型 並不限於長方形，亦可以是其他各種不同之形狀。 請參照第5圖，其所繪示的是依照本發明之第一實施 例，使用具有分離式晶片座之導線架進行樹脂封裝製程中 8 本紙张X度適用十國國家橾李（CNS〉Λ4规格（2!0X29?公釐） i I i— PI . ~~ ~ 裝 訂 I — H 線 (請先閱讀背面之注意事項再填寫本頁) 經濟 <部中央標準局員工消費合作杜印繁 4 1 i 3t\vi doc/006 Α7 4 1 i 3t\vi doc/006 Α7 經濟部中央標隼局•負工消費合作杜印繁 B7 五、發明说明（~ ) 途之剖面示意圖。以第3圖中所示之導線架作爲晶片承載 器爲例，在進行半導體封裝時，係將晶片80置於分離式 晶片座62上，並以絕緣膠、導電膠或貼帶固定，其中導 電膠例如是銀膠，而較佳的是用貼帶（絕緣膠、導電膠）82 固定晶片80，以提高封裝產品之可靠度’而晶片座62則 可依封裝形式採下凹或上凹的設計。在本實施例中係採取 下凹配置，以降低封裝厚度，而且這些分離式晶片座62 之面積總和可小於或大於其所承載之晶片80的面積。而 晶片80與導線架導腳之間的電性連接，可使用打線接合 的方式，以金線或鋁線等金屬線連接晶片80上的焊墊(未 顯示於圖中）與導腳。然後再將晶片80及導線架置於模具 84內，經由灌膠注入口 88將封裝樹脂86注入包裝區(如 第1圖中22所示）內進行封裝.。 在封裝過程中，由於晶片座62係採用分離方式配置， 可以降低晶片座62下方對於封裝樹脂86之平均摩擦力， 使得封裝樹脂86在晶片80上側與晶片座62下側的模流 速度接近。如第5圖所示，於封裝過程中某一時間點，在 晶片80上側的流動距離90與在晶片座62下側的流動距 離92幾乎相等。因此，晶片8〇及晶片座62承受來自上 側與下側封裝樹脂86所造成之壓力可達到平衡，避免導 線架發生變形，更可防止封裝成品中有晶片座62外露之 b形。而且由於晶片座62採分離方式設置，其面積總和 奚小，可以減少貼帶或其他晶片接合材料及晶片座材 使用，降低封裝成本。 ^ 9 (請先閱讀背面之注意事項再填寫本頁) ---穿 、-='5 本纸張尺度制巾咖家縣（CNS)从胁（2數297公董） 4 l I 3t\vf.doc/006 A7 4 l I 3t\vf.doc/006 A7 經濟部中央標準局員工消費合作社印S4 B7___ 五、發明説明（Ϊ) 第二實施例 請參照第6圖，其所繪示的是依照本發明之第二實施 例，使用具有分離式晶片座之導線架進行多個晶片封裝之 俯視圖。如圖所示，本發明亦可以應用於多重晶片封裝 (Multi-Chip Package，MCP)，使用分離式晶片座 102a 及 102b 分別承載晶片l〇〇a和100b，並以絕緣膠、導電膠或貼帶 固定，其中導電膠例如是銀膠，而較佳的是使用貼帶固定 晶片，以提高封裝產品之可靠度。在本實施例中，分離式 晶片座102a及102b之面積總和大於其所承載晶片100a和 100b的面積總和。晶片100a及100b與導腳104之間的電 性連接，可使用打線接合的方式，以金線或鋁線等金屬連 線106連接晶片10〇a和100b上之焊墊（未顯示於圖中）與 導腳104。而晶片100a與100b之間的電性連接，亦可採 用打線接合方式，利用部份的金屬連線106連接晶片100a 和100b。然後再將晶片與導線架置於模具內，進行封裝製 程。 雖然在本實施例中，晶片座102a、102b的面積較晶片 100a、100b大，但是晶片座l〇2a、102b係採分離方式配置 的緣故，所以在封裝製程中，仍可降低晶片座l〇2a、102b 下方對於封裝樹脂的摩擦力，以平衡封裝樹脂在晶片座 102a、102b及晶片l〇〇a、l〇〇b上下兩側所造成的壓力，避 免導線架變形，更可防止封裝成品中有晶片座l〇2a、102b 外露的情形。由此可知，在第一實施例中，即使晶片座之 面積總合大於晶片面積，但由於晶片座係採分離式設計， -- H I ^ ---——^^1 - - 一t»J- III - - - I .1 i m (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標季（CNS ) Λ4規格（2! 0、< 297公鸯；） H°:43 92 4 0 A \ l 3twf doc/006 ρ^η 五、發明说明（7) 晶片座間的隙縫仍可改善模流速度，以降低壓力差，防止 導線架變形。 由上述本發明之較佳實施例可知，應用本發明具有下 列特點‘· 1. 晶片座是由導腳分支向外延伸所形成，利用導腳支 撐晶片座以承載晶片，而不需由導軌引出連接桿支撐晶片 座。 2. 使用分離式晶片座的設計，可減少半導體晶片上下 兩側模流速度之差異，以降低半導體晶片上下兩側的壓力 差，避免導線架產生變形。 3. 使用面積較晶片小之晶片座設計，可減少晶片接合 材料和晶片座材料的使用，以降低封裝成本。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍內，當可作各種之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 ---------i------IT------ (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本纸張尺度糾]中咖家棣準（CNS) A4規格（21()>< 297公瘦）This paper size applies to Chinese National Standard (CNS) A4 specifications (: 1 OX 4 1 1 3 tw f. D oc / 0 0 6 A7 B7 V. Description of the invention (J) Connect the wafer holder 丨 2 and the guide rail 26 and fix the wafer Seat 12 'and Dam Bar 32 are used to connect each guide pin to the guide rail 26' and prevent the ih resin from overflowing during packaging. Please refer to Figure 2, which shows the use of a conventional lead frame A cross-sectional schematic diagram during the packaging process using an insulating material. During semiconductor packaging, the wafer 40 is placed on the wafer holder 12 'and fixed with an insulating adhesive (Epcxy) 42. Generally, the area of the wafer holder 12 is all It is slightly larger than the area of the wafer 40 it carries, and the chip holder 12 adopts a downset configuration to reduce the thickness of the package. Between the bonding pad (not shown in the figure) on the wafer 40 and the guide pin, Wire bonding is used to connect metal wires such as gold wire or aluminum wire. Then the chip 40 and lead frame are placed in the mold 44 and the encapsulation resin 46 is injected into the packaging area through the injection port 48. (Shown as .22 in Figure 1). As the wafer holder 12 adopts a concave design, the width of the flow path of the sealing resin 46 on the upper and lower sides of the semiconductor wafer 40 is different, and the friction coefficient of the sealing resin 46 to the wafer holder 12 is greater than the friction coefficient of the wafer 40 ', thus leading to packaging. The flow speed of the resin 46 on the upper side of the semiconductor wafer 40 and the lower side of the wafer holder 12 is different. As shown in FIG. 2, at a certain point in the packaging process, the flow distance 50 of the sealing resin 46 on the upper side of the semiconductor wafer 40 is different from that on the wafer. There is a great difference in the flow distance 52 on the lower side of the holder 12. Therefore, the semiconductor wafer 40 and the wafer holder 12 will be subjected to different pressures from the upper side and the lower side through resin 46. Due to the pressure difference, it is easy to cause the lead frame to deform. , So that there is a situation in which the chip holder 12 is exposed in the packaged product. And even in other packaging applications, the chip holder 4 paper method scale + g wealth: standard ten CNS) A4 regulation '_ (mm ΐ' ~~- ------ 二 衣 ---: --- IT ------ ii (Please read the notes on the back before filling out this page) Ministry of Economic Affairs, Central Standards Bureau, Offshore Consumer Cooperative, Printing Ministry of Economy Central Procurement Bureau Staff Consumption 4il3UVfd〇C / 〇 ° 6 A7 __B7 printed by Sakusha Co., Ltd. 5. Description of the invention (彡) The above situation still occurs when using the Upset design. In addition, 'the conventional lead frame system makes the dirty chip holder to Carrying semiconductors will waste HB wafer bonding materials and wafer holder materials. In order to improve the reliability of packaging products, most of them currently use tapes as wafer bonding materials. However, the price of tapes is expensive. The larger the surface area of the wafer holder of the rack, the more tapes are required, which will increase the packaging cost. Therefore, the object of the present invention is to provide a lead frame structure, which reduces the difference in mold flow velocity between the upper side and the lower side of the semiconductor resin when encapsulating the resin, so as to reduce the amount of resin from the upper and lower sides of the semiconductor wafer. The resulting net pressure difference prevents the lead frame from deforming. Another object of the present invention is to provide a lead frame structure, which can save the cost of packaging and improve the reliability of packaging products. According to the above object, the present invention provides a lead frame with a separate wafer holder for carrying a chip for packaging. This type of lead frame has a plurality of guide legs extending in the center of the lead frame, some of which are bifurcated guide legs with branch legs. Each branch leg is extended at the center of the lead frame and extended at the end to form a wafer base. Therefore, the lead frame has several separate wafer bases, and the guide legs are respectively arranged around these wafer bases. With the arrangement of the separate wafer holder, the average friction force of the sealing resin flowing through the lower side of the wafer holder can be reduced to balance the flow velocity with the upper side of the wafer 'to suppress the deformation of the lead frame. According to the above object, the present invention proposes a lead frame with a separate wafer holder, which can be used to carry multiple wafers for packaging. This type of lead frame has a plurality of guide legs extending in the center of the lead frame, some of which are bifurcated guide legs with branch legs. Each branch foot is extended to the center of the wire frame and extended at the end by 5 paper sizes. Applicable to China National Standards (CNS) A4 (210X 297 mm)-¾ staple ------ ^ (Please read the back first Note on this page, please fill in this page again) •] I 3 1 Γ. D oc / 0 0 6 Α7 Β7 V. Description of the invention (β) It is formed into separate wafer holders, so there are several wafer holders in the lead frame. The guide pins are respectively arranged around these wafer holders. With the arrangement of the separate wafer holder, the average friction force of the sealing resin flowing through the lower side of the wafer holder can be reduced, and the flow velocity of the upper side of the wafer can be balanced to suppress the deformation of the lead frame. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following describes specific embodiments in combination with the accompanying drawings in detail as follows: Brief description of the drawings: FIG. 1 FIG. 2 shows a schematic plan view of a conventional lead frame; FIG. 2 shows a schematic cross-sectional view when the conventional lead frame is used for packaging; and FIG. 3 shows a lead frame with a separate wafer holder according to a first embodiment of the present invention. FIG. 4A to FIG. 4C are schematic plan views of a lead frame having separate wafer holders with different structures according to the first embodiment of the present invention; and FIG. 5 is a first embodiment according to the present invention. 'Cross-section schematic diagram when packaging using a leadframe with separate wafer holders; and FIG. 6 shows a first embodiment of the present invention according to the present invention' Top view of multiple chip packaging using a leadframe with separate wafer holders. Description of the drawing marks: 10, 60: lead frame 12: chip holder 14: inner guide pin part I. I —1-II ^^ 1--^ 6 III -I 1 ^ 1 I---V / 1 ^ 1 ·---I---unp (锖 First read and read the legal and legal matters on the back of the book and fill in the book) Printed on the paper by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs, using Chinese National Standards (CNS) A4 Specifications (210X 297 mm) Employees of the Central Standards Bureau of the Ministry of Economic Affairs and Cooperation Du printed traps 4392 4 Ο 4 1 I 3 t wi '. Doc / 0 06, n A7 B7 ~ — 1 _ __________ — _ 5. Description of the invention (7) 16: Foot and shoulder part 18: Outer guide leg part 20: Wire guide area 22: Packing area 24: Flat foot tip 26 = Guide rail 28: Guide hole 30 = Connecting rod 32: Drainage lever 40, 80, 100a '100b: Wafer 42: Insulating glue 44, 84: Mold 46, 86: Encapsulation resin 48, 88: Filling injection port 50, 52, 90, 92: Encapsulation resin flow distance 62, 72, 74' 76, 102a, 102b: Separate wafer holder 64: Position of the chip to be packaged 66, 104: Guide pin 68: Bifurcation guide pin 70: Branch pin 82: Tape (insulating adhesive, conductive adhesive) 106: Metal wiring first implementation For example, please refer to Figure 3. The drawing shows that according to the first implementation of the present invention, the paper size is applicable to the Chinese National Sample (CNS) A4 specification (2ΐ〇χ29? Mm> -------- A 丨 ^-^ --- Order ------- 0 c Please read the notes on the back before filling out this page) 14 14 N 1 3twt'.doc / 0 06 A7 B7 V. Description of the invention (6) Example, a type with separate wafer holder Schematic diagram of the planar structure of the lead frame. As shown in the figure, the lead frame of this embodiment includes a plurality of guide pins 66 extending toward the central portion, and their positions are respectively arranged at the periphery of the position 64 where the chip is to be packaged. The guide pins 66 also include a branch guide pin 68, and the branch guide leg 68 has a branch leg 70 extending from the center portion of the guide wire frame 60, and a split wafer seat is extended at the end of the branch leg 70. 62. It is arranged at the central part of the chip position 64 to be packaged. The sum of the areas of these separate wafer holder stones 2 may be smaller or larger than the bottom area of the wafers they carry, that is, smaller or larger than the area of the wafer position 64 to be packaged. Secondly, please refer to FIGS. 4A to 4C, which are schematic plan views of lead frames with separate wafer holders having different structures according to the first embodiment of the present invention. In Fig. 3, the design of the wafer holder is placed in the center of the wafer so that the wafer carried thereon can be fixed to it smoothly, but this design is not intended to limit the configuration of the wafer holder of the present invention. As shown in Figs. 4A to 4C, there are shown several types of separated wafer holders. The main part of the lead frame is the same as that in Fig. 3. The area covered by the wafer is the position 64 where the wafer is to be packaged. The wafer holders 72, 74, and 76 are disposed on the side or the center of the wafer in a separated manner. As shown in Figure 4A. The separate wafer holder 72 is arranged at both ends of the wafer, and the position of the branch guide is different from that shown in FIG. 3. As shown in FIG. 4B and FIG. 4C, the separate wafer holders 74 and 76 can also be formed by extending several branch legs, and the shape of the wafer holder is not limited to a rectangular shape, and may be various other shapes. Please refer to FIG. 5, which shows a resin packaging process using a lead frame with a separate wafer holder in accordance with the first embodiment of the present invention. The paper X degree is applicable to the ten countries ’national plum (CNS> Λ4 Specifications (2! 0X29? Mm) i I i— PI. ~~ ~ Binding I — H line (please read the precautions on the back before filling this page) Economy &Ministry; Ministry of Standards Bureau, Consumer Consumption Cooperation Du Yinfan 4 1 i 3t \ vi doc / 006 Α7 4 1 i 3t \ vi doc / 006 Α7 Central Bureau of Standards, Ministry of Economic Affairs • Consumption Cooperation Du Yinfan B7 V. Schematic cross-section of the description of the invention (~). Take Figure 3 As an example, the lead frame shown in the figure is used as a wafer carrier. When performing semiconductor packaging, the wafer 80 is placed on a separate wafer holder 62 and fixed with insulating glue, conductive glue or tape. The conductive glue is silver, for example. It is better to fix the chip 80 with a tape (insulating glue, conductive glue) 82 to improve the reliability of the packaged product, and the chip holder 62 can adopt a concave or concave design according to the package form. In the embodiment, a concave configuration is adopted to reduce the package thickness, and these separate The total area of the chip holder 62 may be smaller or larger than the area of the chip 80 carried by the chip holder 62. The electrical connection between the chip 80 and the lead frame of the lead frame may be made by wire bonding, such as gold wire or aluminum wire. Connect the solder pads (not shown) and the guide pins on the wafer 80. Then place the wafer 80 and the lead frame in the mold 84, and inject the packaging resin 86 into the packaging area through the glue injection port 88 (as shown in Figure 1). (Shown in (22)). During the packaging process, since the wafer holder 62 is configured in a separate manner, the average friction force under the wafer holder 62 against the packaging resin 86 can be reduced, so that the packaging resin 86 is on the upper side of the wafer 80 and the wafer. The mold flow speed on the lower side of the holder 62 is close. As shown in FIG. 5, at a certain point in the packaging process, the flow distance 90 on the upper side of the wafer 80 and the flow distance 92 on the lower side of the wafer holder 62 are almost equal. Therefore, The wafer 80 and the wafer holder 62 can be balanced by the pressure caused by the upper and lower packaging resins 86 to avoid deformation of the lead frame and prevent the b-shape of the wafer holder 62 from being exposed in the packaged product. The seat 62 is set in a separated manner, and its total area is small, which can reduce the use of tape or other wafer bonding materials and wafer seat materials, and reduce packaging costs. ^ 9 (Please read the precautions on the back before filling this page) --- Wear,-= '5 paper standard towel making Jiajia County (CNS) Congxie (2 number 297 public directors) 4 l I 3t \ vf.doc / 006 A7 4 l I 3t \ vf.doc / 006 A7 Economy S4 B7___ of the Consumer Standards Cooperative of the Ministry of Standards and Standards of the People's Republic of China 5. Description of the Invention (ii) Please refer to Figure 6 for the second embodiment, which shows the use of the wire with a separate wafer holder according to the second embodiment of the present invention A top view of a rack carrying multiple chip packages. As shown in the figure, the present invention can also be applied to a Multi-Chip Package (MCP), using separate wafer holders 102a and 102b to carry the wafers 100a and 100b, respectively, and using insulating glue, conductive glue or paste Tape fixing, wherein the conductive adhesive is, for example, silver glue, and it is preferable to use a tape to fix the chip to improve the reliability of the packaged product. In this embodiment, the sum of the areas of the separate wafer holders 102a and 102b is larger than the sum of the areas of the wafers 100a and 100b carried by them. The electrical connection between the chips 100a and 100b and the guide pins 104 can be made by wire bonding, and the metal pads 106 such as gold or aluminum wires are used to connect the pads on the chips 10a and 100b (not shown in the figure). ) With guide pin 104. The electrical connection between the wafers 100a and 100b can also be made by wire bonding, and the wafers 100a and 100b are connected by a part of the metal wires 106. The wafer and lead frame are then placed in a mold for the packaging process. Although in this embodiment, the areas of the wafer holders 102a and 102b are larger than those of the wafers 100a and 100b, but the wafer holders 102a and 102b are arranged in a separated manner. Therefore, the wafer holders can still be lowered during the packaging process. The friction of the packaging resin under 2a and 102b to balance the pressure caused by the packaging resin on the wafer holders 102a and 102b and on the upper and lower sides of the wafers 100a and 100b to avoid deformation of the lead frame and prevent the packaged product In some cases, wafer holders 102a, 102b are exposed. It can be seen that, in the first embodiment, even if the total area of the wafer holder is larger than the wafer area, because the wafer holder adopts a separate design,-HI ^ ------- ^^ 1--t »J -III---I .1 im (Please read the notes on the back before filling this page) This paper size is applicable to China National Standard Season (CNS) Λ4 specifications (2! 0, < 297 cm;) H °: 43 92 4 0 A \ l 3twf doc / 006 ρ ^ η V. Description of the invention (7) The gap between the wafer holders can still improve the mold flow speed to reduce the pressure difference and prevent the lead frame from deforming. From the above-mentioned preferred embodiments of the present invention, it can be known that the application of the present invention has the following characteristics: 1. The wafer holder is formed by the branch of the guide pin extending outward. The guide pin is used to support the wafer holder to carry the wafer, and does not need to be pulled out by the guide rail. The connecting rod supports the wafer holder. 2. The design of the separate wafer holder can reduce the difference in die flow speed between the upper and lower sides of the semiconductor wafer to reduce the pressure difference between the upper and lower sides of the semiconductor wafer and avoid deformation of the lead frame. 3. The use of a chip holder design with a smaller area than the chip can reduce the use of wafer bonding materials and chip holder materials to reduce packaging costs. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application. --------- i ------ IT ------ (Please read the notes on the back before filling out this page) Printed by the Central Consumers Bureau of the Ministry of Economic Affairs Correction] Chinese coffee house standard (CNS) A4 specifications (21 () > < 297 male thin)