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TW285739B - - Google Patents

Info

Publication number
TW285739B
TW285739B TW085101063A TW85101063A TW285739B TW 285739 B TW285739 B TW 285739B TW 085101063 A TW085101063 A TW 085101063A TW 85101063 A TW85101063 A TW 85101063A TW 285739 B TW285739 B TW 285739B
Authority
TW
Taiwan
Application number
TW085101063A
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW285739B publication Critical patent/TW285739B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4097Bit-line organisation, e.g. bit-line layout, folded bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
TW085101063A 1995-01-30 1996-01-29 TW285739B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7012257A JP2783271B2 (ja) 1995-01-30 1995-01-30 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW285739B true TW285739B (zh) 1996-09-11

Family

ID=11800324

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085101063A TW285739B (zh) 1995-01-30 1996-01-29

Country Status (5)

Country Link
US (1) US5801983A (zh)
JP (1) JP2783271B2 (zh)
KR (1) KR100201736B1 (zh)
DE (1) DE19603084B4 (zh)
TW (1) TW285739B (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6016390A (en) * 1998-01-29 2000-01-18 Artisan Components, Inc. Method and apparatus for eliminating bitline voltage offsets in memory devices
JP2000019709A (ja) * 1998-07-03 2000-01-21 Hitachi Ltd 半導体装置及びパターン形成方法
US6292387B1 (en) * 2000-01-20 2001-09-18 Micron Technology, Inc. Selective device coupling
EP1326254B1 (en) * 2001-12-27 2009-02-25 STMicroelectronics S.r.l. Architecture of a phase-change nonvolatile memory array
DE10301856B4 (de) * 2003-01-17 2005-04-21 Infineon Technologies Ag Integrierter Speicher mit Trennschaltungen an Bitleitungs-Verkreuzungsstellen
DE10334125A1 (de) * 2003-07-25 2005-03-03 Infineon Technologies Ag Halbleiterspeichervorrichtung
US7274594B2 (en) 2005-04-11 2007-09-25 Stmicroelectronics S.R.L. Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor
US7791976B2 (en) * 2008-04-24 2010-09-07 Qualcomm Incorporated Systems and methods for dynamic power savings in electronic memory operation
US8055958B2 (en) * 2008-12-11 2011-11-08 Samsung Electronics Co., Ltd. Replacement data storage circuit storing address of defective memory cell
KR101822962B1 (ko) 2010-02-05 2018-01-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2012057296A1 (en) * 2010-10-29 2012-05-03 Semiconductor Energy Laboratory Co., Ltd. Storage device
KR101924231B1 (ko) 2010-10-29 2018-11-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 기억 장치
US8883624B1 (en) 2013-09-27 2014-11-11 Cypress Semiconductor Corporation Integration of a memory transistor into high-K, metal gate CMOS process flow
KR20160099757A (ko) * 2015-02-12 2016-08-23 에스케이하이닉스 주식회사 전원 발생 장치

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63197370A (ja) * 1987-02-12 1988-08-16 Fujitsu Ltd 半導体装置とその製造方法
JPS63257991A (ja) * 1987-04-15 1988-10-25 Mitsubishi Electric Corp 半導体記憶装置
US4807195A (en) * 1987-05-18 1989-02-21 International Business Machines Corporation Apparatus and method for providing a dual sense amplifier with divided bit line isolation
JP2618938B2 (ja) * 1987-11-25 1997-06-11 株式会社東芝 半導体記憶装置
JPH0276258A (ja) * 1988-09-13 1990-03-15 Fujitsu Ltd 半導体記憶装置
JPH03116965A (ja) * 1989-09-29 1991-05-17 Mitsubishi Electric Corp メモリセル構造
JPH0834257B2 (ja) * 1990-04-20 1996-03-29 株式会社東芝 半導体メモリセル
JPH07122989B2 (ja) * 1990-06-27 1995-12-25 株式会社東芝 半導体記憶装置
JP2792211B2 (ja) * 1990-07-06 1998-09-03 日本電気株式会社 半導体記憶装置
JP3089731B2 (ja) * 1990-09-29 2000-09-18 日本電気株式会社 半導体メモリ装置
JP3159496B2 (ja) * 1991-01-14 2001-04-23 松下電子工業株式会社 半導体メモリ装置
JP2660111B2 (ja) * 1991-02-13 1997-10-08 株式会社東芝 半導体メモリセル
JP2564046B2 (ja) * 1991-02-13 1996-12-18 株式会社東芝 半導体記憶装置
JP3181311B2 (ja) * 1991-05-29 2001-07-03 株式会社東芝 半導体記憶装置
JPH0554633A (ja) * 1991-08-26 1993-03-05 Nec Corp 半導体記憶装置
US5625602A (en) * 1991-11-18 1997-04-29 Kabushiki Kaisha Toshiba NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines
JP3464803B2 (ja) * 1991-11-27 2003-11-10 株式会社東芝 半導体メモリセル
JPH06302189A (ja) * 1993-02-22 1994-10-28 Toshiba Corp 半導体記憶装置
JP3237971B2 (ja) * 1993-09-02 2001-12-10 株式会社東芝 半導体記憶装置
JP3272888B2 (ja) * 1993-12-28 2002-04-08 株式会社東芝 半導体記憶装置
US5452244A (en) * 1994-08-10 1995-09-19 Cirrus Logic, Inc. Electronic memory and methods for making and using the same

Also Published As

Publication number Publication date
US5801983A (en) 1998-09-01
DE19603084A1 (de) 1996-10-24
DE19603084B4 (de) 2004-07-29
KR100201736B1 (ko) 1999-06-15
JP2783271B2 (ja) 1998-08-06
KR960030236A (ko) 1996-08-17
JPH08203267A (ja) 1996-08-09

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