TW202433693A - Electronic package and manufacturing method thereof - Google Patents
Electronic package and manufacturing method thereof Download PDFInfo
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- TW202433693A TW202433693A TW112104822A TW112104822A TW202433693A TW 202433693 A TW202433693 A TW 202433693A TW 112104822 A TW112104822 A TW 112104822A TW 112104822 A TW112104822 A TW 112104822A TW 202433693 A TW202433693 A TW 202433693A
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- 238000004519 manufacturing process Methods 0.000 title claims description 35
- 230000017525 heat dissipation Effects 0.000 claims abstract description 91
- 239000011810 insulating material Substances 0.000 claims abstract description 63
- 239000012782 phase change material Substances 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 11
- 239000000463 material Substances 0.000 claims description 19
- 238000001746 injection moulding Methods 0.000 claims description 10
- -1 saline compound Chemical class 0.000 claims description 6
- 229910017053 inorganic salt Inorganic materials 0.000 claims description 5
- 150000007524 organic acids Chemical class 0.000 claims description 5
- 239000011780 sodium chloride Substances 0.000 claims description 4
- 238000005304 joining Methods 0.000 claims description 2
- 239000000306 component Substances 0.000 description 48
- 239000010410 layer Substances 0.000 description 37
- 239000004065 semiconductor Substances 0.000 description 18
- JHJNPOSPVGRIAN-SFHVURJKSA-N n-[3-[(1s)-1-[[6-(3,4-dimethoxyphenyl)pyrazin-2-yl]amino]ethyl]phenyl]-5-methylpyridine-3-carboxamide Chemical compound C1=C(OC)C(OC)=CC=C1C1=CN=CC(N[C@@H](C)C=2C=C(NC(=O)C=3C=C(C)C=NC=3)C=CC=2)=N1 JHJNPOSPVGRIAN-SFHVURJKSA-N 0.000 description 12
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000000758 substrate Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004100 electronic packaging Methods 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000012774 insulation material Substances 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 2
- 239000000084 colloidal system Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229920002577 polybenzoxazole Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000001993 wax Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 239000012188 paraffin wax Substances 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/427—Cooling by change of state, e.g. use of heat pipes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
本發明係有關一種半導體封裝製程,尤指一種具散熱結構之電子封裝件及其製法。 The present invention relates to a semiconductor packaging process, in particular to an electronic packaging component with a heat dissipation structure and its manufacturing method.
隨著電子產品在功能及處理速度之需求的提升,作為電子產品之核心組件的半導體晶片需具有更高密度之電子元件(Electronic Components)及電子電路(Electronic Circuits),故半導體晶片在運作時將隨之產生更大量的熱能。 As the demand for electronic products in terms of functions and processing speed increases, semiconductor chips, as the core components of electronic products, need to have higher density electronic components and electronic circuits, so semiconductor chips will generate more heat during operation.
因此,為了迅速將熱能散逸至外部,業界通常在半導體封裝件中配置散熱片(Heat Sink或Heat Spreader),該散熱片通常藉由散熱膠,如導熱介面材(Thermal Interface Material,簡稱TIM),結合至半導體晶片背面,以藉散熱膠與散熱片逸散出半導體晶片所產生之熱量。 Therefore, in order to quickly dissipate heat to the outside, the industry usually configures a heat sink or heat spreader in the semiconductor package. The heat sink is usually bonded to the back of the semiconductor chip through a heat sink, such as a thermal interface material (TIM), so that the heat generated by the semiconductor chip can be dissipated through the heat sink and the heat sink.
如圖1所示,習知半導體封裝件1之製法係先將一半導體晶片11以其作用面11a利用覆晶接合方式(即透過導電凸塊110與底膠111)設於一封裝基板10上,再將一散熱件13以其頂片130藉由TIM層12結
合於該半導體晶片11之非作用面11b上,且該散熱件13之支撐腳131透過黏著層14架設於該封裝基板10上。
As shown in FIG. 1 , the manufacturing method of the known
於運作時,該半導體晶片11所產生之熱能係經由該非作用面11b、TIM層12而傳導至該散熱件13之頂片130以散熱至該半導體封裝件1之外部。
During operation, the heat energy generated by the
惟,習知半導體封裝件1中,係採用金屬框架作為該散熱件13,因而需採用蝕刻金屬及/或電鍍金屬等繁瑣製程製作該散熱件13,故該散熱件13不僅製作成本極高,且重量難以減輕,致使該半導體封裝件1不利於符合輕巧之需求。
However, in the known
因此,如何克服上述習知技術之種種問題,實已成為目前業界亟待克服之難題。 Therefore, how to overcome the above-mentioned problems of known technology has become a difficult problem that the industry needs to overcome urgently.
鑑於上述習知技術之種種缺失,本發明提供一種電子封裝件,係包括:載板,係具有至少一線路層;電子元件,係設於該載板上並電性連接該線路層;以及絕緣材散熱結構,係設於該載板上並遮蓋該電子元件,其中,該絕緣材散熱結構係埋設有一相變材物體且具有至少一外露該變相材物體之開口。 In view of the various deficiencies of the above-mentioned prior art, the present invention provides an electronic package, comprising: a carrier having at least one circuit layer; an electronic component disposed on the carrier and electrically connected to the circuit layer; and an insulating material heat dissipation structure disposed on the carrier and covering the electronic component, wherein the insulating material heat dissipation structure is embedded with a phase change material object and has at least one opening exposing the phase change material object.
本發明亦提供一種電子封裝件之製法,係包括:藉由模注絕緣材方式製作絕緣材散熱結構,其中,該絕緣材散熱結構係埋設有一相變材物體且具有至少一外露該變相材物體之開口;以及將該絕緣材散熱結構設於一具有至少一線路層之載板上,其中,該載板上係設有至少一電性連接該線路層之電子元件,以令該絕緣材散熱結構遮蓋該電子元件。 The present invention also provides a method for manufacturing an electronic package, which includes: manufacturing an insulating material heat dissipation structure by injection molding an insulating material, wherein the insulating material heat dissipation structure is embedded with a phase change material object and has at least one opening exposing the phase change material object; and arranging the insulating material heat dissipation structure on a carrier having at least one circuit layer, wherein at least one electronic component electrically connected to the circuit layer is arranged on the carrier, so that the insulating material heat dissipation structure covers the electronic component.
前述之電子封裝件及其製法中,該絕緣材散熱結構係接觸該電子元件。 In the aforementioned electronic package and its manufacturing method, the insulating material heat dissipation structure is in contact with the electronic component.
前述之電子封裝件及其製法中,該絕緣材散熱結構係具有屏蔽層,以於該絕緣材散熱結構設於該載板上後,該屏蔽層位於該變相材物體與該電子元件之間。 In the aforementioned electronic package and its manufacturing method, the insulating material heat dissipation structure has a shielding layer, so that after the insulating material heat dissipation structure is arranged on the carrier, the shielding layer is located between the phase-changing material object and the electronic component.
前述之電子封裝件及其製法中,該絕緣材散熱結構之製程係包含:藉由模注絕緣材方式分別製作第一散熱件與第二散熱件;將該開口形成於該第一散熱件上;以及將該第一散熱件與第二散熱件相接合,使該變相材物體夾設於該第一散熱件與該第二散熱件之間,其中,該絕緣材散熱結構係以該第二散熱件設於該載板上,使該第二散熱件遮蓋該電子元件。 In the aforementioned electronic package and its manufacturing method, the manufacturing process of the insulating material heat dissipation structure includes: manufacturing a first heat dissipation member and a second heat dissipation member respectively by injection molding an insulating material; forming the opening on the first heat dissipation member; and joining the first heat dissipation member and the second heat dissipation member so that the phase-changing material object is sandwiched between the first heat dissipation member and the second heat dissipation member, wherein the insulating material heat dissipation structure is provided with the second heat dissipation member on the carrier so that the second heat dissipation member covers the electronic component.
前述之電子封裝件及其製法中,該相變材物體係包含石蠟、有機酸、無機鹽或鹽水化合物。 In the aforementioned electronic package and its manufacturing method, the phase change material object includes wax, organic acid, inorganic salt or saline compound.
由上可知,本發明之電子封裝件及其製法,主要藉由模注絕緣材方式製作該絕緣材散熱結構,以簡易製程,故相較於習知金屬散熱件,本發明不僅能大幅降低該絕緣材散熱結構之製作成本,且能減輕該絕緣材散熱結構之重量,以利於該電子封裝件符合輕巧之需求。 As can be seen from the above, the electronic package and its manufacturing method of the present invention mainly manufacture the insulating material heat dissipation structure by injection molding insulating material to simplify the manufacturing process. Therefore, compared with the conventional metal heat sink, the present invention can not only significantly reduce the manufacturing cost of the insulating material heat dissipation structure, but also reduce the weight of the insulating material heat dissipation structure, so that the electronic package meets the demand for lightness.
1:半導體封裝件 1:Semiconductor packages
10:封裝基板 10: Packaging substrate
11:半導體晶片 11: Semiconductor chip
11a,21a:作用面 11a, 21a: Action surface
11b,21b:非作用面 11b, 21b: non-active surface
110,210:導電凸塊 110,210: Conductive bumps
111,211:底膠 111,211: Base glue
12:TIM層 12: TIM layer
13:散熱件 13: Heat sink
130:頂片 130: Top piece
131,400:支撐腳 131,400: Foot support
14,24:黏著層 14,24: Adhesive layer
2:電子封裝件 2: Electronic packaging components
2a:絕緣材散熱結構 2a: Insulation material heat dissipation structure
2b:基板結構 2b: Substrate structure
20:載板 20: Carrier board
200:絕緣層 200: Insulation layer
201:線路層 201: Circuit layer
21:電子元件 21: Electronic components
22:相變材物體 22: Phase change material
23:屏蔽層 23: Shielding layer
3:散熱架體 3: Heat dissipation frame
3a:支架 3a: Bracket
30:第一散熱件 30: First heat sink
30a,402:絕緣材 30a,402: Insulation materials
300:開口 300: Opening
301:凸部 301: convex part
40:第二散熱件 40: Second heat sink
40a:片體 40a: Sheet
401:凹部 401: Concave part
70,80:第一模件 70,80: First module
71,81:第二模件 71,81: Second module
9,9a:承載件 9,9a: Carrier
S:容置空間 S: Storage space
L:切割路徑 L: cutting path
圖1係為習知半導體封裝件之剖視示意圖。 Figure 1 is a schematic cross-sectional view of a conventional semiconductor package.
圖2A至圖2H係為本發明之電子封裝件之製法之剖面示意圖。 Figures 2A to 2H are cross-sectional schematic diagrams of the manufacturing method of the electronic package of the present invention.
圖2D-1係為圖2D之另一態樣之上視示意圖。 Figure 2D-1 is a top view schematic diagram of another embodiment of Figure 2D.
圖2E-1係為圖2E之另一態樣之上視示意圖。 Figure 2E-1 is a top view schematic diagram of another embodiment of Figure 2E.
圖3A至圖3B係為本發明之電子封裝件之絕緣材散熱結構之第一散熱件之製程之剖面示意圖。 Figures 3A to 3B are schematic cross-sectional views of the manufacturing process of the first heat sink of the insulating material heat sink structure of the electronic package of the present invention.
圖4A至圖4B係為本發明之電子封裝件之絕緣材散熱結構之第二散熱件之製程之剖面示意圖。 Figures 4A to 4B are cross-sectional schematic diagrams of the manufacturing process of the second heat sink of the insulating material heat dissipation structure of the electronic package of the present invention.
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The following is a specific and concrete example to illustrate the implementation of the present invention. People familiar with this technology can easily understand other advantages and effects of the present invention from the content disclosed in this manual.
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It should be noted that the structures, proportions, sizes, etc. depicted in the drawings attached to this specification are only used to match the contents disclosed in the specification for understanding and reading by people familiar with this technology, and are not used to limit the restrictive conditions for the implementation of the present invention. Therefore, they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "above", "first", "second" and "one" used in this specification are only for the convenience of description, and are not used to limit the scope of implementation of the present invention. Changes or adjustments in their relative relationships shall also be regarded as the scope of implementation of the present invention without substantially changing the technical content.
圖2A至圖2H係為本發明之電子封裝件2之製法之剖面示意圖。
Figures 2A to 2H are cross-sectional schematic diagrams of the manufacturing method of the
如圖2A所示,提供一具有複數凸部301之第一散熱件30與一具有複數凹部401之第二散熱件40。
As shown in FIG. 2A , a
於本實施例中,該第一散熱件30係為一板體,且該第二散熱件40係為一連接有複數支撐腳400之片體,以令該凹部401形成於該支撐腳400之其中一側。例如,該第二散熱件40藉由該複數支撐腳400圍繞而呈罩蓋狀以形成一容置空間S。
In this embodiment, the
再者,該第一散熱件30係為絕緣材,如預浸材(Prepreg,簡稱PP)、環氧樹脂(epoxy)之封裝膠體、封裝材(molding compound)或其它塑膠材質。例如,該第一散熱件30可採用模注(Injection molding)方式製作,如圖3A所示之第一模件70與第二模件71,並於脫模後,移除多餘之絕緣材30a,如圖3B所示。
Furthermore, the
又,該第二散熱件40係為絕緣材,如預浸材(PP)、環氧樹脂(epoxy)之封裝膠體、封裝材或其它塑膠材質。例如,該第二散熱件40可採用模注方式製作,如圖4A所示之第一模件80與第二模件81,並於脫模後,移除多餘之絕緣材402,如圖4B所示。應可理解地,該第一散熱件30與第二散熱件40之材質可相同或相異。
Furthermore, the
如圖2B至圖2C所示,先於該第一散熱件30上形成複數開口300,再藉由令相變材(Phase change material,簡稱PCM)物體(Mass)22位於該第一散熱件30和第二散熱件40之間,以壓合該第一散熱件30與第二散熱件40,以令該相變材物體22夾設於該第一散熱件30與第二散熱件40之間,使該相變材物體22外露於該複數開口300。
As shown in FIG. 2B to FIG. 2C, a plurality of
於本實施例中,該複數開口300係貫穿該第一散熱件30之片體,且該第一散熱件30以其凸部301插入該第二散熱件40之凹部401中,使該第一與第二散熱件30,40相接合。
In this embodiment, the plurality of
再者,該相變材物體22係為類薄板(like sheet)形體,且形成該相變材物體22之材質係為石蠟(Paraffin)、有機酸(organic acid)、無機鹽(inorganic salt)、鹽水化合物(salt water compound)或其它相變材。
Furthermore, the phase
如圖2D所示,於該第二散熱件40上形成一屏蔽層23,以形成一絕緣材散熱結構2a。
As shown in FIG. 2D , a
於本實施例中,該屏蔽層23係形成於該第二散熱件40之容置空間S內之片體40a與該支撐腳400之表面上。例如,該屏蔽層23係包含金屬材,如採用電鍍如金(Au)、銀(Ag)、鎳(Ni)或其它之金屬層之方式形成於該第二散熱件40上。
In this embodiment, the
再者,藉由模注方式製作該第一散熱件30與第二散熱件40可形成整版面(panel)規格或晶圓級(wafer level)規格,如圖2D-1所示之散熱架體3,其藉由複數支架3a連接複數陣列排設之絕緣材散熱結構2a。
Furthermore, the
或者,可依需求將單一絕緣材散熱結構2a以其第一散熱件30置放於單一承載件9上,以利於輸送至後續製程所用之機台,如圖2E所示。應可理解地,如圖2E-1所示,亦可將複數絕緣材散熱結構2a陣列排設於一整版面規格或晶圓級規格之承載件9a上。
Alternatively, a single insulating material
如圖2F至圖2G所示,提供一整版面規格或晶圓級規格之基板結構2b,其包含複數相鄰接之載板20,再於各該載板20上設置至少一電子元件21。接著,接續圖2E-1所示之製程,自該承載件9a上移取各該絕緣材散熱結構2a,以將各該絕緣材散熱結構2a分別對應放置於各該載板20上。
As shown in FIG. 2F to FIG. 2G, a
於本實施例中,該載板20例如為具有核心層與線路結構之封裝基板、無核心層(coreless)形式線路結構之封裝基板、具導電矽穿孔(Through-silicon via,簡稱TSV)之矽中介板(Through Silicon interposer,簡稱TSI)或其它板型,其包含至少一絕緣層200及至少一結合該絕緣層200之線路層201,如至少一扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。例如,形成該線路層201之材質係為銅,且形成該絕緣層200之材質係為如聚對二唑苯(Polybenzoxazole,簡稱PBO)、聚醯亞胺(Polyimide,簡稱PI)、預浸材(Prepreg,簡稱PP)等之介電材。應可理解地,該基板結構2b亦可為單一載板20形式(圖未示)或為其它承載晶片之板材,如導線架(lead frame)、晶圓(wafer)、或其它具有金屬佈線(routing)之板體等,並不限於上述。
In this embodiment, the
再者,該電子元件21係為主動元件、被動元件或其組合者,其中,該主動元件係例如半導體晶片,而該被動元件係例如電阻、電容及電感。於本實施例中,該電子元件21係為半導體晶片,其具有相對之作用面21a與非作用面21b,並使該作用面21a藉由複數如銲錫材料、金屬柱(pillar)或其它等之導電凸塊210以覆晶方式設於該載板20之線路層上並電性連接該線路層201,且以底膠211包覆該些導電凸塊210;或者,該電子元件21可藉由複數銲線(圖未示)以打線方式電性連接該載板20之線路層201;亦或,該電子元件21可直接接觸該載板20之線路層201。因此,可於該載板20上接置所需類型及數量之電子元件21,以提升其電性功能,且有關電子元件21電性連接承載結構20之方式繁多,並不限於上述。
Furthermore, the
又,該絕緣材散熱結構2a係以其第二散熱件40之支撐腳400藉由黏著層24結合於該載板20上,以令該電子元件21位於該容置空間S內,使該第二散熱件40罩蓋該電子元件21。例如,該屏蔽層23係位於該第二散熱件40(該變相材物體22)與該電子元件21之間,以遮蓋該電子元件21,使該屏蔽層23能防止該電子元件21受外界之電磁干擾(Electromagnetic Interference,簡稱EMI)。
Furthermore, the insulating material
另外,該絕緣材散熱結構2a係以其第二散熱件40之片體40a(或該屏蔽層23)接觸該電子元件21之非作用面21b。應可理解地,該絕緣材散熱結構2a亦可未接觸該電子元件21,即該絕緣材散熱結構2a與該電子元件21之非作用面21b相分離。
In addition, the insulating material
如圖2H所示,沿如圖2G所示之切割路徑L(即各該載板20之間的交界)進行切單製程,以獲取該電子封裝件2。
As shown in FIG2H, a singulation process is performed along the cutting path L shown in FIG2G (i.e., the boundary between each carrier 20) to obtain the
於本實施例中,該電子元件21所產生之熱能之散熱路徑係由該第二散熱件40經由該相變材物體22,再經由該開口300將熱能散出至外界環境。當該相變材物體22吸收來自該電子元件21之熱能時,該相變材物體22會由固態轉變成液態,且當該相變材物體22經由該開口300將熱能散逸時,該相變材物體22會由液態轉變成固態。
In this embodiment, the heat dissipation path of the heat energy generated by the
因此,本發明之製法主要藉由模注絕緣材方式製作該第一散熱件30與第二散熱件40,以簡易製程,故相較於習知金屬散熱件,本發明之製法不僅能大幅降低該絕緣材散熱結構之製作成本,且能減輕該絕緣材散熱結構2a之重量,以利於該電子封裝件2符合輕巧之需求。
Therefore, the manufacturing method of the present invention mainly manufactures the
再者,該電子封裝件2藉由該相變材物體22之設計,以當該相變材物體22吸收來自該電子元件21之熱能時,該電子元件21之溫度將保持穩定(即維持於所需之溫度),此時,該第一散熱件30之開口300係作為該相變材物體22之液態擴散之流向路徑及釋壓空間,以減低該相變材物體22施加於該第二散熱件40(或該電子元件21)上之壓力,因而有利於提升該電子封裝件2之可靠度。
Furthermore, the
又,該屏蔽層23不僅能防止該電子元件21受外界之電磁干擾,且能作為導熱結構,以將該電子元件21之熱能傳遞至該相變材物體22,使該相變材物體22發生相變(phase transformation),即該相變材物體22由固態轉變成液態。
In addition, the
本發明提供一種電子封裝件2係包括:一具有至少一線路層201之載板20、至少一設於該載板20上並電性連接該線路層201之電子元件21、以及一設於該載板20上以遮蓋該電子元件21之絕緣材散熱結構2a。
The present invention provides an
所述之絕緣材散熱結構2a係埋設有一相變材物體22且具有至少一外露該變相材物體22之開口300。
The insulating material
於一實施例中,該絕緣材散熱結構2a係接觸該電子元件21。
In one embodiment, the insulating material
於一實施例中,該絕緣材散熱結構2a係具有一屏蔽層23,且該屏蔽層23係位於該變相材物體22與該電子元件21之間。
In one embodiment, the insulating material
於一實施例中,該絕緣材散熱結構2a係包含相接合之第一散熱件30與第二散熱件40,以令該變相材物體22夾設於該第一散熱件30
與該第二散熱件40之間,且該開口300係形成於該第一散熱件30上,並使該第二散熱件40設於該載板20上以遮蓋該電子元件21。
In one embodiment, the insulating material
於一實施例中,該相變材物體22係包含石蠟、有機酸、無機鹽或鹽水化合物。
In one embodiment, the
綜上所述,本發明之電子封裝件及其製法,主要藉由模注絕緣材方式製作該絕緣材散熱結構,以降低該絕緣材散熱結構之製作成本,且減輕該絕緣材散熱結構之重量,使該電子封裝件利於符合輕巧之需求。 In summary, the electronic package and its manufacturing method of the present invention mainly manufacture the insulating material heat dissipation structure by injection molding the insulating material, so as to reduce the manufacturing cost of the insulating material heat dissipation structure and reduce the weight of the insulating material heat dissipation structure, so that the electronic package can meet the demand of being lightweight.
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are used to illustrate the principles and effects of the present invention, but are not used to limit the present invention. Anyone familiar with this technology can modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the scope of the patent application described below.
2:電子封裝件 2: Electronic packaging components
2a:絕緣材散熱結構 2a: Insulation material heat dissipation structure
20:載板 20: Carrier board
201:線路層 201: Circuit layer
21:電子元件 21: Electronic components
210:導電凸塊 210: Conductive bump
211:底膠 211: Base glue
22:相變材物體 22: Phase change material
23:屏蔽層 23: Shielding layer
24:黏著層 24: Adhesive layer
30:第一散熱件 30: First heat sink
300:開口 300: Opening
40:第二散熱件 40: Second heat sink
Claims (10)
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