TW202423037A - Resistive attenuator and method for improving linearity of resistive attenuator - Google Patents

Abstract

A resistive attenuator and a method for improving linearity of the resistive attenuator are provided. The resistive attenuator includes a first transistor, an attenuation circuit and a compensation circuit, wherein both of the first transistor and the attenuation circuit are coupled between an input terminal and an output terminal of the resistive attenuator, and the compensation circuit is coupled to the first transistor. More particularly, the first transistor is configured to provide a first signal path between the input terminal and the output terminal. The attenuation circuit is configured to provide a second signal path between the input terminal and the output terminal, wherein signal attenuation of the second signal path is greater than signal attenuation of the first signal path. In addition, the compensation circuit is configured to compensate nonlinear distortion caused by the first transistor.

Description

Resistive attenuator and method for improving linearity of resistive attenuator

The present invention relates to an attenuator circuit, and more particularly to a resistive attenuator and a method for improving the linearity of the resistive attenuator.

Since the external digital pre-distortion circuit typically operates at a signal power of 0 decibel relative to one millwatt (dBm), it is also optimized based on the signal power of 0 dBm during design. However, in some cases, the external digital pre-distortion circuit needs to process a higher power signal, such as 10 dBm. When the external digital pre-distortion circuit designed based on the signal power of 0 dBm processes the signal power of 0 dB, the overall linearity is difficult to meet the target specification, for example, the amplitude-to-amplitude (AMAM) distortion and amplitude-to-phase (AMPM) distortion do not meet the requirements, and the above linearity problems are typically caused by the attenuator in the external digital pre-distortion circuit.

In order to ensure that the external digital pre-distortion circuit has good linearity when processing a signal with a power of 10 dBm, some related technologies will add additional loss to the signal path. However, this approach makes the noise figure of the external digital pre-distortion circuit not meet the target specification when processing a signal with a power of 0 dBm.

Therefore, a novel architecture and related method are needed to improve the linearity of an external digital pre-distortion circuit (especially the attenuator therein) without or with less side effects.

The object of the present invention is to provide a resistive attenuator and a method for improving the linearity of the resistive attenuator, so as to allow the resistive attenuator to improve its linearity when processing high-power signals without affecting or less likely to affect the performance related to the noise index.

At least one embodiment of the present invention provides a resistive attenuator. The resistive attenuator includes a first transistor, at least one attenuation circuit, and a compensation circuit, wherein the first transistor is coupled between an input terminal and an output terminal of the resistive attenuator, the at least one attenuation circuit is coupled between the input terminal and the output terminal, and the compensation circuit is coupled to the first transistor. In particular, the first transistor is used to provide a first signal path between the input terminal and the output terminal. The at least one attenuation circuit is used to provide at least one second signal path between the input terminal and the output terminal, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path. In addition, the compensation circuit is used to compensate for the nonlinear distortion caused by the first transistor.

At least one embodiment of the present invention provides a method for improving the linearity of a resistive attenuator. The method includes: using a first transistor of the resistive attenuator to provide a first signal path between an input terminal and an output terminal of the resistive attenuator; using at least one attenuation circuit of the resistive attenuator to provide at least one second signal path between the input terminal and the output terminal, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path; and using a compensation circuit of the resistive attenuator to compensate for nonlinear distortion caused by the first transistor, wherein the compensation circuit is coupled to the first transistor.

The resistive attenuator and method provided by the embodiments of the present invention utilize the configuration of a compensation circuit to offset the nonlinear distortion caused by the transistor coupled between the input terminal and the output terminal in the resistive attenuator. Since the compensation circuit does not cause additional signal power loss, the linearity of the resistive attenuator can be improved without sacrificing the performance related to the noise index. In addition, the embodiments of the present invention do not significantly increase the additional cost, so the present invention can solve the problems of the related technology without side effects or with less side effects.

FIG. 1 is a schematic diagram of a digital pre-distortion (DPD) circuit such as an external DPD (EDPD) circuit 10 according to an embodiment of the present invention, wherein the external DPD circuit 10 at least includes a resistive attenuator 100. In this embodiment, the external DPD circuit 10 may further include an input inductor Lin, a rectifier 110, a filter 120, an input bias resistor Rin, an output bias resistor Rout, a mixer 130, a transimpedance amplifier (TIA) 140, and a correction circuit 150. In particular, the external digital pre-distortion circuit 10 can receive an input signal through the input inductor Lin. After being processed by the rectifier 110 and the filter 120, the resistive attenuator 100 can attenuate the signal output by the filter 120, so that the mixer 130 and the transimpedance amplifier 140 can generate an output signal according to the attenuated signal output by the resistive attenuator 100. In addition, the calibration circuit 150 can be used to perform image rejection ratio calibration of the external digital pre-distortion circuit 10 , wherein the calibration circuit 150 can receive the signal VPLL from the phase-locked loop and generate a corresponding test signal to simulate the signal from the signal path of the input inductor Lin, the rectifier 110 and the filter 120 .

As shown in FIG. 1 , the rectifier 110 may include diodes D1, D2, D3, and D4, a capacitor C0, and a resistor R0, wherein the rectifier 110 operates with a voltage level of a reference voltage Vs1 as a reference level. The filter 120 may include resistors Rf1 and Rf2, capacitors Cf1, Cf2, Cf3, and Cf4, and transistors Mf1 and Mf2, wherein the filter 120 operates with a voltage of a reference voltage Vs2 as a reference level, and each of the transistors Mf1 and Mf2 may function as a switch. The correction circuit 150 may include capacitors Cc1, Cc2, Cc3 and Cc4, and transistors Mc1, Mc2, Mc3 and Mc4, wherein each of the capacitors Cc1, Cc2, Cc3 and Cc4 may perform AC coupling on the signal VPLL to extract the AC component in the signal VPLL, and each of the transistors Mc1, Mc2, Mc3 and Mc4 may act as a switch. It should be noted that the present invention mainly focuses on the implementation of the resistive attenuator 100, and other peripheral components are not the focus of the present invention, so the operating details of these peripheral components are not elaborated here. In addition, the above implementation details are only examples of these peripheral components, but the present invention is not limited thereto.

FIG. 2 is a schematic diagram of the details of the resistive attenuator 100 shown in FIG. 1 according to an embodiment of the present invention. As shown in FIG. 2, the resistive attenuator 100 may include a transistor M1, at least one attenuation circuit such as attenuation circuits 112, 113 and 114, and a compensation circuit 111, wherein the transistor M1 is coupled between the input terminal Nin and the output terminal Nout of the resistive attenuator 100, each of the attenuation circuits 112, 113 and 114 is coupled between the input terminal Nin and the output terminal Nout, and the compensation circuit 111 is coupled to the transistor M1 (e.g., coupled between the reference voltage VD and the input terminal Nin). In this embodiment, the transistor M1 can be used to provide a first signal path between the input terminal and the output terminal. Each of the attenuation circuits 112, 113 and 114 can be used to provide at least one second signal path between the input terminal Nin and the output terminal Nout, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path. For the convenience of subsequent explanation, the first signal path can be referred to as a low loss path, and the second signal path can be referred to as a high loss path. In addition, the compensation circuit 111 can be used to compensate for the nonlinear distortion caused by the transistor M1.

In this embodiment, each of the attenuation circuits 112, 113, and 114 may include a attenuation resistor and a switching transistor, and the switching transistor and the attenuation resistor are connected in series between the input terminal Nin and the output terminal Nout. In detail, the attenuation circuit 112 may include a attenuation resistor R2 and a switching transistor M2, and the switching transistor M2 and the attenuation resistor R2 are connected in series between the input terminal Nin and the output terminal Nout. The attenuation circuit 113 may include a attenuation resistor R3 and a switching transistor M2, and the switching transistor M3 and the attenuation resistor R3 are connected in series between the input terminal Nin and the output terminal Nout. The attenuation circuit 114 may include an attenuation resistor R4 and a switch transistor M4, and the switch transistor M4 and the attenuation resistor R4 are connected in series between the input terminal Nin and the output terminal Nout. In addition, the gate terminal of the transistor M1 is used to control whether to enable the low-loss path provided by the transistor M1, the gate terminal of the transistor M2 is used to control whether to enable the high-loss path provided by the attenuation circuit 112, the gate terminal of the transistor M3 is used to control whether to enable the high-loss path provided by the attenuation circuit 113, and the gate terminal of the transistor M4 is used to control whether to enable the high-loss path provided by the attenuation circuit 114.

In this embodiment, the overall signal attenuation between the input terminal Nin and the output terminal Nout can be determined based on whether any one of the first signal path and the second signal path is enabled. For example, when the transistors M1, M2, M3, and M4 are all turned on, the resistive attenuator 100 can provide a first attenuation rate between the input terminal Nin and the output terminal Nout. When the transistor M1 is turned off and the transistors M2, M3, and M4 are turned on, the resistive attenuator 100 can provide a second attenuation rate between the input terminal Nin and the output terminal Nout. When transistors M1 and M2 are turned off and transistors M3 and M4 are turned on, the resistive attenuator 100 can provide a third attenuation rate between the input terminal Nin and the output terminal Nout. When transistors M1, M2 and M3 are turned off and transistor M4 is turned on, the resistive attenuator 100 can provide a fourth attenuation rate between the input terminal Nin and the output terminal Nout.

However, since the low-loss path provided by transistor M1 does not have a resistor connected in series with transistor M1, when transistor M1 is turned on, a large amount of power of the signal on input terminal Nin is transmitted to output terminal Nout through transistor M1, which causes the signal conversion from input terminal Nin to output terminal Nout to have a lot of nonlinear terms (such as third-order terms). In order to prevent the linearity of the resistive attenuator 100 from being deteriorated due to transistor M1, the present invention uses a compensation circuit 111 to generate a reverse third-order coefficient to offset the third-order coefficient generated by transistor M1, so as to compensate for the nonlinear distortion caused by transistor M1.

As shown in FIG. 2 , the compensation circuit 111 may include a transistor M5, wherein the gate terminal of the transistor M5 is coupled to the source terminal of the transistor M5. In addition, the compensation circuit 111 may further include bias resistors Rb1 and Rb2, wherein the bias resistor Rb1 is coupled between the transistor M5 and the transistor M1 (e.g., coupled to the drain terminal of the transistor M5), and the bias resistor Rb2 is coupled between the transistor M5 (e.g., the source terminal of the transistor M5) and the reference voltage VD. Specifically, the bias resistors Rb1 and Rb2 may be used to control the drain-to-source voltage difference of the transistor M5 so that the nonlinear distortion caused by the transistor M5 and the nonlinear distortion caused by the transistor M1 offset each other. In some embodiments, transistors M5 and M1 may have the same size (e.g., transistor channel width and channel length). In some embodiments, transistors M5 and M1 may have different sizes. In some embodiments, bias resistors Rb1 and Rb2 may have the same resistance value. In some embodiments, bias resistors Rb1 and Rb2 may have different resistance values. As long as transistor M5 can produce a third order of the same (or close to) size and opposite direction as transistor M1 under the bias controlled by bias resistors Rb1 and Rb2, the design of the size of transistor M5 and the resistance value of bias resistors Rb1 and Rb2 can be varied. Table 1 Configuration AMAM (enable compensation circuit) AMAM (Close compensation circuit) AMPM (turn on compensation circuit) AMPM (turn off compensation circuit) #1 -0.279 -0.432 -0.932 -1.07 #2 -0.151 -0.252 -0.636 -0.882 #3 -0.063 -0.116 -0.364 -0.538 #4 -0.013 -0.024 -0.183 -0.232

Table 1 shows the improvement of linearity of the compensation circuit 111 of the present invention through amplitude-to-amplitude (AMAM) distortion and amplitude-to-phase (AMPM) distortion. The second to fifth columns of Table 1 respectively represent the AMAM distortion (values are expressed in decibels) of the resistive attenuator 100 when the compensation circuit 111 is turned on, the AMAM distortion of the resistive attenuator 100 when the compensation circuit 111 is turned on, and the AMAM distortion of the resistive attenuator 100 when the compensation circuit 111 is turned on. The second to fifth columns of Table 1 respectively represent the resistive attenuator 100 configured to have the first attenuation rate, the second attenuation rate, the third attenuation rate, and the fourth attenuation rate. For example, configuration #1 in Table 1 represents that transistors M1, M2, M3, and M4 are all turned on, configuration #2 in Table 1 represents that transistor M1 is turned off and transistors M2, M3, and M4 are turned on, configuration #3 in Table 1 represents that transistors M1 and M2 are turned off and transistors M3 and M4 are turned on, and configuration #4 in Table 1 represents that transistors M1, M2, and M3 are turned off and transistor M4 is turned on. As shown in Table 1, compared to the case where the compensation circuit 111 is turned off, the AMAM distortion and AMPM distortion of the resistive attenuator 100 can be effectively reduced when the compensation circuit 111 is turned on, wherein the smaller the absolute values of the AMAM distortion and the AMPM distortion shown in Table 1, the better the linearity. It should be noted that the transistor M1 still has some parasitic capacitors (such as gate-to-source capacitors or gate-to-drain capacitors) when it is turned off, so that the turned-off transistor M1 still generates nonlinear terms and affects the linearity of the resistive attenuator 100. Therefore, although the transistor M1 is turned off when the resistive attenuator 100 is configured to have the second attenuation rate, the third attenuation rate, and the fourth attenuation rate, the linearity of the resistive attenuator 100 can still be improved due to the use of the compensation circuit 111.

In addition, the resistance attenuator 100 can also improve the performance related to third-order intermodulation distortion (IMD3) by using the compensation circuit 111. Specifically, whether the input signal is 10 dBm (decibel relative to one millwatt, dBm) or 5 dBm, the resistance attenuator 100 can be configured to have the first attenuation rate, the second attenuation rate, the third attenuation rate, and the fourth attenuation rate. The use of the compensation circuit 111 can improve the results of IMD3, especially the results of the upper sideband IMD3 and the lower sideband IMD3.

FIG. 3 is a schematic diagram of a workflow of a method for improving the linearity of a resistive attenuator (e.g., the resistive attenuator 100 shown in FIG. 2 ) according to an embodiment of the present invention. It should be noted that the workflow shown in FIG. 3 is for illustrative purposes only and is not intended to limit the present invention. In particular, if the same result can be obtained, one or more steps may be added, deleted, or modified in the workflow shown in FIG. 3 . In addition, these steps do not have to be performed completely in accordance with the steps shown in FIG. 3 .

In step S310, the resistive attenuator may utilize a first transistor therein to provide a first signal path between an input terminal and an output terminal of the resistive attenuator.

In step S320, the resistive attenuator may provide at least one second signal path between the input terminal and the output terminal by using at least one attenuation circuit therein, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path.

In step S330, the resistive attenuator may utilize a compensation circuit therein to compensate for the nonlinear distortion caused by the first transistor, wherein the compensation circuit is coupled to the first transistor.

In summary, the embodiment of the present invention can control the bias of the transistor M5 in the compensation circuit 111 so that the nonlinear term generated by the transistor M5 and the nonlinear term of the transistor M1 offset each other. Therefore, the embodiment of the present invention can reduce the nonlinear distortion caused by the transistor M1 as much as possible without using an additional resistor in series with the transistor M1. In addition, the embodiment of the present invention will not significantly increase the additional cost, so the present invention can solve the problems of related technologies without side effects or with less side effects. The above is only a preferred embodiment of the present invention, and all equal changes and modifications made according to the scope of the patent application of the present invention should be covered by the present invention.

10: External digital pre-distortion circuit 100: Resistive attenuator 110: Rectifier 120: Filter 130: Mixer 140: Transimpedance amplifier 150: Correction circuit Lin: Input inductor Rin: Input bias resistor Rout: Output bias resistor D1~D4: Diode R0, Rf1, Rf2: Resistor C0, Cf1~Cf4, Cc1~Cc4: Capacitor Mf1, Mf2, Mc1~Mc4: Transistor VPLL: Signal Vs1, Vs2: Reference voltage Nin: Input terminal Nout: Output terminal R2~R4: Attenuation resistor M1~M5: Transistor Rb1, Rb2: bias resistors VD: reference voltage S310~S330: steps 111: compensation circuit 112~114: attenuation circuit

FIG. 1 is a schematic diagram of a digital predistortion circuit according to an embodiment of the present invention. FIG. 2 is a schematic diagram of the details of the resistive attenuator shown in FIG. 1 according to an embodiment of the present invention. FIG. 3 is a schematic diagram of the working process of a method for improving the linearity of a resistive attenuator according to an embodiment of the present invention.

100: Resistive attenuator

111: Compensation circuit

112~114: Attenuation circuit

Rin: Input bias resistor

Rout: output bias resistor

Nin: Input terminal

Nout: output terminal

R2~R4: Attenuation resistor

M1~M5: transistor

Rb1, Rb2: bias resistors

Vs2, VD: reference voltage

Claims (10)

A resistive attenuator comprises: a first transistor coupled between an input terminal and an output terminal of the resistive attenuator, used to provide a first signal path between the input terminal and the output terminal; at least one attenuation circuit coupled between the input terminal and the output terminal, used to provide at least one second signal path between the input terminal and the output terminal, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path; and a compensation circuit coupled to the first transistor, used to compensate for the nonlinear distortion caused by the first transistor. A resistive attenuator as described in claim 1, wherein the compensation circuit includes a second transistor, and the gate terminal of the second transistor is coupled to the source terminal of the second transistor. The resistive attenuator as described in item 2 of the patent application scope, wherein the compensation circuit further comprises: a first bias resistor coupled between the first transistor and the second transistor; and a second bias resistor coupled between the second transistor and a reference voltage; wherein the first bias resistor and the second bias resistor are used to control a drain-to-source voltage difference of the second transistor so that the nonlinear distortion caused by the second transistor and the nonlinear distortion caused by the first transistor offset each other. A resistive attenuator as described in item 1 of the patent application, wherein the at least one attenuation circuit includes a attenuation resistor and a switching transistor, and the switching transistor and the attenuation resistor are connected in series between the input terminal and the output terminal. A resistive attenuator as described in item 4 of the patent application scope, wherein the gate terminal of the first transistor is used to control whether the first signal path is enabled, the gate terminal of the switch transistor is used to control whether the at least one second signal path is enabled, and the overall signal attenuation between the input terminal and the output terminal is determined based on whether either the first signal path or the second signal path is enabled. A method for improving the linearity of a resistive attenuator comprises: Using a first transistor of the resistive attenuator to provide a first signal path between an input terminal and an output terminal of the resistive attenuator; Using at least one attenuation circuit of the resistive attenuator to provide at least one second signal path between the input terminal and the output terminal, wherein the signal attenuation of the at least one second signal path is greater than the signal attenuation of the first signal path; and Using a compensation circuit of the resistive attenuator to compensate for nonlinear distortion caused by the first transistor, wherein the compensation circuit is coupled to the first transistor. The method as described in claim 6, wherein the compensation circuit includes a second transistor, and the gate terminal of the second transistor is coupled to the source terminal of the second transistor. As described in item 7 of the patent application, the compensation circuit further includes a first bias resistor and a second bias resistor, the first bias resistor is coupled between the first transistor and the second transistor, the second bias resistor is coupled between the second transistor and a reference voltage, and the compensation circuit using the resistive attenuator to compensate for the nonlinear distortion caused by the first transistor includes: Using the first bias resistor and the second bias resistor to control a drain-to-source voltage difference of the second transistor so that the nonlinear distortion caused by the second transistor and the nonlinear distortion caused by the first transistor offset each other. A resistive attenuator as described in item 6 of the patent application, wherein the at least one attenuation circuit includes a attenuation resistor and a switching transistor, and the switching transistor and the attenuation resistor are connected in series between the input terminal and the output terminal. The resistive attenuator as described in item 9 of the patent application scope further comprises: Using the gate terminal of the first transistor to control whether the first signal path is enabled; and Using the gate terminal of the switch transistor to control whether the at least one second signal path is enabled; Wherein the overall signal attenuation between the input terminal and the output terminal is determined based on whether either the first signal path or the second signal path is enabled.

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