TW202426672A - Rigid sapphire based direct patterning deposition mask - Google Patents

Abstract

A direct patterning deposition mask for OLED deposition is provided where the mask includes a sapphire substrate; and a Silicon Nitride (SiN) membrane. The sapphire substrate thickness may be between 0.7 and 2 mm. The sapphire substrate may have a diameter in the range of 200mm diameter to 300mm diameter. Warpage of the substrate is preferably less than 10um.

Description

Direct patterning deposition mask on rigid sapphire substrate

This application is directed to direct patterned deposition (dPd). More specifically, the invention is directed to dPd technology in displays.

Deposition of shadow mask backing is a process by which a layer of material is deposited onto the surface of a substrate such that the desired pattern of the layer is defined during the deposition process itself. This deposition technique is sometimes referred to as "direct patterning".

In a typical shadow mask deposition process, the desired material is vaporized at a source located at a distance from the substrate, with a shadow mask positioned between the substrate and the source. As the vaporized atoms of the material travel toward the substrate, they pass through a set of perforations in the shadow mask positioned just in front of the substrate surface. The perforations (i.e., orifices) are configured in the desired pattern of material on the substrate. Thus, the shadow mask blocks the passage of all vaporized atoms except those that pass through the perforations, which are deposited on the substrate surface in the desired pattern. The deposition of shadow mask bases is similar to the screen technology used to form patterns (e.g., uniform numbers, etc.) on clothing or stencil printing used to develop artwork.

Shadow mask deposition has been used for many years in the integrated circuit (IC) industry to deposit patterns of material on substrates, in part due to the fact that it avoids the need to pattern a layer of material after it has been deposited. Thus, using shadow mask deposition eliminates the need to expose the deposited material to harsh chemicals (e.g., acid-based etchants, caustic photolithography development chemicals, etc.) in order to pattern it. Additionally, shadow mask deposition requires less handling and processing of the substrate, thereby reducing the risk of substrate cracking and improving manufacturing yields. Additionally, many materials, such as organic materials, cannot withstand photolithography chemistries without being damaged, necessitating the deposition of such materials through a shadow mask.

A high-quality dPd mask is a key fixture in dPd manufacturing, especially for OLED microdisplays.

By using direct patterning of OLEDs using stencil lithography, efficient, high-resolution OLED microdisplays can be made. Deposition of color emitters for OLEDs uses a shadow mask that can have nanoscale features. The shadow mask has the precision and accuracy to match the underlying transistors of the microdisplay and creates the color emitters at higher resolution.

As can be seen in FIG. 1 , as is known, a flat substrate (such as a silicon wafer) is used to construct a shadow mask. A thin film (such as silicon nitride) is deposited on both sides of the substrate using chemical vapor deposition (CVD). This silicon nitride layer can act as an etch barrier on one side and a suspended diaphragm on the other side. Silicon oxide, aluminum oxide, or other thin film materials have also been used instead of silicon nitride. One side of the film is etched to expose the substrate for a subsequent through-substrate etch process. For example, the silicon nitride can be patterned using photolithography and dry etched to remove the silicon nitride. The other side of the film is patterned using lithography and etched to create the desired shadow mask pattern. Again, this other side may use photolithography and dry etching. Of course, other patterning methods may be used. U.S. Patent No. 9,385,323 (Chan et al.) describes this prior art process in detail.

Through-substrate etching leaves the film free-hanging, which enables the film to be used as a shadow mask. The substrate can be etched using, for example, potassium hydroxide.

Patterned evaporation can be performed through a shadow mask. A microdisplay substrate is placed close to or in contact with the shadow mask. The setup can be introduced into a deposition system to evaporate the material. After evaporation, a patterned material will be present on the substrate. This is illustrated in FIG2 .

There are two main challenges with dPd technology. First, the dPd mask must be made as flat as possible. Conventionally, a silicon (Si) wafer has been used as the frame material. See Figure 3. A SiN (silicon nitride) film is deposited and then a high-resolution pattern is made. See Figure 4, which shows a typical 1 µm SiN mask used for a dPd process. However, due to the finite rigidity of the Si wafer (up to 35 µm warp, as 0.7 mm Si is typical in the integrated circuit (IC) industry), a significant warp and bow remains after the dPd mask is made. Therefore, the dPd mask warp on Si substrates can be as high as 30 µm to 40 µm (see Figure 5, which shows an example of dPd mask warp measured across an 8-inch wafer, where a SiN diaphragm is located on top of a Si frame). Table 1 below shows an example of dPd mask warp across an 8-inch wafer, where a silicon nitride diaphragm is located on top of a Si frame at points 1 to 4 of Figure 5:

Location Mask 1 (RG) µm Mask 2 (B) µm 1 38.8 30.4 2 39.7 32 3 36.7 30.67 4 38.8 33 surface 1

This high mask warp can create a large gap between the mask and the wafer during organic deposition and cause unwanted feathering in lateral deposition. The deposited material tends to spread laterally after passing through the shadow mask (referred to as "feathering"). Feathering increases with the amount of separation between the substrate and the shadow mask. To reduce feathering, this separation is kept as small as possible without compromising the integrity of the chuck holding the substrate and shadow mask. Furthermore, any non-uniformity in this separation across the deposition area will cause variations in the amount of feathering. This non-uniformity can arise from, for example, a loss of parallelism between the substrate and the shadow mask, bending or sagging of one or both of the substrate and shadow mask, and the like. In addition, a shadow mask must be supported only at its periphery to avoid blocking the passage of vaporized atoms to the perforated pattern. As a result, the center of the shadow mask can sag due to gravity, which further exacerbates the feathering problem. See FIG. 6 , which shows an example of feathering distance calculated for two deposition angles as the wafer-to-mask gap varies from 1 micron to 10 microns.

A second challenge is about the manufacturability of the substrate. In order to integrate both SiN membrane and rigid substrate to make a dPd mask, a suitable process should be designed for substrate etching, chemical compatibility, etc. Substrate properties and process integration should be considered.

The present invention is directed to a direct patterned deposition mask for OLED deposition, wherein the mask comprises a sapphire substrate and a silicon nitride (SiN) membrane. The sapphire substrate thickness may be, for example, between 0.7 mm and 2 mm. The sapphire substrate (wafer) diameter may be, for example, 200 mm diameter or 300 mm diameter. A sapphire wafer patterning process is preferably compatible with the SiN membrane process. The curvature of the substrate may be limited to, for example, less than 10 um. The mask improves OLED pixel deposition feathering and OLED performance.

The present invention also provides a process for etching a sapphire substrate, the process comprising at least two of the following steps: mechanical drilling; wet etching; dry etching; and laser induced etching plus wet etching.

Cross-reference to related applications

This application claims priority to the pending U.S. Provisional Patent Application No. 63/403,964 filed on September 6, 2022, entitled "Rigid Sapphire Based Direct Patterning Deposition Mask".

The present invention is directed to a direct patterned deposition mask for OLED deposition. The mask includes a sapphire substrate and a silicon nitride (SiN) membrane. In order to reduce the warp of the mask, the present invention is directed to using sapphire as a base material for SiN deposition and patterning. See Figure 7, which shows a method for making a sapphire wafer into a dPd mask base material. Sapphire wafers with excellent rigidity have been widely used in the LED industry. Sapphire wafers have a Young's modulus that is approximately twice as high as that of Si wafers (as shown in Table 2 below, which shows a comparison of sapphire properties and silicon properties with silicon nitride, diamond and stainless steel). Young's modulus (Gpa) CTE (ppm/C) S N 290 3.3 Si 168.9 2.6-3.3 Sapphire 340-400 5.5 Diamond 1220 0.8 Stainless steel (Fe64Ni36) 137 1.2 Table 2

Based on an investigation shown in Table 3 (below), which shows an example of silicon wafer warp, compared to Table 4 (below), which shows sapphire wafer warp, the warp of 1.3 mm thick sapphire can be controlled to < 8 µm. Specifications average value SD N Minimum Maximum Curvature(µm) ＜35 1.009 0.649 125 -1.028 2.663 Curvature(µm) ＜35 6.150 1.734 125 3.070 14.970 table 3 8-inch diameter sapphire wafer; 1.3t SSP Diameter thickness Curvature Curve Particles 200+/-0.25 mm diameter 1.3+/-0.025 mm 0+/-6 µm ＜/= 5 µm ----- 1 199.91 1.307 -3.40 4.32 91 2 199.91 1.306 -3.13 5.45 122 3 199.91 1.308 -3.79 6.55 187 4 199.91 1.310 -4.03 6.01 70 5 199.91 1.305 -4.90 7.10 59 6 199.91 1.307 0.84 2.61 1.38 Table 4

However, for sapphire, typical dry etching only gives an etching rate of nm(s)/min. Basically, this means that a cycle of 2 to 3 weeks is required to complete the etching of one wafer, which is not practical. Alternatively, the newly developed high-temperature wet etching can give an etching rate of um(s)/min, which reduces the etching time of a wafer to 1 day or less.

In the past, there has been a 190°C limit for etch baths. Sapphire etch rates increase geometrically with temperature. It is desirable to achieve an etch bath temperature of 300°C.

During wet etching at relatively high temperatures (e.g., 300 degrees), the wafer masked with SiN is placed in a high temperature treatment tank with a mixture of etchant and buffer. Prior to immersion, a plasma enhanced chemical vapor phase process adds a silicon dioxide mask to the sapphire substrate, and lithography exposes the desired pattern. The mixture is at a temperature of, for example, 260°C to 300°C.

White Knight's Accubath™ quartz cells and specially designed automated stations make sapphire wet etching safe, reliable and suitable for high-volume manufacturing. See https://wkfluidhandling.com/resources/sapphire-etching/.

High temperature wet etching processes have advantages over dry etching in terms of speed, cost and scalability.

In the present invention, the thickness of the sapphire substrate is preferably between 0.7 mm and 2 mm. The sapphire substrate preferably has a diameter in the range of 200 mm diameter to 300 mm diameter. The curvature of the substrate is preferably <10 um.

According to another exemplary embodiment of the invention, selective laser induced etching (SLE) can be used in a two-step process, as known. In a first step, sapphire is modified internally by laser irradiation to improve chemical etchability. To prevent crack formation in the brittle material, short pulse durations (fs-ps) and a small focal volume (a few µm ³ ) are used. During laser modification, the crystallinity of the sapphire is degraded (e.g., from crystalline to amorphous). In a second step, the modified sapphire is removed by wet etching, such as using a potassium hydroxide (KOH) etch.

In this first step, ultrashort pulsed laser radiation is focused into a certain volume of the substrate. The pulse energy is absorbed only into the focal volume based on a multiphoton process. This process modifies the substrate without cracking it, thereby changing the chemical properties of the substrate. In this way, selective chemical etching of materials can be performed.

In addition, a combination of several etching methods can be used for sapphire etching. For example, mechanical drilling, laser processing, KOH etching, high temperature wet etching (described above), _Cl2 -based inductively coupled plasma (ICP) etching and _Cl2 , _BCl3 , ICP reactive ion etching (RIE), 20C etching. Table 5 below shows a comparison of several sapphire thinning and etching methods. Etching method Etching rate Etching time for 500 µm thickness Mechanical Drill high About a few minutes to several tens of minutes Laser treatment, then 30wt% KOH (ultrasonic bath, 80C) 10 microns/min 50 minutes High temperature wet etching; sulfuric acid and phosphoric acid, 260-300C ＞1 micron/min 8.3 hours Cl ₂ + ICP 0.1 micron/min 83.3 hours (3.5 days) Cl ₂ , BCl ₃ , ICP +RIE, 20C 0.43 μm/min 192 hours (8 days)

FIG8 shows an example of a process for making a SiN mask for a sapphire substrate. The process begins with a sapphire substrate with a SiN membrane. A pattern is placed on the SiN membrane by one or more of mechanical drilling, wet etching, dry etching, selective and laser induced etching plus wet etching. Photoresist is applied to the substrate, sapphire is removed from the surface of the membrane opposite the pattern (mechanical thinning) (e.g., 0.8 mm from 1.3 mm sapphire), and then laser processing wet etching is performed to remove a remaining 0.5 mm of sapphire.

It should be understood that the present disclosure teaches only one example of illustrative embodiments, and that a person skilled in the art can easily conceive of many variations of the present invention after reading this disclosure, and that the scope of the present invention is determined by the following claims.

FIG. 1 is an example of the major fabrication steps for a prior art silicon nitride membrane, which include (1) silicon wafer; (2) silicon nitride deposition; (3) back side lithography; (4) front side lithography; and (5) back side through wafer etching.

FIG. 2 is a simplified view illustrating deposition through a shadow mask.

FIG. 3 is a top plan view of a typical prior art 1 µm SiN mask used for a dPd process.

FIG. 4 is a simplified view illustrating a prior art example of a SiN mask cross section.

FIG. 5 is a simplified view of an example of dPd quality warp measured across an 8-inch wafer with a SiN membrane on top of a Si frame as shown in Table 1 (above).

FIG. 6 is a graphical representation of an example of calculated feathering distance for two deposition angles as a wafer-to-mask gap is varied from 1 µm to 10 µm.

FIG. 7 is a simplified view of the major manufacturing steps for a silicon nitride diaphragm, which include (1) sapphire wafer; (2) silicon nitride deposition; (3) back-side lithography; (4) front-side lithography; and (5) wet etching through the sapphire wafer from the back side.

FIG. 8 illustrates simplified steps of an example of a process for making a SiN mask for a sapphire substrate.

Claims (5)

A direct patterning deposition mask for OLED deposition, the mask comprising: (a)    a sapphire substrate; and (b)    a silicon nitride (SiN) membrane. A direct patterned deposition mask as claimed in claim 1, wherein the thickness of the sapphire substrate is between 0.7 mm and 2 mm. A direct patterned deposition mask as claimed in claim 1, wherein the sapphire substrate has a diameter in the range of 200 mm diameter to 300 mm diameter. A direct patterned deposition mask as claimed in claim 1, wherein the curvature of the substrate is less than 10 um. A process for etching a sapphire substrate comprising at least two of the following steps: (a)    mechanical drilling; (b)    wet etching; (c)    dry etching; and (d)    laser induced etching plus wet etching.