TW202312471A - Photo detection device and electronic apparatus - Google Patents

Abstract

The present invention improves phase difference detection accuracy. This photo detection device comprises a photoelectric conversion cell provided in a semiconductor layer. The photoelectric conversion cell includes first and second photoelectric conversion parts provided adjacent to each other via a first diffusion isolation region in a plan view in the semiconductor layer; a charge storing part (floating diffusion) provided in the first diffusion isolation region on the first surface side of the semiconductor layer; a first transfer transistor having a gate electrode provided on the first surface side of the semiconductor layer so as to overlap with the first photoelectric conversion part in a plan view, and transferring signal charges from the first photoelectric conversion part to the charge storing part; a second transfer transistor having a gate electrode provided on the first surface side of the semiconductor layer so as to overlap with the second photoelectric conversion part in a plan view, and transferring signal charges from the second photoelectric conversion part to the charge storing part; and an insulating separator provided in the first diffusion isolation region on the first surface side of the semiconductor layer, separated from the charge storing part, and extending between the gate electrodes of the first and second transfer transistors in a plan view.

Description

Photodetection device and electronic equipment

This technology (the technology of the present disclosure) relates to a photodetection device and an electronic device, and in particular relates to an effective technology applied to a photodetection device having a phase difference detection pixel and an electronic device equipped with the same.

As a photodetection device, a solid-state imaging device is known. As a technique related to this solid-state imaging device, it is known that pupil division is performed by embedding a plurality of photoelectric conversion elements in a semiconductor layer under a single crystal-on-chip lens. Solid-state imaging devices for built-in cameras in electronic devices such as mobile phones. Also, a method is known in which, at the time of phase difference detection, signal charges obtained by photoelectric conversion by a plurality of photoelectric conversion parts arranged under one crystal-on-chip lens are read out as independent signals, Instead, phase difference detection is performed (for example, Patent Document 1). [Prior Art Literature] [Patent Document]

Patent Document 1: Japanese Patent Laid-Open No. 2019-140251

[Problem to be solved by the invention]

In addition, a pixel of a solid-state imaging device adopting a phase detection auto focus (Phase Detection Auto Focus) method includes, for example, a photoelectric conversion unit including a first and a second photoelectric conversion unit interposed by a p-type photoelectric conversion unit. The diffusion separation regions of the semiconductor region are arranged adjacent to each other; the first transfer transistor transfers the signal charge from the first photoelectric conversion part to the floating diffusion part (Floating Diffusion); and the second transfer transistor transfers the signal charge It is transmitted from the second photoelectric conversion unit to the floating diffusion unit.

In this type of photoelectric conversion unit, when reading the signal charge on the side of the first photoelectric conversion part in the phase mode, for example, the first transfer transistor is turned on, and the signal charge of the first photoelectric conversion part is transferred to the floating Diffusion Department. During the period when the first transfer transistor is turned on, the potential of the diffusion separation region between the first photoelectric conversion part and the second photoelectric conversion part is modulated. In addition, part of the unread signal charge on the second photoelectric conversion unit side may be read as a signal of the first photoelectric conversion unit through the potential modulation region, and the phase difference detection performance may be lowered. This decrease in phase difference detection performance may also occur when reading signal charges on the second photoelectric conversion portion side.

The purpose of this technique is to improve the phase difference detection accuracy. [Technical means to solve the problem]

(1) A photodetection device according to an aspect of the present technology includes: a semiconductor layer having a first surface and a second surface on opposite sides to each other, and a photoelectric conversion unit provided on the semiconductor layer; and The above-mentioned photoelectric conversion unit has: The first and second photoelectric conversion parts are provided adjacent to each other on the semiconductor layer via the first diffusion separation region in plan view; a floating diffusion part provided in the first diffusion separation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer with a gate electrode overlapping the first photoelectric conversion part in plan view, and transfers signal charges from the first photoelectric conversion part to the float Diffusion Department; The second transfer transistor is provided on the side of the first surface of the semiconductor layer with a gate electrode overlapping the second photoelectric conversion part in plan view, and transfers signal charges from the second photoelectric conversion part to the float Diffusion Division; and An insulating separator provided on the first surface side of the semiconductor layer separately from the floating diffusion in the first diffusion isolation region, and in a plan view on the gate of each of the first and second transfer transistors. extending between the electrodes.

(2) The optical detection device of another aspect of this technology has: a semiconductor layer having a first face and a second face on opposite sides; The first and second photoelectric conversion parts are provided adjacent to each other on the above-mentioned semiconductor layer with a diffusion separation region interposed therebetween; a floating diffusion part provided in the diffusion isolation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer with a gate electrode overlapping with the first photoelectric conversion part in a plan view, and photoelectrically converts a signal obtained by the first photoelectric conversion part charges are transferred to the above-mentioned floating diffusion; The second transfer transistor is provided on the side of the first surface of the semiconductor layer with a gate electrode overlapping the second photoelectric conversion part in plan view, and photoelectrically converts a signal obtained by the second photoelectric conversion part charge transfer to the floating diffusion; and An insulating spacer is provided in the diffusion separation region separately from the charge storage portion, and extends between the gate electrodes of each of the first and second transfer transistors in plan view.

(3) An electronic device according to another aspect of the present technology includes the photodetection device of (1) or (2) above.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. In the description of the drawings referred to in the following description, the same or similar symbols are given to the same or similar parts. However, it should be noted that the drawing is a schematic drawing, and the relationship between the thickness and the plane size, the ratio of the thickness of each layer, etc. are different from the actual situation. Therefore, the specific thickness and size should be judged with reference to the following description.

In addition, it is needless to say that there are also parts in which the relationship or ratio of the dimensions is different among the drawings. In addition, the effects described in this specification are finally illustrative and not limiting, and may have other effects.

In addition, the following embodiments are examples of devices and methods for realizing the technical idea of the present technology, and are not intended to be specific to the following contents. That is, various changes may be added to the technical idea of this technology within the technical scope described in the claims.

In addition, the definitions of directions such as up and down in the following description are simply definitions for convenience of explanation, and are not intended to limit the technical thinking of the present technology. For example, it goes without saying that if the object is rotated by 90ﾟ and viewed, it will be read by switching from up to down to left and right, and if it is observed by rotating 180ﾟ, it will be read by inverting up and down.

Also, in the following embodiments, the case where the first conductivity type is p-type and the second conductivity type is n-type is exemplarily described, but the conductivity type can be selected as the opposite relationship, and the first conductivity type can be set as is n-type, and the second conductivity type is p-type.

Also, in the following embodiments, among the three directions orthogonal to each other in space, the first direction and the second direction orthogonal to each other in the same plane are respectively referred to as the X direction and the Y direction, and the first direction and the second direction are respectively The third direction perpendicular to each of the second direction and the second direction is defined as the Z direction. In addition, in the following embodiments, the thickness direction of the semiconductor layer 21 described later will be described as the Z direction.

[First Embodiment] In this first embodiment, an example of applying this technology to a solid-state imaging device as a back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor as a photodetection device will be described.

＜＜Overall structure of solid-state imaging device＞＞ First, the overall configuration of the solid-state imaging device 1A will be described.

As shown in FIG. 1 , a solid-state imaging device 1A according to the first embodiment of the present technology has a semiconductor wafer 2 having a rectangular two-dimensional planar shape on a main body. That is, the solid-state imaging device 1A is mounted on the semiconductor wafer 2 . This solid-state imaging device 1A (101) captures the image light (incident light 106) from the subject through the optical lens 102 as shown in FIG. Electrical signals are output as pixel signals.

As shown in FIG. 1 , the semiconductor wafer 2 on which the solid-state imaging device 1A is mounted includes, on a two-dimensional plane including mutually orthogonal X directions and Y directions, a square-shaped pixel array unit 2A provided in the central part; and a peripheral area. The portion 2B is provided outside the pixel array portion 2A so as to surround the pixel array portion 2A.

The pixel array unit 2A is a light receiving surface that receives light collected by, for example, an optical lens (optical system) 102 shown in FIG. 22 . Furthermore, in the pixel array section 2A, a plurality of pixels 3 are arranged in a matrix on a two-dimensional plane including the X direction and the Y direction. In other words, the pixels 3 are repeatedly arranged in each of the mutually orthogonal X and Y directions in a two-dimensional plane.

As shown in FIG. 1 , a plurality of bonding pads 14 are arranged on the peripheral portion 2B. Each of the plurality of bonding pads 14 is arranged, for example, along each of the four sides of the two-dimensional plane of the semiconductor wafer 2 . Each of the plurality of bonding pads 14 is an input/output terminal used when electrically connecting the semiconductor chip 2 with an external device.

＜Logic circuit＞ As shown in FIG. 2 , the semiconductor chip 2 may include a logic circuit. The logic circuit 13 includes a vertical drive circuit 4 , a row signal processing circuit 5 , a horizontal drive circuit 6 , an output circuit 7 , and a control circuit 8 . The logic circuit 13, as a field effect transistor, is composed of, for example, a CMOS (Complementary MOS, Complementary MOS) comprising an n-channel conductivity type MOSFET (Metal Oxide Semiconductor Field Effect Transistor, metal oxide semiconductor field effect transistor) and a p-channel conductivity type MOSFET. Type MOS) circuit configuration.

The vertical drive circuit 4 is constituted by, for example, a shift register. The vertical drive circuit 4 sequentially selects desired pixel drive lines 10 , supplies pulses for driving pixels 3 to the selected pixel drive lines 10 , and drives each pixel 3 in units of columns. That is, the vertical drive circuit 4 sequentially selects and scans each pixel 3 of the pixel array section 2A in the vertical direction in a column unit, and the photoelectric conversion element of each pixel 3 generates a pixel signal from the pixel 3 based on a signal charge corresponding to the amount of received light. It is supplied to the row signal processing circuit 5 via the vertical signal line 11 .

The row signal processing circuit 5 is arranged, for example, for each row of pixels 3 , and performs signal processing such as noise removal for each pixel row on the signal output from the pixels 3 for one column. For example, the row signal processing circuit 5 performs signal processing such as CDS (Correlated Double Sampling, correlated double sampling) and AD (Analog Digital, analog digital) conversion for removing inherent fixed pattern noise of pixels.

The horizontal drive circuit 6 is constituted by, for example, a shift register. The horizontal drive circuit 6 sequentially outputs the horizontal scan pulses to the row signal processing circuit 5, and sequentially selects each of the row signal processing circuits 5, and outputs the pixel signal after signal processing to the horizontal signal for each of the signal processing circuits 5. Line 12.

The output circuit 7 can perform signal processing on the pixel signals sequentially supplied by each of the signal processing circuits 5 through the horizontal signal line 12 and output them. As signal processing, for example, buffering, black level adjustment, line unevenness correction, various digital signal processing, etc. can be utilized.

The control circuit 8 generates a clock signal and a control signal that serve as references for the operations of the vertical drive circuit 4 , the horizontal signal processing circuit 5 , and the horizontal drive circuit 6 based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock signal. Furthermore, the control circuit 8 outputs the generated clock signal and control signal to the vertical drive circuit 4 , the row signal processing circuit section 5 , the horizontal drive circuit 6 and the like.

<pixel unit> The semiconductor wafer 2 includes a pixel unit PU shown in FIG. 3 . The pixel unit PU includes a pixel block 15 and a readout circuit 16 as shown in FIG. 3 . As shown in FIG. 4 , the pixel block 15 includes, for example, two pixels 3 adjacent to each other in the Y direction, and one floating diffusion portion shared by the two pixels 3 : Floating Diffusion (charge holding portion) FD. A readout circuit 16 is electrically connected to the floating diffusion FD of the pixel block 15 . That is, in the pixel array section 2A of the solid-state imaging device 1A of the first embodiment, the pixel units PU are repeatedly arranged in each of the X direction and the Y direction, and the pixel units PU include: 2 adjacent to each other in the Y direction. A pixel 3, a floating diffusion FD shared by the two pixels 3, and a readout circuit 16 connected to the floating diffusion FD.

<pixel> As shown in FIG. 3 , each pixel 3 of the plurality of pixels 3 includes a photoelectric conversion unit 31 . The photoelectric conversion unit 31 includes: a first photoelectric conversion section 32L including the first photoelectric conversion element PD1; a second photoelectric conversion section 32R including the second photoelectric conversion element PD2; and the signal charges photoelectrically converted by the second photoelectric conversion parts 32L, 32R (first and second photoelectric conversion elements PD1, PD2). In addition, the photoelectric conversion unit 31 further includes: a first transfer transistor TR1 for transferring signal charges photoelectrically converted by the first photoelectric conversion portion 32L (first photoelectric conversion element PD1) to the floating diffusion FD; and a second transfer transistor TR1. The transfer transistor TR2 transfers signal charges photoelectrically converted by the second photoelectric conversion unit 32R (second photoelectric conversion element PD2 ) to the floating diffusion unit FD.

Each of the two photoelectric conversion elements PD1 and PD2 generates signal charges corresponding to the amount of received light. Also, each of the two photoelectric conversion elements PD1 and PD2 temporarily accumulates (stores) generated signal charges. The cathode side of the photoelectric conversion element PD1 is electrically connected to the source region of the first transfer transistor TR1, and the anode side is electrically connected to a reference potential line (such as ground). The cathode side of the photoelectric conversion element PD2 is electrically connected to the source region of the transfer transistor TR2, and the anode side is electrically connected to a reference potential line (such as ground). For example, photodiodes are used as the photoelectric conversion elements PD1 and PD2.

Among the two transfer transistors TR1 and TR2, the source region of the first transfer transistor TR1 is electrically connected to the cathode side of the photoelectric conversion element PD1, and the drain region is electrically connected to the floating diffusion FD. Furthermore, the gate electrode of the first transfer transistor TR1 is electrically connected to the transfer transistor drive line in the pixel drive line 10 (see FIG. 2 ). The source region of the second transfer transistor TR2 is electrically connected to the cathode side of the photoelectric conversion element PD2, and the drain region is electrically connected to the floating diffusion FD. Moreover, the gate electrode of the second transfer transistor TR2 is electrically connected to the transfer transistor drive line in the pixel drive line 10 .

The floating diffusion FD is shared by the two photoelectric conversion units 32L and 32R of one photoelectric conversion unit 31 . Also, the floating diffusion FD is not limited thereto, and is shared by, for example, two pixels 3 , in other words, two photoelectric conversion units 31 . That is, the floating diffusion FD of the first embodiment is provided for every two pixels 3 (every two photoelectric conversion units 31), and the four photoelectric conversion units (32L×2+ 32R×2=4) in total.

The floating diffusion FD common to the two photoelectric conversion units 31 (two pixels 3 ) temporarily accumulates and holds the signal charge transferred from the first photoelectric conversion element PD1 via the first transfer transistor TR1 in the first photoelectric conversion unit 32L, And in the second photoelectric conversion unit 32R, the signal charge transferred from the second photoelectric conversion element PD2 via the second transfer transistor TR2 is temporarily accumulated and stored.

As shown in FIG. 3 , the input stage side of the readout circuit 16 is connected to the floating diffusion FD. The readout circuit 16 reads out the signal charge accumulated in the floating diffusion FD, and outputs a pixel signal based on the signal charge. The readout circuit 16 is not limited thereto, and is shared by, for example, two pixels 3 , in other words, two photoelectric conversion units 31 . Furthermore, the readout circuit 16 includes an amplification transistor AMP, a selection transistor SEL, and a reset transistor RST. These transistors (AMP, SEL, RST) are MOSFETs having a gate insulating film including a silicon oxide film (SiO2 film), a gate electrode, and a pair of main electrode regions that function as a source region and a drain region. constitute. In addition, such transistors may be MISFETs (Metal Insulator Semiconductor FETs) in which the gate insulating film includes a silicon nitride film (Si ₃ N ₄ film), or a laminated film of a silicon nitride film and a silicon oxide film. semiconductor FET).

The source region of the amplification transistor AMP is electrically connected to the drain region of the selection transistor SEL, and the drain region is electrically connected to the power line VDD. Moreover, the gate electrode of the amplifier transistor AMP is electrically connected to the floating diffusion FD.

The source region of the selection transistor SEL is electrically connected to the vertical signal line 11 (VSL), and the drain is electrically connected to the source region of the amplification transistor AMP. Moreover, the gate electrode of the select transistor SEL is electrically connected to the select transistor drive line in the pixel drive line 10 (refer to FIG. 2 ).

The source region of the reset transistor RST is electrically connected to the floating diffusion FD, and the drain region is electrically connected to the power line VDD. The gate electrode of the reset transistor RST is electrically connected to the reset transistor driving line in the pixel driving line 10 (refer to FIG. 2 ).

An electronic device including the solid-state imaging device 1A reads signal charges from each of the first and second photoelectric conversion elements PD1 and PD2 (first and second photoelectric conversion parts 32L and 32R), and detects the phase difference. At the time of focusing, a difference occurs in the amount of signal charges accumulated in the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2. On the other hand, when not focusing, as shown in FIG. 9, for example, in the first range between 0 and L1 of the light intensity, the amount Q1 of the signal charge accumulated in the first photoelectric conversion element PD1 and the amount Q1 of the signal charge accumulated in the second photoelectric conversion element PD1 are equal. A difference occurs between the amount Q2 of the signal charge of the photoelectric conversion element PD2. When not in focus, the electronic device operates the objective lens in such a way that the line of Q1 and the line of Q2 in the first range between 0 and L1 of the light intensity coincide with each other, so that the two lines coincide. It is autofocus.

Then, when the focus adjustment is completed, the electronic device generates an image using, for example, the added signal charge Q3 accumulated in the range of the light intensity in FIG. 9 from 0 to L3. Here, the added signal charge Q3 is the sum of Q1 and Q2 (Q3=Q1+Q2).

<<Concrete configuration of solid-state imaging device>> Next, a specific configuration of the semiconductor wafer 2 (solid-state imaging device 1A) will be described using FIGS. 4 to 7 . In addition, in order to make the drawings easy to see, in FIGS. 4 to 7 , the illustration of the multilayer wiring layer described later is omitted. In addition, FIG. 4 is vertically inverted with respect to FIG. 1 . That is, FIG. 1 shows the light incident surface side of the semiconductor wafer 2, but FIG. 4 is a top view when viewed from the opposite side (multilayer wiring layer side) of the semiconductor wafer 2 shown in FIG. 1 to the light incident surface side.

＜Semiconductor wafer＞ As shown in FIGS. 4 to 7 , the semiconductor wafer 2 further includes: a semiconductor layer 21 having a first surface S1 and a second surface S2 opposite to each other in the thickness direction (Z direction); and a color filter 45 and Microlenses (on-chip lenses) 46 are stacked sequentially from the second surface S2 side of the semiconductor layer 21 on the second surface S2 side. Also, although not shown, the semiconductor wafer 2 further includes a multilayer wiring layer including an insulating layer and a wiring layer provided on the first surface S1 side of the semiconductor layer 21 . The semiconductor layer 21 is composed of, for example, a single crystal silicon substrate.

A color filter 45 and a microlens 46 are provided for each pixel 3 (photoelectric conversion unit 31 ), respectively. The color filter 45 color-separates the incident light incident from the light incident surface side of the semiconductor wafer 2 . The microlens 46 collects the irradiated light, and makes the collected light efficiently enter the pixel 3 (photoelectric conversion unit 31 ). Moreover, one color filter 45 and a microlens 46 are provided so as to cover both the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R.

Here, the first surface S1 of the semiconductor layer 21 may be referred to as an element formation surface or a main surface, and the second surface S2 side may be referred to as a light incident surface or a rear surface. In the solid-state imaging device 1A of the first embodiment, the first and second photoelectric conversion parts 32L, 32R (first and second photoelectric conversion elements PD1, PD2) of the photoelectric conversion unit 31 provided on the semiconductor layer 21 convert The incident light on the second surface (light incident surface, rear surface) S2 side of 21 undergoes photoelectric conversion.

＜Photoelectric conversion unit＞ As shown in FIGS. 4 to 7 , the semiconductor layer 21 has photoelectric conversion cells 31 defined by the inter-cell diffusion separation region 22 as the second diffusion separation region. The photoelectric conversion unit 31 is provided for each pixel 3 . In FIG. 4 , two photoelectric conversion units 31 are illustrated, but the number of photoelectric conversion units 31 is not limited to two. Although the details of the photoelectric conversion units 31 are not shown in the figure, they are repeatedly arranged for each pixel 3 via the inter-unit diffusion separation region 22 in each of the X direction and the Y direction in plan view. The photoelectric conversion unit 31 is a planar pattern having a square shape with four sides.

As shown in FIGS. 4 to 7 , the photoelectric conversion unit 31 has the semiconductor layer 21 in plan view: first and second photoelectric conversion parts 32L, 32R, which are separated by intra-unit diffusion as the first diffusion separation region. The regions 23 are provided adjacent to each other; and the floating diffusion FD (see FIG. 4 ) is provided in the intra-cell diffusion isolation region 23 on the first surface S1 side of the semiconductor layer 21 . The inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 are diffusion separation regions of the first conductivity type in which impurities are diffused.

In addition, the photoelectric conversion unit 31 further includes a first transfer transistor TR1 on the first surface S1 side of the semiconductor layer 21, and the gate electrode 42L of the first transfer transistor TR1 overlaps the first photoelectric conversion portion 32L in plan view. and transfer signal charges from the first photoelectric conversion portion 32L to the floating diffusion FD.

In addition, the photoelectric conversion unit 31 further includes a second transfer transistor TR2 on the first surface S1 side of the semiconductor layer 21, and the gate electrode 42R of the second transfer transistor TR2 is provided so as to overlap the second photoelectric conversion portion 32R in plan view. , and the signal charge is transferred from the second photoelectric conversion portion 32R to the floating diffusion FD.

Furthermore, the photoelectric conversion unit 31 further has an insulating separator 35 provided in the intra-cell diffusion separation region 23 on the first surface S1 side of the semiconductor layer 21 separately from the floating diffusion FD, and extending over the first surface S1 in a plan view. The gate electrodes 42L, 42R of the first and second transfer transistors TR1, TR2 extend between and outside.

As shown in FIG. 4 , the photoelectric conversion unit 31 is a planar pattern having a square shape with four sides. Furthermore, although not shown in detail, the photoelectric conversion units 31 are repeatedly arranged for each pixel 3 via the inter-unit diffusion separation region 22 in each of the X direction and the Y direction in plan view.

＜Diffusion separation area＞ As shown in FIG. 4 to FIG. 7 , the inter-unit diffusion separation region 22 extends across the first surface S1 and the second surface S2 of the semiconductor layer 21 , and electrically separates the adjacent photoelectric conversion units 31 in a two-dimensional plane. The intra-cell diffusion separation region 23 extends over the first surface S1 and the second surface S2 of the semiconductor layer 21 similarly to the inter-cell diffusion separation region 22 , and connects the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R of the photoelectric conversion unit 31 . electrical separation. Each of the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 is composed of, for example, a p-type semiconductor region (first semiconductor region of the first conductivity type) 24 .

As shown in FIG. 4 , the inter-unit diffusion separation region 22 corresponding to one photoelectric conversion unit 31 (pixel 3 ) is a square annular planar pattern (square annular planar pattern) in plan view. Furthermore, the inter-unit diffusion separation region 22 corresponding to a plurality of photoelectric conversion units 31 (pixels 3 ) is a grid-like planar pattern. The photoelectric conversion unit 31 is surrounded by two inter-unit diffusion separation regions 22 extending in the X direction with the photoelectric conversion unit 31 interposed therebetween, and two inter-unit diffusion separation regions 22 extending in the Y direction with the photoelectric conversion unit 31 interposed therebetween.

As shown in FIG. 4 , the intra-cell diffusion separation region 23 extends along the Y direction in a plan view, and is connected to and integrated with the intermediate portion of each of the two inter-cell diffusion separation regions 22 extending in the X direction with the photoelectric conversion unit 31 interposed therebetween.

＜Photoelectric conversion part＞ Each of the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R photoelectrically converts light incident from the second surface (light incident surface, rear surface) S2 side of the semiconductor layer 21 to generate signal charges. In addition, each of the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R also functions as a floating diffusion portion that temporarily accumulates generated signal charges. The first photoelectric conversion parts 32L and the second photoelectric conversion parts 32R are arranged along the first direction in the photoelectric conversion unit 31 . Here, the first direction will be described assuming the X direction, but any direction other than the X direction may be used as long as it is a direction perpendicular to the thickness direction. Also, each of the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R includes, for example, an n-type semiconductor region (second semiconductor region of the second conductivity type) 25, and constitutes the aforementioned photoelectric conversion elements PD1, PD2.

<Floating Diffusion> As shown in FIGS. 4 and 7 , the floating diffusion FD is provided in the inter-cell diffusion isolation region 22 on the first surface S1 side of the semiconductor layer 21 . Specifically, in the pixel block 15, the floating diffusion FD intersects the inter-unit diffusion separation region 22 disposed between the two photoelectric conversion units 31 and the intra-unit diffusion separation region 23 of each of the two photoelectric conversion units 31. region, that is, the intersection of the diffusion separation region including the inter-unit diffusion separation region 22 and the intra-unit diffusion separation region 23 . In addition, around the floating diffusion FD, in the two photoelectric conversion units 31 of the pixel block 15, the gate electrodes 42L, 42L, and 42R, and the gate electrodes 42L and 42R of the two transfer transistors TR1 and TR2 included in the other photoelectric conversion unit 31 . The floating diffusion FD is composed of, for example, an n-type semiconductor region, and is an n-type floating diffusion region. In the first embodiment, electrons (e ⁻ ) are carriers serving as signal charges accumulated in the floating diffusion FD.

＜Transfer Transistor＞ As shown in FIGS. 5 to 7 , the first transfer transistor TR1 is provided on the first surface S1 side of the semiconductor layer 21 . The first transfer transistor TR1 is, for example, an n-channel conductivity type MOSFET. The first transfer transistor TR1 has a gate insulating film 41 and a gate electrode 42L, which are provided to form a channel in the active region between the first photoelectric conversion part 32L and the floating diffusion part FD, and are sequentially stacked on the first surface S1. . The first transfer transistor TR1 is turned on and off according to the voltage between the gate and the source, and has floating diffusion from the first photoelectric conversion part 32L functioning as the source region to the drain region. The case where the portion FD transmits the signal charge and the case where the signal charge is not transmitted. Here, description will be given assuming that the first transfer transistor TR1 transfers signal charges when turned on and does not transfer signal charges when turned off.

As shown in FIG. 8 , when the first transfer transistor TR1 is turned off, that is, when the signal charge is not transferred from the first photoelectric conversion part 32L to the floating diffusion part F, a region 23 (p-type The first potential barrier wall P1 of the semiconductor region 24) is a higher second potential barrier wall P2a. When the first transfer transistor TR1 is turned on, the second potential barrier P2a is lowered by modulation, and signal charges flow from the first photoelectric conversion portion 32L to the floating diffusion FD.

As shown in FIGS. 5 to 7 , the second transfer transistor TR1 is provided on the second surface S1 side of the semiconductor layer 21 . The second transfer transistor TR2 is, for example, an n-channel conductivity type MOSFET. The second transfer transistor TR2 has a gate insulating film 41 and a gate electrode 42R, which are provided to form a channel in the active region between the second photoelectric conversion part 32R and the floating diffusion part FD, and are sequentially formed on the first surface S1. laminated. The second transfer transistor TR2 is turned on and off according to the voltage between the gate and the source, and has floating diffusion from the second photoelectric conversion part 32R functioning as the source region to the drain region. The case where the portion FD transmits the signal charge and the case where the signal charge is not transmitted. Here, the description will be given assuming that the second transfer transistor TR2 transfers signal charges when it is turned on, and does not transfer signal charges when it is turned off.

As shown in FIG. 8 , when the second transfer transistor TR2 is turned off, that is, when the signal charge is not transferred from the second photoelectric conversion part 32R to the floating diffusion part FD, a region 23 (p-type The first potential barrier wall P1 of the semiconductor region 24) is a higher second potential barrier wall P2b. When the second transfer transistor TR2 is turned on, the second potential barrier P2b is lowered by modulation, and signal charges flow from the second photoelectric conversion portion 32R to the floating diffusion FD.

The gate insulating film 41 is made of, for example, a silicon oxide film. Each of the gate electrodes 42L and 42R is formed of a polysilicon film (doped polysilicon film) into which, for example, impurities to lower the resistance value are introduced. As shown in FIG. 4 , the insulating separator 35 is in the Y direction between the gate electrode 42L of the first transfer transistor TR1 and the gate electrode 42R of the second transistor TR1 in a plan view in one photoelectric conversion unit 31 It extends linearly from the floating diffusion FD side to the opposite side, and protrudes outward from between the two gate electrodes 42L and 42T. In this first embodiment, the insulating separator 35 is configured to have a length exceeding half of the length of the photoelectric conversion portion ( 32L, 32R) in the Y direction from a position slightly separated from the floating diffusion FD.

As shown in FIG. 6 , the insulating separator 35 includes a groove portion 36 extending from the first surface S1 side of the semiconductor layer 21 toward the second surface S2 side, and an insulating film 37 embedded in the groove portion 36 . Furthermore, the insulating separator 35 is covered with a gate insulating film 41 .

＜Other components＞ As shown in FIGS. 5 to 7, the photoelectric conversion unit 31 further has a p-type semiconductor region (third semiconductor region of the first conductivity type) 27, and the p-type semiconductor region (third semiconductor region of the first conductivity type) 27 is provided on the first surface S1 side of the semiconductor layer 21 and is a surface layer portion of each of the first and second photoelectric conversion portions 32L, 32R. In addition, the photoelectric conversion unit 31 further has an n-type semiconductor region (second conductivity type fourth semiconductor region) 26 provided on the semiconductor layer 21. The first surface S1 side is the surface layer portion of each of the first and second photoelectric conversion portions 32L, 32R.

The p-type semiconductor region 27 is provided on the surface layer portion of each of the first and second photoelectric conversion portions 32L, 32R so as to be in contact with the side surfaces of the gate insulating film 41 and the insulating separator 35 . In this way, by providing the p-type semiconductor region 27 in contact with the side surfaces of the gate insulating film 41 and the insulating separator 35 , pinning of the side surface of the insulating separator 35 can be ensured.

The n-type semiconductor region 26 is in contact with the bottom of the p-type semiconductor region 27 at the surface layer portion of each of the first and second photoelectric conversion portions 32L, 32R, and is connected to the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 The sides of each of them are arranged in contact with each other. Furthermore, the impurity concentration of the n-type semiconductor region 26 is higher than that of the n-type semiconductor region 25 . Thus, by disposing the n-type semiconductor region 26 in contact with the side surfaces of the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23, each of the first and second photoelectric conversion parts 32L, 32R can be Additional parasitic capacitance can improve the saturation signal Qs.

In addition, in the photoelectric conversion unit 31, since the parasitic capacitance of the insulating separator 35 as a dielectric is added to the photoelectric conversion parts 32L, 32R, the saturation signal quantity Qs can be further improved. Also, since the parasitic capacitance increases in proportion to the length of the insulating separator 35 , by adjusting the length of the insulating separator 35 , the parasitic capacitance added to the photoelectric conversion parts 32L, 32R can be adjusted.

＜＜Operation of solid-state imaging device＞＞ Next, the operation of the solid-state imaging device 1A according to the first embodiment will be described with reference to FIG. 9 and FIGS. 10A to 10D. 9 is a table showing the output of the photoelectric conversion unit of the solid-state imaging device with respect to the amount of incident light. The horizontal axis of FIG. 9 is the amount of incident light, and the vertical axis is the output of the photoelectric conversion unit. 10A to 10D are schematic diagrams showing changes in signal charges accumulated in the photoelectric conversion portion of the solid-state imaging device 1A.

When light enters the solid-state imaging device 1A, the light enters the first photoelectric conversion unit 32L and the second photoelectric conversion unit 32R through the microlens 46 and the color filter 45 . Then, an output Q1 is obtained from the first photoelectric conversion unit 32L, and an output Q2 is obtained from the second photoelectric conversion unit 32R according to the amount of incident light. Then, autofocus is performed based on the outputs Q1 and Q2, and an image is generated based on the sum of Q1 and Q2, which is an added signal Q3 (Q3=Q1+Q2). In FIG. 9 , the output Q1 of the first photoelectric conversion unit 32L, the output Q2 of the second photoelectric conversion unit 32R, and the sum of Q1 and Q2 are shown as an added signal Q3 (Q3=Q1+Q2). Also, the area from 0 to L1 is called the first range, the area from the light amount exceeding L1 to L2 is called the second range, the area from the light amount exceeding L2 to L3 is called the third range, and the light amount exceeding L3 is called the third range. The area is called the 4th range. 9 shows an example in which the first photoelectric conversion portion 32L is saturated earlier than the second photoelectric conversion portion 32R.

In the first range shown in FIG. 9 , no overflow occurs between the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R. This is the state shown in FIG. 10A, and the signal charges generated by the first photoelectric conversion portion 32L and the signal charges generated by the second photoelectric conversion portion 32R are not mixed. Phase difference detection for autofocus is performed within the first range. More specifically, phase difference detection is performed within the first range in which both the output Q1 of the first photoelectric conversion unit 32L and the output Q2 of the second photoelectric conversion unit 32R maintain linearity with respect to the amount of light.

In the second range shown in FIG. 9 , the first photoelectric conversion portion 32L is saturated earlier than the second photoelectric conversion portion 32R, and part of the signal charge of the first photoelectric conversion portion 32L passes over the first potential barrier of the intra-cell diffusion separation region 23 P1 flows into the second photoelectric conversion unit 32R. It is overflow (Fig. 10B).

In the third range shown in FIG. 9, the second photoelectric conversion portion 32R is also saturated. This is the state shown in FIG. 10C . There is no difference between the first photoelectric conversion part 32L and the second photoelectric conversion part 32R, and both accumulate signal charges across the first potential barrier P1 of the intra-cell diffusion separation region 23 . Then, the output of the first photoelectric conversion unit 32L and the second photoelectric conversion unit 32R rises until the charge overflows to the floating diffusion FD over the second potential barrier walls P2a and P2b.

In the fourth range shown in FIG. 9, the signal charge overflows to the floating diffusion FD over the second potential barrier P1a of the first transfer transistor TR1 and the second potential barrier P2b of the second transfer transistor TR2 (FIG. 10D) . The overflowed signal charges are erased by the reset transistor RST.

Image formation is performed using the added signal Q3 in the first range to the third range. More specifically, the addition signal Q3 is performed in the first range to the third range in which the linearity with respect to the light quantity is maintained.

＜＜The main effect of the first embodiment＞＞ Next, the main effects of the first embodiment will be described with reference to the conventional photoelectric conversion unit (pixel) shown in FIGS. 11A and 11B . FIG. 11A is a graph showing changes in the amount of signal charge accumulated in the previous photoelectric conversion portion. Fig. 11B is a diagram showing a change from Fig. 11A.

When the conventional photoelectric conversion unit reads, for example, the signal charge of the first photoelectric conversion part 32L in the phase mode, the first transfer transistor TR1 is turned on, and the signal charge of the first photoelectric conversion part 32L is transferred to the floating diffusion. Department (Figure 11A). During the period when the first transfer transistor TR1 is turned on, the potential of the intra-cell diffusion separation region 23 between the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R is modulated. Moreover, the potential barrier of the intra-cell diffusion separation region 23 is lowered by the size of the potential modulation region (FIG. 11B). In addition, in the conventional photoelectric conversion unit, part of the signal charges on the side of the second photoelectric conversion portion 32R that has not been read out may be read through the modulation region, and the phase difference detection performance may be lowered.

In contrast, the photoelectric conversion unit 31 of the first embodiment includes an insulating separator 35 . Therefore, during the period in which the first transfer transistor TR1 is turned on, the potential of the intra-cell diffusion separation region 23 between the first photoelectric conversion part 32L and the second photoelectric conversion part 32R is modulated, even if the intra-cell diffusion separation The potential barrier in the region 23 is reduced by the size of the modulation region corresponding to the potential, and the overflow path of the modulation region can also be physically closed by the insulating separator 35, so that the signal charge can be suppressed from the side of the second photoelectric conversion part 32R that is not read out. It leaks to the side of the first photoelectric conversion unit 32L. Thereby, it is possible to improve the phase difference detection performance. In addition, during the period when the second transfer transistor TR2 is turned on, the overflow path of the modulation region can also be closed by the insulating separator 35, and the signal charge can be prevented from flowing from the side of the first photoelectric conversion part 32L that has not been read out. The second photoelectric conversion part 32R side leaks. Thereby, it is possible to improve the phase difference detection performance.

The depth De (refer to FIG. 6 ) of the insulating spacer 35 in the Z direction is preferably greater than that of the first photoelectric conversion part 32L and the first photoelectric conversion part 32L during the period when either one of the first and second transfer transistors TR1 and TR2 is turned on. 2. The thickness (height) of the modulated region in which the potential of the intra-cell diffusion separation region 23 between the photoelectric conversion parts 32R is modulated is deep.

In addition, the insulating spacer 35 preferably extends over between the gate electrode 42L of the first transfer transistor TR1 and the gate electrode 42R of the second transfer transistor TR2 and outside in plan view. In addition, the insulating separator 35 is preferably separated from the floating diffusion FD in plan view.

In the solid-state imaging device 1A of the first embodiment, four photoelectric conversion sections ( 31L, 31R, 31L, and 31R) share one floating diffusion section FD. In this case, compared with the case where the floating diffusion FD is provided for each of the four photoelectric conversion parts (31L, 31R, 31L, 31R), by enlarging the photoelectric conversion part (Photo Diode, photoelectric Diode) volume, and can seek high saturation signal.

<<Modification of the first embodiment>> In the above-mentioned first embodiment, the case where the insulating separator 35 is configured to have a length exceeding half of the length in the Y direction of the photoelectric conversion parts 32L, 32R from a position slightly separated from the floating diffusion part FD has been described. . However, this technology is not limited to the length of the first embodiment. For example, as shown in FIG. 12 , the length of the insulating separator 35 in the Y direction may be less than half of the length of the photoelectric conversion parts 32L, 32R in the Y direction. However, the insulating spacer 35 is preferably provided with a length extending across and outside the gate electrode 42L of the first transfer transistor TR1 and the gate electrode 42R of the second transfer transistor TR2 in plan view.

[Second Embodiment] The solid-state imaging device 1B of the second embodiment of the present technology basically has the same configuration as the solid-state imaging device 1A of the first embodiment described above, except for the following configurations.

That is, as shown in FIGS. 13 and 14 , the solid-state imaging device 1B of the second embodiment includes a new n-type semiconductor region 28 (fifth semiconductor region). Other configurations are the same as those of the above-mentioned first embodiment.

As shown in FIGS. 13 and 14 , the n-type semiconductor region 28 crosses the intra-cell diffusion separation region 23 and controls the potential barrier between the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R. The n-type semiconductor region 28 is arranged at a position deeper than the insulating separator 35 and is separated from the insulating separator 35 . The n-type semiconductor region 28 extends along the Y direction in plan view, and the width in the X direction is wider than the width of the insulating spacer 35 in the X direction. The n-type semiconductor region 28 crosses directly below the insulating spacer 35 , and partially overlaps the insulating spacer 35 in plan view.

The n-type semiconductor region 28 is formed with an impurity concentration capable of canceling out impurities contained in the p-type semiconductor region 24 and inverting the conductivity from p-type to n-type. In this second embodiment, the n-type semiconductor region 28 is formed with a higher impurity concentration than, for example, the p-type semiconductor region 24 and the n-type semiconductor region 25 .

Also in the solid-state imaging device 1B of the second embodiment, the same effects as those of the solid-state imaging device 1A of the first embodiment described above are obtained.

Furthermore, in the solid-state imaging device 1B of the second embodiment, since the n-type semiconductor region 28 is provided directly under the insulating separator, a desired pattern can be formed between the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R. The potential can adjust the upper signal amount and the saturation signal amount Qs in the single photoelectric conversion unit 31 .

In addition, the n-type semiconductor region 28 can be selectively formed in the intra-cell diffusion isolation region 23 with substantially the same width as that of the intra-cell diffusion isolation region 23 .

[Third Embodiment] The solid-state imaging device 1C of the third embodiment of the present technology basically has the same configuration as the solid-state imaging device 1A of the first embodiment described above, except for the following configurations.

That is, as shown in FIGS. 15 and 16 , in the solid-state imaging device 1C of the third embodiment, the insulating spacer 35 is also provided in the inter-unit diffusion separation region 22 between the two photoelectric conversion units 31 arranged in the Y direction. Other configurations are the same as those of the above-mentioned first embodiment. The insulating separator 35 can be provided in the inter-unit diffusion separation region 22 between the photoelectric conversion units 31 of the same color, and can also be provided in the inter-unit diffusion separation region 22 between the photoelectric conversion units 31 of different colors.

Also in the solid-state imaging device 1C of the third embodiment, the same effects as those of the solid-state imaging device 1A of the first embodiment described above are obtained.

[Fourth Embodiment] The solid-state imaging device 1D of the fourth embodiment of the present technology basically has the same configuration as the solid-state imaging device 1A of the first embodiment described above, except for the following configurations.

That is, as shown in FIGS. 17 to 19 , the solid-state imaging device 1D according to the fourth embodiment further has an inter-cell diffusion separation region 22 (first diffusion separation region) on the second surface S2 side of the semiconductor layer 21 in plan view. ) overlapped with the inter-cell isolation region 52 (first isolation region), and further includes an intra-cell isolation region overlapping with the intra-cell diffusion isolation region 23 on the second surface S2 side of the semiconductor layer 21. 53. Furthermore, the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 of the fourth embodiment are thinner in the Z direction than the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 of the first embodiment described above. . Furthermore, the thickness in the Z direction of the inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 of the fourth embodiment is thicker than the thickness of the insulating separator 35 in the Z direction. In this fourth embodiment, the inter-cell isolation region is composed of a plurality of stages including the inter-cell diffusion isolation region 22 and the inter-cell isolation isolation region 52 . In addition, in this fourth embodiment, the intra-cell isolation region is constituted by a plurality of stages including the intra-cell diffusion isolation region 23 and the intra-cell isolation isolation region 53 . The inter-cell diffusion separation region 22 and the intra-cell diffusion separation region 23 are arranged on the first surface S1 side of the semiconductor layer 21 . The inter-cell isolation region 52 and the intra-cell isolation region 53 include, for example, a groove provided in the semiconductor layer 21 and an insulating film 54 buried in the groove. For example, a silicon oxide film can be used as the insulating film 54 .

As shown in FIGS. 17 and 19 , the inter-cell isolation region 52 is a planar pattern having the same shape as the inter-cell diffusion and isolation region 22 . In addition, the inter-unit insulating separation region 52 corresponding to one photoelectric conversion unit 31 (pixel 3) is the same as the planar pattern of the inter-unit diffusion separation region 22, which is a ring-shaped planar pattern (square shape) in plan view. circular planar pattern). Furthermore, the planar pattern of the inter-unit insulating separation region 52 corresponding to the plurality of photoelectric conversion units 31 (pixels 3 ) and the inter-unit diffusion separation region 22 is a grid-like planar pattern similarly. The photoelectric conversion unit 31 of the fourth embodiment is composed of two inter-unit diffusion separation regions 22 and two inter-unit insulation separation regions 52 extending in the X direction with the photoelectric conversion unit 31 interposed therebetween, and the Y Two inter-cell diffusion separation regions 22 extending in the same direction are surrounded by two inter-cell insulation separation regions 52 .

As shown in FIGS. 17 and 19 , the planar pattern of the intra-cell isolation region 53 is different from the planar pattern of the intra-cell diffusion and isolation region 23 .

As shown in FIG. 17 , the intra-cell diffusion separation region 23 extends along the Y direction in a plan view, and is connected and integrated with the intermediate portion of each of the two inter-cell diffusion separation regions 22 extending in the X direction with the photoelectric conversion unit 31 interposed therebetween.

On the other hand, as shown in FIG. 19 , the intra-unit isolation region 53 is directed inward from the middle portion of each of the two inter-unit isolation regions 52 extending in the X direction across the photoelectric conversion unit 31 in plan view (photoelectric conversion unit 31). Unit 31 side) protrudes and are separated from each other. Furthermore, the space between the two intra-cell isolation regions 53 functions as an overflow path.

Also in the solid-state imaging device 1D of the fourth embodiment, the same effects as those of the solid-state imaging device 1A of the first embodiment described above are obtained.

Also, as in the fourth embodiment, by disposing the continuous intra-cell diffusion separation region 23 and the discontinuous intra-cell diffusion region 23 between the first photoelectric conversion portion 32L and the second photoelectric conversion portion 32R of the photoelectric conversion unit 31, Insulating the separation region 53, regardless of whether the two photoelectric conversion parts 32L, 32R in the photoelectric conversion unit 31 are the same color or different colors, can improve the separation failure and optical performance caused by the potential.

[Fifth Embodiment] In the above-mentioned first to fourth embodiments, a pixel (photoelectric conversion unit) including two photoelectric conversion parts has been described. In this fifth embodiment, a pixel (photoelectric conversion unit) including one photoelectric conversion unit and a transfer transistor will be described.

A solid-state imaging device 1E according to a fifth embodiment of the present technology includes a pixel block (unit block) 15A shown in FIG. 20 .

As shown in FIG. 20 and FIG. 21 , the pixel block 15A has four pixels 3a arranged two in each of the X direction and the Y direction, and one floating diffusion FD shared by the four pixels 3a. For example, the readout circuit 16 shown in FIG. 3 of the above-mentioned first embodiment is electrically connected to the floating diffusion FD.

In addition, the pixel block 15A has, on the semiconductor layer 21, photoelectric conversion portions 33 provided adjacent to each other with the diffusion separation region 22a interposed therebetween for each of the four pixels 3a, and the first pixel on the semiconductor layer 21. On the surface S1 side, each of the gate electrodes 42 of each of the four pixels 3a is a transfer transistor TR provided so as to overlap with the photoelectric conversion unit 33 in plan view. The diffusion separation region 22a and the transfer transistor TR correspond to the inter-cell diffusion separation region 22 and the transfer transistors TR1 and TR2 shown in FIGS. 4 and 5 of the first embodiment, respectively. Also, the pixel block 15A has an insulating separator 35 .

Here, the pixel block 15A of the fifth embodiment includes: two photoelectric conversion parts 33 arranged adjacent to each other in the Y direction via a diffusion separation region 22a extending in the X direction; Two photoelectric conversion parts 33 arranged adjacent to each other in the X direction in the extended diffusion separation region 22a. Therefore, among the two photoelectric conversion parts 33 arranged adjacent to each other in the Y direction via the diffusion separation region 22a extending in the X direction, one photoelectric conversion part 33 corresponds to the first photoelectric conversion part of the present technology, and the other photoelectric conversion part 33 corresponds to the first photoelectric conversion part of the present technology. The photoelectric conversion unit 33 corresponds to the second photoelectric conversion unit of the present technology. Also, among the two photoelectric conversion parts 33 arranged adjacent to each other in the X direction via the diffusion separation region 22a extending in the Y direction, one photoelectric conversion part 33 corresponds to the first photoelectric conversion part of the present technology, and the other photoelectric conversion part 33 corresponds to the first photoelectric conversion part of the present technology. The photoelectric conversion unit 33 corresponds to the second photoelectric conversion unit of the present technology.

In addition, the gate electrode 42 and one of the two photoelectric conversion parts 33 arranged adjacent to each other in the Y direction via the diffusion separation region 22a extending in the X direction overlaps the transfer transistor TR in plan view. Corresponding to the first transistor of the present technology, the transfer transistor TR in which the gate electrode 42 overlaps with the other photoelectric conversion unit 33 in plan view corresponds to the second transistor of the present technology. In addition, the gate electrode 42 and one of the two photoelectric conversion parts 33 arranged adjacent to each other in the X direction via the diffusion separation region 22a extending in the Y direction and one of the photoelectric conversion parts 33 superimposed on the transfer transistor TR in plan view Corresponding to the first transistor of the present technology, the transfer transistor TR in which the gate electrode 42 overlaps with the other photoelectric conversion unit 33 in plan view corresponds to the second transistor of the present technology.

As shown in FIG. 20 and FIG. 21, the photoelectric conversion part 33 of each of the four pixels 3a is partitioned by the diffusion separation area 22a. That is, the two photoelectric conversion parts 33 lined up in the Y direction are adjacent to each other via the diffusion separation region 22 a extending in the X direction. Moreover, the two photoelectric conversion parts 33 lined up in the X direction are adjacent to each other via the diffusion isolation|separation region 22a extended in the Y direction.

The photoelectric conversion unit 33 photoelectrically converts light incident from the second surface (light incident surface, rear surface) S2 side of the semiconductor layer 21 to generate signal charges. Also, the photoelectric conversion portion 33 includes, for example, an n-type semiconductor region (a second semiconductor region of the second conductivity type) similarly to the first and second photoelectric conversion portions 32L, 32R shown in FIG. 5 of the first embodiment described above. ) 25, constituting the photoelectric conversion element PD. In the photoelectric conversion part 33 of this embodiment, it also functions as a floating diffusion part which temporarily accumulates the generated signal charge.

As shown in FIG. 20 , the floating diffusion FD is provided at the intersection of the diffusion isolation region 22 a extending in the X direction and the diffusion isolation region 22 a extending in the Y direction. That is, the floating diffusion FD is provided in the diffusion isolation region 22a on the first surface S1 side of the semiconductor layer 21 like the floating diffusion FD shown in FIG. 7 of the first embodiment described above.

The gate electrode 42 of each of the four transfer transistors TR included in each of the four pixels 3 a is arranged around the floating diffusion FD. The floating diffusion portion FD is formed of, for example, an n-type semiconductor region as in the first embodiment described above, and is an n-type floating diffusion region.

As shown in FIG. 20 and FIG. 21, the transmission transistor TR is basically the same structure as the transmission transistor TR1 and TR2 shown in FIG. 3 and FIG. The converted signal charges are transferred to the floating diffusion FD. The floating diffusion FD accumulates and holds signal charges transferred from the photoelectric conversion unit 33 via the transfer transistor TR. The transfer transistor TR has a gate insulating film 41 and a gate electrode 42, which are provided to form a channel in the active region between the photoelectric conversion portion 33 and the floating diffusion FD, and are sequentially stacked on the first surface S1. The transfer transistor TR is turned on and off according to the voltage between the gate and the source, and transfers signal charges from the photoelectric conversion part 33 functioning as the source region to the floating diffusion FD functioning as the drain region .

As shown in FIG. 20 and FIG. 21, the insulating spacer 35 is provided in the diffusion separation region 22a between the two photoelectric conversion parts 33 arranged in the Y direction, and is provided between the two photoelectric conversion parts 33 arranged in the X direction. The diffusion separation region 22a. In this fifth embodiment, since two photoelectric conversion parts 33 are arranged in each of the X direction and the Y direction along with the arrangement of the pixels 3a, the insulating separator 35 is arranged in the X direction and the Y direction of the floating diffusion part FD. Two are provided on both sides in each direction separately from the floating diffusion FD.

The insulating spacer 35 includes, like the insulating spacer 35 shown in FIG. 6 of the first embodiment described above, a groove portion 36 extending from the first surface S1 side to the second surface S2 side of the semiconductor layer 21, and a buried The insulating film 37 inside the groove portion 36 .

The depth De (refer to FIG. 6 ) of the insulating spacer 35 in the Z direction is the same as that of the above-mentioned first embodiment. It is preferable that in two pixels 3a arranged in the X direction or the Y direction, one transfer transistor TR is such that the thickness (height) of the modulation region in which the potential of the diffusion separation region 22 a between the two photoelectric conversion parts 33 is modulated during the conduction period is deep.

In addition, the insulating spacer 35 is the same as the above-mentioned first embodiment, and preferably extends over the gate electrode 42 of one transfer transistor TR and the other in the two pixels 3a arranged in the X direction or the Y direction in plan view. A transfer transistor TR extends between and outside the gate electrode 42 . In addition, the insulating separator 35 is preferably separated from the floating diffusion FD in plan view.

As shown in FIG. 21 , on the second surface S2 side of the semiconductor layer 21 , similarly to the first embodiment described above, color filters 45 and microlenses 46 are provided sequentially stacked from the second surface S2 side. In this fifth embodiment, each of the color filter 45 and the microlens 46 is arranged for each pixel block 15A.

According to the solid-state imaging device 1E of the fifth embodiment, among the two pixels 3a arranged in the X direction or the Y direction, when the transfer transistor TR of one pixel 3a is turned on, it is possible to suppress the photoelectricity of the other pixel 3a which is not intended. A phenomenon in which the signal charge of the conversion part 33 leaks into the floating diffusion part FD.

[Sixth Embodiment] ＜＜Application example for electronic equipment＞＞ This technology (the technology disclosed herein) can be applied to various electronic devices such as digital still cameras, digital video cameras and other imaging devices, mobile phones with imaging functions, and other devices with imaging functions.

Fig. 22 is a diagram showing a schematic configuration of an electronic device (for example, a camera) according to a sixth embodiment of the present technology.

As shown in FIG. 22 , an electronic device 100 includes a solid-state imaging device 101 , an optical lens 102 , a shutter device 103 , a drive circuit 104 , and a signal processing circuit 105 . This electronic device 100 shows an embodiment in which the solid-state imaging devices of the first to fifth embodiments of the present technology are used as the solid-state imaging device 101 in an electronic device (for example, a camera).

The optical lens 102 forms an image of image light (incident light 106 ) from a subject on the imaging surface of the solid-state imaging device 101 . Thereby, signal charges are accumulated in the solid-state imaging device 101 for a certain period of time. The shutter device 103 controls a light irradiation period and a light shielding period to the solid-state imaging device 101 . The drive circuit 104 supplies drive signals for controlling the transfer operation of the solid-state imaging device 101 and the shutter operation of the shutter device 103 . The signal transmission of the solid-state imaging device 101 is performed by the drive signal (timing signal) supplied from the drive circuit 104 . The signal processing circuit 105 performs various signal processing on the signal (pixel signal) output from the solid-state imaging device 101 . The image signal after signal processing is stored in a storage medium such as a memory, or output to a monitor.

According to such a configuration, in the electronic device 100 of the sixth embodiment, the reflection of light at the light-shielding film and the insulating film in contact with the air layer is suppressed by the light reflection suppressing portion in the solid-state imaging device 101, so that It is possible to improve image quality by suppressing deviation.

In addition, the electronic device 100 to which the solid-state imaging device of the above-mentioned embodiment can be applied is not limited to a camera, and can be applied to other electronic devices. For example, it can be applied to imaging devices such as camera modules for mobile devices such as mobile phones and tablet terminals.

In addition, this technology can also be applied to all distance measuring sensors including a ToF (Time of Flight) sensor that measures distance in addition to the solid-state imaging device as the above-mentioned image sensor. light detection device. The distance measuring sensor emits light to the object, detects the reflected light that is reflected from the surface of the object and returns it, and calculates the distance from the object based on the flight time from the time the light is emitted until the reflected light is received. distance sensor. The structure of the element isolation region described above can be adopted as the structure of the element isolation region of the distance measuring sensor.

In addition, this technology can employ the following configurations. (1) A light detection device, which has: a semiconductor layer having a first face and a second face on opposite sides of each other; and a photoelectric conversion unit provided on the aforementioned semiconductor layer; and The aforementioned photoelectric conversion unit has: The first and second photoelectric conversion parts are disposed adjacent to each other on the aforementioned semiconductor layer with the first diffusion separation region interposed therebetween in plan view; a floating diffusion part provided in the first diffusion isolation region on the first surface side of the semiconductor layer; In the first transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the first photoelectric conversion part in plan view, and a signal is transmitted from the first photoelectric conversion part to the floating diffusion part. charge; In the second transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the second photoelectric conversion part in plan view, and a signal is transmitted from the second photoelectric conversion part to the floating diffusion part. charge; and An insulating spacer provided in the first diffusion isolation region separately from the floating diffusion on the first surface side of the semiconductor layer, and in the gate of each of the first and second transfer transistors in plan view extending between the electrodes. (2) The photodetection device according to (1) above, wherein the insulating spacer extends between and outside the gate electrodes of each of the first and second transfer transistors in plan view. (3) The photodetection device as in (1) or (2) above, wherein the depth of the insulating spacer is greater than that during the period when either of the first and second transfer transistors is turned on in the phase difference mode. The thickness of the modulation region in which the potential of the first diffusion separation region is modulated is deep. (4) The photodetection device according to any one of (1) to (3) above, wherein the first diffusion separation region is composed of a first semiconductor region of the first conductivity type; and Each of the first and second photoelectric conversion parts includes a second semiconductor region of the second conductivity type. (5) The photodetection device according to any one of (1) to (4) above, wherein the first and second transfer transistors have a gate insulating film provided on the first surface side of the semiconductor layer; and The aforementioned insulating separation system is covered by the aforementioned gate insulating film. (6) The photodetection device according to any one of (1) to (5) above, wherein the insulating separator includes a groove provided on the first surface side of the semiconductor layer, and an insulating film embedded in the groove. (7) The photodetection device according to any one of (1) to (6) above, wherein the photoelectric conversion unit further includes a third semiconductor region of the first conductivity type, and the third semiconductor region of the first conductivity type is located on the semiconductor layer. The first surface side is provided on each of the first and second photoelectric conversion parts. (8) The photodetection device according to any one of (1) to (7) above, wherein the photoelectric conversion unit further has a fourth semiconductor region of the second conductivity type, and the fourth semiconductor region of the second conductivity type is located on the semiconductor layer. The first surface side is provided on the first and second photoelectric conversion parts so as to be in contact with the bottom of the third semiconductor region, and the impurity concentration is higher than that of the second semiconductor region. (9) The photodetection device according to any one of the above (1) to (8), wherein the photoelectric conversion unit further has a fifth semiconductor region of the second conductivity type, and the fifth semiconductor region of the second conductivity type diffuses the first diffusion The separation region crosses and electrically connects the first photoelectric conversion part and the second photoelectric conversion part. (10) The photodetection device according to any one of (1) to (9) above, wherein the photoelectric conversion units are arranged adjacent to each other via the second diffusion separation region in the plan view; and The insulating separator is also provided in the second diffusion separation region. (11) The photodetection device according to any one of the above (1) to (10), which further has: a first isolation separation region provided on the second surface side of the semiconductor layer so as to overlap the first diffusion separation region in plan view; and The second isolation region is provided on the second surface side of the semiconductor layer so as to overlap with the second diffusion region in plan view. (12) A light detection device having: a semiconductor layer having a first face and a second face on opposite sides; the first and second photoelectric conversion parts are provided adjacent to each other on the aforementioned semiconductor layer via a diffusion separation region; a floating diffusion part provided in the diffusion isolation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps with the first photoelectric conversion part in a plan view, and photoelectrically converts a signal obtained by the first photoelectric conversion part. charges are transferred to the aforementioned floating diffusion; The second transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps the second photoelectric conversion part in plan view, and photoelectrically converts the signal obtained by the second photoelectric conversion part. charge transfer to the aforementioned floating diffusion; and An insulating spacer is provided in the diffusion separation region separately from the charge storage portion, and extends between the gate electrodes of each of the first and second transfer transistors in plan view. (13) The photodetection device according to (12) above, wherein the insulating spacer extends between and outside the gate electrodes of each of the first and second transfer transistors in plan view. (14) The photodetection device according to (12) or (13) above, wherein the diffusion separation region extends in the first direction; and The first and second photoelectric conversion parts are aligned in a second direction perpendicular to the first direction in the same plane. (15) An electronic device comprising: a photodetection device; an optical lens that forms image light from a subject on an imaging surface of the photodetection device; and a signal processing circuit that processes a signal output from the photodetection device signal processing; and The aforementioned light detection device has: a semiconductor layer having a first face and a second face on opposite sides of each other; and a photoelectric conversion unit provided on the aforementioned semiconductor layer; and The aforementioned photoelectric conversion unit has: The first and second photoelectric conversion parts are disposed adjacent to each other on the aforementioned semiconductor layer with the first diffusion separation region interposed therebetween in plan view; a floating diffusion part provided in the first diffusion isolation region on the first surface side of the semiconductor layer; In the first transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the first photoelectric conversion part in plan view, and a signal is transmitted from the first photoelectric conversion part to the floating diffusion part. charge; In the second transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the second photoelectric conversion part in plan view, and a signal is transmitted from the second photoelectric conversion part to the floating diffusion part. charge; An insulating spacer provided in the first diffusion isolation region separately from the floating diffusion on the first surface side of the semiconductor layer, and in the gate of each of the first and second transfer transistors in plan view extending between the electrodes. (16) An electronic device comprising: a photodetection device; an optical lens that forms image light from a subject on an imaging surface of the photodetection device; and a signal processing circuit that processes a signal output from the photodetection device signal processing; and The aforementioned light detection device has: a semiconductor layer having a first face and a second face on opposite sides; the first and second photoelectric conversion parts are provided adjacent to each other on the aforementioned semiconductor layer via a diffusion separation region; a floating diffusion part provided in the diffusion isolation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps with the first photoelectric conversion part in a plan view, and photoelectrically converts a signal obtained by the first photoelectric conversion part. charges are transferred to the aforementioned floating diffusion; The second transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps the second photoelectric conversion part in plan view, and photoelectrically converts the signal obtained by the second photoelectric conversion part. charge transfer to the aforementioned floating diffusion; and An insulating spacer is provided in the diffusion separation region separately from the charge storage portion, and extends between the gate electrodes of each of the first and second transfer transistors in plan view.

The scope of the present technology is not limited to the exemplary embodiments described in the drawings, but also includes all embodiments that achieve the same effect as the object of the present technology. Furthermore, the scope of the present technology is not limited to the combination of the inventive features defined by the scope of the patent application, but may be defined by all desired combinations of specific features among all the disclosed features.

1, 1A, 1B, 1C, 1D, 1E, 101: solid-state imaging devices 2: Semiconductor wafer 2A: Pixel Array Section 2B: Peripherals 3,3a: Pixel 4: Vertical drive circuit 5: Line signal processing circuit 6: Horizontal drive circuit 7: Output circuit 8: Control circuit 10: Pixel drive line 11, VSL: vertical signal line 12: Horizontal signal line 13: Logic circuit 14: Bonding Pad 15,15A: pixel blocks 16: Readout circuit 21: Semiconductor layer 22: Inter-unit diffusion separation area 22a: Diffusion separation area 23: Intra-unit diffusion separation area 24: p-type semiconductor region (first semiconductor region) 25: n-type semiconductor region (second semiconductor region) 26: n-type semiconductor region (fourth semiconductor region) 27: p-type semiconductor region (third semiconductor region) 28: n-type semiconductor region (fifth semiconductor region) 31: Photoelectric conversion unit (Photo Diode, photodiode) 32L: The first photoelectric conversion unit 32R: The second photoelectric conversion unit 33: Photoelectric conversion department 35: Insulation separator 36: Groove 37: insulating film 41: Gate insulating film 42, 42L, 42R: Gate electrodes 45:Color filter 46: microlens (crystal-on-chip lens) 52: Insulation separation area between units 53: Insulation separation area within the unit 54: insulating film 100:Electronic machine 102: Optical lens (optical system) 103: shutter device 104: Drive circuit 105: Signal processing circuit 106: Incident light AMP: amplifying transistor/transistor a4-a4, a13-a13, a15-a15, a17-a17, a20-a20, b4-b4: cutting line De: depth FD: Floating Diffusion L1, L2, L3: light volume P1: the first potential barrier P2a, P2b: the second potential barrier PD: photoelectric conversion element PD1: 1st photoelectric conversion element/photoelectric conversion element PD2: Second photoelectric conversion element/photoelectric conversion element PU: pixel unit Q1, Q2: Amount of signal charge/output Q3: Addition signal charge/addition signal RST: reset transistor/transistor SEL: select transistor/transistor S1:Side 1 S2: The second surface (light incident surface, back) TR: Transmit transistor TR1: The first transmission transistor / transmission transistor TR2: The second transmission transistor / transmission transistor VDD: power line X, Y, Z: direction

FIG. 1 is a chip layout diagram showing an example of a configuration of a solid-state imaging device according to a first embodiment of the present technology. FIG. 2 is a block diagram showing an example of the configuration of the solid-state imaging device according to the first embodiment of the present technology. 3 is an equivalent circuit diagram of a pixel unit of the solid-state imaging device according to the first embodiment of the present technology. 4 is a schematic plan view showing a configuration example of a pixel of the solid-state imaging device according to the first embodiment of the present technology. Fig. 5 is a schematic longitudinal sectional view showing the sectional structure along the cut line a4-a4 in Fig. 4 . FIG. 6 is a schematic longitudinal sectional view of a part of FIG. 5 enlarged. Fig. 7 is a schematic longitudinal sectional view showing a cross-sectional structure along line b4-b4 in Fig. 4 . FIG. 8 is a graph showing the potential distribution of the pixel in FIG. 4 . FIG. 9 is a diagram showing an output of a photoelectric conversion portion of the solid-state imaging device according to the first embodiment of the present technology with respect to incident light. 10A is a graph showing changes in the amount of signal charge accumulated in the photoelectric conversion portion of the solid-state imaging device according to the first embodiment of the present technology. Fig. 10B is a diagram showing a change from Fig. 10A. Fig. 10C is a diagram showing a change from Fig. 10B. Fig. 10D is a diagram showing a change from Fig. 10C. FIG. 11A is a graph showing changes in the amount of signal charge accumulated in the previous photoelectric conversion portion. Fig. 11B is a diagram showing a change from Fig. 11A. Fig. 12 is a schematic plan view showing a modified example of the first embodiment. 13 is a schematic plan view showing a configuration example of a pixel of a solid-state imaging device according to a second embodiment of the present technology. FIG. 14 is a schematic longitudinal sectional view showing a cross-sectional structure along the cutting line a13-a13 in FIG. 13 . 15 is a schematic plan view showing a configuration example of a pixel of a solid-state imaging device according to a third embodiment of the present technology. FIG. 16 is a schematic longitudinal sectional view showing a cross-sectional structure along the cutting line a15-a15 in FIG. 15 . 17 is a schematic plan view showing a configuration example of a pixel of a solid-state imaging device according to a fourth embodiment of the present technology. FIG. 18 is a schematic longitudinal sectional view showing a cross-sectional structure along cutting line a17-a17 in FIG. 17 . Fig. 19 is a schematic cross-sectional view showing the cross-sectional structure along the cutting line a19-a19 in Fig. 18 . 20 is a schematic plan view showing a configuration example of a pixel of a solid-state imaging device according to a fifth embodiment of the present technology. FIG. 21 is a schematic longitudinal sectional view showing a cross-sectional structure along cutting line a20-a20 in FIG. 20 . Fig. 22 is a diagram showing a schematic configuration of an electronic device according to a sixth embodiment of the present technology.

3: Pixel

21: Semiconductor layer

22: Inter-unit diffusion separation area

23: Intra-unit diffusion separation area

24: p-type semiconductor region (first semiconductor region)

25: n-type semiconductor region (second semiconductor region)

26: n-type semiconductor region (fourth semiconductor region)

27: p-type semiconductor region (third semiconductor region)

31: Photoelectric conversion unit (Photo Diode, photodiode)

32L: The first photoelectric conversion unit

32R: The second photoelectric conversion unit

35: Insulation separator

41: Gate insulating film

42L, 42R: Gate electrodes

45:Color filter

46: microlens (crystal-on-chip lens)

PD1: 1st photoelectric conversion element/photoelectric conversion element

PD2: Second photoelectric conversion element/photoelectric conversion element

S1:Side 1

S2: The second surface (light incident surface, back)

TR1: The first transmission transistor / transmission transistor

TR2: The second transmission transistor / transmission transistor

X, Y, Z: direction

Claims (16)

A light detection device, which has: a semiconductor layer having a first face and a second face on opposite sides of each other; and a photoelectric conversion unit provided on the aforementioned semiconductor layer; and The aforementioned photoelectric conversion unit has: The first and second photoelectric conversion parts are disposed adjacent to each other on the aforementioned semiconductor layer with the first diffusion separation region interposed therebetween in plan view; a floating diffusion part provided in the first diffusion isolation region on the first surface side of the semiconductor layer; In the first transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the first photoelectric conversion part in plan view, and a signal is transmitted from the first photoelectric conversion part to the floating diffusion part. charge; In the second transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the second photoelectric conversion part in plan view, and a signal is transmitted from the second photoelectric conversion part to the floating diffusion part. charge; and An insulating spacer provided in the first diffusion isolation region separately from the floating diffusion on the first surface side of the semiconductor layer, and in the gate of each of the first and second transfer transistors in plan view extending between the electrodes. The photodetection device according to claim 1, wherein the insulating spacer extends between and outside the gate electrodes of each of the first and second transfer transistors in plan view. The photodetection device according to claim 1, wherein the depth of the insulating separator is greater than that of the first diffusion separation region during the period when either of the first and second transfer transistors is turned on in the phase difference mode The thickness of the modulated region whose potential is modulated is deep. The photodetection device according to claim 1, wherein the first diffusion separation region is composed of a first semiconductor region of the first conductivity type; and Each of the first and second photoelectric conversion parts includes a second semiconductor region of the second conductivity type. The photodetection device according to claim 1, wherein said first and second transfer transistors have a gate insulating film provided on said first surface side of said semiconductor layer; and The aforementioned insulating separation system is covered by the aforementioned gate insulating film. The photodetection device according to claim 1, wherein the insulating separator includes: a groove provided on the first surface side of the semiconductor layer, and an insulating film embedded in the groove. The photodetection device according to claim 1, wherein the photoelectric conversion unit further includes a third semiconductor region of the first conductivity type, and the third semiconductor region of the first conductivity type is provided on the first surface side of the semiconductor layer on the first surface side. 1 and each of the second photoelectric conversion unit. The photodetection device according to claim 7, wherein the photoelectric conversion unit further has a fourth semiconductor region of the second conductivity type, and the fourth semiconductor region of the second conductivity type is located between the first surface side of the semiconductor layer and the third semiconductor layer. The bottoms of the semiconductor regions are arranged in contact with the first and second photoelectric conversion parts, and the impurity concentration is higher than that of the second semiconductor region. The photodetection device according to claim 1, wherein the photoelectric conversion unit further has a fifth semiconductor region of the second conductivity type, the fifth semiconductor region of the second conductivity type crosses the first diffusion separation region, and divides the first diffusion separation region. The photoelectric conversion unit is electrically connected to the second photoelectric conversion unit. The photodetection device according to claim 1, wherein the photoelectric conversion units are arranged adjacent to each other via the second diffusion separation region in the plan view; and The insulating separator is also provided in the second diffusion separation region. As the light detection device of claim 10, it further has: a first isolation separation region provided on the second surface side of the semiconductor layer so as to overlap the first diffusion separation region in plan view; and The second isolation region is provided on the second surface side of the semiconductor layer so as to overlap with the second diffusion region in plan view. A light detection device having: a semiconductor layer having a first face and a second face on opposite sides of each other; and the first and second photoelectric conversion parts are provided adjacent to each other on the aforementioned semiconductor layer via a diffusion separation region; a floating diffusion part provided in the diffusion isolation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps with the first photoelectric conversion part in a plan view, and photoelectrically converts a signal obtained by the first photoelectric conversion part. charges are transferred to the aforementioned floating diffusion; The second transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps the second photoelectric conversion part in plan view, and photoelectrically converts the signal obtained by the second photoelectric conversion part. charge transfer to the aforementioned floating diffusion; and An insulating spacer is provided in the diffusion separation region separately from the charge storage portion, and extends between the gate electrodes of each of the first and second transfer transistors in plan view. The photodetection device according to claim 12, wherein the insulating spacer extends between and outside the gate electrodes of each of the first and second transfer transistors in plan view. The photodetection device according to claim 12, wherein the diffusion separation region extends in the first direction; and The first and second photoelectric conversion parts are aligned in a second direction perpendicular to the first direction in the same plane. An electronic device comprising: a photodetection device; an optical lens that forms image light from a subject on an imaging surface of the photodetection device; and a signal processing circuit that processes a signal output from the photodetection device signal processing; and The aforementioned light detection device has: a semiconductor layer having a first face and a second face on opposite sides of each other; and a photoelectric conversion unit provided on the aforementioned semiconductor layer; and The aforementioned photoelectric conversion unit has: The first and second photoelectric conversion parts are disposed adjacent to each other on the aforementioned semiconductor layer with the first diffusion separation region interposed therebetween in plan view; a floating diffusion part provided in the first diffusion isolation region on the first surface side of the semiconductor layer; In the first transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the first photoelectric conversion part in plan view, and a signal is transmitted from the first photoelectric conversion part to the floating diffusion part. charge; In the second transfer transistor, a gate electrode is provided on the first surface side of the semiconductor layer so as to overlap the second photoelectric conversion part in plan view, and a signal is transmitted from the second photoelectric conversion part to the floating diffusion part. charge; and An insulating spacer provided in the first diffusion isolation region separately from the floating diffusion on the first surface side of the semiconductor layer, and in the gate of each of the first and second transfer transistors in plan view extending between the electrodes. An electronic device comprising: a photodetection device; an optical lens that forms image light from a subject on an imaging surface of the photodetection device; and a signal processing circuit that processes a signal output from the photodetection device signal processing; and The aforementioned light detection device has: a semiconductor layer having a first face and a second face on opposite sides; the first and second photoelectric conversion parts are provided adjacent to each other on the aforementioned semiconductor layer via a diffusion separation region; a floating diffusion part provided in the diffusion isolation region on the first surface side of the semiconductor layer; The first transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps with the first photoelectric conversion part in a plan view, and photoelectrically converts a signal obtained by the first photoelectric conversion part. charges are transferred to the aforementioned floating diffusion; The second transfer transistor is provided on the side of the first surface of the semiconductor layer, and the gate electrode overlaps the second photoelectric conversion part in plan view, and photoelectrically converts the signal obtained by the second photoelectric conversion part. charge transfer to the aforementioned floating diffusion; and An insulating spacer is provided in the diffusion separation region separately from the charge storage portion, and extends between the gate electrodes of each of the first and second transfer transistors in plan view.

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