TW202226915A - Method of forming a patterned layer of material - Google Patents

Abstract

Methods of forming a patterned layer of material are disclosed. In one arrangement, a substrate having a layered structure is provided. The layered structure comprises a base layer, a support layer, and a thermally insulating layer between the base layer and the support layer. The support layer comprises a plurality of sub-units that are thermally insulated from each other. A selected portion of the support layer is selectively irradiated during a pattern-forming process. The irradiation locally drives the pattern-forming process to form a layer of material in a pattern defined by the selected portion.

Description

Method of forming a patterned material layer

The present invention relates to methods of forming patterned layers of material.

As semiconductor manufacturing processes have continued to advance, the size of circuit elements has continued to decrease, while the amount of functional elements such as transistors per device has steadily increased, following what is commonly referred to as "Moore's law" " trend. In order to keep up with Moore's Law, the semiconductor industry is seeking technologies that can produce smaller and smaller features.

For some types of electronic devices, scaling down device features can cause performance challenges, such as short channel effects that occur in MOSFETs when the channel length becomes comparable to the width of the depletion layer of the source and drain junctions. These challenges can sometimes be addressed using two-dimensional materials, which are atomically thin and can have relatively low dielectric constants.

Various deposition techniques exist for the fabrication of two-dimensional materials. Such deposition techniques include chemical vapor deposition (CVD), mechanical fracture (exfoliation), molecular beam epitaxy (MBE), atomic layer deposition (ALD), liquid phase exfoliation, and other deposition techniques. A challenge with many of these deposition techniques has been the high temperatures required for the process to work efficiently (at high speed and quality). High temperatures can degrade or damage previously deposited layers and/or limit the extent to which previously deposited layers can be used. The previously deposited layer must be formed such that it can withstand high temperatures to an acceptable level, eg, by making the melting point higher than that reached during the deposition process.

In exfoliation-based methods, two-dimensional materials can be grown offline without limiting temperature, but it is difficult to perform exfoliation and transfer procedures with high throughput and low defectivity.

Patterning 2D materials presents additional challenges due to their brittle nature. 2D materials can be extremely fragile or delaminated. Two-dimensional materials can be damaged, for example, by conventional patterning procedures such as resist coating, lithography, etching, and resist stripping. Typical photoresists for DUV and EUV lithography may also be incompatible with 2D materials because they are hydrophilic and 2D materials are hydrophobic. Even with great care during processing, this physical incompatibility can cause resist residues to stick unnecessarily to the structure and degrade the quality of the contact between the structure and other layers.

Laser etching has been proposed to pattern two-dimensional materials. Laser etching uses a laser to locally heat a surface to gradually melt and remove material by evaporation. Laser processing techniques rely on point-by-point scanning, which reduces yield relative to some alternative methods.

It is an object of the present invention to provide alternative or improved methods for forming patterned layers.

According to one aspect, there is provided a method of forming a patterned material layer, comprising: providing a substrate having a layered structure including a base layer, a support layer, and thermal insulation between the base layer and the support layer layer, wherein: the thermally insulating layer has a lower thermal conductivity than the support layer; the support layer includes a plurality of subunits thermally insulated from each other in the plane of the support layer; and the method includes selectively radiating radiation during a patterning process A selected portion of the support layer is irradiated with respect to locally driving the patterning process in the selected portion and thereby forming a layer of material whose pattern is defined by the selected portion.

Accordingly, a method is provided that can form a patterned material layer without using a resist. This method provides flexibility and processing efficiency. The method is particularly suitable for processing (eg, deposition, etching, or modification) of two-dimensional materials for electronic devices, which may be susceptible to damage during alternative resist-based processing. The method also allows for in situ patterning (eg, growth) of 2D materials, which reduces the risk of damage associated with transporting 2D materials between different locations (eg, during exfoliation-based alternatives) and Handling complexity. The combination of the insulating layer and the support layer segmented into thermal insulator units reduces the rate at which heat from selective irradiation is dissipated away from the support layer. This combination thus increases the local temperature increase associated with selective irradiation. Increased local temperature increases the rate of patterning (eg, growth rate, etch rate, or modification rate) and formation by patterning procedures (eg, deposition by deposition procedures, etching by etching procedures, or modification by material modification procedures). quality) of the crystalline quality of the material. The localized temperature elevation properties reduce or avoid the risk of damage to the substrate. Increasing the patterning (eg, deposition, etch, or modification) speed increases throughput.

In some embodiments, the insulating layer comprises a multi-layer stack comprising layers of two-dimensional material. At least two adjacent two-dimensional material layers of the insulating layers may have different compositions relative to each other. Providing a two-dimensional material with a different composition than the surrounding layer provides lattice and/or mass density mismatch that reduces phonon transport, thereby improving thermal retention in the support layer.

In some embodiments, the subunits are provided in a subunit pattern that is spatially aligned with the pattern defined by the irradiated selected portion. Each subunit can then represent a thermal isolation structure, which can be treated separately from the other subunits by selective irradiation. For example, the pattern of deposited material may include a plurality of isolated portions of deposited material, each isolated portion being provided on a different one of the subunits. For example, isolating portions of deposited material can form channels for electronic devices, such as channels for 2D-FETs. Alternatively or additionally, the isolated portions of deposited material may form interconnects comprising two-dimensional material deposited in the trenches.

In some embodiments, the method further includes applying supplemental radiation to increase the temperature of the support layer during the selective irradiation of the selected portion. The supplemental irradiation may have a less refined spatial resolution than the selective irradiation. The supplemental irradiation may comprise flood exposure. The supplemental irradiation can raise the overall average temperature of the support layer so that the temperature increase that needs to be achieved by selective irradiation is not as high as would be achieved otherwise. Furthermore, the supplemental irradiation can reduce the temperature difference between the selected portion and the surrounding area, thereby reducing the rate of heat conduction away from the selected portion.

A lithography apparatus is a machine constructed to apply a desired pattern onto a substrate. Lithographic equipment can be used, for example, in the manufacture of integrated circuits (ICs). For example, a lithography apparatus can project a pattern at a patterning device (eg, a mask) onto a layer of radiation-sensitive material (resist) disposed on a substrate.

In order to project the pattern on the substrate, a lithography apparatus may use electromagnetic radiation. The wavelength of this radiation determines the minimum size of the features patterned on the substrate. Typical wavelengths currently in use are 365 nm (i-line), 248 nm, 193 nm and 13.5 nm. Compared to the use of lithography equipment with radiation having a wavelength of, for example, 193 nm, the use of radiation with A lithography apparatus using extreme ultraviolet (EUV) radiation at wavelengths of 13.5 nm or 13.5 nm can be used to form smaller features on a substrate.

In this document, unless stated otherwise, the terms "radiation" and "beam" are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (eg, having a wavelength of 365, 248, 193, 157 or 126 nm) and polar Ultraviolet radiation (EUV, eg, having wavelengths in the range of about 5 to 100 nm), and electron beam radiation.

Figure 1 schematically depicts a lithography apparatus LA. The lithography apparatus LA includes: an illumination system (also called an illuminator) IL configured to condition a radiation beam B (eg, UV radiation, DUV radiation, or EUV radiation); a mask support (eg, a mask stage) MT constructed to support a patterning device (eg, a mask) MA and connected to a first positioner PM configured to accurately position the patterning device MA according to certain parameters; a substrate support (eg, a wafer table) WT constructed to hold a substrate (eg, a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate support according to certain parameters; and a projection system (eg, a refractive projection lens system) PS configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (eg, comprising one or more dies) of the substrate W .

In operation, the illumination system IL receives a radiation beam from the radiation source SO, eg via the beam delivery system BD. The illumination system IL may include various types of optical components for directing, shaping, and/or controlling radiation, such as refractive, reflective, magnetic, electromagnetic, electrostatic, and/or other types of optical components, or any combination thereof. The illuminator IL can be used to condition the radiation beam B to have the desired spatial and angular intensity distribution in its cross-section at the plane of the patterning device MA.

The term "projection system" PS as used herein should be construed broadly to encompass various types of projection systems suitable for the exposure radiation used and/or for other factors such as the use of immersion liquids or the use of vacuum, including Refractive, reflective, catadioptric, synthetic, magnetic, electromagnetic and/or electrostatic optical systems or any combination thereof. Any use of the term "projection lens" herein may be considered synonymous with the more general term "projection system" PS.

The lithography apparatus LA may be of a type in which at least a part of the substrate may be covered by a liquid with a relatively high refractive index, such as water, in order to fill the space between the projection system PS and the substrate W - this is also known as immersion lithography. More information on infiltration techniques is given in US6952253, which is incorporated herein by reference.

The lithography apparatus LA may also be of the type with two or more substrate supports WT (aka "dual stage"). In this "multi-stage" machine, the substrate supports WT can be used in parallel, and/or the steps of preparing the substrate W for subsequent exposure of the substrate W on one of the substrate supports WT can be performed while the The other substrate W on the other substrate support WT is used for exposing a pattern on the other substrate W.

In addition to the substrate support WT, the lithography apparatus LA may also include a metrology stage. The measurement stage is configured to hold the sensor and/or the cleaning device. The sensors may be configured to measure properties of the projection system PS or properties of the radiation beam B. The measurement stage can hold multiple sensors. The cleaning device may be configured to clean parts of the lithography apparatus, eg, part of the projection system PS or part of the system that provides the immersion liquid. The metrology stage can be moved under the projection system PS when the substrate holder WT is away from the projection system PS.

In operation, the radiation beam B is incident on a patterning device held on the mask support MT, such as the mask MA, and is patterned by the pattern (design layout) present on the patterning device MA. Having traversed the mask MA, the radiation beam B passes through the projection system PS, which focuses the beam onto the target portion C of the substrate W. By means of the second positioner PW and the position measurement system IF, the substrate support WT can be moved accurately, eg in order to position the different target parts C in the path of the radiation beam B at the focused and aligned position. Similarly, a first positioner PM and possibly another position sensor (which is not explicitly depicted in FIG. 1 ) can be used to accurately position the patterning device MA relative to the path of the radiation beam B. Patterning device MA and substrate W may be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2. Although the substrate alignment marks P1, P2 as illustrated occupy dedicated target portions, they may be located in the spaces between the target portions. When the substrate alignment marks P1, P2 are located between the target portions C, these substrate alignment marks are called scribe lane alignment marks.

Figure 2 shows a lithography system comprising a radiation source SO and a lithography apparatus LA. The radiation source SO is configured to generate the EUV radiation beam B and supply the EUV radiation beam B to the lithography apparatus LA. Lithography apparatus LA includes illumination system IL, support structure MT configured to support patterning device MA (eg, a mask), projection system PS, and substrate table WT configured to support substrate W.

The illumination system IL is configured to condition the EUV radiation beam B before it is incident on the patterning device MA. Additionally, the illumination system IL may include a faceted field mirror device 10 and a faceted pupil mirror device 11 . The faceted field mirror device 10 and the faceted pupil mirror device 11 together provide a beam B of EUV radiation having a desired cross-sectional shape and a desired intensity distribution. In addition to or instead of the faceted field mirror device 10 and the faceted pupil mirror device 11, the illumination system IL may also include other mirrors or devices.

After so conditioning, the EUV radiation beam B interacts with the patterning device MA. Due to this interaction, a patterned EUV radiation beam B' is produced. Projection system PS is configured to project patterned EUV radiation beam B' onto substrate W. For that purpose, the projection system PS may comprise a plurality of mirrors 13, 14 configured to project the patterned EUV radiation beam B' onto the substrate W held by the substrate table WT. Projection system PS may apply a reduction factor to patterned EUV radiation beam B', thus forming an image with features smaller than corresponding features on patterning device MA. For example, a reduction factor of 4 or 8 may be applied. Although projection system PS is illustrated in Figure 2 as having only two mirrors 13, 14, projection system PS may include a different number of mirrors (eg, six or eight mirrors).

The substrate W may include previously formed patterns. In this case, the lithography apparatus LA aligns the image formed by the patterned EUV radiation beam B' with the pattern previously formed on the substrate W.

A relative vacuum, ie a small amount of gas (eg, hydrogen) at a pressure well below atmospheric pressure, may be provided in the radiation source SO, in the illumination system IL, and/or in the projection system PS.

The radiation source SO can be a laser produced plasma (LPP) source, a discharge produced plasma (DPP) source, a free electron laser (FEL) or any other source capable of producing EUV radiation other radiation sources.

As mentioned in the introductory portion of the description, despite the focus on using two-dimensional materials in semiconductor fabrication processes, challenges exist in achieving sufficiently high crystalline quality and/or yield and/or low defectivity. Deposition procedures such as CVD and ALD require high temperatures, which can damage the underlying layers. For example, typical CVD procedures used to fabricate high-quality monolayers of two-dimensional crystals may require temperatures above 800°C, and temperatures above 500°C are generally incompatible with back-end CMOS technology. For example, the thermal budget for Si FinFet (Fin Field Effect Transistor) is less than 1050°C for front end of line (FEOL) and less than 400°C for back end of line (BEOL). For 2D-FETs (field effect transistors based on 2D materials), this budget is much lower (typically 450°C to 500°C for both FEOL and BEOL). The exfoliation-based procedure avoids these thermal constraints because the deposition of two-dimensional material can be performed at separate locations, but the transfer procedure is complex and high defectivity is unavoidable. Traditional patterning procedures such as resist coating, lithography, etching, and resist stripping are also problematic because they can damage the two-dimensional material. Furthermore, conventional lithography techniques represent challenges for patterning 2D material layers. Due to the properties of these materials, the resulting structures are contaminated and/or damaged by rough edges after lithography (DUV, EUV, EBL) followed by (dry, wet) etching steps. Contacts to other layers, such as source and drain electrodes, are not optimal, resulting in approximately 3.5 times more Schottky barriers than would provide a clean and sharp interface.

An alternative method using EUV-induced deposition allows direct patterning of two-dimensional materials without any resist processing. Examples of such depositions are described in WO2019166318, WO2020207759 and in European patent application 20160615.9, all of which are hereby incorporated by reference in their entirety. However, with EUV-induced deposition, it can be difficult to achieve sufficiently high growth rates for two-dimensional materials. EUV dose (the amount of deposited energy per unit area by EUV radiation) is practically constrained to be below a predetermined EUV dose limit to avoid damage to irradiated surfaces and/or substrates. For example, a typical EUV dose limit may be 100 mJ/cm ² . Referring to Figure 3, the maximum EUV exposure time corresponding to the EUV dose limit can be calculated. FIG. 3 depicts the path 74 of the EUV exposure area 72 (slit) of the EUV projection apparatus over the substrate W to form the patterned field 70 . The following example configuration achieves an EUV dose of 20 mJ/ ^cm2 : Slit speed = 330 mm/s; Slit size = 26 mm x 3 mm; Field size = 26 mm x 33 mm; Exposure time per field = (33 + 3)/330; exposure time per pattern = approximately 9 ms. The maximum exposure time per pattern corresponding to an EUV dose limit of 100 mJ/cm ² would therefore be approximately 45 ms.

K：

4 is a graph showing the expected exponential relationship between the lateral growth rate of a two-dimensional material on a substrate and the temperature of the substrate. Figure 5 is a graph showing a linear change in time for lateral growth of 10 nm versus substrate temperature. The data points in Figures 4 and 5 are derived from Zhengwei Zhang, Peng Chen, Xiangdong Yang, Yuan Liu, Huifang Ma, Jia Li, Bei Zhao, Jun Luo, Xidong Duan, Xiangfeng Duan, and the comparison of single-layer WS ₂ and WSe ₂ Ultrafast Growth of Large Single Crystals, National Science Review, Vol. 7, No. 4, April 2020, pp. 737-744. The dashed line in Figure 5 indicates that to achieve 10 nm lateral growth during the available exposure time of 45 ms, the substrate temperature needs to be at least 500°C. However, for EUV exposure over a 100 nm area (corresponding to ¹⁰ nm lateral growth), at a dose of 100 ^mJ /cm, the expected corresponding temperature rise T _rise on a 30 nm In ₂ O ₃ substrate is only about approx.

K:

Embodiments of the present invention provide methods of forming patterned layers of material that use structural adaptations on substrates to better retain energy from irradiation, resulting in processes such as deposition, etching, or material modification. Larger temperature rise and rate of increase associated with patterning procedures.

The method can be applied to a substrate W having a layered structure, as illustrated in FIG. 6 . FIG. 6 depicts only a portion of the substrate W and the dimensions have been exaggerated for clarity. A layered structure consists of a plurality of layers arranged one on top of another. Hierarchical structures may be referred to as stacks. Each of these layers may be continuous or patterned. In one embodiment, the layered structure includes a base layer 80 , a support layer 84 and an insulating layer 82 . The insulating layer 82 is tied between the base layer 80 and the support layer 84 . The insulating layer 82 may or may not be in contact with the base layer 80 and/or the insulating layer 82 may or may not be in contact with the support layer 84 . The insulating layer 82 has a lower thermal conductivity than the support layer 84 (eg, averaged over the volume of the insulating layer 82). The insulating layer 82 may additionally have a lower thermal conductivity than the base layer 80 (and/or, in embodiments with other layers, a lower thermal conductivity than one of the more other layers below the support layer 84). Thus, the insulating layer 82 slows the rate of heat flow from the support layer 84 into the layers below the support layer 84 . For example, the base layer 80 may include a silicon substrate (silicon wafer). The support layer 84 may comprise any material on which a two-dimensional material needs to be formed as a step in a fabrication process (eg, in electronic devices such as 2D-FETs). Support layer 84 may include one or more of the following: Al ₂ O ₃ ; SiO ₂ ; HfO ₂ ; Sn; SnO ₂ ; In ₂ O ₃ ; indium tin oxide (ITO). Support layer 84 may especially preferably comprise one or more of Sn; SnO ₂ ; In ₂ O ₃ ; ITO.

之熱導率。由於絕熱層82可將底部閘極介電質與裝置層94分離，因此較薄的絕熱層82亦可藉由裝置上方之閘極促進有效靜電控制。個別層之厚度在3D整合中亦可為重要的，其中電晶體之若干層經豎直地堆疊。在一些實施例中，二維材料層包含以下各項之一或多個層：石墨烯；WSe ₂；MoS ₂；α-硒烯；α-碲烯。此等二維材料可相對直接地沈積，此係因為其不需要以經圖案化形式提供。該等層可以均一層均一地沈積。此外，此等二維材料層無需無缺陷，且可使用習知(低溫) CVD/ALD技術進行沈積。超低熱導率可使用非均質材料之堆疊獲得以妨礙垂直於界面之熱流。然而，當封裝在與聲子波長相當之距離內時，此等界面經耦合且因此對於散射低能聲子係無效的，此係歸因於跨越緊密封裝界面之相干聲子傳輸或低能聲子與界面之弱耦合。遵循Zheng等人之研究(經由石墨烯中低能量模式之稀缺，石墨烯/金屬異質結構之超低熱導率及熱擴散率；Weidong Zheng、Bin Huang及Yee Kan Koh；ACS應用材料與界面，2020 12(8)，9572-9579；DOI：10.1021/acsami.9b18290)，使用傳送石墨烯及超薄金屬薄膜之石墨烯/金屬異質結構，可藉由可用低能聲子模式之週期性分佈稀缺而阻止此等低能聲子之傳播。 The insulating layer 82 may comprise a homogeneous layer formed of a material having low thermal conductivity. The thermal resistance provided by the homogeneous layer depends on the thickness of the layer. Increasing the thickness of the layers will increase the thermal resistance. In some embodiments, the insulating layer 82 comprises a multi-layer stack comprising layers of two-dimensional material. At least two adjacent two-dimensional material layers may have different compositions relative to each other. Different compositions provide lattice and/or mass density mismatches that reduce phonon transport and thus thermal conductivity. As low as

the thermal conductivity. Since the insulating layer 82 can separate the bottom gate dielectric from the device layer 94, the thinner insulating layer 82 can also facilitate effective electrostatic control with the gate above the device. The thickness of individual layers can also be important in 3D integration, where several layers of transistors are stacked vertically. In some embodiments, the two-dimensional material layer comprises one or more layers of: graphene; WSe ₂ ; MoS ₂ ; alpha-selenene; alpha-telluene. These two-dimensional materials can be deposited relatively directly because they do not need to be provided in patterned form. The layers may be deposited uniformly in one layer. Furthermore, these two-dimensional material layers need not be defect free and can be deposited using conventional (low temperature) CVD/ALD techniques. Ultra-low thermal conductivity can be achieved using stacks of heterogeneous materials to impede heat flow perpendicular to the interface. However, when encapsulated within a distance comparable to the phonon wavelength, these interfaces are coupled and thus ineffective for scattering low-energy phonon systems due to coherent phonon transport across tightly packed interfaces or low-energy phonons and Weak coupling of interfaces. Following the study by Zheng et al. (Ultra-low thermal conductivity and thermal diffusivity of graphene/metal heterostructures via the scarcity of low-energy modes in graphene; Weidong Zheng, Bin Huang, and Yee Kan Koh; ACS Applied Materials and Interfaces, 2020 12(8), 9572-9579; DOI: 10.1021/acsami.9b18290), Graphene/metal heterostructures using transport graphene and ultrathin metal films, prevented by the scarcity of periodic distributions of available low-energy phonon modes The propagation of these low-energy phonons.

The support layer 84 can be adapted to limit the lateral diffusion of energy from irradiation. The combination of the adapted support layer 84 and the insulating layer 82 thus slows the loss of heat down through the layers below the support layer 84 and the lateral loss within the support layer 84 itself. In some embodiments, support layer 84 is configured to include a plurality of subunits 85 . Each sub-unit 85 is thermally insulated from every other sub-unit 85 in the plane of the support layer 84 (ie, thermally insulated from the main plane of the support layer 84, which will be horizontal and self-directed in the orientation of FIG. 6 . the page extends vertically). The thermal resistance between adjacent subunits 85 is thus higher than without thermal insulator 86 (eg, if the support layer is a uniform unpatterned layer). Thermal isolation between subunits 85 can be achieved in a fabrication process that involves cutting a previously uniform unpatterned layer in a pattern that defines the subunits 85 .

之尺寸之子單元85的由In ₂O ₃製成之支撐層84中之溫度升高 T _rise 可大致如下計算(出於論證目的假定藉由底層絕熱層之完全絕緣)： T _rise

T _rise 為室溫下之溫度升高，因此支撐層84之實際溫度將為大致

。可藉由選擇具有較低熱擴散率及/或較高(較精細)分段之支撐層84進一步增加溫度升高。實務上將發生穿過絕熱層82之一定熱洩漏，但此將不足以防止二維材料之生長速度的顯著改良。 As an argument for principle, subsections have

The temperature rise T _rise in the support layer 84 made of In ₂ O ₃ for the sub-unit 85 of size can be calculated approximately as follows (assuming complete insulation by the underlying insulating layer for demonstration purposes): T _rise

T _rise is the temperature rise at room temperature, so the actual temperature of the support layer 84 will be approximately

. The temperature increase can be further increased by selecting a support layer 84 with lower thermal diffusivity and/or higher (finer) segmentation. In practice some heat leakage through the insulating layer 82 will occur, but this will not be sufficient to prevent a significant improvement in the growth rate of the two-dimensional material.

其中穿過支撐層84之頂部表面的熱通量 q被給出為

其中 z表示垂直於基板W之平面之豎直方向。對於

之劑量及

之曝光時間，已發現，分段支撐層84之表面溫度對於完全絕緣絕熱層82可升高至

且對於50%絕緣可升高至

。可因此達成在許多情境下支援高效輻射誘發沈積的溫度。 The surface temperature for various degrees of heat leakage through the insulating layer 82 can be calculated by solving partial differential equations

where the heat flux q across the top surface of the support layer 84 is given as

where z represents the vertical direction perpendicular to the plane of the substrate W. for

dose and

exposure time, it has been found that the surface temperature of the segmented support layer 84 can be increased to

and for 50% insulation can be raised to

. Temperatures that support efficient radiation-induced deposition in many scenarios can thus be achieved.

Accordingly, a method of applying radiation induced deposition to a substrate of the type described above with reference to FIG. 6 can be provided. Exemplary methods are described below with reference to FIGS. 7 and 8 . These methods illustrate embodiments in which support layer 84 is irradiated to form patterned material layer 30 during a patterning process and the patterning process includes a deposition process. Corresponding methods may be implemented in which the patterning procedure includes an etching procedure or a material modification procedure, as described below with reference to FIGS. 27-29 .

In embodiments where the patterning process includes a deposition process, support layer 84 is irradiated to form patterned material layer 30 during the deposition process. As depicted in FIG. 7, the method includes selectively irradiating 34 selected portions 32 of the support layer 84 during the deposition process. Irradiation may thus be applied only in selected portions 32 and not elsewhere on support layer 84 . In one embodiment, the patterned layer comprises, consists essentially of, or consists of a two-dimensional material. Two-dimensional materials are materials that exhibit significant anisotropy in the lateral direction within the plane of the material compared to the direction perpendicular to the plane of the material. One class of two-dimensional materials is sometimes referred to as monolayer materials or monolayers, and can comprise crystalline materials consisting of a single layer of atoms or a small number of monolayer atoms on top of each other. In some embodiments, the two-dimensional material comprises, consists essentially of, or consists of one or more of: one or more 2D allotropes, such as graphene and antimonene; one or more inorganic compounds, such as MXene, hexagonal boron nitride (hBN), and transition metal dichalcogenides (TMD) (MX ₂ type semiconductors, which are at the atomic level can be thin, where the letter M represents a transition metal atom (eg, Mo or W) and the letter X represents a chalcogen atom (eg, S, Se, or Te), such as WS ₂ , MoS ₂ , WSe ₂ , MoSe ₂ and so on. The two-dimensional material may comprise a layer of M atoms sandwiched between two layers of X atoms. The two-dimensional material may comprise any semiconductor two-dimensional material suitable for use as a transistor channel. As mentioned above, the two-dimensional material can damage 2D allotropes, such as graphene or antimonene; or inorganic compounds. The two-dimensional material may comprise a monolayer (or monolayers, if the deposition procedure is repeated). In the embodiment shown, the deposition process is an atomic layer deposition process. In other embodiments, different deposition procedures or combinations of deposition procedures are used, including, for example, the use of one or more of the following, independently or in combination: atomic layer deposition; chemical vapor deposition; plasma enhanced chemical vapor deposition deposition; epitaxy; sputtering; and electron beam induced deposition. The formation of patterned material layer 30 may constitute a step in a method of forming at least one layer of a device to be fabricated, such as a semiconductor device. For example, the two-dimensional material can form metal caps or diffusion barriers in the channels or interconnects of FETs.

In one embodiment, the irradiation is performed using radiation capable of locally driving the deposition process. In one embodiment, the radiation comprises, consists essentially of, or consists of any type of EUV radiation (having a wavelength less than 100 nm) capable of locally driving the deposition process. The use of EUV radiation provides high spatial resolution. In some other embodiments, irradiation is performed using radiation comprising, consisting essentially of, or consisting of higher wavelength radiation, as appropriate, in conjunction with an infiltrating liquid, as described below. Higher wavelength radiation may be in the range of 100 nm to 400 nm (including DUV radiation).

Irradiation drives the deposition process locally in selected portions 32, and thereby causes layers of deposited material 30 to be formed in a pattern defined by selected portions 32 (see FIG. 8). The pattern is thus formed without any resist. A process to remove the resist is therefore not required, which reduces the risk of damaging the patterned material layer 30 or any fragile underlying material. This method is especially desirable where resist residue can significantly affect the properties of the fragile underlying material and/or where stripping of the resist can significantly damage the fragile underlying material. Examples of fragile underlying materials include extremely thin film coatings, 2D materials such as graphene or transition metal dichalcogenides (TMDs), and self-supporting films or thin films. In contrast to traditional lithography-based semiconductor fabrication processes, radiation is being used to drive one or more of the chemical reactions involved in the deposition process, rather than being used to destroy or cross-link molecules in the resist.

Atomic layer deposition is a known thin film deposition technique in which each of at least two chemicals, which may be referred to as precursor materials, are reacted with the surface of the material in a continuous, self-limiting manner. In contrast to chemical vapor deposition, the two precursor materials are generally not present over the substrate W at the same time.

In at least some embodiments using atomic layer deposition, atomic layer deposition includes at least a first step and a second step. In a first step, an example of which is depicted in FIG. 7 , a first precursor material 51 is reacted with the surface of the substrate W. In a second step (an example of which is depicted in FIG. 8 ), a second precursor material 52 is allowed to interact with the region (in this example, selected portion 32 ) in the region where the first precursor 51 reacted with the substrate W in the first step. The substrate W reacts.

Figure 9 schematically depicts an apparatus 60 for carrying out the method. Device 60 thus forms a layer of patterned material. Apparatus 60 contains an irradiation system. The irradiation system may comprise a lithography apparatus LA. The lithography apparatus LA irradiates the selected portion 32 by projecting the patterned radiation beam from the patterning device MA onto the substrate W. The lithography apparatus LA may be configured as described above with reference to FIG. 1 (eg, when the irradiation includes DUV radiation and/or requires immersion lithography) or as described above with reference to FIG. 2 (eg, when the irradiation when including EUV radiation).

In one embodiment, the lithography apparatus LA is configured to perform immersion lithography. In this embodiment, the atomic layer deposition process may include the step of irradiating the selected portion 32 while it is in contact with the wetting liquid. Thus, for example, an atomic layer deposition process may comprise: a first step comprising adsorbing a precursor from a gaseous precursor material to the substrate W; and a second step wherein a selected The adsorbed precursor in section 32 is upgraded (eg, to remove by-products of the adsorption process). Any by-products generated by irradiation through the impregnating liquid are conveniently carried away by the impregnating liquid flow. In one embodiment, the irradiated substrate W is then dried and any other desired processing is performed on the dried substrate W.

In one embodiment, an environmental control system 45 is provided. The environmental control system 45 allows the composition of the environment 42 over the substrate W to be controlled in a manner that allows the deposition process to proceed. In one embodiment, the environmental control system 45 includes a chamber 36 to provide a sealed environment 42 that includes selected portions 32 of the support layer on the substrate W. In some embodiments, the entirety of the substrate W will be within the chamber 36 during a deposition process (eg, an atomic deposition process). In one embodiment, a material exchange system 38 (eg, ports and associated valves and/or conduits into the chamber 36) is provided that allows material to be added to and removed from the sealed environment 42 to allow Within this sealed environment 42 different compositional environments are established. Materials may be provided to and from material exchange system 38 by flow manager 44 . Flow manager 44 may include any suitable combination of reservoirs, pipes, valves, tanks, pumps, control systems, and/or other components necessary to provide the desired flow of material into and out of chamber 36 . The different compositional environments achieved in this way may correspond to different individual stages of the deposition process. In some embodiments, the materials added to and removed from the chamber 36 are gaseous, thereby providing a compositional environment consisting of different combinations of gases. In embodiments in which one or more steps of the deposition process are performed by irradiating the substrate W through the immersion liquid, the environmental control system 45 may be configured to allow a controlled liquid environment to be maintained over the substrate W ( For example, switching between exposure in immersion lithography mode) and maintaining a controlled gaseous environment over substrate W (eg, during adsorption of precursors from gaseous precursor materials).

In some embodiments, driving the deposition process in selected portions 32 includes driving chemical reactions involving precursor materials. Precursor materials will be provided as part of the constituent environment established over the substrate during irradiation. Driving a chemical reaction can cause the chemical reaction to proceed at a faster rate than in the absence of irradiation. Alternatively, the chemical reaction may be a chemical reaction that would not occur at all in the absence of irradiation. In one embodiment, the chemical reaction is endothermic and the irradiation provides the energy necessary to allow the chemical reaction to proceed. In some embodiments, the chemical reaction is driven at least in part by heat generated in the substrate W by irradiation. Thus, irradiation-driven chemical reactions may include chemical reactions that require elevated temperatures to proceed or proceed more rapidly at elevated temperatures. In some embodiments, the chemical reaction comprises an irradiation-driven photochemical reaction. Thus, at least one species involved in the chemical reaction absorbs photons directly from the irradiation, and the absorption of the photons allows the chemical reaction to proceed. In some embodiments, the photochemical reaction comprises a multiphoton photochemical reaction involving the absorption of two or more photons by each of the at least one species involved in the photochemical reaction. The requirement to absorb two or more photons makes the chemical reaction more sensitive to changes in irradiation intensity (ie, the rate of the chemical reaction changes more strongly with changes in intensity) than is the case for single-photon photochemical reactions . Increased sensitivity to intensity provides improved lateral contrast. In one embodiment, a combination of photochemical reactions and radiation-induced heating is used to provide a well-defined program window in which chemical reactions are locally driven to generate patterns. In one embodiment, the chemical reaction is driven by a plasma generated by the interaction of radiation with the substrate W, a layer formed on the substrate W, and/or a gas present above the substrate. In one embodiment, the generated plasma is generated in a localized region defined by the irradiation. In one embodiment, the chemical reaction is driven by electrons provided by irradiation. Electrons may include photoelectrons or secondary electrons (electrons generated by inelastic scattering events of photoelectrons or electrons from an electron beam). In one embodiment, photons absorbed by the substrate W may provide high-energy electrons near the surface of the substrate W that participate in the deposition process. In embodiments using a combination of electromagnetic radiation and an electron beam, part of the deposition process may be driven by electrons from the electron beam.

In some embodiments, the flow kinetics of gaseous/liquid co-reactants and/or catalysts and/or precursors are controlled during the deposition process. Control over flow dynamics can improve the quality of the deposited material. Control of flow dynamics may include control of flow direction (or the vector flow field of flow). Alternatively or additionally, control of flow dynamics may include control of flow rate including, for example, providing pulsed flow. In one embodiment, control of the flow dynamics is performed to locally and/or temporally generate high-density correlated particles near the deposition site and low-density particles near other surfaces (eg, optics).

In some embodiments, the compositional environment is controlled to provide different gas mixtures at different times. Different gas mixtures can be provided to deposit different materials or to switch between a mode of depositing material and a mode of etching away material. Different gas mixtures can also be used to controllably vary the deposition rate over time, which can be used, for example, to create features with well-defined edges and/or shapes.

In some embodiments, pre-charging and/or continuous charging are used to control charge balancing during the deposition process. For example, pre-charging and/or continuous charging may be provided using an electron flood gun or by a light emission mechanism (eg, using a laser).

Low energy electrons, such as secondary or backscattered electrons escaping from the substrate-vacuum interface, can induce chemical reactions with molecules on or above the substrate surface. The rate of the reaction depends on the number and energy of low-energy electrons present. For non-conductive materials, the emission of electrons from the substrate (eg, by EUV irradiation) causes the substrate W to be positively charged. This charging affects the yield of electrons from substrate W and the trajectory and energy of electrons leaving substrate W. The charging thus affects the electron density on or above the substrate surface and can be used to control the reaction rate during deposition or other processes. Use of an electron flood gun allows for additional positive or negative sample charging (depending on the beam guide energy). The use of a laser beam causes additional positive charging via the photoelectric effect. Further program control can be achieved by tuning the electron beam energy or laser beam wavelength to vary the average depth of generated electrons.

In the example of FIGS. 7 and 8 , the substrate W is irradiated only in the first step of atomic layer deposition. In other embodiments, the irradiation of selected portions 32 is performed only during the second step or during both the first step and the second step. In embodiments that do not involve an infiltration liquid, the irradiation of selected portions 32 of at least one of the two steps may be performed using EUV radiation. Irradiation may additionally be performed in one or more other steps using other forms of irradiation including DUV radiation (with or without immersion liquid).

In some embodiments, the method includes applying supplemental radiation to increase the temperature of support layer 84 during selective radiation of selected portions 32 . Supplemental irradiation may be applied before and/or during selective irradiation. Supplemental irradiation has a less refined (lower resolution) spatial resolution than selective irradiation. In one embodiment, a lithography apparatus LA using EUV radiation is used to provide selective irradiation of selected portions 32 . A patterning device (eg, a mask) can be used to define the pattern of selective radiation. This method achieves a high level of localization, sharp edges, pitch and critical dimension (CD). Supplemental irradiation can also be provided by an EUV irradiation system (eg, without a patterning device and/or with a different, lower resolution patterning device and/or with defocusing to spread the irradiation over a larger area). Alternatively, supplemental irradiation may be performed using a different radiation system (eg, a radiation system using longer wavelength radiation, such as infrared radiation). Supplemental radiation may be referred to as flood exposure, where no patterning device is used or where the radiation is otherwise sufficiently diffused such that the support layer is irradiated substantially uniformly by the supplemental radiation. Supplemental irradiation can raise the overall average temperature of support layer 84 so that the temperature increase that needs to be achieved by selective irradiation is not as high as would be achieved otherwise. In addition, the supplemental irradiation can reduce the temperature difference between the selected portion 32 and the surrounding area, thereby reducing the rate of heat conduction away from the selected portion 32 . Alternatively or additionally, a substrate heater may be provided that heats the substrate W via a substrate stage on which the substrate W is supported.

An example apparatus for performing selective irradiation and supplemental irradiation is shown in FIG. 10 . In the example shown, lithography apparatus LA is used to provide selective irradiation 34 to drive the deposition process. Another radiation system 70 is used to provide supplemental radiation. The lithography apparatus LA and the further radiation system 70 may use different radiation sources. This approach allows each radiation source to be optimized for the respective process it needs to perform (ie, driving the deposition process or providing a background temperature increase). In the example of FIG. 10 , the lithography apparatus LA and another radiation system 70 irradiate the substrate W from its opposite side. This method provides greater flexibility in positioning the hardware to perform individual irradiation procedures. In other embodiments, the selective irradiation and supplemental irradiation are applied from the same side of the substrate W.

In another configuration, as illustrated in FIG. 11 , EUV radiation (eg, having less than 100 nm, optionally in the range of 5 nm to 100 nm, optionally 4 nm to range of 20 nm, such as wavelengths of 6.7 nm or 13.5 nm) in combination with one or more of the following applied by the second radiation system 182 during the driving of the deposition process to perform selected portions 32 for driving the deposition process Selective radiation of: electron beam; radiation with wavelengths in the range of 100 nm to 400 nm; and laser radiation. In the example of FIG. 11 , the EUV lithography apparatus acts as the first irradiation system LA and the electron beam source acts as the second irradiation system 182 .

The driving of the deposition process by EUV radiation often occurs primarily due to the interaction of EUV radiation with a solid material (eg, substrate W or a layer formed on substrate W) to release electrons from the solid material and thereby form a plasma. The plasma drives the chemical reactions associated with the deposition process. The use of electron beams in conjunction with EUV radiation provides high concentrations of electrons and/or further promotes the breaking of bonds to generate reactive species, thereby promoting faster deposition of materials.

In some embodiments, the subunits 85 are provided in a subunit pattern that is spatially aligned with the pattern defined by the irradiated selected portion 32 . For example, both the subunit pattern and the pattern defined by the irradiated selected portions 32 can be periodic, having the same periodicity in at least one direction in the plane of the substrate W. Features in the different unit cells of the sub-unit pattern will thus always align with corresponding features in the unit cells of the pattern defined by the irradiated selected portion 32 . In some embodiments, subunit 85 is formed by etching trench 86 through support layer 84 . The pattern of deposited material defined by selected portions 32 may then be such that a plurality of isolated portions of deposited material are provided and each isolated portion is provided on a different one of the subunits 85 defined by trenches 86 . Each of the isolated portions of deposited material may be equal to or smaller in area than the subunit 85 on which the isolated portion is provided. The trenches 86 can thus define the island-shaped sub-units 85 in the support layer 84 and can deposit distinct isolated portions of the deposition material on each of the island-shaped sub-units 85 . The spatial resolution of the selective irradiation must be fine enough to facilitate localized deposition over areas of the same size as subunits 85 or smaller than those subunits. These concepts are exemplified by the embodiments described below with reference to FIGS. 12-31 and an exemplary application with respect to fabricating 2D-FETs.

12-26 depict example program flows for forming 2D-FETs using the methods described above. Corresponding process flows can be used to form devices that perform other functions from the deposited two-dimensional material. For example, two-dimensional materials can be deposited in trenches (eg, without source/drain or gate dielectrics) for use as interconnects.

12 depicts the first stage in an example process flow for forming a 2D-FET. A substrate W including a layered structure is provided. The layered structure includes a base layer 80 (eg, a silicon wafer), a support layer 84 and an insulating layer 82 . The hierarchical structure may be in any of the forms discussed above with reference to FIG. 6 . In the example shown, the layered structure further includes a lower dielectric layer 92 . The lower dielectric layer 92 can be configured to act as the bottom gate dielectric of the 2D-FET. In one configuration, the lower dielectric layer 92 comprises, consists essentially of, or consists of HfO ₂ . The layered structure further includes a spacer layer 91 . For example, spacer layer 91 may comprise, consist essentially of, or consist of SiO ₂ . The spacer layer 91 may have the same composition as the support layer 84 . Various different thicknesses can be selected for each of the layers of the layered structure. In one configuration: spacer layer 91 has a thickness of 40 nm and includes _SiO2 ; lower dielectric layer 92 has a thickness of 10 nm and includes _HfO2 ; and support layer 84 has a thickness of 5 nm and includes _SiO2 .

FIG. 13 depicts a stage after processing the configuration of FIG. 12 to etch trenches 86 through support layer 84 . In this example, trenches 86 extend through all layers above base layer 80 . Trenches 86 segment support layer 84 to form subunits 85 in a subunit pattern. The subunit pattern is periodic in the horizontal direction in the plane of the page and in the direction into the page (not shown).

FIG. 14 depicts the stage after processing the configuration of FIG. 13 to provide source material unit 95 and drain material unit 96 in device layer 94 on each subunit 85 of support layer 84 . Source material unit 95 and drain material unit 96 may be formed of any material suitable for serving as a source and/or drain in a 2D-FET, such as Ti, TiN and/or W. Source material unit 95 and drain material unit 96 can be deposited by conventional lithography processes (eg, resist coating, lithography, etching, resist stripping, etc.) or using EUV induced deposition (without resist ) formed. If a conventional lithography process is used, an efficient cleaning procedure would be required to limit the presence of contamination at the edge-interfaced source/drain electrodes.

FIG. 15 depicts a stage after processing the configuration of FIG. 14 to deposit a region 97 of two-dimensional material in the space between the source material unit 95 and the drain material unit 96 of each subunit 85 . The two-dimensional material constitutes a patterned material layer, which can be formed using any of the methods of forming a patterned material layer described herein. Two-dimensional material can thus be deposited by selectively irradiating selected portions 32 of support layer 84 during the deposition process. In this case, the resulting pattern of selected portions 32 and deposited material includes a plurality of isolated portions of deposited material. Each isolation portion is provided on a different one of the subunits 85 . The area 97 on each subunit 85 is an example of this isolated portion. The subunit pattern is spatially aligned with the pattern defined by the irradiated selected portion 32 . Each subunit 85 is spatially aligned with one of the regions 97 of two-dimensional material that form part of the pattern defined by the irradiated selected portion 32 . The pattern defined by the irradiated selected portions 32 is periodic in the horizontal direction in the plane of the page, having the same periodicity as the sub-unit pattern. The regions 97 corresponding to the isolated portions of deposited material each form the same component of a different electronic device to be fabricated (in this example, the regions each form the channel of the 2D-FET). The two-dimensional material may comprise any semiconducting two-dimensional material suitable for use as a transistor channel, such as TMD (eg, WS2, MoS2, _WSe2 , _MoSe2 ), _MXene , graphene, or _antimonene .

FIG. 16 depicts a stage after processing the configuration of FIG. 15 to provide an upper dielectric layer 99 . The upper dielectric layer 99 can be configured to act as the top gate dielectric of the 2D-FET. In the case of nanosheets and gate all around (GAA), the 2D layer of two-dimensional material can be fully coated with a gate dielectric. In one configuration, upper dielectric layer 99 comprises, consists essentially of, or consists of HfO ₂ . The layered structure further includes a spacer layer 98 between the upper dielectric layer 99 and the device layer 94 . For example, spacer layer 98 may comprise, consist essentially of, or consist of _SiO2 . Spacer layer 98 may have the same composition as support layer 84 .

The process flow of FIGS. 12-16 is required because the insulating layer 82 is provided directly under the support layer 84 . This configuration facilitates a localized temperature increase in support layer 84 . However, it is also possible to provide a process flow in which the stacking order of the insulating layer 82 and the lower dielectric layer 92 (acting as the bottom gate dielectric) is reversed. Therefore, in this process flow, the insulating layer 82 will be below the lower dielectric layer 92 . All other elements of the program flow may be in any of the forms described above with reference to FIGS. 12-16 .

，較佳地高於

，較佳地高於約

。在一些實施例中，底層100包含以下各項中之一或多者：In ₂O ₃、ITO、SnO ₂、Sn。底層100之厚度可經選擇以達成所要吸收量。舉例而言，具有10 nm、20 nm、30 nm及40 nm之厚度的由ITO製成之底層分別粗略地吸收EUV光子之47%、72%、85%及92%。底層100可尤其適用，因為支撐層84之材料理想地選擇為適合於二維材料之生長。支撐層84可能不適合於吸收與輻照相關聯的所有入射光子。可將光子之一部分傳輸至支撐層84下方之層。底層100之提供允許在絕熱層82上方吸收此等殘餘光子中之所有或大多數，由此產生的熱可有助於沈積程序之局部驅動。 FIGS. 17-21 depict a variation of the process flow of FIGS. 12-16 in which an additional bottom layer 100 is provided below the support layer 84 . This bottom layer 100 may be provided between and/or in direct contact with the insulating layer 82 and the support layer 84 . All other elements of the program flow may be in any of the forms described above with reference to FIGS. 12-16 . Alternatively, a thermal insulating layer 82 may be provided below the lower dielectric layer 92 . Bottom layer 100 can be configured to absorb substantially all radiation that penetrates support layer 84 (ie, all or most of the residual photons transmitted from support layer 84) during selective irradiation and thereby help to preserve Thermal energy derived from irradiation above thermal insulation layer 82. Bottom layer 100 may include one or more elements having a high atomic absorption rate cross-section, eg, above about

, preferably higher than

, preferably higher than about

. In some embodiments, the bottom layer 100 includes one or more of the following: In ₂ O ₃ , ITO, SnO ₂ , Sn. The thickness of the bottom layer 100 can be selected to achieve the desired amount of absorption. For example, bottom layers made of ITO with thicknesses of 10 nm, 20 nm, 30 nm and 40 nm roughly absorb 47%, 72%, 85% and 92% of EUV photons, respectively. Bottom layer 100 may be particularly suitable because the material of support layer 84 is ideally selected for the growth of two-dimensional materials. The support layer 84 may not be suitable for absorbing all incident photons associated with radiography. A portion of the photons may be transmitted to the layer below the support layer 84 . The provision of the bottom layer 100 allows all or most of these residual photons to be absorbed above the insulating layer 82, and the heat generated thereby can aid in the local drive of the deposition process.

22-26 depict variations of the process flow described above, in which the spacer layer 91 and the lower dielectric layer 92 are omitted. All other elements of the program flow may be in any of the forms described above with reference to FIGS. 12-16 and 17-21.

In some embodiments, a variation of the method described above with reference to FIGS. 6-26 is provided, wherein the patterning process includes an etching process rather than a deposition process. In such embodiments, a substrate W having a layered structure is provided. The substrates and layered structures may be in any of the forms and/or compositions described above, eg, with reference to FIG. 6 . The layered structure may thus include a base layer 80 , a support layer 84 , and an insulating layer 82 . The insulating layer 82 has a lower thermal conductivity than the support layer 84 . The support layer 84 includes a plurality of subunits 85 . The subunits 85 are thermally insulated from each other in the plane of the support layer 84 . Base layer 80 , support layer 84 , insulating layer 82 , and subunit 85 may each be in any of the forms and/or compositions described above, eg, with reference to FIG. 6 . The support layer 84 can thus be adapted to limit the lateral diffusion of energy from irradiation. The combination of the adapted support layer 84 and the insulating layer 82 thus slows the loss of heat down through the layers below the support layer 84 and the lateral loss within the support layer 84 itself.

The method includes selectively irradiating selected portions of the support layer 84 during the patterning process. The irradiation drives the patterning process locally in selected portions. Local actuation of the patterning process forms a layer of material whose pattern is defined by selected portions. Selective irradiation can be performed in any of the ways described above with reference to FIGS. 7-11 , including using EUV radiation of any type (having wavelengths less than 100 nm), including basic radiation on which it consists or consists. Facilitates local actuation of the patterning process by increasing the local temperature achieved by irradiation during the patterning process without causing excessive heating of other components through the mitigation of downward and lateral heat loss by the support layer 84 and the thermal insulation layer 82 effect.

As mentioned above, in some embodiments, the patterning process includes an etching process of the target layer 110 . In such embodiments, irradiation of selected portions is performed through the target layer 110 . Irradiation of selected portions locally drives the etching process. Example implementations are schematically depicted in FIGS. 27 and 28 . Figure 27 depicts the substrate W prior to the etching process. The substrate W may be the same as the substrate W depicted in FIG. 6 , except that the target layer 110 is provided on the support layer 84 . The target layer 110 may comprise a two-dimensional material, preferably a single layer. The two-dimensional material can be in any of the two-dimensional material forms discussed above. The two-dimensional material can be grown, for example, using any known method for growing two-dimensional materials, including one or more of the following: CVD, metal organic chemical vapor deposition (MOCVD), ALD, and MBE. The two-dimensional material may be deposited in a spatially uniform layer to form the target layer 110 . In the example of FIG. 27, target layer 110 is formed by depositing a spatially uniform layer of two-dimensional material and then forming trenches 86 through the two-dimensional material. Trenches 86 extend through support layer 84 to form subunits 85 . FIG. 28 shows example results of applying this etch procedure to the configuration shown in FIG. 27 . The etch process selectively removes material from the target layer 110 to form etched regions 112 . In the embodiment shown, etched region 112 is smaller than subunit 85 in at least one dimension. Local drive of the etching process is provided at least in part by a local increase in temperature caused by irradiation. The slowing of the lateral heat flow in the support layer 84 by the presence of the subunits 85 causes a larger temperature increase near the etched region 112 compared to the case of the uniform support layer 84 (without the subunits). The etch process is thus driven efficiently (eg, to proceed more rapidly) without the temperature rising excessively elsewhere. The previously deposited layer can thus avoid reaching a temperature that would be high enough to damage the previously deposited layer (eg, by causing melting). The etch rate of the etch process can also be controlled with a high degree of flexibility by modifying one or more of the following: the material and/or thickness of the base layer 80, the insulating layer 82 and/or the support layer 84; the size and/or shape.

As mentioned above, in some embodiments, the patterning procedure includes a material modification procedure. Irradiation of selected portions locally drives the material modification process. FIG. 29 schematically depicts the result of applying a material modification procedure to the configuration of FIG. 27 to provide modified regions 114 . In some embodiments, the material modification procedure includes modification of a precursor material used in the deposition procedure. For example, the precursor material may be modified in a manner that causes subsequent deposition procedures to selectively cause deposition of material on portions of the precursor material that have been modified and not elsewhere. Alternatively, the precursor material may be modified in a manner such that subsequent deposition procedures cause deposition of material on areas other than those where the precursor material has been modified, whereby the modification of the precursor material acts to hinder or prevent deposition of the material on the on the modified precursor material. In some embodiments, the material modification procedure includes locally doping the material. For example, the material to be doped may be exposed to a doping precursor during selective irradiation. The local temperature increase caused by irradiation causes doping to occur in the irradiated portion and not elsewhere. In some embodiments, the material modification procedure includes annealing. Annealing can increase the crystallinity of the previously deposited material. For example, the modification procedure may include converting the amorphous material to the crystalline form of the material or increasing the particle size of the material already having crystallinity. In each of these various examples of a material modification procedure, the local drive of the material modification procedure is provided at least in part by a local increase in temperature caused by irradiation. Thus, temperatures suitable for achieving material modification efficiently can be achieved in the local areas where needed, while temperatures elsewhere can be kept low. The previously deposited layer can thus avoid reaching a temperature that would be high enough to damage the previously deposited layer (eg, by causing melting).

Embodiments may be further described using the following clauses: 1. A method of forming a patterned layer of material, comprising: providing a substrate having a layered structure comprising a base layer, a support layer, and a thermal insulation layer, wherein: the thermal insulation layer has a lower thermal conductivity than the support layer; the support layer includes a plurality of subunits thermally insulated from each other in a plane of the support layer; and the method includes during a deposition process A selected portion of the support layer is selectively irradiated with respect to locally driving the deposition process in the selected portion and thereby forming a layer of deposited material whose pattern is defined by the selected portion. 2. The method of clause 1, wherein the layered structure further comprises an underlayer between the support layer and the thermally insulating layer, the underlayer being configured to absorb material penetrating the support layer during the selective irradiation all radiation. 3. The method of any preceding clause, wherein the layer of deposited material comprises a two-dimensional material, preferably a monolayer. 4. The method of any preceding clause, wherein the thermally insulating layer comprises a multilayer stack comprising layers of two-dimensional material. 5. The method of clause 4, wherein at least two adjacent two-dimensional material layers in the insulating layer have different compositions relative to each other. 6. The method of clause 4 or 5, wherein the layers of two-dimensional material in the insulating layer comprise one or more layers of: graphene; WSe ₂ ; MoS ₂ ; α-selenene; α- Tellurene. 7. The method of any preceding clause, wherein the subunits are provided in a subunit pattern that is spatially aligned with the pattern defined by the irradiated selected portion. 8. The method of clause 7, wherein the subunit pattern and the pattern defined by the irradiated selected portion are both periodic, having the same periodicity in at least one direction in the plane of the substrate. 9. The method of any preceding clause, further comprising forming the subunits in the support layer by etching trenches through the support layer. 10. The method of any preceding clause, wherein the pattern of deposited material comprises a plurality of isolated portions of deposited material, each isolated portion being provided on a different one of the subunits. 11. The method of clause 10, wherein each of the isolated portions of deposited material is equal in area or smaller than the subunit on which the isolated portion is provided. 12. The method of clause 10 or 11, wherein each of the isolated portions of deposited material form the same component of a different electronic device to be fabricated. 13. The method of clause 12, wherein the isolated portions of deposited material form channels of an electronic device. 14. The method of clause 12 or 13, wherein the electronic device to be fabricated comprises a 2D-FET. 15. The method of any preceding clause, further comprising applying a supplemental radiation to increase a temperature of the support layer during the selective irradiation of the selected portion, wherein the supplemental radiation has a The spatial resolution of sexual radiation is less refined. 16. The method of clause 15, wherein the selective irradiation and the supplemental irradiation are performed using different radiation sources. 17. The method of any preceding clause, wherein the selective irradiation is performed using electromagnetic radiation having a wavelength of less than 100 nm. 18. The method of any preceding clause, wherein the support layer comprises one or more of: Al ₂ O ₃ ; SiO ₂ ; HfO ₂ ; Sn; SnO ₂ ; In ₂ O ₃ ; ITO. 19. The method of any preceding clause, wherein the deposition procedure comprises one or more of the following: atomic layer deposition; chemical vapor deposition; plasma enhanced chemical vapor deposition; epitaxy; sputtering; and electron beam induced deposition. 20. The method of any preceding clause, wherein the layer of deposited material comprises one or more of the following: graphene; antimonene; an MXene; hexagonal boron nitride; a transition metal dichalcogenide. 21. The method of any preceding clause, wherein a lithography apparatus is used to provide the selective irradiation by projecting a patterned beam of radiation onto the substrate from a patterning device. 22. A method of forming a semiconductor device comprising using the method of any preceding clause to form at least one layer in the device. 23. A method of forming a patterned material layer, comprising: providing a substrate having a layered structure, the layered structure comprising a base layer, a support layer, and a space between the base layer and the support layer. a thermal insulation layer, wherein: the thermal insulation layer has a lower thermal conductivity than the support layer; the support layer includes a plurality of subunits thermally insulated from each other in a plane of the support layer; and the method includes a patterning process A selected portion of the support layer is selectively irradiated during the irradiation with respect to locally driving the patterning procedure in the selected portion and thereby forming a layer of material whose pattern is defined by the selected portion. 24. The method of clause 23, wherein the layered structure further comprises a bottom layer between the support layer and the thermally insulating layer, the bottom layer configured to absorb the substance penetrating the support layer during the selective irradiation all radiation. 25. The method of clause 23 or 24, wherein the thermally insulating layer comprises a multilayer stack comprising layers of two-dimensional material. 26. The method of clause 25, wherein at least two adjacent two-dimensional material layers in the insulating layer have different compositions relative to each other. 27. The method of clause 25 or 26, wherein the layers of two-dimensional material in the thermally insulating layer comprise one or more layers of: graphene; WSe ₂ ; MoS ₂ ; α-selenene; α- Tellurene. 28. The method of any of clauses 23 to 27, wherein the subunits are provided in a subunit pattern that is spatially aligned with the pattern defined by the irradiated selected portion. 29. The method of clause 28, wherein the subunit pattern and the pattern defined by the irradiated selected portion are both periodic, having the same periodicity in at least one direction in the plane of the substrate. 30. The method of any of clauses 23 to 29, wherein the pattern of material comprises a plurality of isolated portions of material, each isolated portion being provided on a different one of the subunits. 31. The method of clause 30, wherein each of the isolated portions of material is equal in area or smaller than the subunit on which the isolated portion is provided. 32. The method of clause 30 or 31, wherein each of the isolated portions of material form the same component of a different electronic device to be fabricated. 33. The method of clause 32, wherein the isolated portions of material form channels for electronic devices. 34. The method of clause 32 or 33, wherein the electronic device to be fabricated comprises a 2D-FET. 35. The method of any one of clauses 23 to 34, further comprising applying a supplemental radiation to increase a temperature of the support layer during the selective irradiation of the selected portion, wherein the supplemental radiation has a phase A spatial resolution that is less fine than the selective irradiation. 36. The method of clause 35, wherein the selective irradiation and the supplemental irradiation are performed using different radiation sources. 37. The method of any of clauses 23 to 36, wherein the selective irradiation is performed using electromagnetic radiation having a wavelength of less than 100 nm. 38. The method of any one of clauses 23 to 37, wherein the support layer comprises one or more of: Al ₂ O ₃ ; SiO ₂ ; HfO ₂ ; Sn; SnO ₂ ; In ₂ O ₃ ;ITO. 39. The method of any one of clauses 23 to 38, wherein the patterning procedure comprises a deposition procedure and the irradiation of the selected portion is about locally driving the deposition procedure in the selected portion. 40. The method of clause 39, wherein the layer of deposited material comprises a two-dimensional material, preferably a monolayer. 41. The method of clause 39 or 40, wherein the deposition procedure comprises one or more of the following: atomic layer deposition; chemical vapor deposition; plasma enhanced chemical vapor deposition; epitaxy; sputtering; and electron beam induced deposition. 42. The method of any one of clauses 39 to 41, wherein the layer of deposited material comprises one or more of the following: graphene; antimonene; MXene; hexagonal boron nitride; transition metal dichalcogenides belongings. 43. The method of any one of clauses 23 to 39, wherein the patterning process comprises an etching process of a target layer and the irradiation of the selected portion is performed through the target layer and is about locally driving the etching procedure. 44. The method of any one of clauses 23 to 39, wherein the patterning procedure comprises a material modification procedure and the irradiation of the selected portion is about locally driving the material modification procedure. 45. The method of clause 44, wherein the material modifying procedure comprises modifying a precursor material for a deposition procedure. 46. The method of clause 44 or 45, wherein the material modification procedure comprises locally doping a material. 47. The method of clause 44, wherein the material modification comprises increasing a crystallinity of a material. 48. The method of any of clauses 23 to 47, wherein a lithography apparatus is used to provide the selective irradiation by projecting a patterned beam of radiation onto the substrate from a patterning device. 49. A method of forming a semiconductor device comprising using the method of any of clauses 23 to 48 to form at least one layer in the device.

In any of the methods described above to form a patterned layer of material, the patterned layer of material may comprise the final material that will be present in the device being fabricated (eg, an IC device). For example, the final material may comprise a two-dimensional material such as one or more of the following: graphene, hexagonal boron nitride (hBN), and transition metal dichalcogenide (TMD). Alternatively or additionally, the patterned layer of material may include auxiliary patterns that will functionally contribute to one or more subsequent fabrication steps. In one embodiment, the auxiliary material acts as a hard mask (eg, when formed of amorphous C). In one embodiment, the auxiliary material acts as a material that enhances optoelectronic yield (eg, when one or more of Sn, In, and/or compounds thereof are included). In one embodiment, the auxiliary material acts as a precursor and/or co-reactant and/or catalyst (eg, metals and compounds thereof) for one or more subsequent deposition steps.

10: Faceted Field Mirror Device 11: Faceted pupil mirror device 13: Mirror 14: Mirror 30: Patterning material layer/depositing material layer 32: Selected Parts 34: Selective Irradiation 36: Chamber 38: Material Exchange System 42: Environment/Sealed Environment 44: Stream Manager 45: Environmental Control System 51: First Precursor Material 52: Second Precursor Material 60: Equipment 70: Patterned Field/Radiation System 72: EUV exposure area 74: Path 80: base layer 82: Insulation layer 84: Support layer 85: Subunit 86: Thermal Insulator/Trenches 91: Spacer layer 92: Lower dielectric layer 94: Device Layer 95: Source material unit 96: Drain material unit 97: Area 98: Spacer layer 99: Upper Dielectric Layer 100: bottom layer 110: Target Layer 112: Etched area 114: Modified area 182: Second Radiation System B: Radiation beam B': Patterned EUV radiation beam BD: Beam Delivery System C: Target Section IF: Position Measurement System IL: Irradiation system/illuminator LA: lithography equipment M1: Mask alignment mark M2: Mask alignment mark MA: Patterning Apparatus MT: Mask Support P1: Substrate alignment mark P2: Substrate alignment mark PM: first locator PS: Projection system PW: Second Locator SO: radiation source W: substrate WT: substrate support

Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings in which: 1 depicts a first example of a lithography system including a lithography apparatus and a radiation source; 2 depicts a second example of a lithography system including a lithography apparatus and a radiation source; Figure 3 schematically depicts the path of the EUV exposure area/slit above the substrate; 4 is a graph showing the expected exponential relationship between the lateral growth rate of a two-dimensional material on a substrate and the temperature of the substrate; 5 is a graph showing the linear variation of lateral growth time as a function of substrate temperature; 6 is a schematic side cross-sectional view of a portion of a substrate having a layered structure having a base layer, a thermal insulating layer, and a segmented support layer; Figure 7 schematically depicts irradiation of selected portions on a substrate during a first step of an atomic layer deposition procedure; Figure 8 schematically depicts steps in an atomic layer deposition procedure subsequent to the steps depicted in Figure 7; Figure 9 schematically depicts a lithography apparatus providing radiation to an environmental control system; 10 schematically depicts an apparatus for forming a patterned material layer including a radiation system configured to irradiate a substrate from opposite sides; Figure 11 schematically depicts an apparatus for forming a layer of patterned material comprising an EUV lithography apparatus and an electron beam source; 12-16 are schematic side cross-sectional views of a portion of a substrate depicting steps in a first example program flow for forming a 2D-FET; 17-21 are schematic side cross-sectional views of a portion of a substrate depicting steps in a second example program flow for forming 2D-FETs; 22-26 are schematic side cross-sectional views of a portion of a substrate depicting steps in a third example program flow for forming 2D-FETs; 27 is a schematic side cross-sectional view of a portion of a substrate having a target layer formed on a support layer; FIG. 28 schematically depicts the substrate of FIG. 27 after an etching process has been applied; and Figure 29 schematically depicts the substrate of Figure 27 after a material modification procedure has been applied.

80: base layer

82: Insulation layer

84: Support layer

85: Subunit

86: Thermal Insulator/Trenches

W: substrate

Claims (15)

A method of forming a patterned layer of material comprising: A substrate with a layered structure is provided, the layered structure includes a base layer, a support layer, and an insulating layer between the base layer and the support layer, wherein: The insulating layer has a lower thermal conductivity than the support layer; The support layer includes a plurality of subunits thermally insulated from each other in a plane of the support layer; and The method includes selectively irradiating a selected portion of the support layer during a patterning procedure with respect to locally driving the patterning procedure in the selected portion and thereby forming a pattern thereof defined by the selected portion a material layer. The method of claim 1, wherein the layered structure further comprises a bottom layer between the support layer and the thermally insulating layer, the bottom layer configured to absorb substantially all of the transmission through the support layer during the selective irradiation radiation. The method of claim 1 or 2, wherein the insulating layer comprises a multilayer stack comprising two-dimensional material layers, wherein at least two adjacent two-dimensional material layers of the insulating layer have different compositions relative to each other, and wherein as appropriate , the two-dimensional material layers in the thermal insulation layer comprise one or more of the following layers: graphene; WSe ₂ ; MoS ₂ ; α-selenene; α-telluene. The method of claim 1 or 2, wherein the subunits are provided in a subunit pattern spatially aligned with the pattern defined by the irradiated selected portion, wherein the subunit pattern and the irradiated selected portion are optionally The partially defined patterns are all periodic, having the same periodicity in at least one direction in the plane of the substrate. The method of claim 1 or 2, wherein the pattern of material comprises a plurality of isolated portions of material, each isolated portion being provided on a different one of the subunits and, as the case may be, in area equal to or smaller than that provided above the subunit of the isolation portion. 5. The method of claim 5, wherein each of the isolated portions of material form the same component of a different electronic device to be fabricated, wherein the isolated portions of material optionally form channels for the electronic device. The method of claim 1 or 2, further comprising applying a supplemental radiation to increase a temperature of the support layer during the selective radiation of the selected portion, wherein the supplemental radiation has a A spatial resolution that is less detailed. The method of claim 1 or 2, wherein the selective irradiation is performed using electromagnetic radiation having a wavelength of less than 100 nm, and wherein the support layer, as appropriate, comprises one or more of: Al ₂ O ₃ ; SiO ₂ ; HfO ₂ ; Sn; SnO ₂ ; In ₂ O ₃ ; ITO. 2. The method of claim 1 or 2, wherein the patterning procedure includes a deposition procedure and the irradiation of the selected portion is related to locally driving the deposition procedure in the selected portion. As in the method of claim 9, wherein: The deposited material layer comprises a two-dimensional material, preferably a monolayer; The deposition procedure includes one or more of: atomic layer deposition; chemical vapor deposition; plasma enhanced chemical vapor deposition; epitaxy; sputtering; and electron beam induced deposition; and The layer of deposited material optionally includes one or more of the following: graphene; antimonene; an MXene; hexagonal boron nitride; a transition metal dichalcogenide. 2. The method of claim 1 or 2, wherein the patterning process includes an etching process of a target layer and the irradiation of the selected portion is performed through the target layer and is about locally driving the etching process. 2. The method of claim 1 or 2, wherein the patterning process includes a material modification process and the irradiation of the selected portion is about locally driving the material modification process. The method of claim 12, wherein the material modification procedure comprises: modifying a precursor material used in a deposition procedure; locally doping a material; or increasing a crystallinity of a material. The method of claim 1 or 2, wherein a lithography apparatus is used to provide the selective irradiation by projecting a patterned beam of radiation onto the substrate from a patterning device. A method of forming a semiconductor device comprising forming at least one layer in the device using the method of any one of claims 1 to 14.

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