TW202034301A - Driver circuit for display panel - Google Patents

Abstract

A driver circuit for display device includes a first output buffer, a second output buffer, and a first current source. The first current source is configured to provide a first bias current to the first output buffer, and the first current source is an adjustable current source. In the calibration process, the driver circuit adjust the first bias current of the output of the first current source to make the slew rate of the first output buffer different from the slew rate of the second output buffer.

Description

Driving circuit of display panel

This case relates to an electronic circuit; specifically, this case relates to a driving circuit of a display device.

With the rapid development of electronic technology, display devices have been widely used in people's lives, such as mobile phones or computers.

Generally speaking, the display device includes a source driving circuit for providing data voltage to the pixel matrix in the display panel. However, the data voltage provided by the source driving circuit may interfere with other electronic components in or outside the display device, which may cause negative effects. Therefore, a solution should be proposed.

An embodiment of the present invention relates to a driving circuit. According to an embodiment of the present invention, the driving circuit includes: a first output buffer, a second output buffer, and a first current source. The first current source is used for providing the first bias current to the first output buffer, and the first current source is an adjustable current source. Wherein, in the adjustment state, the driving circuit is used to adjust the first bias current output by the first current source, so that the slew rate of the first output buffer and the slew rate of the second output buffer are different from each other.

An embodiment of the present invention relates to a driving circuit. According to an implementation of the present invention For example, the driving circuit includes: a first output buffer. The first output buffer includes: an output stage. The output stage includes: a first switch circuit and a second switch circuit. The first switch circuit is electrically connected between an output latch and a first power supply. The second switch circuit is electrically connected between the output latch and a second power supply. The switch width of the first switch circuit is adjustable.

An embodiment of the present invention relates to a driving circuit. According to an embodiment of the present invention, the driving circuit includes: an output buffer. The output buffer includes: output stage. The output stage includes: a first switch circuit, and the switch width of the first switch circuit is adjustable. In the adjustment state, the driving circuit adjusts the switch width of the switch circuit so that the rising rate of change of the output voltage of the output buffer is different from the falling rate of change.

By applying an embodiment of this case, the slew rate of the first output buffer and the slew rate of the second output buffer can be different from each other in the calibration state. By adjusting the slew rate of the first output buffer and the second output buffer, the adjuster can try to adjust the noise.

10‧‧‧Input stage

20‧‧‧Gain stage

30‧‧‧Output stage

100‧‧‧Display Panel

101‧‧‧Pixel array

110‧‧‧Gate drive circuit

120‧‧‧Source drive circuit

121‧‧‧Power chip

122‧‧‧Timing control chip

123‧‧‧Touch chip

200, 250‧‧‧Output buffer

200a, 250a‧‧‧output buffer

201, 202, 203, 204‧‧‧switch circuit

CTL1, CTL2, CTL3, CTL4‧‧‧Control switch

D(1)-D(M)‧‧‧Data voltage

G(1)-G(N)‧‧‧Scan signal

GND‧‧‧Ground terminal

I1, I2‧‧‧bias current

OS1, OS2‧‧‧Output switch

OB1, OB2‧‧‧Pre-stage circuit

VDD1, VDD2‧‧‧Supply voltage

VIN1, VIN2‧‧‧Input terminal

M01, M02, M03, M04‧‧‧Work switch

IS1、IS2‧‧‧Current source

ADS1, ADS2‧‧‧Adjust signal

SC1, SC2‧‧‧Waveform

t1-t2‧‧‧Time

In order to make the above and other objects, features, advantages and embodiments of the present invention more comprehensible, the description of the accompanying drawings is as follows: FIG. 1 is a schematic diagram of a display device according to an embodiment of the present invention; FIG. 2 FIG. 3 is a schematic diagram of the output buffer of the driving circuit according to an embodiment of the invention; FIG. 4 is a schematic diagram of the output buffer of the driving circuit according to an embodiment of the invention; A schematic diagram of a switching circuit; FIG. 5 is a signal diagram drawn according to an operating example of the present invention; FIG. 6 is a schematic diagram of a driving circuit drawn according to another embodiment of the present invention; 7 is a schematic diagram of a driving circuit according to another embodiment of the invention; FIG. 8 is a schematic diagram of a driving circuit according to another embodiment of the invention; FIG. 9 is a schematic diagram of a driving circuit according to another embodiment of the invention Figure 10 is a schematic diagram of a driving circuit according to another embodiment of the present invention; Figure 11 is a schematic diagram of a driving circuit according to another embodiment of the present invention.

The following will clearly illustrate the spirit of the present disclosure with diagrams and detailed descriptions. Any person with ordinary knowledge in the technical field who understands the embodiments of the present disclosure can change and modify the techniques taught in the present disclosure. It does not depart from the spirit and scope of this disclosure.

Regarding the "first", "second", ... etc. used in this article, they do not specifically refer to the order or sequence, nor are they used to limit the present invention. They are only used to distinguish elements or elements described in the same technical terms. operating.

Regarding the "electrical connection" used in this article, it can mean that two or more components make physical or electrical contact with each other directly, or make physical or electrical contact with each other indirectly, and "electrical connection" can also refer to two or more components. Multiple elements interoperate or act.

Regarding the "include", "include", "have", "contain", etc. used in this article, they are all open terms, which means including but not limited to.

Regarding the "and/or" used in this article, it includes any or all combinations of the aforementioned things.

Regarding the terms "approximately" and "about" used in this article, they are used to modify any amount or error that can be slightly changed, but such slight changes or errors will not change its essence.

Regarding the terms used in this article, unless otherwise specified, each term usually has the usual meaning used in this field, in the content disclosed here, and in the special content. Some terms used to describe the present disclosure will be discussed below or elsewhere in this specification to provide those skilled in the art with additional guidance on the description of the present disclosure.

FIG. 1 is a schematic diagram of a display device 100 according to an embodiment of the invention. The display device 100 may include a gate driving circuit 110, a source driving circuit 120, a power chip 121, a timing control IC 122, a touch chip 123, and a pixel array 101. The power chip 121 is used to provide power to the display device 100, the timing control chip 122 is used to control the timing of the display device 100, and the touch chip 123 is used to sense electrical changes on the touch electrodes for touch sensing. The gate driving circuit 110 can sequentially generate and provide a plurality of scanning signals G(1), ..., G(N) to the pixel array 101 to turn on the plurality of switches in the pixel array 101, where N is a natural number. The source driving circuit 120 can generate a plurality of data voltages D(1),...,D(M), and provide these data voltages D(1),...,D(M) to the pixel array 101 to The pixel array 101 is allowed to perform display operations according to the data voltages D(1), ..., D(M), where M is a natural number. In this way, the display device 100 can display images and perform touch sensing.

It should be noted that in different embodiments, the power chip 121 can be implemented with a power module other than a chip, the timing control chip 122 can be implemented with a timing control module other than a chip, and the touch chip 123 can be implemented with a touch module other than a chip. . On the other hand, although the display device 100 with touch function is used as an example for description in this case, in different embodiments, the display device 100 may not have the touch function, and the touch chip 123 and touch electrodes may be omitted accordingly. .

Referring to FIGS. 2 and 3, FIGS. 2 and 3 are schematic diagrams of the source driving circuit 120 (hereinafter referred to as the driving circuit 120) according to an embodiment of the present invention. It should be noted that although only the source In the driving circuit 120, the circuit corresponding to the two data voltages (such as the data voltages D(1), D(2)) of the data voltages D(1), ..., D(M) is taken as an example for description, but the source The driving circuit 120 may include circuits corresponding to other data voltages among the data voltages D(1),..., D(M), so the present application is not limited to the circuits shown in FIGS. 2 and 3.

In an embodiment, the driving circuit 120 includes an output buffer 200, an output switch OS1, an output buffer 250, and an output switch OS2. In one embodiment, the output terminal of the output buffer 200 is electrically connected to the output switch OS1, and the output terminal of the output buffer 250 is electrically connected to the output switch OS2. In an embodiment, the output buffers 200 and 250 are arranged adjacent to each other. In one embodiment, the output buffers 200 and 250 are used to output data voltages (eg, to output data voltages D(1) and D(2), respectively). In one embodiment, the output switches OS1 and OS2 are used to provide data voltages to the pixel array 101 in response to a latch signal (not shown).

In one embodiment, the output buffer 200 includes a pre-stage circuit OB1 and an output stage 30 (refer to FIG. 3). In an embodiment, the pre-stage circuit OB1 includes an input stage 10 and a gain stage 20. The output stage 30 includes a switch circuit 201 and a switch circuit 202. In an embodiment, the switch circuits 201 and 202 may be circuits composed of one or more transistors.

In an embodiment, the input stage 10 of the pre-stage circuit OB1 is electrically connected between the input terminal VIN1 and the gain stage 20. The positive output terminal of the gain stage 20 is electrically connected to the control terminal of the switch circuit 201 of the output stage 30. The negative output terminal of the gain stage 20 is electrically connected to the control terminal of the switch circuit 202 of the output stage 30. One end of the switch circuit 201 is used to receive the supply voltage VDD1, and the other end of the switch circuit 201 is electrically connected to the output switch OS1. One end of the switch circuit 202 is electrically connected to the output switch OS1, and the other end of the switch circuit 202 is electrically connected to the ground terminal GND.

Similarly, in this embodiment, the output buffer 250 includes the pre-stage circuit OB2 And an output stage, where the output stage includes a switch circuit 203 and a switch circuit 204. The structure of the front-end circuit OB2 is substantially the same as the structure of the foregoing front-end circuit OB1, so it is not repeated here. In an embodiment, the switch circuits 201 and 202 may be circuits composed of one or more transistors.

In one embodiment, the input terminal of the previous circuit OB2 is electrically connected to the input terminal VIN2, the positive output terminal of the previous circuit OB2 is electrically connected to the control terminal of the switch circuit 203 of the output stage 30, and the previous circuit OB2 The negative output terminal of is electrically connected to the control terminal of the switch circuit 204 of the output stage 30. One end of the switch circuit 203 is used to receive the supply voltage VDD2, and the other end of the switch circuit 203 is electrically connected to the output switch OS2. One end of the switch circuit 204 is electrically connected to the output switch OS2, and the other end of the switch circuit 204 is electrically connected to the ground terminal GND. In an embodiment, the supply voltage VDD2 may be the same or different from the supply voltage VDD1.

In an embodiment, the switch width of the switch circuit 201 is adjustable. For example, referring to FIG. 4, FIG. 4 is a schematic diagram of a switch circuit 201 according to an embodiment of the present application. In this embodiment, the switch circuit 201 includes a work switch M01, a work switch M02, a work switch M03, a work switch M04, a control switch CTL1, a control switch CTL2, a control switch CTL3, and a control switch CTL4. In an embodiment, one end of the work switch M01, one end of the work switch M02, one end of the work switch M03, and one end of the work switch M04 are electrically connected to each other. In an embodiment, the other end of the work switch M01, the other end of the work switch M02, the other end of the work switch M03, and the other end of the work switch M04 are electrically connected to one end of the control switch CTL1 and one end of the control switch CTL2, respectively , One end of the control switch CTL3, and the control switch CTL4. In an embodiment, the other end of the control switch CTL1, the other end of the control switch CTL2, the other end of the control switch CTL3, and the other end of the control switch CTL4 are electrically connected to each other. In one embodiment, the control terminal of the work switch M01, the control terminal of the work switch M02, the control terminal of the work switch M03, the work switch The control terminals of the switch M04 are electrically connected to the positive output terminal of the gain stage 20.

In an embodiment, the control switches CTL1-CTL4 can be selectively turned on or off according to a plurality of control signals, respectively. For example, in an operating state, when the control switch CTL1 is turned on and the control switches CTL2-CTL4 are turned off, corresponding to the output signal of the positive output terminal of the gain stage 20, a current having a current I can be provided by the switch circuit 201 To the output terminal of output stage 30. In another operating state, when the control switches CTL1-CTL2 are turned on and the control switches CTL3-CTL4 are turned off, corresponding to the output signal of the positive output terminal of the gain stage 20, a current with a current amount of 2I can be provided to through the switch circuit 201 Output terminal of output stage 30.

In this way, the amount of current flowing through the switch circuit 201 can be adjusted. In other words, by controlling the on or off of the switches CTL1-CTL4 by the control signal, the switch width of the switch circuit 201 can be adjusted, so that the rate of rise and change of the output voltage of the output buffer 200 can be adjusted.

In one embodiment, the above-mentioned control signal may be provided by a control signal generator (not shown). In one embodiment, the control signal generator may be provided in the source driving circuit 120, but the present case is not limited to this. In addition, it should be noted that although in the above embodiments, the widths of the working switches M01-M04 are the same as each other for description, in different embodiments, the widths of the working switches M01-M04 can also be different from each other.

It should be noted that the control switches CTL1-CTL4 and the working switches M01-M04 described in the present disclosure can all be implemented by transistors, but this case is not limited to this.

It should be noted that in the above embodiment, although the switch circuit 201 with 4 control switches and 4 working switches is taken as an example for description, in different embodiments, the number of control switches and control switches may be different. Therefore, this case is not limited to the switching circuit 201 shown in FIG. 4.

Similarly, in this embodiment, the switch circuit 203 of the output buffer 250 is similar to the aforementioned switch circuit 201 of the output buffer 200, so the relevant details are not repeated here.

Referring to FIG. 5, FIG. 5 is a signal diagram drawn according to an operation example of the present invention. In this operation example, the waveform SC1 corresponds to the data voltage output by the output buffer 200, and the waveform SC2 corresponds to the data voltage output by the output buffer 250. In this operation example, since the output buffer 200 and the output buffer 250 are respectively used to output data voltages of opposite polarities, the waveform SC1 and the waveform SC2 are substantially opposite to each other. In this operation example, Noise represents the noise measured on the touch element.

At the time t1, the touch element measures a negative noise. At this time, if the rising rate of change of the data voltage output by the output buffer 200 is increased, this negative noise can be offset or reduced. In addition, similarly, at the time t2, the touch element measures a positive noise. At this time, if the rising rate of change of the data voltage output by the output buffer 200 is reduced, this positive noise can be offset or reduced.

Through the above-mentioned operation, the driving circuit 120 can adjust the switching width of the switching circuits 201 and 203 so that the rising rate and falling rate of the data voltage output by the output buffers 200 and 250 are different from each other, so as to control the touch The noise measured by the component is adjusted.

It should be noted that although in the above embodiment, the adjustment of the noise measured by the touch element is taken as an example for description, the present case is not limited to this. Through the above operations, the noise on other related components can also be adjusted.

FIG. 6 is a schematic diagram of a driving circuit 120 according to another embodiment of the invention. In this embodiment, the switch widths of the switch circuits 202 and 204 are adjustable. In this way, the driving circuit 120 can adjust the switching widths of the switching circuits 202 and 204 so that the rising rate of change and the falling rate of change of the data voltage output by the output buffers 200 and 205 are different from each other, so as to prevent noise. Make adjustments.

FIG. 7 is a schematic diagram of a driving circuit 120 according to another embodiment of the invention. In this embodiment, the switch widths of the switch circuits 201-204 are adjustable. Therefore, the driving circuit 120 can adjust the noise by adjusting the switching widths of the switching circuits 201-204 so that the rising and falling rates of the data voltage output by the output buffers 200 and 205 are different from each other.

FIG. 8 is a schematic diagram of a driving circuit 120 drawn according to another embodiment of the invention. In this embodiment, the driving circuit 120 includes an output buffer 200a, an output switch OS1, an output buffer 250a, an output switch OS2, and current sources IS1, IS2. In one embodiment, the output terminal of the output buffer 200a is electrically connected to the output switch OS1, and the output terminal of the output buffer 250a is electrically connected to the output switch OS2. In an embodiment, the output buffers 200a and 250a are arranged adjacent to each other. In one embodiment, the current source IS1 is electrically connected to the output buffer 200a, and the current source IS2 is electrically connected to the output buffer 250a. In one embodiment, the output buffers 200a and 250a are used to output data voltages (eg, to output data voltages D(1) and D(2), respectively). In one embodiment, the output switches OS1 and OS2 are used to provide data voltages to the pixel array 101 in response to a latch signal (not shown). In one embodiment, the current source IS1 is used to provide the bias current I1 to the output buffer 200a, and the current source IS2 is used to provide the bias current I2 to the output buffer 250a.

In an embodiment, the current source IS1 is an adjustable current source. In one embodiment, the current amount of the bias current I1 provided by the current source IS1 to the output buffer 200a is adjustable to adjust the slew rate of the output buffer 200a. In one embodiment, the current source IS1 adjusts the current amount of the bias current I1 according to the adjustment signal ADS1. In addition, in one embodiment, the current source IS2 is a fixed current source, but this case is not limited to this.

Referring to FIG. 9, FIG. 9 is a signal diagram drawn according to another operation example of the present invention. In this operation example, the waveform SC1 corresponds to the data voltage output by the output buffer 200a, and the waveform SC2 corresponds to the data voltage output by the output buffer 250a. In this operation example, since the output buffer 200a and the output buffer 250a are respectively used to output data voltages with opposite polarities, the waveform SC1 and the waveform SC2 are substantially opposite to each other. In this operation example, Noise represents the noise measured on the touch element.

At the time t1, the touch element measures a negative noise. At this time, if the bias current I1 is increased to increase the slew rate of the output buffer 200a, this negative noise can be cancelled or reduced. In addition, similarly, at the time t2, the touch element measures a positive noise. At this time, if the bias current I1 is reduced to reduce the slew rate of the output buffer 200a, this forward noise can be offset or reduced.

Through the above operations, the driving circuit 120 can adjust the bias current I1 so that the slew rates of the output buffers 200a and 250a are different from each other, so as to adjust the noise measured by the touch element.

It should be noted that although in the above embodiment, the adjustment of the noise measured by the touch element is taken as an example for description, the present case is not limited to this. Through the above operations, the noise on other related components can also be adjusted.

FIG. 10 is a schematic diagram of a driving circuit 120 according to another embodiment of the invention. In this embodiment, the current source IS2 can adjust the amount of the bias current I2 according to the adjustment signal ADS2. In this way, the driving circuit 120 can adjust the bias current I2 so that the slew rates of the output buffers 200a and 250a are different from each other to adjust the noise.

FIG. 11 is a schematic diagram of a driving circuit 120 drawn according to another embodiment of the present invention Figure. In this embodiment, the current sources IS1 and IS2 can adjust the current amounts of the bias currents I1 and I2 according to the adjustment signals ADS1 and ADS2, respectively. In this way, the driving circuit 120 can adjust the noise by adjusting the bias currents I1 and I2 so that the slew rates of the output buffers 200a and 250a are different from each other.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone who is familiar with this technique can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be subject to those defined in the attached patent scope.

120‧‧‧Source drive circuit

200, 250‧‧‧Output buffer

GND‧‧‧Ground terminal

OS1, OS2‧‧‧Output switch

OB1, OB2‧‧‧Pre-stage circuit

VDD1, VDD2‧‧‧Supply voltage

VIN1, VIN2‧‧‧Input terminal

201, 202, 203, 204‧‧‧switch circuit

Claims (10)

A driving circuit for a display panel includes: a first output buffer; a second output buffer; and a first current source for providing a first bias current to the first output buffer; wherein the The first current source is an adjustable current source; wherein, in an adjustment state, the driving circuit is used to adjust the first bias current output by the first current source to make the first output buffer rotate The rate and the slew rate of the second output buffer are different from each other. The driving circuit according to claim 1, further comprising: a second current source for providing a second bias current to the second output buffer, wherein the second bias current source is an adjustable current source And wherein in the adjustment state, the drive circuit is further used to adjust the second bias current output by the second current source, so that the slew rate of the first output buffer and the second output buffer The slew rate is different from each other. The driving circuit according to claim 1, further comprising: a second current source for providing a second bias current to the second output buffer, wherein the second bias current source is a fixed current source. A drive circuit for a display panel includes: a first output buffer, including an output stage, the output stage includes: a first switch circuit electrically connected between an output latch and a first power supply; And a second switch circuit electrically connected to the output latch and a second power supply The switch width of the first switch circuit is adjustable. The driving circuit according to claim 4, wherein the switching width of the second switching circuit is adjustable. The driving circuit according to claim 4, wherein in an adjustment state, the driving circuit adjusts the switching width of the first switching circuit so that a rising rate of change of an output voltage of the first output buffer Different from a falling rate of change. The driving circuit according to claim 4, wherein the first switch circuit includes: a plurality of working switches, the plurality of first ends of the working switches are electrically connected to each other; and a plurality of control switches, the plurality of first ends of the control switches The plurality of second ends of the working switches are respectively electrically connected, and the plurality of second ends of the control switches are electrically connected to each other; wherein the control switches are selectively turned on and off according to a plurality of control signals to adjust the first The switching width of a switching circuit. A drive circuit for a display panel includes: an output buffer, including an output stage, the output stage includes: a first switch circuit, wherein the switch width of the first switch circuit is adjustable; in a calibration state The driving circuit adjusts the switch width of the switch circuit so that a rising rate of change of an output voltage of the output buffer is different from a falling rate of change. The driving circuit according to claim 8, wherein the output stage further includes: a second switch circuit, wherein the switch width of the second switch circuit is adjustable. The driving circuit according to claim 8, wherein the first switch circuit includes: a plurality of working switches, the plurality of first ends of the working switches are electrically connected to each other; and a plurality of control switches, the plurality of first ends of the control switches Are electrically connected to the plurality of second ends of the working switches, and the plurality of second ends of the control switches are electrically connected to each other; The control switches are selectively turned on and off according to a plurality of control signals to adjust the switch width of the first switch circuit.

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