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TW202002215A - 半導體封裝及其製造方法 - Google Patents

半導體封裝及其製造方法 Download PDF

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TW202002215A
TW202002215A TW107130037A TW107130037A TW202002215A TW 202002215 A TW202002215 A TW 202002215A TW 107130037 A TW107130037 A TW 107130037A TW 107130037 A TW107130037 A TW 107130037A TW 202002215 A TW202002215 A TW 202002215A
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conductive
frame
semiconductor wafer
support frame
packaging structure
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TWI733049B (zh
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張簡上煜
徐宏欣
林南君
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力成科技股份有限公司
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Abstract

一種封裝結構包括至少一半導體晶片、絕緣密封體、導電框架、支撐框架、導電層以及重佈線路層。至少一半導體晶片具有主動面以及相對於主動面的背面。絕緣密封體密封至少一半導體晶片。導電框架圍繞絕緣密封體。支撐框架圍繞導電框架。導電層配置於半導體晶片的背面。重佈線路層配置於半導體晶片的主動面，並與半導體晶片的主動面電性連接。另提供一種半導體封裝的製造方法。

Description

半導體封裝及其製造方法
本發明提供一種封裝結構及其製造方法，且特別是有關一種可提升翹曲控制及提供良好的電磁干擾屏蔽（Electromagnetic Interference Shielding，EMI Shielding）的封裝結構。
為了使得電子產品能達到輕薄短小的設計，半導體封裝技術亦跟著日益進展，以發展出符合小體積、重量輕、高密度以及在市場上具有高競爭力等要求的產品。舉例而言，扇出型（fan-out）封裝由於其密實度（compactness）而趨於熱門。然而，隨著這些封裝件的尺寸減小，如翹曲控制及電磁干擾等諸多問題變得極其重要。因此，如何使整合扇出型封裝具有較好的翹曲控制及良好的電磁干擾屏蔽以改善其可靠度，實為未來封裝上的關鍵因素。
本發明提供一種半導體封裝結構及其製造方法，其中封裝結構可提升翹曲控制以及提供良好的電磁干擾屏蔽。
本發明提供了一種封裝結構。封裝結構包括至少一半導體晶片、絕緣密封體、導電框架、支撐框架、導電層以及重佈線路層。至少一半導體晶片具有主動面以及相對於主動面的背面。絕緣密封體密封至少一半導體晶片。導電框架圍繞絕緣密封體。支撐框架圍繞導電框架。導電層位於半導體晶片的背面上。重佈線路層位於半導體晶片的主動面上，且重佈線路層與半導體晶片的主動面電性連接。
在本發明的一實施例中，封裝結構更包括兩個或多個所述半導體晶片，且多個半導體晶片藉由支撐框架與導電框架彼此分隔。
在本發明的一實施例中，支撐框架的材料包括矽、碳化矽、氧化鋁、氧化鈹或氮化鎵。
在本發明的一實施例中，封裝結構更包括多個導電球。導電球配置於重佈線路層上，其中多個導電球經由重佈線路層與半導體晶片電性連接。
本發明提供了一種封裝結構的製造方法，方法包括以下步驟。提供載板。配置支撐框架與導電框架於載板上，其中支撐框架具有多個開口，且導電框架位於每一開口中且覆蓋每一開口的側壁。接合至少一半導體晶片於載板上，且半導體晶片於支撐框架的多個開口中，其中半導體晶片具有主動面以及相對於主動面的背面。形成絕緣密封體以密封半導體晶片且填入多個開口中。形成重佈線路層於半導體晶片的主動面上及絕緣密封體上，其中重佈線路層與半導體晶片電性連接。移除載板。形成導電層於半導體晶片的背面上、絕緣密封體上以及支撐框架上。
在本發明的一實施例中，其中接合半導體晶片於載板上之後，導電框架圍繞半導體晶片。
在本發明的一實施例中，其中導電框架與導電層電性連接。
在本發明的一實施例中，其中導電框架與導電層以及重佈線路層電性連接。
在本發明的一實施例中，其中兩個或多個半導體晶片接合於載板上，多個半導體晶片於支撐框架的多個開口中，且多個半導體晶片藉由支撐框架與導電框架彼此分隔。
在本發明的一實施例中，其中導電層覆蓋半導體晶片的背面、支撐框架的背面、導電框架的背面以及絕緣密封體。
在本發明的一實施例中，其中支撐框架的熱膨脹係數小於絕緣密封體的熱膨脹係數。
在本發明的一實施例中，製造方法更包括以下步驟。於重佈線路層上配置多個導電球，其中多個導電球經由重佈線路層與半導體晶片電性連接。
基於上述，本發明的封裝結構為形成支撐框架、導電框架以及導電層，以圍繞半導體晶片的五個面。因此，封裝結構可以具有良好的電磁干擾屏蔽。此外，藉由支撐框架圍繞密封體，可改善封裝結構的強度，進而提升翹曲控制。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
參照本實施例之圖式以更全面地闡述本發明。然而，本發明亦可以各種不同的形式體現，而不應限於本文中所述之實施例。圖式中的層與區域的厚度會為了清楚起見而放大。相同或相似之參考號碼表示相同或相似之元件，以下段落將不再一一贅述。另外，本文所使用之方向術語（例如：上、下、右、左、前、後、頂部、底部）僅參看所繪圖式使用且不意欲暗示絕對定向。
圖1、圖2A、圖3至圖10是依據本發明一實施例的封裝結構的製造方法的剖面示意圖。圖2B為圖2A的上視示意圖，且圖2A可以是沿圖2B中A-A’剖線的剖面圖。
請參照圖1，提供載板100。在一實施例中，載板100可以由矽、聚合物或其他適宜的材料所製成。在一些實施例中，載板100可以是玻璃基板或玻璃支撐板。其他合適的基板材料也可以作為載板100，只要所述材料能夠承載在其之上所形成的封裝結構且能夠承受後續的製程即可。如圖1所示，於載板100上形成黏著層102，以增強載板100以及隨後形成於其上的結構之間的黏著，進而提升製造過程中整個封裝結構的剛性。在一些實施例中，黏著層102可以是光熱轉換（light to heat conversion，LTHC）黏著層，其可以在室溫下透過將雷射施加至黏著層102上，而使得黏著層102從載板100上剝離。然而，本發明不限於此。在一些替代的實施例中，黏著層102可以視需求而選擇其他適宜的材料。
請參照圖2A至圖2B，於黏著層102上配置支撐框架103及導電框架104。於黏著層102上配置支撐框架103及導電框架104之前，可先預先形成支撐框架103及導電框架104。在一些實施例中，形成支撐框架103的製程包括提供支撐基底（未繪示），接著，圖案化支撐基底以形成支撐框架103。舉例而言，於支撐框架103中形成多個開口90，其中每一開口90穿過支撐框架103。在示例性實施例中，支撐框架103的材料包括矽、碳化矽（silicon carbide）、氧化鋁（aluminum oxide）、氧化鈹（beryllium oxide）或氮化鎵（gallium nitride）。然而，本發明不限於此。在一些其他的實施例中，支撐框架103可以是具有熱膨脹係數（coefficient of thermal expansion）介於2.6 ppm/°C與55 ppm/°C之間的任何材料。在某些實施例中，支撐框架103可以由具有足夠鋼性的材料所形成，使其可具有足夠的強度來作為支撐結構，且可作為平衡應力結構且提升翹曲控制程度。
請參照圖2A，導電框架104位於每一開口90中，以至少覆蓋開口90的側壁90S。圖2B為圖2A的上視圖，其中圖2A是沿圖2B中A-A’剖線的剖面圖。如圖2B所示，導電框架104的輪廓實質上對應於支撐框架103中開口90的輪廓。換句話說，導電框架104沿開口90的側壁90S延伸，並覆蓋開口90的側壁90S。在一些實施例中，形成導電框架104的製程包括於支撐框架103上放置圖案化罩幕（未繪示），其中圖案化罩幕露出一部分的開口90。之後，藉由濺鍍（sputtering）以於未被圖案化罩幕所覆蓋的部分開口90中形成導電框架104。在某些實施例中，導電框架104的材料可以包括銅、錫、鋁、鋼或其他適宜的導電材料。於黏著層102上配置預先形成的支撐框架103及導電框架104，以使開口90暴露出下方部分的黏著層102。
請參照圖2B，於支撐框架103上可以形成陣列形式的開口90。在所繪示的實施例中，於支撐框架103上形成4×4陣列的開口90，且每一開口90相互分開。然而，本發明不限於此。值得注意的是，支撐框架103上開口90的數量與開口90的設置可以基於產品需求做調整。
請參照圖3，在配置支撐框架103與導電框架104之後，於支撐框架103的每一開口90中可以配置至少一半導體晶片108。每一半導體晶片108可以包括半導體基板108a、多個接墊108b、保護層108c、後保護層108d以及多個導電凸塊108e。多個接墊108b配置於半導體基板108a上。保護層108c配置於半導體基板108a上且具有暴露出部分接墊108b的開口。後保護層108d覆蓋保護層108c且具有暴露出至少部分接墊108b的多個開口。多個導電凸塊108e配置於開口中，以覆蓋被暴露出的部分接墊108b。在所示的實施例中，於載板100（或黏著層102）上的支撐框架103的開口90中接合每一半導體晶片108。雖然圖中僅繪示了兩個半導體晶片108，但應該注意的是，於本發明並不加以限制半導體晶片108的數量，且前述的數量可以基於需求做調整。
如圖3所示，每一半導體晶片可以具有主動面AS以及相對於主動面AS的背面BS。多個導電凸塊108e位於半導體晶片108的主動面AS上，而半導體晶片108的背面BS黏著至黏著層102上。在一些實施例中，半導體晶片108可以藉由晶粒黏著膜（die attach film；DAF）（未繪示）接合於黏著層102上。
請參照圖4，在載板100上接合半導體晶片108之後，形成絕緣材料層110以覆蓋或密封半導體晶片108。換句話說，藉由絕緣材料層110密封並保護半導體晶片108的導電凸塊108e。絕緣材料層110也可以密封支撐框架103、導電框架104以及填入支撐框架103的開口90中。在一些實施例中，可以經由模塑製程形成絕緣材料層110。舉例而言，絕緣材料層110包括環氧樹脂（epoxy resin）或其它適宜的聚合物材料。在某些實施例中，絕緣材料層110的材料的熱膨脹係數可以大於支撐框架103的熱膨脹係數。在一些其他的實施例中，絕緣材料層110可以包括分佈在環氧樹脂或其它適宜的聚合物材料中的填充物。填充物的材料包括二氧化矽、氧化鋁或其它適宜的材料。填充物能夠增強絕緣材料層110的機械強度，使絕緣材料層110可以良好地保護半導體晶片108。
請參照圖5，研磨絕緣材料層110直到暴露出支撐框架103的頂面103T、導電框架104的頂面104T以及導電凸塊108e的頂面108T（或主動面AS）。在研磨絕緣材料層110之後，形成絕緣密封體110’以密封半導體晶片108。研磨製程包括執行機械研磨製程（mechanical grinding process）、化學機械研磨製程（chemical-mechanical polishing ，CMP）、蝕刻製程或其它適宜的製程或其組合。在一些實施例中，當對絕緣材料層110進行研磨製程時，可以移除部分的支撐框架103與部分的導電框架104。在研磨製程之後，絕緣密封體110’的頂面110T實質上與支撐框架103的頂面103T、導電框架104的頂面104T以及導電凸塊108e的頂面108T（或主動面AS）共面（coplanar）。此外，導電框架104夾於支撐框架103與絕緣密封體110’之間。
請參照圖6，於半導體晶片108的主動面AS上與絕緣密封體110’上形成重佈線路層120。在一些實施例中，重佈線路層120包括交替堆疊的多個介電層120A和多個導電層120B。重佈線路層120與每一半導體晶片108電性連接。導電層120B與半導體晶片108的導電凸塊108e電性連接。可以藉由鍍析製程（plating process）形成導電層120B，而導電層120B可以包括銅、鋁、金、銀、錫或其組合。在所示的實施例中，圖中繪示了三層介電層120A以及兩層導電層120B，然而，本發明不限於此。在一些替代的實施例中，介電層120A與導電層120B的數量可以基於產品設計做調整。在一些實施例中，重佈線路層120中最上方的介電層120A可以包括多個導電接墊（未繪示）。舉例而言，導電接墊可以是凸塊底金屬（Under bump metallurgy；UBM），以用於置球（ball mount）。在一些實施例中，會省略導電接墊（UBM圖案）。
請參照圖7，在形成重佈線路層120之後，於重佈線路層120上可選擇性地配置多個導電球130。導電球130經由重佈線路層120與半導體晶片108電性連接。在一些實施例中，舉例而言，導電球130包括錫球或焊球，然而，本發明不限於此。在某些實施例中，可以藉由執行置球及回焊製程來形成導電球130。
請參照圖8，於圖8的實施例中是在導電球130配置於重佈線路層120上之後，將載板100與黏著層102從絕緣密封體110’、半導體晶片108、支撐框架103以及導電框架104上剝離或分離，然而，本發明不限於此。在另一些實施例中，也可以在載板100與黏著層102從絕緣密封體110’、半導體晶片108、支撐框架103以及導電框架104上剝離或分離後，再將導電球130配置於重佈線路層120上。在一些實施例中，藉由對黏著層102（如LTHC離型層）照射紫外光雷射，可以使在其上形成的其他元件從黏著層102以及載板100上剝離。在剝離製程之後，暴露出半導體晶片108的背面BS、支撐框架103的背面103B以及導電框架104的背面104B。
接著，請參照圖9，於半導體晶片108的背面BS、絕緣密封體110’以及支撐框架103上形成導電層140。在某些實施例中，導電層140可以覆蓋半導體晶片108的背面BS、支撐框架103的背面103B、導電框架104的背面104B以及絕緣密封體110’。形成導電層140的製程可以包括執行物理氣相沉積（如：濺鍍）或電鍍製程（electroplating process）。導電層140的材料可以包括鈦、銅、錫、鋁、不銹鋼或其它適宜的導電材料。導電層140的材料與導電框架104的材料可以相同或不同。在示例性的實施例中，導電層140與導電框架104電性連接。藉由這樣的配置，半導體晶片108的五個面被導電層140與導電框架104所圍繞。因此，所形成的封裝結構可以具有良好的電磁干擾屏蔽。一般常見的電磁干擾屏蔽可以包括例如由濺鍍所形成的鈦層、銅層或不銹鋼層，但本發明不限於此。
請參照圖10，在形成導電層140之後，沿著切割線DL（如圖9所示）執行切割製程，以切割整個晶圓/面板結構（切穿導電層140、支撐框架103以及重佈線路層120），而構成多個封裝結構10。在示例性的實施例中，切割製程為包括機械刀片鋸切（mechanical blade sawing）或雷射切割的晶圓切割製程或面板切割製程。在切割製程之後，每一分離的封裝結構10可以包括支撐框架103、圍繞絕緣密封體110’的導電框架104。換句話說，封裝結構10並未暴露出絕緣密封體110’。在示例性的實施例中，支撐框架103與導電框架104也圍繞至少一半導體晶片108。在一些其他的實施例中，每一分離的封裝結構10可以包括多於一個的半導體晶片108。
圖11是依據本發明另一實施例的封裝結構的剖面示意圖。圖11的實施例中所示的封裝結構20與圖10的實施例中所示的封裝結構10類似，因此採用相同的標號來表示相同或近似的元件，故於此不加以贅述。圖11的封裝結構20與圖10的封裝結構10差別在於：封裝結構20的導電框架104與導電層140以及重佈線路層120電性連接。如圖11所示，重佈線路層120的導電層120B朝導電框架104延伸，且與導電框架104電性及物理連接。
綜上所述，本發明的封裝結構為形成支撐框架、導電框架以及導電層，以圍繞半導體晶片的五個面。因此，封裝結構可以具有良好的電磁干擾屏蔽。此外，藉由支撐框架圍繞密封體，可改善封裝結構的強度，進而提升翹曲控制。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
10、20‧‧‧封裝結構90‧‧‧開口90S‧‧‧側壁100‧‧‧載板102‧‧‧黏著層103‧‧‧支撐框架104‧‧‧導電框架108‧‧‧半導體晶片108a‧‧‧半導體基板108b‧‧‧接墊108c‧‧‧保護層108d‧‧‧後保護層108e‧‧‧導電凸塊110‧‧‧絕緣材料層110’‧‧‧絕緣密封體120‧‧‧重佈線路層120A‧‧‧介電層120B、140‧‧‧導電層130‧‧‧導電球103T、104T、108T、110T‧‧‧頂面AS‧‧‧主動面BS、103B、104B‧‧‧背面DL‧‧‧切割線
圖1、圖2A、圖3至圖10是依據本發明一實施例的封裝結構的製造方法的剖面示意圖。 圖2B為圖2A的上視示意圖。 圖11是依據本發明另一實施例的封裝結構的剖面示意圖。
10‧‧‧封裝結構
103‧‧‧支撐框架
104‧‧‧導電框架
108‧‧‧半導體晶片
108a‧‧‧半導體基板
108b‧‧‧接墊
108c‧‧‧保護層
108d‧‧‧後保護層
108e‧‧‧導電凸塊
110’‧‧‧絕緣密封體
120‧‧‧重佈線路層
130‧‧‧導電球
120B、140‧‧‧導電層

Claims (10)

  1. 一種封裝結構，包括： 至少一半導體晶片，具有主動面以及相對於所述主動面的背面； 絕緣密封體，密封所述至少一半導體晶片； 導電框架，圍繞所述絕緣密封體； 支撐框架，圍繞所述導電框架； 導電層，位於所述半導體晶片的所述背面上；以及 重佈線路層，位於所述半導體晶片的所述主動面上，且所述重佈線路層與所述半導體晶片的所述主動面電性連接。
  2. 如申請專利範圍第1項所述的封裝結構，其中所述支撐框架的熱膨脹係數小於所述絕緣密封體的熱膨脹係數。
  3. 如申請專利範圍第1項所述的封裝結構，其中所述導電框架與所述導電層電性連接。
  4. 如申請專利範圍第1項所述的封裝結構，其中所述導電框架與所述導電層以及所述重佈線路層電性連接。
  5. 如申請專利範圍第1項所述的封裝結構，其中所述導電框架的輪廓實質上對應於所述支撐框架中的開口的輪廓。
  6. 如申請專利範圍第1項所述的封裝結構，其中所述導電層覆蓋所述半導體晶片的所述背面、所述支撐框架的背面、所述導電框架的背面以及所述絕緣密封體。
  7. 如申請專利範圍第1項所述的封裝結構，其中所述封裝結構未暴露出所述絕緣密封體。
  8. 一種封裝結構的製造方法，包括： 提供載板； 配置支撐框架與導電框架於所述載板上，其中所述支撐框架具有多個開口，且所述導電框架位於每一所述開口中且覆蓋每一所述開口的側壁； 接合至少一半導體晶片於所述載板上，且所述半導體晶片於所述支撐框架的所述多個開口中，其中所述半導體晶片具有主動面以及相對於所述主動面的背面； 形成絕緣密封體以密封所述半導體晶片且填入所述多個開口中； 形成重佈線路層於所述半導體晶片的所述主動面上及所述絕緣密封體上，其中所述重佈線路層與所述半導體晶片電性連接； 移除所述載板；以及 形成導電層於所述半導體晶片的所述背面上、所述絕緣密封體上以及所述支撐框架上。
  9. 如申請專利範圍第8項所述的封裝結構的製造方法，其中配置所述支撐框架於所述載板上之前，以下列步驟預先形成所述支撐框架： 提供支撐基底； 圖案化所述支撐基底以形成具有所述多個開口的所述支撐框架，其中每一所述開口穿過所述支撐框架。
  10. 如申請專利範圍第9項所述的封裝結構的製造方法，其中配置所述導電框架於所述載板上之前，以下列步驟預先形成所述導電框架： 放置圖案化罩幕於所述支撐框架上； 經由使用所述圖案化罩幕的濺鍍，以於所述支撐框架的所述多個開口中形成所述導電框架。
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