TW201820535A - Electrical contact structure and methods for forming the same - Google Patents
Electrical contact structure and methods for forming the same Download PDFInfo
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Description
本發明實施例係有關於電接觸結構及其形成方法,且特別是有關於薄膜材料層上的電接觸結構及其形成方法。 Embodiments of the present invention relate to electrical contact structures and methods of forming the same, and more particularly to electrical contact structures on thin film material layers and methods of forming the same.
半導體裝置已廣泛地使用於各種電子產品中,舉例而言,諸如個人電腦、手機、以及數位相機等。半導體裝置的製造通常是藉由在半導體基板上依序沉積絕緣層或介電層材料、導電層材料以及半導體層材料,接著使用微影製程圖案化所形成的各種材料層,藉以在此半導體基板之上形成電路零件及組件。 Semiconductor devices have been widely used in various electronic products such as personal computers, mobile phones, and digital cameras. The semiconductor device is usually fabricated by sequentially depositing an insulating layer or a dielectric layer material, a conductive layer material, and a semiconductor layer material on a semiconductor substrate, and then patterning the various material layers formed by using a lithography process, whereby the semiconductor substrate is formed thereon. Circuit parts and components are formed on top.
在半導體裝置中,使用薄膜材料製造的元件例如薄膜電阻器或磁阻元件器等可縮小半導體裝置的元件尺寸,且能展現元件的穩定性和所需要的電性效能,然而,目前在薄膜材料層上製造電接觸結構仍遭遇許多問題,而造成電接觸結構電阻增加及薄膜材料層的受損問題,因此電接觸結構的製造方法仍有待進一步改善。 In a semiconductor device, an element fabricated using a thin film material such as a thin film resistor or a magnetoresistive element can reduce the element size of the semiconductor device and exhibit the stability of the element and the required electrical performance, however, currently in the film material The fabrication of electrical contact structures on the layers still suffers from a number of problems, resulting in increased electrical contact structure resistance and damage to the thin film material layer, so the method of fabricating the electrical contact structure remains to be further improved.
根據本發明的一些實施例,提供電接觸結構的形成方法,此方法包含形成薄膜材料層於基底上,形成第一阻擋 層於薄膜材料層上,形成金屬層於第一阻擋層上,將金屬層圖案化以形成金屬圖案,形成間隔物於金屬圖案的側壁上且覆蓋第一阻擋層的一部份,蝕刻第一阻擋層,其中位於間隔物下方的第一阻擋層的此部分未被完全蝕刻,以及移除間隔物,暴露出金屬圖案的側壁,以形成電接觸結構於薄膜材料層上,其中第一阻擋層具有突出部超出金屬圖案的側壁之外。 According to some embodiments of the present invention, a method of forming an electrical contact structure is provided, the method comprising forming a thin film material layer on a substrate, forming a first barrier layer on the thin film material layer, forming a metal layer on the first barrier layer, and forming the metal The layer is patterned to form a metal pattern, a spacer is formed on the sidewall of the metal pattern and covers a portion of the first barrier layer, and the first barrier layer is etched, wherein the portion of the first barrier layer under the spacer is not completely Etching, and removing spacers, expose sidewalls of the metal pattern to form an electrical contact structure on the layer of thin film material, wherein the first barrier layer has protrusions beyond the sidewalls of the metal pattern.
根據本發明的一些實施例,提供電接觸結構放置於基底上的薄膜材料層上,包含第一阻擋層設置於薄膜材料層上,以及金屬圖案設置於第一阻擋層上,其中第一阻擋層具有突出部超出金屬圖案的側壁之外。 According to some embodiments of the present invention, an electrical contact structure is provided on a layer of a thin film material on a substrate, the first barrier layer is disposed on the thin film material layer, and the metal pattern is disposed on the first barrier layer, wherein the first barrier layer There is a protrusion beyond the side wall of the metal pattern.
100‧‧‧基底 100‧‧‧Base
102‧‧‧薄膜材料層 102‧‧‧film material layer
104‧‧‧第一阻擋層 104‧‧‧First barrier
106‧‧‧金屬層 106‧‧‧metal layer
106’‧‧‧金屬圖案 106’‧‧‧Metal pattern
106S‧‧‧側壁 106S‧‧‧ side wall
108‧‧‧第二阻擋層 108‧‧‧second barrier
108’‧‧‧圖案化的第二阻擋層 108’‧‧‧ patterned second barrier
110‧‧‧抗反射層 110‧‧‧Anti-reflective layer
110’‧‧‧圖案化的抗反射層 110’‧‧‧ patterned anti-reflective layer
112‧‧‧光阻層 112‧‧‧ photoresist layer
114‧‧‧間隔物 114‧‧‧ spacers
116‧‧‧護層 116‧‧‧ Cover
118‧‧‧開口 118‧‧‧ openings
120‧‧‧導電部件 120‧‧‧Electrical parts
122‧‧‧電接觸結構 122‧‧‧Electrical contact structure
W1、W2、W3‧‧‧寬度 W 1, W 2, W 3 ‧ ‧ width
P‧‧‧突出部 P‧‧‧Prominence
A‧‧‧區域 A‧‧‧ area
根據以下的詳細說明並配合所附圖式做完整揭露。應注意的是,根據本產業的一般作業,圖示中的各種部件並未必按照比例繪製。事實上,可能任意的放大或縮小各種部件的尺寸,以做清楚的說明。 The full disclosure is based on the following detailed description and in conjunction with the drawings. It should be noted that various components in the drawings are not necessarily drawn to scale in accordance with the general operation of the industry. In fact, it is possible to arbitrarily enlarge or reduce the size of various components for a clear explanation.
第1A-1I圖顯示根據一些實施例之形成電接觸結構的方法之各階段的剖面示意圖。 1A-1I are schematic cross-sectional views showing stages of a method of forming an electrical contact structure in accordance with some embodiments.
第2圖顯示第1F圖中的區域A之放大示意圖。 Fig. 2 is an enlarged schematic view showing a region A in Fig. 1F.
以下將詳細說明本發明實施例之製作與使用方式。然應注意的是,本發明實施例提供許多可供應用的發明概念,其可以多種形式實施。文中所舉例討論之實施例僅為製造與使用本發明之示範方式,非用以限制本發明之範圍。此外,在敘述中,第一製程與第二製程之進行,可包括第二製程於第 一製程之後立刻進行之實施例,亦可包括其他附加製程於第一製程與第二製程之間進行之實施例。許多元件可能被任意地繪製成不同的尺寸比例。這僅是為了圖式之簡化與清楚化。再者,當述及第一材料層位於第二材料層上或之上時,包括第一材料層與第二材料層直接接觸或間隔有一或更多其他材料層之實施例。以下,敘述了實施例的一些變化。在不同的圖式與實施例敘述中,相似的標號可用以標示相似的元件。應可理解的是,額外的操作步驟可實施於所述方法之前、之間或之後,且在所述方法的其他實施例中,可以取代或省略部分的操作步驟。 The manner of making and using the embodiments of the present invention will be described in detail below. It should be noted that the embodiments of the present invention provide many inventive concepts that can be applied in various forms. The examples discussed herein are merely illustrative of the invention and are not intended to limit the scope of the invention. In addition, in the description, the first process and the second process may include an embodiment in which the second process is performed immediately after the first process, and may include other additional processes between the first process and the second process. Example. Many components may be arbitrarily drawn to different scale ratios. This is only for the simplification and clarity of the schema. Further, when the first material layer is referred to or on the second material layer, an embodiment comprising the first material layer in direct contact with the second material layer or one or more other material layers is disposed. Some variations of the embodiments are described below. In the various figures and the description of the embodiments, like reference numerals may be used to indicate similar elements. It will be appreciated that additional operational steps may be performed before, during or after the method, and that in other embodiments of the method, portions of the operational steps may be substituted or omitted.
本發明之實施例的電接觸結構的形成方法係藉由形成間隔物於金屬圖案的側壁,以克服金屬圖案下方的阻擋層被過度蝕刻所產生的底接結構的問題,藉此提高電接觸結構的電性穩定性及可靠度,避免電接觸結構的電阻變大。 The method for forming the electrical contact structure of the embodiment of the present invention overcomes the problem of the underlying structure caused by over-etching of the barrier layer under the metal pattern by forming a spacer on the sidewall of the metal pattern, thereby improving the electrical contact structure. The electrical stability and reliability of the electrical contact structure are prevented from increasing.
第1A-1I圖顯示根據一些實施例形成電接觸結構的方法之各階段的剖面示意圖。 1A-1I are schematic cross-sectional views showing stages of a method of forming an electrical contact structure in accordance with some embodiments.
請參照第1A圖,提供基底100,在一些實施例中,基底100可為單晶矽基底、磊晶矽基底、矽鍺基底、絕緣層上覆矽(silicon on insulator,SOI)基底、化合物半導體基底或其他適合的半導體基底。在基底100上形成薄膜材料層102,薄膜材料層102的厚度範圍在約100Å至約200Å之間,在一些實施例中,薄膜材料層102可包含薄膜電阻材料,例如矽鉻(SiCr)、鎳鉻(NiCr)、氮化鉭(TaN)或其他適合的薄膜電阻材料。在其他一些實施例中,薄膜材料層102可包含磁阻元件的薄膜材料,例 如異向磁阻(anisotropic magnetoresistance,AMR)或巨磁阻(giant magnetoresistance,GMR)等磁阻元件的薄膜材料,上述磁阻元件的薄膜材料例如為鎳鐵(NiFe)、鈷鐵(CoFe)、鈷鐵硼(CoFeB)、銅(Cu)、鉑錳(PtMn)、銥錳(IrMn)或其他適合的薄膜磁阻材料。在一些實施例中,薄膜材料層102可透過化學氣相沈積(chemical vapor deposition,CVD)法、物理氣相沉積(physical vapor deposition,PVD)法、原子層沉積(atomic layer deposition,ALD)法、電漿輔助化學氣相沈積(plasma-enhanced chemical vapor deposition,PECVD)法、高密度電漿化學氣相沉積(high-density plasma chemical vapor deposition,HDPCVD)法、有機金屬化學氣相沉積法(metal-organic chemical vapor deposition,MOCVD)法或脈衝雷射沉積(pulsed Laser Deposition,PLD)等適合的製程方法形成。 Referring to FIG. 1A, a substrate 100 is provided. In some embodiments, the substrate 100 can be a single crystal germanium substrate, an epitaxial germanium substrate, a germanium substrate, a silicon on insulator (SOI) substrate, a compound semiconductor. Substrate or other suitable semiconductor substrate. A thin film material layer 102 is formed on the substrate 100. The thickness of the thin film material layer 102 ranges from about 100 Å to about 200 Å. In some embodiments, the thin film material layer 102 may comprise a thin film resistive material such as yttrium chromium (SiCr), nickel. Chromium (NiCr), tantalum nitride (TaN) or other suitable thin film resistor material. In some other embodiments, the thin film material layer 102 may comprise a thin film material of a magnetoresistive element, such as a thin film material of a magnetoresistive element such as anisotropic magnetoresistance (AMR) or giant magnetoresistance (GMR), The thin film material of the magnetoresistive element is, for example, nickel iron (NiFe), cobalt iron (CoFe), cobalt iron boron (CoFeB), copper (Cu), platinum manganese (PtMn), lanthanum manganese (IrMn) or other suitable thin film magnetoresistance. material. In some embodiments, the thin film material layer 102 can be subjected to a chemical vapor deposition (CVD) method, a physical vapor deposition (PVD) method, an atomic layer deposition (ALD) method, Plasma-enhanced chemical vapor deposition (PECVD), high-density plasma chemical vapor deposition (HDPCVD), and organometallic chemical vapor deposition (metal- A suitable process method such as organic chemical vapor deposition (MOCVD) or pulsed laser deposition (PLD) is used.
在一些實施例中,於基底100及薄膜材料層102之上形成第一阻擋層104,第一阻擋層104覆蓋且直接接觸基底100及薄膜材料層102的上表面。在一些實施例中,第一阻擋層104可包含鈦鎢(TiW)、氮化鈦(TiN)、鈦(Ti)或其他適合的材料。在一些實施例中,第一阻擋層104使用的鈦鎢(TiW)中的鈦及鎢的重量比例為1:9。在一些實施例中,第一阻擋層104可透過化學氣相沈積(CVD)法、物理氣相沉積(PVD)法、原子層沉積(ALD)法、電漿輔助化學氣相沈積(PECVD)法、高密度電漿化學氣相沉積(HDPCVD)法、有機金屬化學氣相沉積法(MOCVD)法或脈衝雷射沉積(PLD)等適合的製程方法形成。 In some embodiments, a first barrier layer 104 is formed over the substrate 100 and the thin film material layer 102. The first barrier layer 104 covers and directly contacts the upper surface of the substrate 100 and the thin film material layer 102. In some embodiments, the first barrier layer 104 can comprise titanium tungsten (TiW), titanium nitride (TiN), titanium (Ti), or other suitable materials. In some embodiments, the weight ratio of titanium to tungsten in the titanium tungsten (TiW) used by the first barrier layer 104 is 1:9. In some embodiments, the first barrier layer 104 is permeable to chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and plasma assisted chemical vapor deposition (PECVD). Formed by a suitable process such as high density plasma chemical vapor deposition (HDPCVD), organometallic chemical vapor deposition (MOCVD) or pulsed laser deposition (PLD).
請參照第1B圖,根據一些實施例,接著,形成金 屬層106於第一阻擋層104之上,在一些實施例中,金屬層106包括例如鋁銅(AlCu)或鋁矽銅(AlSiCu)等適合的材料。接著,形成第二阻擋層108於金屬層106之上,在一些實施例中,第二阻擋層108可包含與第一阻擋層104相同的材料,例如鈦鎢(TiW)、鈦(Ti)或氮化鈦(TiN)。在一些實施例中,第二阻擋層108可包含與第一阻擋層104不同的材料,例如鉭(Ta)或氮化鉭(TaN)等適合的材料。 Referring to FIG. 1B, in accordance with some embodiments, a metal layer 106 is then formed over the first barrier layer 104. In some embodiments, the metal layer 106 includes, for example, aluminum copper (AlCu) or aluminum beryllium copper (AlSiCu). Suitable material. Next, a second barrier layer 108 is formed over the metal layer 106. In some embodiments, the second barrier layer 108 can comprise the same material as the first barrier layer 104, such as titanium tungsten (TiW), titanium (Ti), or Titanium nitride (TiN). In some embodiments, the second barrier layer 108 can comprise a different material than the first barrier layer 104, such as a suitable material such as tantalum (Ta) or tantalum nitride (TaN).
在一些實施例中,接著形成抗反射層110於第二阻擋層108上,抗反射層110可包含例如氮氧化矽(SiON)或氮化矽(SiN)等材料。在一些實施例中,金屬層106、第二阻擋層108、抗反射層110可透過化學氣相沈積(CVD)法、物理氣相沉積(PVD)法、原子層沉積(ALD)法、電漿輔助化學氣相沈積(PECVD)法、高密度電漿化學氣相沉積(HDPCVD)法、有機金屬化學氣相沉積法(MOCVD)法或脈衝雷射沉積(PLD)等適合的製程方法分別地形成。 In some embodiments, the anti-reflective layer 110 is then formed on the second barrier layer 108, and the anti-reflective layer 110 may comprise a material such as hafnium oxynitride (SiON) or tantalum nitride (SiN). In some embodiments, the metal layer 106, the second barrier layer 108, and the anti-reflective layer 110 are permeable to chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and plasma. Suitable process methods such as assisted chemical vapor deposition (PECVD), high density plasma chemical vapor deposition (HDPCVD), organometallic chemical vapor deposition (MOCVD) or pulsed laser deposition (PLD) are separately formed. .
請參照第1C圖,在一些實施例中,接續實施圖案化製程,將金屬層106、第二阻擋層108和抗反射層110同時圖案化。在一些實施例中,此圖案化製程包括形成遮罩圖案(未繪示)在抗反射層110上,並使用遮罩圖案對金屬層106、第二阻擋層108和抗反射層110實施乾蝕刻製程或其他適合的蝕刻製程,以形成如第1C圖所示之金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’,之後將圖案化的抗反射層110’上方的遮罩圖案去除。在一些實施例中,乾蝕刻製程例如為反應性離子蝕刻(reactive-ion etching,RIE)、電漿蝕刻 (plasma etching)製程,且此乾蝕刻製程停止於第一阻擋層104上,且暴露出第一阻擋層104之上表面及金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’的側壁。由於此乾蝕刻製程屬於異向性蝕刻(an-isotropic etching),異向性蝕刻只在垂直方向進行蝕刻,水平方向則不會蝕刻,故金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’具有完全上下重疊的圖案,如第1C圖所示。 Referring to FIG. 1C, in some embodiments, a patterning process is successively performed to simultaneously pattern the metal layer 106, the second barrier layer 108, and the anti-reflective layer 110. In some embodiments, the patterning process includes forming a mask pattern (not shown) on the anti-reflective layer 110, and dry etching the metal layer 106, the second barrier layer 108, and the anti-reflective layer 110 using a mask pattern. A process or other suitable etching process to form a metal pattern 106' as shown in FIG. 1C, a patterned second barrier layer 108', and a patterned anti-reflective layer 110', after which the patterned anti-reflective layer 110 is patterned 'The mask pattern above is removed. In some embodiments, the dry etching process is, for example, a reactive-ion etching (RIE), plasma etching process, and the dry etching process is stopped on the first barrier layer 104 and exposed. The upper surface of the first barrier layer 104 and the metal pattern 106', the patterned second barrier layer 108', and the sidewall of the patterned anti-reflective layer 110'. Since the dry etching process is an anisotropic etching, the anisotropic etching is performed only in the vertical direction, and the horizontal direction is not etched, so the metal pattern 106' and the patterned second barrier layer 108' And the patterned anti-reflective layer 110' has a pattern that overlaps completely up and down, as shown in FIG. 1C.
請參照第1D圖,形成光阻層112於第一阻擋層104、金屬圖案106’、圖案化的第二阻擋層108’及圖案化的抗反射層110’之上,且光阻層112填入金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’之間所形成的空間。光阻層112可透過例如旋轉塗佈製程(spin coating)、噴塗(spray coating)製程、其他適合的製程或前述之組合形成。 Referring to FIG. 1D, a photoresist layer 112 is formed on the first barrier layer 104, the metal pattern 106', the patterned second barrier layer 108', and the patterned anti-reflective layer 110', and the photoresist layer 112 is filled. A space formed between the metal pattern 106', the patterned second barrier layer 108', and the patterned anti-reflective layer 110'. The photoresist layer 112 can be formed, for example, by a spin coating process, a spray coating process, other suitable processes, or a combination of the foregoing.
請參照第1E圖,在一些實施例中,實施光阻回蝕刻製程,以蝕刻光阻層112,形成間隔物114於金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’的側壁上,且間隔物114也接觸第一阻擋層104的上表面,且覆蓋第一阻擋層104的一部分,在一些實施例中,光阻回蝕刻製程採用乾蝕刻製程,例如,反應性離子蝕刻或電漿蝕刻等,在一些實施例中,間隔物114底部的寬度W1範圍為大約0.1μm至大約0.3μm之間。 Referring to FIG. 1E, in some embodiments, a photoresist etch back process is performed to etch the photoresist layer 112 to form spacers 114 in the metal pattern 106', the patterned second barrier layer 108', and the patterned resist. The sidewall of the reflective layer 110', and the spacer 114 also contacts the upper surface of the first barrier layer 104 and covers a portion of the first barrier layer 104. In some embodiments, the photoresist etchback process employs a dry etch process, such as , reactive ion etching or plasma etching, in some embodiments, the spacers 114 at the bottom of the range of the width W 1 of between about 0.1μm and about 0.3μm.
請參照第1F圖,在一些實施例中,實施濕蝕刻製程以蝕刻第一阻擋層104,此濕蝕刻製程為等向性蝕刻(isotropic etching),並且對於薄膜材料層102具有很高的蝕刻 選擇比。當濕蝕刻製程蝕刻第一阻擋層104時,被間隔物114覆蓋的第一阻擋層104的一部分未被完全蝕刻,故在此濕蝕刻製程結束之後,第一阻擋層104具有突出部P超出金屬圖案106’的側壁106S之外。在一些實施例中,濕蝕刻製程中使用的蝕刻劑例如為以過氧化氫(H2O2)為主的蝕刻劑。前述第一阻擋層104的材料,例如為鈦鎢(TiW)、氮化鈦(TiN)或鈦(Ti)。前述薄膜材料層102可包含薄膜電阻材料,例如矽鉻(SiCr)、鎳鉻(NiCr)、氮化鉭(TaN)或其他適合的薄膜電阻材料。在其他一些實施例中,薄膜材料層102可包含磁阻元件的薄膜材料,例如異向磁阻(anisotropic magnetoresistance,AMR)或巨磁阻(giant magnetoresistance,GMR)等磁阻元件的薄膜材料。上述磁阻元件的薄膜材料例如為鎳鐵(NiFe)、鈷鐵(CoFe)、鈷鐵硼(CoFeB)、銅(Cu)、鉑錳(PtMn)、銥錳(IrMn)或其他適合的薄膜磁阻材料。 Referring to FIG. 1F, in some embodiments, a wet etch process is performed to etch the first barrier layer 104. The wet etch process is isotropic etching and has a high etching option for the thin film material layer 102. ratio. When the first barrier layer 104 is etched by the wet etching process, a portion of the first barrier layer 104 covered by the spacers 114 is not completely etched, so after the wet etching process is finished, the first barrier layer 104 has the protrusions P beyond the metal. The sidewall 106S of the pattern 106' is outside. In some embodiments, the etchant used in the wet etch process is, for example, an etchant based primarily on hydrogen peroxide (H 2 O 2 ). The material of the foregoing first barrier layer 104 is, for example, titanium tungsten (TiW), titanium nitride (TiN) or titanium (Ti). The aforementioned thin film material layer 102 may comprise a thin film resistive material such as ruthenium chromium (SiCr), nickel chromium (NiCr), tantalum nitride (TaN) or other suitable thin film resistive material. In some other embodiments, the thin film material layer 102 may comprise a thin film material of a magnetoresistive element, such as a thin film material of a magnetoresistive element such as anisotropic magnetoresistance (AMR) or giant magnetoresistance (GMR). The thin film material of the above magnetoresistive element is, for example, nickel iron (NiFe), cobalt iron (CoFe), cobalt iron boron (CoFeB), copper (Cu), platinum manganese (PtMn), lanthanum manganese (IrMn) or other suitable thin film magnetic material. Resistance material.
請參照第2圖,第2圖係顯示根據一些實施例之第1F圖中的區域A的放大示意圖,突出部P從金屬圖案106’的側壁106S開始向外突出,突出部P之底部具有寬度W2,且突出部P之頂部具有寬度W3,在一些實施例中,寬度W3的範圍在大於0μm(例如約0.01μm)至約0.2μm之間,寬度W2的範圍在大於0μm(例如約0.01μm)至約0.2μm之間,在一些實施例中,寬度W3可大於寬度W2,在一些實施例中,寬度W3可小於寬度W2,在一些實施例中,寬度W3可等於寬度W2。 Referring to FIG. 2, FIG. 2 is an enlarged schematic view showing a region A in FIG. 1F according to some embodiments, the protrusion P protruding outward from the side wall 106S of the metal pattern 106', and the bottom of the protrusion P has a width. W 2 , and the top of the protrusion P has a width W 3 , and in some embodiments, the width W 3 ranges from greater than 0 μm (eg, from about 0.01 μm) to about 0.2 μm, and the width W 2 ranges from greater than 0 μm ( For example, between about 0.01 μm) and about 0.2 μm, in some embodiments, the width W 3 can be greater than the width W 2 , and in some embodiments, the width W 3 can be less than the width W 2 , in some embodiments, the width W 3 can be equal to the width W 2 .
在本發明的實施例中,由於間隔物114覆蓋金屬圖案106’的側壁106S,在蝕刻第一阻擋層104的過程中,間隔物 114可以保護金屬圖案106’、圖案化的第二阻擋層108’和圖案化的抗反射層110’,並且使得第一阻擋層104不會被過度蝕刻至內縮於金屬圖案106’的側壁106’以內而產生底切(under cut)結構。因此本發明實施例的電接觸結構具有提高電性穩定度及可靠度,避免電接觸結構的電阻增加之好處。 In an embodiment of the present invention, since the spacer 114 covers the sidewall 106S of the metal pattern 106', the spacer 114 may protect the metal pattern 106', the patterned second barrier layer 108 during etching of the first barrier layer 104. And the patterned anti-reflective layer 110', and such that the first barrier layer 104 is not over-etched to within the sidewalls 106' of the metal pattern 106' to create an undercut structure. Therefore, the electrical contact structure of the embodiment of the invention has the advantages of improving electrical stability and reliability, and avoiding an increase in electrical resistance of the electrical contact structure.
請參照第1G圖,接著移除間隔物114,以形成電接觸結構122於薄膜材料層102上,電接觸結構122包括第一阻擋層104、金屬圖案106’、圖案化的第二阻擋層108’及圖案化的抗反射層110’。在一些實施例中,移除間隔物114之後,第一阻擋層104自金屬圖案106’的側壁106S向外突出的突出部P暴露出來,突出部P超出金屬圖案106’的側壁106S之外。 Referring to FIG. 1G, the spacers 114 are then removed to form an electrical contact structure 122 on the thin film material layer 102. The electrical contact structure 122 includes a first barrier layer 104, a metal pattern 106', and a patterned second barrier layer 108. 'and patterned anti-reflective layer 110'. In some embodiments, after the spacer 114 is removed, the first barrier layer 104 is exposed from the protrusion P that protrudes outward from the sidewall 106S of the metal pattern 106', and the protrusion P is beyond the sidewall 106S of the metal pattern 106'.
請參照第1H圖,在一些實施例中,形成護層116於基底100之上,覆蓋薄膜材料層102和電接觸結構122,且護層116接觸薄膜材料層102之上表面、第一阻擋層104的突出部P和金屬圖案106’、圖案化的第二阻擋層108’及圖案化的抗反射層110’的側壁。在一些實施例中,護層116具有開口118位於電接觸結構122的部分金屬圖案106’的正上方,並移除開口118所暴露出的部分圖案化的抗反射層110’,暴露出圖案化的第二阻擋層108’之部分上表面。在一些實施例中,護層116中具有的開口118係作為之後形成電性連接至外部電路的導電部件例如導電凸塊之用。在一些實施例中,護層116可包含以低溫或高溫沉積的氮化矽物或氧化矽物等適合的材料,例如以250℃或400℃沉積的氮化矽(SiN)或二氧化矽(SiO2)。護層116可透過化學氣相沈積(CVD)法、物理氣相沉積(PVD)法、原子層沉積(ALD) 法、電漿輔助化學氣相沈積(PECVD)法、高密度電漿化學氣相沉積(HDPCVD)法、有機金屬化學氣相沉積法(MOCVD)法或脈衝雷射沉積(PLD)等適合的製程方法形成。 Referring to FIG. 1H, in some embodiments, a protective layer 116 is formed over the substrate 100, covering the thin film material layer 102 and the electrical contact structure 122, and the protective layer 116 contacts the upper surface of the thin film material layer 102, the first barrier layer. The protrusion P and the metal pattern 106' of the 104, the patterned second barrier layer 108', and the sidewall of the patterned anti-reflection layer 110'. In some embodiments, the cap layer 116 has an opening 118 directly over a portion of the metal pattern 106' of the electrical contact structure 122 and removes a portion of the patterned anti-reflective layer 110' exposed by the opening 118, exposing the patterning Part of the upper surface of the second barrier layer 108'. In some embodiments, the opening 118 in the sheath 116 is used as a conductive feature, such as a conductive bump, that is then electrically connected to an external circuit. In some embodiments, the sheath 116 may comprise a suitable material such as tantalum nitride or cerium oxide deposited at a low temperature or a high temperature, such as tantalum nitride (SiN) or cerium oxide deposited at 250 ° C or 400 ° C ( SiO 2 ). The protective layer 116 can be subjected to chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), plasma-assisted chemical vapor deposition (PECVD), high-density plasma chemical vapor. A suitable process method such as deposition (HDPCVD), organometallic chemical vapor deposition (MOCVD) or pulsed laser deposition (PLD) is used.
請參照第1I圖,在一些實施例中,接著可形成導電部件120於開口118中且於部分護層116之上,以電性連接電接觸結構122至外部電路,導電部件120可透過化學氣相沈積(CVD)法、物理氣相沉積(PVD)法、原子層沉積(ALD)法、電漿輔助化學氣相沈積(PECVD)法、高密度電漿化學氣相沉積(HDPCVD)法、有機金屬化學氣相沉積法(MOCVD)法或脈衝雷射沉積(PLD)等適合的製程方法沉積後再實施圖案化製程形成。 Referring to FIG. 1I, in some embodiments, conductive member 120 may be formed in opening 118 and over portion of protective layer 116 to electrically connect electrical contact structure 122 to an external circuit. Conductive member 120 may be permeable to chemical gas. Phase deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), plasma-assisted chemical vapor deposition (PECVD), high-density plasma chemical vapor deposition (HDPCVD), organic A patterning process is performed after deposition by a suitable process such as metal chemical vapor deposition (MOCVD) or pulsed laser deposition (PLD).
依據本發明的一些實施例,提供電接觸結構及其形成方法,於形成電接觸結構的方法中,在蝕刻金屬圖案下方的阻擋層的過程中,於電接觸結構的側壁形成間隔物提供保護之用,不僅可避免電接觸結構的側壁在阻擋層蝕刻製程期間被側向蝕刻,亦可避免金屬圖案與下方的阻擋層產生底切結構,藉此提高電接觸結構的電性穩定度及可靠度,避免電接觸結構的電阻增加。另外,形成間隔物不需使用額外的光罩,因此不會增加製造成本。 According to some embodiments of the present invention, an electrical contact structure and a method of forming the same are provided. In the method of forming an electrical contact structure, a spacer is formed on a sidewall of the electrical contact structure to protect the barrier layer under the metal pattern. The utility model can not only prevent the sidewall of the electrical contact structure from being laterally etched during the barrier etching process, but also avoid the undercut structure of the metal pattern and the underlying barrier layer, thereby improving the electrical stability and reliability of the electrical contact structure. To avoid an increase in the electrical resistance of the electrical contact structure. In addition, the formation of the spacer does not require the use of an additional mask, and thus does not increase the manufacturing cost.
前述內文概述了許多實施例的部件,使本發明所屬技術領域中具有通常知識者可以從各個方面更加了解本發明實施例。本發明所屬技術領域中具有通常知識者應可理解,且可輕易地以本發明實施例為基礎來設計或修飾其他製程及結構,並以此達到相同的目的及/或達到與在此介紹的實施例 相同之優點。本發明所屬技術領域中具有通常知識者也應了解這些相等的結構並未背離本發明實施例之發明精神與範圍。在不背離本發明實施例之發明精神與範圍的前提下,可對本發明實施例進行各種改變、置換或修改。 The foregoing is a summary of the various embodiments of the invention, and the embodiments of the invention may be It should be understood by those of ordinary skill in the art that the present invention can be readily adapted or modified, and that other processes and structures can be readily constructed and modified to achieve the same objectives and/or to be described herein. The same advantages of the embodiment. It is to be understood by those of ordinary skill in the art that the invention is Various changes, permutations, or modifications may be made to the embodiments of the present invention without departing from the spirit and scope of the invention.
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