TW201639169A - Oxide semiconductor film and semiconductor device - Google Patents

Abstract

An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

Description

Oxide semiconductor film and semiconductor device [Reference to related application]

This application is based on Japanese Patent Application No. 2010-270557, filed on Dec.

An embodiment of the present invention relates to an oxide semiconductor film and a semiconductor device including the oxide semiconductor film.

In this specification, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics, and the photovoltaic device, the semiconductor circuit, and the electronic device are all semiconductor devices.

Amorphous germanium, polycrystalline germanium, or the like is used to fabricate a crystal formed on a glass substrate or the like, which is common in liquid crystal display devices. It is easy to form a transistor using amorphous germanium over a larger glass substrate. However, transistors made using amorphous germanium have the disadvantage of low field effect mobility. Although a transistor made of polycrystalline germanium has high field-effect mobility, it is uncomfortable. Disadvantages for larger glass substrates.

A technique has been attracting attention in comparison with a transistor made of tantalum having the above disadvantages, in which an oxide semiconductor is used to manufacture a transistor, and is applied to an electronic device or an optical device. For example, Patent Document 1 discloses a technique in which an amorphous oxide containing In, Zn, Ga, Sn, and the like is used as an oxide semiconductor to fabricate a transistor. Further, Patent Document 2 discloses a technique in which a transistor similar to that in Patent Document 1 is manufactured and used as a switching element or the like in a pixel of a display device.

In addition, for the oxide semiconductor used in the transistor, there is the following description: the oxide semiconductor is not sensitive to impurities, and is not problematic when it contains a considerable amount of metal impurities in the film, and can also be used in a large amount such as An alkali metal of sodium and an inexpensive soda lime (see Non-Patent Document 1).

[reference] [Patent Literature]

[Patent Document 1] Japanese Laid-Open Patent Application No. 2006-165529

[Patent Document 2] Japanese Laid-Open Patent Application No. 2006-165528

[Non-patent literature]

[Non-Patent Document 1] Kamiya, Nomura, and Hosono, "Carrier Transport Properties and Electronic Structures of Amorphous Oxide Semiconductors: The present status", KOTAI BUTSURI ( SOLID STATE PHYSICS ), 2009, Vol. 44, pp. 621-633

However, when a defect which is typically an oxygen defect is generated, for example, in an oxide semiconductor film, or during a process of an oxide semiconductor film and a semiconductor device including the oxide semiconductor film, hydrogen which is a source for supplying a carrier enters. In the case of an oxide semiconductor film, the conductivity of the oxide semiconductor film may vary. This phenomenon changes the electrical characteristics of the transistor including the oxide semiconductor film, which causes a decrease in the reliability of the semiconductor device.

When such an oxide semiconductor film is irradiated with visible light or ultraviolet light, in particular, the conductivity of the oxide semiconductor film changes. This phenomenon also changes the electrical characteristics of the transistor including the oxide semiconductor film, which causes a decrease in the reliability of the semiconductor device.

In view of the above problems, it is an object of the invention to provide an oxide semiconductor film having relatively stable conductivity. Further, it is an object of the invention to provide a highly reliable semiconductor device which has stable electrical characteristics by using the oxide semiconductor film.

An embodiment of the invention disclosed herein provides an oxide semiconductor film including a crystalline region, wherein the crystalline region includes wherein the ab face is substantially parallel to a surface of the film and the c-axis is substantially perpendicular to the surface of the film Crystal. That is, the crystal region in the oxide semiconductor film has c-axis alignment. It is noted that the oxide semiconductor film is in a non-single crystal state. In addition, the oxide semiconductor film is not completely in an amorphous state.

An embodiment of the present invention disclosed provides an oxide semiconductor film including a crystalline region. The crystalline region includes crystals in which the ab face is substantially parallel to one surface of the film and the c-axis is substantially perpendicular to the surface of the film. In the electron diffraction intensity measurement, in which the electron beam irradiation is performed from the c-axis direction, in the region where the magnitude of the scattering vector is greater than or equal to 3.3 nm ^-1 and less than or equal to 4.1 nm ^-1 in the half-height of the peak and Where the magnitude of the scattering vector is greater than or equal to 5.5 nm ^-1 and less than or equal to 7.1 nm ^-1 , the half-height width of the peak is greater than or equal to 0.2 nm ^-1 .

In, wherein the size of the scattering vector is greater than or equal to 3.3nm ^-1 and less than or equal to 4.1nm ^-1 region of the high half peak width is preferably equal to or greater than 0.4nm ^-1 and less than or equal to said 0.7nm ^-1 and in which the size of the scattering vector is greater than or equal to 5.5nm ^-1 and less than or equal to 7.1nm ^-1 region of the FWHM of the peak is preferably greater than or equal to ^-1 and less than or equal to 0.45 nm 1.4nm ^-1. Further, the spin density of one of the peaks in the region where the g value is in the vicinity of 1.93 in the ESR measurement is preferably less than 1.3 × 10 ¹⁸ (spin / cm ³ ). In addition, the oxide semiconductor film may include a plurality of crystal regions, and the a-axis or b-axis directions of the crystals in the plurality of crystal regions may be different from each other. Further, the oxide semiconductor film preferably has a structure represented by InGaO ₃ (ZnO) _m (m unnatural number).

In addition, another embodiment of the present invention provides a semiconductor device including a first insulating film, an oxide semiconductor film including a crystalline region disposed over the first insulating film, and being disposed in contact with the oxide semiconductor film a source electrode and a drain electrode; a second insulating film disposed over the oxide semiconductor film; and a gate electrode disposed above the second insulating film. The crystalline region includes crystals in which the a-b face is substantially parallel to one surface of the film and the c-axis is substantially perpendicular to the surface of the film.

In addition, another embodiment of the present invention provides a semiconductor device including a gate electrode; a first device disposed above the gate electrode a rim film; an oxide semiconductor film including a crystallization region disposed above the first insulating film; a source electrode and a drain electrode disposed to contact the oxide semiconductor film; and a second portion disposed over the oxide semiconductor film Insulating film. The crystalline region includes crystals in which the a-b face is substantially parallel to one surface of the film and the c-axis is substantially perpendicular to the surface of the film.

In the above, preferably, a first metal oxide film is provided between the first insulating film and the oxide semiconductor film, the first metal oxide film includes gallium oxide, zinc oxide, and a crystalline region, and the crystalline region includes A crystal in which the ab face is substantially parallel to one surface of the film and the c-axis is substantially perpendicular to the surface of the film. Further, in the first metal oxide film, the amount of the substance of zinc oxide is preferably 25% of the amount of the substance of gallium oxide. Further, preferably, a second metal oxide film is provided between the oxide semiconductor film and the second insulating film, the second metal oxide film includes gallium oxide, zinc oxide, and a crystalline region, and the crystalline region includes ab thereof A crystal having a face substantially parallel to a surface of the film and having a c-axis substantially perpendicular to the surface of the film. Further, in the second metal oxide film, the amount of the substance of zinc oxide is preferably 25% of the amount of the substance of gallium oxide.

In this specification and the like, "face A and plane B are substantially parallel" means "the angle between the normal of plane A and the normal of plane B is greater than or equal to 0 and less than or equal to 20". In addition, in this specification and the like, "the line C is substantially perpendicular to the face B" means that "the angle between the line C and the normal of the face B is greater than or equal to 0 and less than or equal to 20".

An oxide comprising a crystalline region in which the a-b plane is substantially parallel to a surface of one of the oxide semiconductor films and the c-axis is substantially perpendicular to the surface of the film. The semiconductor film has stable electrical conductivity and is more electrically stable with respect to illumination such as visible light, ultraviolet light, and the like. By using such an oxide semiconductor for a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

11‧‧‧Location

12‧‧‧In atom

13‧‧‧Ga atom

14‧‧‧Ga or Zn atom

15‧‧‧O atom

21‧‧‧ Crystallized area

22‧‧‧ Crystallized area

31‧‧‧Processing room

33‧‧‧ evacuated unit

35‧‧‧ gas supply unit

37‧‧‧Power supply unit

40‧‧‧Substrate support

41‧‧‧ Target

43‧‧‧ ions

45‧‧‧Atomic

47‧‧‧Atomic

51‧‧‧Substrate

53‧‧‧Basic insulation film

55‧‧‧Oxide semiconductor film

55a‧‧‧ seed crystal

55b‧‧‧Oxide semiconductor film

56‧‧‧Oxide semiconductor film

56a‧‧‧ seed crystal

56b‧‧‧Oxide semiconductor film

59‧‧‧Oxide semiconductor film

61a‧‧‧Source electrode

61b‧‧‧汲electrode

63‧‧‧Gate insulation film

65‧‧‧gate electrode

69‧‧‧Insulation film

120‧‧‧Optoelectronics

130‧‧‧Optoelectronics

140‧‧‧Optoelectronics

150‧‧‧Optoelectronics

160‧‧‧Optoelectronics

170‧‧‧Optoelectronics

180‧‧‧Optoelectronics

351‧‧‧Substrate

353‧‧‧Basic insulation film

359‧‧‧Oxide semiconductor film

361a‧‧‧Source electrode

361b‧‧‧汲electrode

363‧‧‧gate insulating film

365‧‧‧gate electrode

369‧‧‧Insulation film

371‧‧‧Metal oxide film

373‧‧‧Metal oxide film

500‧‧‧Substrate

501‧‧‧Parts

502‧‧‧Scan line driver circuit

503‧‧‧Scan line driver circuit

504‧‧‧Signal line driver circuit

510‧‧‧ capacitor wiring

512‧‧‧gate wiring

513‧‧‧gate wiring

514‧‧‧Source or drain electrode layer

516‧‧‧Optoelectronics

517‧‧‧Optoelectronics

518‧‧‧First liquid crystal element

519‧‧‧Second liquid crystal element

520‧‧ ‧ pixels

521‧‧‧Switching transistor

522‧‧‧Driver crystal

523‧‧‧ capacitor

524‧‧‧Lighting elements

525‧‧‧ signal line

526‧‧‧ scan line

527‧‧‧Power cord

528‧‧‧Common electrode

1001‧‧‧ Subject

1002‧‧‧shell

1003a‧‧‧Display Department

1003b‧‧‧Display Department

1004‧‧‧ keyboard keys

1021‧‧‧ Subject

1023‧‧‧Display Department

1022‧‧‧Fixed Department

1024‧‧‧ operation button

1025‧‧‧External memory slot

1030‧‧‧Shell

1031‧‧‧Shell

1032‧‧‧ display panel

1033‧‧‧Speakers

1034‧‧‧Microphone

1035‧‧‧ operation keys

1036‧‧‧ indicating device

1037‧‧‧ camera lens

1038‧‧‧External connection terminal

1040‧‧‧ solar cells

1041‧‧‧External memory slot

1050‧‧‧TV installation

1051‧‧‧Chassis

1052‧‧‧Storage Media Recording and Reproduction Department

1053‧‧‧Display Department

1054‧‧‧External connection terminal

1055‧‧‧ bracket

1056‧‧‧External memory

Figure 1 is a cross-sectional TEM image of an embodiment of the present invention.

2 is a plan view and a cross-sectional view showing a crystal structure according to an embodiment of the present invention.

Figure 3 is a graph showing the results of the electron density of the calculated state.

Fig. 4 is a band diagram of an amorphous oxide semiconductor including oxygen defects.

FIGS. 5A and 5B each illustrate a recombination model of an amorphous oxide semiconductor including oxygen defects.

6A to 6E are cross-sectional views showing the process of a semiconductor device in accordance with an embodiment of the present invention.

7A and 7B are schematic views showing a sputtering apparatus.

Figures 8A and 8B are schematic views showing the crystal structure of the seed crystal.

9A and 9B are cross-sectional views showing the process of a semiconductor device in accordance with an embodiment of the present invention.

10A through 10C are cross-sectional views each illustrating a semiconductor device in accordance with an embodiment of the present invention.

11A through 11C are cross-sectional views each illustrating a semiconductor device in accordance with an embodiment of the present invention.

Fig. 12 is a view showing a tape structure of a semiconductor device in accordance with an embodiment of the present invention.

Figures 13A through 13E are cross-sectional TEM images in accordance with an example of the present invention.

Figures 14A through 14E illustrate planar TEM images in accordance with an example of the present invention.

15A to 15E are diagrams showing an electron diffraction pattern according to an example of the present invention.

16A to 16E are plan TEM images and electron diffraction patterns according to an example of the present invention.

Figure 17 is a graph showing the electron diffraction intensity according to an example of the present invention.

Figure 18 is a graph showing the full width at half maximum of the first peak in the electron diffraction intensity according to an example of the present invention.

Figure 19 is a graph showing the full width at half maximum of the second peak in the electron diffraction intensity according to an example of the present invention.

Figure 20 is a graph showing an XRD diffraction spectrum according to an example of the present invention.

21A and 21B each show an XRD diffraction spectrum according to an example of the present invention.

Figure 22 is a graph showing the results of ESR measurement according to an example of the present invention.

Figure 23 is a diagram showing a model for oxygen deficiency in quantum chemical calculations according to an example of the present invention.

Figure 24 is a graph showing the results of low temperature PL measurement according to an example of the present invention.

Figure 25 is a diagram showing negative bias stress light according to an example of the present invention. A graph of the results of the measurement of degradation.

26A and 26B are diagrams each showing photocurrents measured by a photo response defect evaluation method according to an example of the present invention.

Figure 27 shows the results of TDS analysis according to an example of the present invention.

Figures 28A and 28B each show the results of SIMS analysis in accordance with an example of the present invention.

29A to 29C are diagrams showing a block diagram and an equivalent circuit diagram according to an embodiment of the present invention.

30A to 30D are external views each showing an electronic device according to an embodiment of the present invention.

Figure 31 is a cross-sectional TEM image according to an example of the present invention.

Embodiments and examples of the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the invention is not to be construed as being limited by the scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the following examples and examples. It is noted that in the structures of the present invention described hereinafter, the same components or components having similar functions are denoted by the same reference numerals in the different drawings, and the description thereof will not be repeated.

It is noted that in each of the figures described in this specification, the size, layer thickness, or area of each component is enlarged in some cases for clarity. Therefore, the embodiments and examples of the present invention are not limited to such ratios forever.

It is noted that terms such as "first", "second", and "third" in this specification are used to avoid confusion between components, and these terms are not numerically limiting components. Therefore, for example, the term "first" may be replaced by the terms "second", "third", or the like as appropriate.

(Example 1)

In this embodiment, an oxide semiconductor film will be described as an embodiment of the present invention with reference to Figs. 1, 2, 3, 4, 5A and 5B.

The oxide semiconductor film according to this embodiment includes a crystalline region. The crystalline region includes crystals in which the a-b face is substantially parallel to one surface of the film and the c-axis is substantially perpendicular to the surface of the film. That is, the crystalline regions included in the oxide semiconductor film have c-axis alignment. When the cross section of the crystalline region was observed, atoms arranged in a layered manner and stacked from the substrate toward the surface of the film were observed, and the c-axis of the crystal was substantially perpendicular to the surface. Since the oxide semiconductor film includes a crystal region having c-axis alignment as described above, the oxide semiconductor film is also referred to as a c-axis aligned crystalline oxide semiconductor (CAAC-OS) film.

Fig. 1 is a cross-sectional TEM image of an oxide semiconductor film including a crystalline region which is actually manufactured. A crystalline region 21 is observed in the oxide semiconductor film, wherein, as indicated by the arrows in Fig. 1, the atoms are arranged in a layered manner, that is, they have c-axis alignment.

A crystalline region 22 is also observed in the oxide semiconductor film. The crystalline region 21 and the crystalline region 22 are surrounded by the amorphous region in a three-dimensional manner. Although plural The crystal region exists in the oxide semiconductor film, and no grain boundary is observed in Fig. 1. No grain boundaries were observed in the entire oxide semiconductor film.

Although the crystal region 21 and the crystal region 22 are separated from each other by the amorphous region disposed therebetween in the first drawing, it seems that the atoms arranged in a layered manner in the crystal region 21 are stacked at the same interval as in the crystal region 22. And continuously forming a layer beyond the amorphous region.

In addition, although the size of the crystalline region 21 and the crystalline region 22 is about 3 nm to 7 nm in FIG. 1, the size of the crystalline region formed in the oxide semiconductor film in this embodiment may be about 1 nm or more and less than or Equal to 1000nm. For example, as shown in Fig. 31, the size of the crystalline region of the oxide semiconductor film may be greater than or equal to several tens of nanometers.

Further, it is preferred that when the crystal region is observed from a direction perpendicular to the surface of the film, the atoms are arranged in a hexagonal crystal lattice. With this structure, the crystal region can easily have a hexagonal crystal structure containing triple symmetry. It is noted that in this specification, a hexagonal crystal structure is included in the hexagonal crystal series. Alternatively, the hexagonal crystal structure is included in a triangular and hexagonal crystal system.

The oxide semiconductor film according to this embodiment may include a plurality of crystal regions, and the a-axis or b-axis directions in the plurality of crystal regions are different from each other. That is, the plurality of crystal regions in the oxide semiconductor film of this embodiment are crystallized along the c-axis, but alignment along the a-b plane does not necessarily occur. However, it is preferred that the regions having different a-axis or b-axis directions do not contact each other to avoid formation of grain boundaries at the interface in which the regions contact each other. Therefore, the oxide semiconductor film preferably includes an amorphous region surrounding the crystal region in a three-dimensional manner. also That is, the oxide semiconductor film including the crystalline region is in a non-single-crystal state and is not completely in an amorphous state.

As the oxide semiconductor film, a four-component metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide; a metal oxide such as In-Ga-Zn-O-based, In-Sn- can be used. a metal oxide based on Zn-O, a metal oxide based on In-Al-ZO, a metal oxide based on Sn-Ga-Zn-O, a metal oxide based on Al-Ga-Zn-O, Or a three-component metal oxide of a metal oxide based on Sn-Al-Zn-O; a two-component metal oxide such as an In-Zn-O-based metal oxide or a Sn-Zn-O-based metal oxide Object; or the like.

The most important In-Ga-Zn-O-based metal oxide has in many cases, for example, greater than or equal to 2 eV; preferably greater than or equal to 2.5 eV; more preferably greater than or equal to 3 eV as wide a gap; When a cell is made of a metal oxide of In-Ga-Zn-O to form a transistor, the transistor can have a sufficiently high resistance in a closed state and its off state current can be small enough. The crystalline region in the In-Ga-Zn-O-based metal oxide mainly has a crystal structure which is not a hexagonal wurtzite structure in many cases, and may have, for example, a YbFe ₂ O ₄ structure, Yb ₂ Fe ₃ O ₇ structure, the above modified structure, or the like (M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In ₂ O ₃ -Ga ₂ ZnO ₄ -ZnO System at 1350 ° C", J Solid State Chem ., 1991, Vol. 93, pp. 298-315). It is noted that the layer containing Yb is indicated below as layer A and the layer containing Fe is indicated below as layer B. The YbFe ₂ O ₄ structure is a repeating structure of ABB|ABB|ABB. As an example of the deformed structure of the YbFe ₂ O ₄ structure, a repeating structure of ABBB|ABBB can be proposed. Further, the structure of Yb ₂ Fe ₃ O ₇ is a repeating structure of ABB|AB|ABB|AB. As an example of the deformed structure of Yb ₂ Fe ₃ O ₇ , a repeating structure of ABBB|ABB|ABBB|ABB|ABBB|ABB| can be proposed. In the case where the amount of ZnO is large in the metal oxide of the In-Ga-Zn-O group, it may have a wurtzite crystal structure.

A typical example of a metal oxide based on In-Ga-Zn-O can be represented by InGaO ₃ (ZnO) _m (m>0). Here, as an example of the in-Ga-Zn-O-based metal oxide, a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:1 [mole ratio] can be proposed. a metal oxide, a metal oxide having a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [molar ratio], or having In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1 A metal oxide having a composition ratio of 1:4 [mole ratio]. Preferably m is an unnatural number. It is noted that the above composition is attributed to the crystal structure and is merely an example. As an example of the In-Ga-Zn-O-based metal oxide, metal oxidation having a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=2:1:8 [mole ratio] can also be proposed. a metal oxide having a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=3:1:4 [molar ratio] or having In ₂ O ₃ :Ga ₂ O ₃ :ZnO=2:1 A metal oxide having a composition ratio of 6 [mole ratio].

Fig. 2 is a view showing the crystal structure of In ₂ Ga ₂ ZnO ₇ as a structure of a crystal region included in the oxide semiconductor film, which has the above structure. The crystal structure of In ₂ Ga ₂ ZnO ₇ in FIG. 2 is shown by a plan view parallel to the a-axis and the b-axis and a cross-sectional view parallel to the c-axis. The c-axis is perpendicular to the a-axis and the b-axis, and the angle between the a-axis and the b-axis is 120°. With respect to In ₂ Ga ₂ ZnO ₇ in FIG. ₂ , a place 11 occupied by In atoms is illustrated in a plan view, and In atoms 12, Ga atoms 13, Ga or Zn atoms 14, and O atoms are shown in a cross-sectional view. 15.

As shown in the cross-sectional view of FIG. ₂ , In ₂ Ga ₂ ZnO ₇ has a Ga oxide layer in which an In oxide layer is alternately stacked in the c-axis direction and two oxidations between the In oxide layers. The layer (ie, a Ga oxide layer and a Zn oxide layer). Further, as shown in the plan view of Fig. ₂ , In ₂ Ga ₂ ZnO ₇ has a hexagonal crystal structure containing triple symmetry.

The oxide semiconductor film including the crystalline region described in this embodiment has a certain degree of crystallinity. In addition, the oxide semiconductor film including the crystalline region is not in the single crystal state. The oxide semiconductor film including the crystalline region has a desired crystallinity compared to a completely amorphous oxide semiconductor film, and reduces defects such as oxygen defects or bonds such as hydrogen bonds to dangling bonds or the like. In particular, the oxygen of the metal atom bonded to the crystal has a higher bonding force than the oxygen of the metal atom bonded to the amorphous portion, and becomes less reactive with impurities such as hydrogen, thereby reducing the occurrence of defects. .

For example, an oxide insulating layer formed of a metal oxide based on In-Ga-Zn-O and including a crystalline region has a certain crystallinity such that in the measurement of electron diffraction intensity, the electron beam is performed from the c-axis direction Irradiation, in the region where the magnitude of the scattering vector is greater than or equal to 3.3 nm ^-1 and less than or equal to 4.1 nm ^-1 in the half-height width of the peak and in which the magnitude of the scattering vector is greater than or equal to 5.5 nm ^-1 and less than or equal to 7.1 The half-height and width of the peaks in the region of nm ^-1 are each greater than or equal to 0.2 nm ^-1 . Preferably, in which the scattering vector size equal to or greater than 3.3nm ^-1 and less than or equal to 4.1nm ^-1 region of higher or wider than 0.4nm ^-1 and equal to or less at half maximum of 0.7nm ^-1, and in which the size of the scattering vector is greater than or equal to 5.5nm ^-1 and less than or equal to 7.1nm ^-1 region of high peak half width of more than or equal to ^-1 and less than or equal to 0.45 nm 1.4nm ^-1.

In the oxide semiconductor film including the crystalline region described in this embodiment, it is preferred to reduce the defect of oxygen deficiency typical in the film as described above. A defect which is typically an oxygen defect acts as a source for supplying a carrier in the oxide semiconductor film, which may change the conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including the crystal region in which such defects are reduced has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like.

By performing electron spin resonance (ESR) measurement on an oxide semiconductor film including a crystalline region, the number of lone electrons in the film can be measured, and the amount of oxygen defects can be estimated. For example, in an oxide semiconductor film formed of a metal oxide based on In-Ga-Zn-O and including a crystalline region, a peak in a region in which the g value is in the vicinity of 1.93 in the ESR measurement The spin density is less than 1.3 × 10 ¹⁸ (spin / cm ³ ); preferably lower than or equal to 5 × 10 ¹⁷ (spin / cm ³ ); more preferably lower than or equal to 5 × 10 ¹⁶ (spin / cm ³ More preferably, many are lower than or equal to 1 × 10 ¹⁶ (spin / cm ³ ).

As described above, it is preferable to reduce hydrogen or a hydrogen-containing impurity (such as water, a hydroxyl group, or a hydride) in the oxide semiconductor film including the crystalline region, and the hydrogen concentration in the oxide semiconductor film including the crystalline region is preferably low. Or equal to 1 × 10 ¹⁹ atoms / cm ³ . Hydrogen bonded to a dangling bond or the like, or a hydrogen-containing impurity such as water, a hydroxyl group, or a hydride acts as a source for supplying a carrier in the oxide semiconductor film, which may change the oxide semiconductor film Electrical conductivity. In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to the metal atom to become water, and forms a defect in a lattice from which oxygen is detached (or a portion from which oxygen is detached). Therefore, the oxide semiconductor film including the crystal region in which such defects are reduced has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like.

It is noted that impurities such as alkali metals are preferably reduced in the oxide semiconductor film including the crystalline region. For example, in the oxide semiconductor film including the crystalline region, the concentration of lithium is lower than or equal to 5 × 10 ¹⁵ cm ^-3 , preferably lower than or equal to 1 × 10 ¹⁵ cm ^-3 ; the concentration of sodium is lower than or lower than or Equal to 5 × 10 ¹⁶ cm ^-3 , preferably lower than or equal to 1 × 10 ¹⁶ cm ^-3 , more preferably lower than or equal to 1 × 10 ¹⁵ cm ^-3 ; and potassium concentration lower than or equal to 5 × 10 ¹⁵ cm ^-3 , preferably lower than or equal to 1 × 10 ¹⁵ cm ^-3 .

The alkali metal and the alkaline earth metal are unfavorable impurities of the oxide semiconductor film including the crystalline region, and are preferably contained as little as possible. In particular, when an oxide semiconductor film is used as the transistor, sodium which is one of the alkali metals is diffused into the insulating film contacting the oxide semiconductor film including the crystalline region and thus the carrier can be supplied to the oxide semiconductor film. In addition, sodium cuts the bond between the metal and oxygen or enters the bond in the oxide semiconductor film including the crystalline region. As a result, the transistor characteristics are degraded (for example, the transistor becomes normally turned on (the threshold voltage is shifted to the negative side) or the mobility is decreased). In addition, this also leads to variations in characteristics.

This problem is particularly remarkable in the case where the concentration of hydrogen in the oxide semiconductor film including the crystalline region is very low. Therefore, it is highly desirable to set the concentration of the alkali metal in the case where the hydrogen concentration of the oxide semiconductor film including the crystalline region is lower than or equal to 5 × 10 ¹⁹ cm ^-3 and particularly lower than or equal to 5 × 10 ¹⁸ cm ^-3 . In the above range. Accordingly, it is preferable to extremely reduce impurities in the oxide semiconductor film including the crystalline region, the concentration of the alkali metal is lower than or equal to 5 × 10 ¹⁶ cm ^-3 and the concentration of hydrogen is lower than or equal to 5 × 10 ¹⁹ cm ^{- 3} .

As described above, the oxide semiconductor film including the crystalline region has a desired crystallinity as compared with the completely amorphous oxide semiconductor film, and reduces defects which are typically oxygen defects or bonds to dangling bonds or the like such as hydrogen. Impurities. A defect which is typically an oxygen defect, a hydrogen bonded to a dangling bond or the like, or the like serves as a source for supplying a carrier in the oxide semiconductor film, which may change the conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including the crystal region in which such defects are reduced has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like. By using such an oxide semiconductor film including a crystalline region as a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

Next, it will be described that the first principle calculation based on the density functional theory is used to examine how the conductivity of the oxide semiconductor film is affected by the oxygen deficiency in the oxide semiconductor film. Note that for the first principle calculation, the software calculated by the first principle produced by Accelrys Software Inc., CASTEP. In addition, GGA-PBE is used for functions, and super soft types are used for pseudopotentials.

In this calculation, as a model of the oxide semiconductor film, a model in which one oxygen atom is detached from the amorphous InGaZnO ₄ and a void (oxygen defect) is left in that region is used. The model includes 12 In atoms, 12 Ga atoms, 12 Zn atoms, and 47 O atoms. InGaZnO ₄ having such a structure is subjected to structural optimization at the atomic position, and the electron density of the state is calculated. At this time, the cutoff energy was set at 300 eV.

The result of calculating the electron density of the state is shown in FIG. In Fig. 3, the vertical axis indicates the density of the state (DOS) [state / eV] and the horizontal axis indicates the energy [eV]. The Fermi energy is at the beginning of the energy and can be seen on the horizontal axis. As shown in Fig. 3, the top of the valence band of InGaZnO ₄ is -0.74 eV and the bottom of the conduction band is 0.56 eV. The value of the band gap is small compared to 3.15 eV which is the experimental value of the band gap of InGaZnO ₄ . However, the band gap is known to be smaller than the experimental value in the first principle calculation based on density functional theory, and the value of the band gap does not indicate that this calculation is inappropriate.

Figure 3 shows that amorphous InGaZnO ₄ including oxygen defects has a deep order in the band gap. That is, in the band structure of the amorphous oxide semiconductor including the oxygen defect, the trap level due to the oxygen defect exists as the deep trap level in the band gap.

Fig. 4 shows a band diagram of an amorphous oxide semiconductor including oxygen defects based on the above considerations. In Fig. 4, the vertical axis represents energy, the horizontal axis represents DOS, and the energy gap from the energy level Ev at the top of the valence band (VB) to the energy level Ec at the bottom of the conduction band (CB) is set to 3.15. eV, which is based on experimental values.

In the band diagram of Fig. 4, the tail state due to the amorphous portion in the oxide semiconductor exists in the vicinity of the bottom of the conduction band. Further, it is assumed that the hydrogen donor energy level in the amorphous oxide semiconductor due to bonding to a dangling bond or the like is present in the shallow energy level, and the bottom of the self-conducting band is about 0.1 eV deep. The trap level due to oxygen deficiency in an amorphous oxide semiconductor exists in The deep energy level, the bottom of the self-guide band is about 1.8eV deep. It is noted that the energy level of the trap level due to oxygen deficiency will be described in detail in an example to be described later.

FIGS. 5A and 5B each illustrate electrons and electricity in the band structure in the case of having an energy level (in particular, a deep trap level due to oxygen deficiency) of the amorphous oxide semiconductor in the above-described band gap. The recombination model of the hole.

Figure 5A depicts a recombination model in the presence of sufficient holes in the valence band and sufficient electrons to be present in the conduction band. When the amorphous oxide semiconductor film is irradiated with light to generate a sufficient electron-hole pair, the band structure of the oxide semiconductor has a recombination model as shown in Fig. 5A. In this recombination model, holes are generated not only at the top of the valence band but also at the deep trap level due to oxygen defects.

In the recombination model of Fig. 5A, it is assumed that two recombination processes occur in parallel. One of the recombination processes is a tape-to-band recombination process in which electrons in the conduction band and re-emergence in the valence band directly recombine each other. The other of the recombination processes is a recombination process in which electrons in the conduction band recombine with holes in the trap level due to oxygen deficiency. The recombination of the band-to-band recombination ratio with the trap level due to oxygen deficiency occurs more frequently; when the number of holes in the valence band becomes small enough, the recombination ratio of the band recombination ratio and the trap level is more End early. Therefore, the recombination shown in FIG. 5A is only a recombination process in which electrons in the conduction band recombine with holes in the trap level due to oxygen defects, and moves to the picture shown in FIG. 5B. Recombined model.

Sufficient light illumination can be performed on the oxide semiconductor such that there can be sufficient holes in the valence band and sufficient electrons can be present in the conduction band; After the light irradiation is stopped, the electrons and the holes are recombined with each other as shown in Fig. 5A. The current flowing through the oxide semiconductor at that time is also referred to as a photocurrent. The time required for the decay of the photocurrent at this time (relaxation time) is shorter than the relaxation time of the photocurrent in the recombination model shown in Fig. 5B. The above details will be referred to an example explained later.

The recombination model shown in Fig. 5B is performed in the recombination model shown in Fig. 5A and is obtained after the number of holes in the valence band is sufficiently reduced. Since in the recombination model shown in Fig. 5B, almost only the recombination process with the trap level due to oxygen deficiency occurs, the number of electrons in the conduction band is larger than that shown in Fig. 5A. The middle is reduced more slowly. Of course, the electrons in the conduction band contribute to the conduction in the oxide semiconductor film during the recombination process. Therefore, in the recombination model shown in Fig. 5B, the relaxation time of the photocurrent is longer than that in the recombination model shown in Fig. 5A in which the band-to-band recombination mainly occurs. Note that the above details can be referred to an example explained later.

As described above, the amorphous oxide semiconductor having the trap level due to the oxygen defect has two recombination models of the electron-hole pair in the band structure, and the relaxation time of the photocurrent can also be divided into two types. The slow relaxation time of the photocurrent in the recombination model shown in Fig. 5B when a negative bias is applied to the gate electrode in the crystal in which the oxide semiconductor film is used or the like A fixed charge may be formed at the oxide semiconductor film or at the interface between the oxide semiconductor film and the adjacent film. Accordingly, it is assumed that the oxygen deficiency in the oxide semiconductor film adversely affects the conductivity of the oxide semiconductor film.

However, the oxide semiconductor film including the crystalline region according to an embodiment of the present invention has a desirable crystallinity compared to a completely amorphous oxide semiconductor film, and reduces defects which are typically oxygen defects. Therefore, the oxide semiconductor film including the crystalline region according to an embodiment of the present invention has stable electrical characteristics and is more electrically stable with respect to irradiation of visible light, ultraviolet light, and the like. By using such an oxide semiconductor film including a crystalline region as a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

The structures or the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Example 2)

In this embodiment, reference will be made to FIGS. 6A to 6E, 7A and 7B, 8A and 8B, 9A and 9B, and 10A to 10C, in which the use of crystallization as described in Embodiment 1 is described. A transistor of a region of an oxide semiconductor film and a method of manufacturing the same. 6A to 6E are cross-sectional views showing the process of the top gate transistor 120 of an embodiment of the structure of the semiconductor device.

First, before forming an oxide semiconductor film including a crystalline region, a base insulating film 53 is preferably formed over the substrate 51 as shown in Fig. 6A.

The substrate 51 should have heat resistance high enough to withstand the subsequent heat treatment. When a glass substrate is used as the substrate 51, a glass substrate having a strain point higher than or equal to 730 ° C is preferably used. As the glass substrate, for example, a substrate formed of a glass material such as aluminosilicate glass, aluminoborosilicate glass, or bismuth borate glass is used. It is noted that a glass substrate containing BaO and B ₂ O ₃ is preferably used, wherein the amount of BaO is larger than the amount of B ₂ O ₃ . In the case where the substrate 51 is a mother glass, the substrate may have any of the following sizes: first generation (320 mm x 400 mm), second generation (400 mm x 500 mm), third generation (550 mm x 650 mm), fourth generation (680 mm). ×880mm or 730mm×920mm), fifth generation (1000mm×1200mm or 1100mm×1250mm), sixth generation (1500mm×1800mm), seventh generation (1900mm×2200mm), eighth generation (2160mm×2460mm), ninth Generation (2400mm × 2800mm or 2450mm × 3050mm), the tenth generation (2950mm × 3400mm), and the like. When the processing temperature is high and the processing time is long, the mother glass will shrink significantly. Therefore, in the case where the mother glass is used to perform mass production, the preferred heating temperature in the process is lower than or equal to 600 ° C, preferably lower than or equal to 450 ° C.

Instead of the glass substrate, a substrate formed of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. Alternatively, crystallized glass or the like can be used. Alternatively, a substrate obtained by forming an insulating film over a surface of a semiconductor substrate such as a germanium wafer or a surface of a conductive substrate made of a metal material may be used.

It is preferable to form the base insulating film 53 by using an oxide insulating film from which a part of the contained oxygen is released by heat treatment. The oxide insulating film which releases a part of oxygen contained therein by heat treatment is preferably an oxide insulating film containing a proportion of oxygen exceeding a stoichiometric ratio. By using an oxide insulating film that releases a part of oxygen contained therein by heat treatment as a basis The insulating film 53 can diffuse oxygen into the oxide semiconductor film by heat treatment in a subsequent step. Typical examples of the oxide insulating film that emits a part of oxygen contained therein by heat treatment include cerium oxide, cerium oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide, cerium oxide, cerium oxide, and the like. membrane.

The thickness of the base insulating film 53 is greater than or equal to 50 nm, preferably greater than or equal to 200 nm and less than or equal to 500 nm. By the thick base insulating film 53, the amount of oxygen released from the base insulating film 53 can be increased, and the defect of the interface between the base insulating film 53 and the subsequently formed oxide semiconductor film can be reduced.

The base insulating film 53 is formed by a sputtering method, a CVD method, or the like. The oxygen-containing oxide insulating film from which a part of oxygen is released by heat treatment can be easily formed by sputtering. When a portion of the oxygen-containing oxide insulating film is released by heat treatment by sputtering, the oxygen content in the deposited gas is preferably large, and a mixed gas of oxygen, oxygen, and a rare gas can be used. , or the like. Typically, the concentration of oxygen in the deposition gas is preferably greater than or equal to 6% and less than or equal to 100%.

The base insulating film 53 is not formed by using an oxide insulating film which releases a part of oxygen contained therein by heat treatment, and may be formed using tantalum nitride, hafnium oxynitride, aluminum nitride, or the like. A nitride insulating film is formed. In addition, the base insulating film 53 may have a layered structure including an oxide insulating film and a nitride insulating film; in this case, the oxide insulating film is preferably disposed over the nitride insulating film. By using a nitride insulating film as the base insulating film 53, when using a compound containing, for example, an alkali metal When a glass substrate is used, an alkaline earth metal or the like can be prevented from entering the oxide semiconductor film. Since an alkali metal such as lithium, sodium, or potassium is an unfavorable impurity for an oxide semiconductor, the content of such an alkali metal in the oxide semiconductor film is preferably small. A nitride insulating film can be formed by a CVD method, a sputtering method, or the like.

Next, as shown in FIG. 6B, over the base insulating film 53, an oxide semiconductor film 55 including a crystalline region is formed by sputtering using a sputtering apparatus to be greater than or equal to 30 nm and less than or equal to 50 μm. thickness.

Here, the processing chamber of the sputtering apparatus will be described with reference to FIG. 7A. The evacuation unit 33 and the gas supply unit 35 are connected to the process chamber 31. In the processing chamber 31, a substrate support 40 and a target 41 are provided. The target 41 is connected to the power supply device 37.

The processor 31 is connected to the ground (GND). When the leak rate of the process chamber 31 is lower than or equal to 1 × 10 ^-10 Pa ‧ m ³ /sec, impurities can be reduced from entering the film to be formed by the sputtering method.

In order to reduce the leakage rate, it is necessary to reduce internal leakage and external leakage. External leakage refers to the inflow of gas from the outside of the vacuum system through small holes, sealing defects, or the like. Internal leaks are caused by leaks through the separation of the vacuum system (such as valves) or by gases released from external components. Measures are taken from both the external leakage and the internal leakage so that the leakage rate is lower than or equal to 1 × 10 ^-10 Pa ‧ m ³ /sec.

In order to reduce external leakage, it is preferred to seal the opening/closing portion of the processing chamber with a metal gasket. For metal gaskets, it is preferred to use iron fluoride, aluminum oxide, or a metal material covered by chromium oxide. Metal gaskets achieve higher adhesion than O-rings and reduce external leakage. Further, by using a metal material covered with iron fluoride, aluminum oxide, chromium oxide, or the like in a passivated state, the hydrogen-containing gas released from the metal gasket is suppressed, so that internal leakage can also be reduced.

As an element forming the inner wall of the processing chamber 31, aluminum, chromium, titanium, zirconium, nickel, or vanadium is used to release a small amount of hydrogen-containing gas therefrom. Alloy materials containing iron, chromium, nickel, or the like covered with the above materials may also be used. Alloy materials containing iron, chromium, nickel, or the like are very hard, heat resistant, and suitable for processing. Here, when the surface of the element is reduced by buffing or the like to reduce the surface area, the released gas can be reduced. Alternatively, the above elements of the sputtering apparatus may be covered by iron fluoride, aluminum oxide, chromium oxide, or the like in a passivated state.

It is preferable to form the element provided as the inner wall of the processing chamber 31 only as much as possible with a metal material. For example, in the case where an ornamental window formed of quartz or the like is provided, it is preferable to cover the surface with a thin layer of iron fluoride, aluminum oxide, chromium oxide, or the like in a passivated state to suppress the released gas.

Further, it is preferable to provide a refiner for sputtering gas directly in front of the processing chamber 31. At this time, the length of the tube between the refiner and the processing chamber is less than or equal to 5 m, preferably less than or equal to 1 m. When the length of the tube is less than or equal to 5 m or less than or equal to 1 m, the influence of the gas released from the tube can be reduced due to the reduction in the length of the tube.

The tube from which the sputtering gas flows from the cylinder to the processing chamber 31 is preferably a metal tube having iron fluoride, aluminum oxide, and oxidation in a passivated state. Chromium, or the like is covered. With the above tube, the amount of hydrogen-containing gas released is small, and the amount of impurities entering the deposition gas can be reduced as compared with, for example, a SUS316L-EP tube. In addition, a high performance ultra-dense metal gasket joint (UPG) is preferably used as the joint of the pipe. Further, a structure in which all of the material of the tube is a metal material is preferable because the influence of the released gas and the external leakage can be reduced as compared with the structure in which the resin or the like is used.

Evacuation of the processing chamber 31 is preferably performed by a suitable combination of a rough vacuum pump (such as a dry pump) and a high vacuum pump (such as a sputter ion pump, a turbo molecular pump, and a cryopump). Turbomolecular pumps have outstanding capabilities for removing large molecules, but have poor ability to remove hydrogen or water. Therefore, a combination of a cryopump having a high ability to remove water and a sputter ion pump having a high ability to remove hydrogen is effective.

The adsorbate on the inner wall of the processing chamber 31 does not affect the pressure in the processing chamber because it is adsorbed on the inner wall, but the adsorbate causes the release of gas during evacuation of the processing chamber. Therefore, although the leak rate is not related to the evacuation rate, it is important to perform the evacuation system in advance with the use of the adsorbate in the process chamber as much as possible and with the use of a pump having a high evacuation capability. It is noted that the processing chamber may experience baking that promotes the detachment of the adsorbate. By baking, the rate of detachment of the adsorbate can be increased by about ten times. The baking can be performed at a temperature higher than or equal to 100 ° C and lower than or equal to 450 ° C. At this time, when the adsorbent is removed while the inert gas is introduced, the detachment rate of water or the like which is difficult to separate by evacuation alone can be further increased.

The evacuation unit 33 can remove impurities from the process chamber 31 and control the pressure in the process chamber 31. A trapping vacuum pump is preferably used as the evacuation unit 33. example For example, a cryopump, an ion pump, or a titanium sublimation pump is preferably used. By using the above-described trap vacuum pump, the amount of hydrogen contained in the oxide semiconductor film can be reduced.

It is noted that hydrogen contained in the oxide semiconductor film may be, in some cases, a hydrogen molecule, water, a hydroxyl group, or a hydride, in addition to a hydrogen atom.

The gas supply unit 35 is used to supply a gas, thereby sputtering the target into the processing chamber 31. The gas supply unit 35 includes a gas filled cylinder, a pressure regulating valve, a check valve, a mass flow controller, and the like. Providing a refiner for the gas supply unit 35 can reduce impurities contained in the gas introduced into the processing chamber 31. As the gas for the sputtering target, a rare gas such as helium, neon, argon, xenon, or krypton is used. Alternatively, a mixed gas of oxygen and one of the above rare gases may be used.

As the power supply device 37, an RF power supply device, an AC power supply device, a DC power supply device, or the like can be suitably used. When a magnet is placed inside or outside the support of the target supporting the target (not shown), the high-density plasma can be confined around the target, so that the deposition rate can be improved and the plasma damage on the substrate can be reduced. . This method is called magnetron sputtering. Further, when the magnet can be rotated in the magnetron sputtering method, the non-uniformity of the magnetic field can be suppressed, so that the use efficiency of the target can be increased and the variation of the film quality in the plane of the substrate can be reduced.

The substrate support 40 is connected to GND. The substrate support 40 is provided with a heater. As the heater, means for heating the object by heat conduction or heat radiation from a heating element such as a resistive heating element can be used.

As the target 41, a zinc-containing metal oxide target is preferably used. As a typical example of the target 41, a four-component metal oxide such as an In-Sn-Ga-Zn-O-based metal oxide can be used; such as In-Ga-Zn-O Metal oxide as a base, metal oxide based on In-Sn-Zn-O, metal oxide based on In-Al-Zn-O, metal oxide based on Sn-Ga-Zn-O, Al a three-component metal oxide of a metal oxide based on -Ga-Zn-O or a metal oxide based on Sn-Al-Zn-O; a metal oxide such as In-Zn-O or Sn-ZO A two-component metal oxide of a metal oxide based.

One example of the target 41 is a metal oxide target containing In, Ga, and Zn in a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:1 [molar ratio]. Alternatively, a target having a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [molar ratio] having In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1: 1: 4 composition ratio of [molar ratio] of the target, or an _{in 2 O 3: Ga 2 O} 3: ZnO = 2: 1: 8 the composition ratio [molar ratio] targets.

The distance (T-S distance) between the target 41 and the substrate 51 is preferably set so that the element having a low atomic weight preferentially reaches the distance of the base insulating film 53 above the substrate 51.

As shown in Fig. 7A, the substrate 51 on which the base insulating film 53 is formed is placed on the substrate support 40 in the processing chamber 31 of the sputtering apparatus. Next, gas for sputtering the target 41 is introduced from the gas supply unit 35 into the processing chamber 31. The purity of the target 41 is higher than or equal to 99.9%, preferably higher than or equal to 99.99%. Next, power is supplied to the power supply device 37 connected to the target 41. As a result, the target 41 is sputtered by using the ions 43 and the electrons introduced into the sputtering gas in the processing chamber 31 from the gas supply unit 35.

Here, the distance between the target 41 and the substrate 51 is set such that atoms having a low atomic weight preferentially reach the base insulating film 53 on the substrate 51, whereby among the atoms contained in the target 41, the atomic weight is light. The atom 45 can be preferentially moved to the substrate side than the atom 47 having a heavier atomic weight, as shown in Fig. 7B.

In the target 41, zinc has a lighter atomic weight than indium or the like. Therefore, zinc is preferentially deposited on the base insulating film 53. Further, the surrounding environment for forming the film contains oxygen, and the substrate support 40 is provided with a heater for heating the substrate and the deposited film during deposition. Therefore, the zinc deposited on the base insulating film 53 is oxidized, so that the seed crystal 55a having a hexagonal crystal structure containing zinc is formed, typically containing a seed crystal of zinc oxide having a hexagonal crystal structure. In the case where the target 41 includes an atom such as aluminum or the like having a lighter atomic weight than zinc, aluminum or the like having an atomic weight lighter than zinc, and zinc, is preferentially deposited on the base insulating film 53.

The seed crystal 55a includes a crystal of zinc containing a hexagonal wurtzite crystal structure having a hexagonal lattice bond in the ab plane, wherein the ab surface is substantially parallel to the surface of the film, and the c-axis and the surface of the film are substantially Vertical on top. Referring to Figures 8A and 8B, a crystal containing zinc having a hexagonal crystal structure having a hexagonal lattice bond in the ab plane is described, and wherein the ab surface is substantially parallel to the surface of the film, and the c-axis and the surface of the film Essentially vertical. As a typical example of a crystal containing zinc having a hexagonal crystal structure, zinc oxide is explained. Black spheres represent zinc and white spheres represent oxygen. 8A is a schematic view of zinc oxide having a hexagonal crystal structure in the a-b plane, and FIG. 8B is a schematic view of zinc oxide having a hexagonal crystal structure, wherein The longitudinal direction of the figure is the c-axis direction. As shown in Fig. 8A, in the planar top surface of the a-b plane, zinc and oxygen are bonded to form a hexagonal shape. As shown in Fig. 8B, stacked layers in each of which zinc and oxygen are bonded to form a hexagonal lattice, and the c-axis direction is perpendicular to the a-b plane. The seed crystal 55a includes at least one atomic layer in the c-axis direction, including a bond having a hexagonal lattice in the a-b plane.

A sputtering gas is used to continuously sputter the target 41, thereby depositing atoms included in the target onto the seed crystal 55a. At this time, since the seed crystal 55a is used as the core to cause crystal growth, the oxide semiconductor film 55b including the crystal region having the hexagonal crystal structure can be formed on the seed crystal 55a. It is noted that since the substrate 51 is heated by the heater of the substrate support 40, crystal growth of atoms deposited on the surface is performed using the seed crystal 55a as a core while oxidizing atoms.

In the formation of the oxide semiconductor film 55b, the seed crystal 55a is used as a nucleus at the same time as the oxidized atom, resulting in an atom having a heavy atom amount on the surface of the target 41 and a light atomic amount sputtered after the formation of the seed crystal 55a. Crystal growth of atoms. Therefore, like the seed crystal 55a, the oxide semiconductor film 55b has a crystal region containing a hexagonal crystal structure including a bond having a hexagonal lattice in the ab plane, and wherein the ab face is substantially parallel to the surface of the film, and c The shaft is substantially perpendicular to the surface of the membrane. That is, the oxide semiconductor film 55 including the seed crystal 55a and the oxide semiconductor film 55b has a crystal region containing a hexagonal crystal structure including a hexagonal lattice in the ab plane parallel to the surface of the base insulating film 53. Key, and wherein the c-axis is substantially perpendicular to the planar surface of the film. That is, included in the oxide semiconductor The crystalline region having a hexagonal crystal structure in the bulk film 55 has c-axis alignment. Note that in FIG. 6B, in order to explain the stacking of the oxide semiconductor film, the interface between the seed crystal 55a and the oxide semiconductor film 55b is indicated by a broken line; however, the interface is not actually clear and is merely for ease of understanding. .

The temperature at which the substrate is heated by the heater is higher than or equal to 200 ° C and lower than or equal to 400 ° C, preferably higher than or equal to 250 ° C and lower than or equal to 350 ° C. When the substrate is heated while heating the substrate at a temperature higher than or equal to 200 ° C and lower than or equal to 400 ° C, preferably higher than or equal to 250 ° C and lower than or equal to 350 ° C, heat treatment may be performed at the same time as deposition, so that formation may be performed An oxide semiconductor film including a region having a desired degree of crystallinity. It is noted that the temperature of the surface in which the film is formed in the sputtering is higher than or equal to 250 ° C and lower than or equal to the upper limit of the heat treatment of the substrate.

As the sputtering gas, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen is suitably used. As the sputtering gas, a high-purity gas from which impurities such as hydrogen, water, a hydroxyl group, and a hydride are removed is preferably used.

When the pressure of the processing chamber including the substrate support 40 and the target 41 is lower than or equal to 0.4 Pa, impurities such as an alkali metal or hydrogen can be reduced to enter the surface of the oxide semiconductor film including the crystalline region or the inside thereof.

Further, when the leak rate of the processing chamber of the sputtering apparatus is set to be lower than or equal to 1 × 10 ^-10 Pa ‧ m ³ /sec, impurities such as alkali metal, hydrogen, water, hydroxyl group, or hydride can be reduced from entering In an oxide semiconductor film including a crystalline region formed by a sputtering method. In addition, the use of a trapping vacuum pump as an evacuation system can reduce backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides from the evacuation system.

When the purity of the target 41 is set to be higher than or equal to 99.99%, impurities such as an alkali metal, hydrogen, water, a hydroxyl group, or a hydride can be reduced from entering the oxide semiconductor film including the crystalline region. By using the above target, the concentration of lithium in the oxide semiconductor film 55 may be lower than or equal to 5 × 10 ¹⁵ atoms/cm ³ , preferably lower than or equal to 1 × 10 ¹⁵ atoms/cm ³ ; The concentration may be lower than or equal to 5×10 ¹⁶ atoms/cm ³ , preferably lower than or equal to 1×10 ¹⁶ atoms/cm ³ , more preferably lower than or equal to 1×10 ¹⁵ atoms/cm ³ ; and the concentration of potassium may be It is lower than or equal to 5 × 10 ¹⁵ atoms/cm ³ , preferably lower than or equal to 1 × 10 ¹⁵ atoms/cm ³ .

In the above method of forming an oxide semiconductor film, in a sputtering step, zinc having a light atomic weight is preferentially deposited on an oxide insulating film by using a difference in atomic weight of atoms contained in the target to form a species The crystals are then deposited on the seed crystals with a heavy atomic amount of indium or the like while causing crystal growth. Therefore, the oxide semiconductor film including the crystalline region can be formed without performing the plural steps.

In the above method of forming the oxide semiconductor film 55, the seed crystal 55a and the oxide semiconductor film 55b are simultaneously formed and crystallized by a sputtering method; however, the oxide semiconductor film according to this embodiment is not necessarily formed in this manner. . For example, the formation and crystallization of the seed crystal and the oxide semiconductor film can be performed in the separation step.

The method of performing formation and crystallization of the seed crystal and the oxide semiconductor film in the separating step will be described below with reference to FIGS. 9A and 9B. In this specification, a method of forming an oxide semiconductor film including a crystalline region is sometimes referred to as "Two-step method." The oxide semiconductor film including the crystalline region shown in the cross-sectional TEM image in Fig. 1 is formed by a two-step method.

First, a first oxide semiconductor film having a thickness of greater than or equal to 1 nm and less than or equal to 10 nm is formed over the base insulating film 53. The first oxide semiconductor film is formed by sputtering, and the substrate temperature in the deposition by sputtering is preferably set to be higher than or equal to 200 ° C and lower than or equal to 400 ° C. Other film formation conditions are the same as those of the above-described method of forming an oxide semiconductor film.

Next, the surrounding environment in the room in which the substrate is disposed is set to perform the first heat treatment in the case of the surrounding environment of nitrogen or dry air. The temperature of the first heat treatment is higher than or equal to 400 ° C and lower than or equal to 750 ° C. The first oxide semiconductor film is crystallized by the first heat treatment to form a seed crystal 56a (see FIG. 9A).

Although depending on the temperature of the first heat treatment, the first heat treatment causes crystallization from the surface of the film and the crystal grows from the surface of the film toward the inside of the film, so that c-axis aligned crystals are obtained. By the first heat treatment, a large amount of zinc and oxygen are collected on the surface of the film, and one or more layers of a single-layer graphite type two-dimensional crystal including zinc and oxygen and having a hexagonal shape on the upper plane are formed on the outermost surface; The layers on the outermost surface are grown in the thickness direction to form a stack of multiple layers. By increasing the temperature of the heat treatment, crystal growth proceeds from the surface to the inside and further from the inside to the bottom.

Further, as the base insulating film 53, the base insulating film 53 is used by using an oxide insulating film from which a part of oxygen contained therein is released by heat treatment. Oxygen can be diffused into or near the interface of the base insulating film 53 and the seed crystal 56a by the first heat treatment (±5 nm from the interface), whereby oxygen deficiency in the seed crystal 56a can be reduced.

Next, a second oxide semiconductor film having a thickness of more than 10 nm is formed over the seed crystal 56a. The second oxide semiconductor film is formed by sputtering, and the substrate temperature in the deposition by sputtering is preferably set to be higher than or equal to 200 ° C and lower than or equal to 400 ° C. Other film formation conditions are the same as those of the above-described method of forming an oxide semiconductor film.

Next, the surrounding environment in the room in which the substrate is disposed is set to perform the second heat treatment in the case of the surrounding environment of nitrogen or dry air. The temperature of the second heat treatment is higher than or equal to 400 ° C and lower than or equal to 750 ° C. The second oxide semiconductor film is crystallized by the second heat treatment to form an oxide semiconductor film 56b (see FIG. 9B). The second heat treatment is performed in a nitrogen surrounding environment, an oxygen surrounding environment, or a mixed environment of nitrogen and oxygen, thereby increasing the density of the oxide semiconductor film 56b and reducing the number of defects therein. The crystal growth is performed in the thickness direction by using the seed crystal 56a as a core by the second heat treatment, that is, crystal growth proceeds from the bottom to the inside; thus, the oxide semiconductor film 56b including the crystal region is formed. In this manner, the oxide semiconductor film 56 including the seed crystal 56a and the oxide semiconductor film 56b is formed. In Fig. 9B, the interface between the seed crystal 56a and the oxide semiconductor film 56b is indicated by a broken line, and the seed crystal 56a and the oxide semiconductor film 56b are illustrated as a stack of oxide insulating layers; however, the interface is actually It is not clear and is drawn for easy understanding.

It is preferable to carry out the step from the formation of the base insulating film 53 to the second heat treatment without being exposed to the air. Preferably controlled to contain little hydrogen and moisture The step of forming from the base insulating film 53 to the second heat treatment is performed in the surrounding environment (for example, an inert surrounding environment, a reduced pressure surrounding environment, or a dry air surrounding environment); in terms of moisture, for example, it is preferably used to have a lower temperature Or a dry nitrogen atmosphere equal to -40 ° C and preferably less than or equal to -50 ° C dew point.

In the above method of forming an oxide semiconductor film, a method of preferentially depositing an atom having a small atomic weight on an oxide insulating film can form a region including a desired crystallinity even at a low substrate temperature in deposition. An oxide semiconductor film. It is noted that the oxide semiconductor film 56 formed by using the above two-step method has substantially the same crystallinity as the oxide semiconductor film 55 formed by a method in which atoms having a small atomic weight are preferentially deposited on the oxide insulating film. The oxide semiconductor film 56 also has stable conductivity. Therefore, a highly reliable semiconductor device having stable electrical characteristics can be provided by the oxide semiconductor film formed by either of the above two methods. The process of using the transistor 120 of the oxide semiconductor film 55 is described for the following procedure; however, the oxide semiconductor film 56 can also be used.

Through the above procedure, the oxide semiconductor film 55 including the seed crystal 55a and the oxide semiconductor film 55b can be formed over the base insulating film 53. Next, heat treatment is preferably performed on the substrate 51, so that hydrogen is released from the oxide semiconductor film 55 and a part of oxygen contained in the base insulating film 53 is diffused into the oxide semiconductor film 55 and the base insulating film 53 and oxide are In the vicinity of the interface between the semiconductor films 55.

The heat treatment temperature is preferably such that hydrogen can be released from the oxide semiconductor film 55 and a part of oxygen contained in the base insulating film 53 is released and diffused to The temperature in the oxide semiconductor film 55. The temperature is typically higher than or equal to 150 ° C and lower than the strain point of the substrate 51, preferably higher than or equal to 250 ° C and lower than or equal to 450 ° C. When the heat treatment temperature is higher than the temperature at which the oxide semiconductor film including the crystalline region is formed, a large amount of oxygen contained in the base insulating film 53 can be released.

The heat treatment is preferably carried out in an ambient atmosphere of an inert gas containing little hydrogen and moisture, an environment surrounding the oxygen, a surrounding environment of nitrogen, or a mixed environment of nitrogen and oxygen. As the inert gas surrounding environment, a surrounding environment of a rare gas such as helium, neon, argon, xenon or xenon is preferable. In addition, the heat treatment has a heating time longer than or equal to 1 minute and shorter than or equal to 24 hours.

This heat treatment allows hydrogen to be released from the oxide semiconductor film 55 and allows a part of the oxygen contained in the base insulating film 53 to be diffused into the oxide semiconductor film 55 and in the vicinity of the interface between the base insulating film 53 and the oxide semiconductor film 55. . Through this procedure, oxygen defects in the oxide semiconductor film 55 can be reduced. Therefore, an oxide semiconductor film including a crystalline region in which hydrogen concentration and oxygen deficiency are reduced can be formed.

Next, a mask is formed over the oxide semiconductor film 55, and then the oxide semiconductor film 55 is selectively etched using a mask, so that the oxide semiconductor film 59 as shown in FIG. 6C is formed. After that, remove the mask.

The mask used in etching the oxide semiconductor film 55 can be suitably formed by a photolithography step, an inkjet method, a printing method, or the like. The etching for the oxide semiconductor film 55 can suitably employ wet etching or dry etching.

Next, as shown in FIG. 6D, a contact oxide semiconductor is formed The source electrode 61a and the drain electrode 61b of the film 59.

Metal elements selected from the group consisting of aluminum, chromium, copper, ruthenium, titanium, molybdenum, tungsten, manganese, and zirconium; alloys containing any of these metal elements as a component; alloys containing combinations of these metal elements; or the like The source electrode 61a and the drain electrode 61b. Alternatively, an alloy film or a nitride film containing aluminum and one or more metal elements selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, niobium, and tantalum. The source electrode 61a and the drain electrode 61b may be a single layer or a stack having two or more layers. For example, a single layer structure of a ruthenium-containing aluminum film, a two-layer structure in which a copper film is stacked over a Cu-Mg-Al alloy film, a two-layer structure in which a titanium film is stacked over an aluminum film, in which a titanium film is stacked, may be used. a two-layer structure over titanium nitride, a two-layer structure in which a tungsten film is stacked over titanium nitride, a two-layer structure in which a tungsten film is stacked on tantalum nitride, or a titanium film, an aluminum film, and a titanium film A three-layer structure of sequential stacking.

For example, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium oxide added thereto The light-transmitting conductive material of tin forms the source electrode 61a and the drain electrode 61b. It is also possible to have a layered structure formed using the above-mentioned light-transmitting conductive material and the above-described metal elements.

After the conductive film is formed by a sputtering method, a CVD method, an evaporation method, or the like, a mask is formed over the conductive film and the conductive film is etched, thereby forming the source electrode 61a and the drain electrode 61b. The mask over the conductive film can be suitably formed by a printing method, an inkjet method, or a photolithography method. Alternatively, the source electrode 61a and the drain electrode 61b may be directly formed by a printing method or an inkjet method.

At this time, a conductive film is formed over the oxide semiconductor film 59 and the base insulating film 53, and is etched into a predetermined pattern to form the source electrode 61a and the drain electrode 61b.

Alternatively, the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b may be formed in such a manner that a conductive film is formed over the oxide semiconductor film 55, and the oxide semiconductor film 55 and the conductive film are etched by the multi-tone mask. . In the above, an uneven mask is formed, the oxide semiconductor film 55 and the conductive film are etched using the uneven mask, the uneven mask is separated by ashing, and the mask obtained by the separation is used to select The conductive film is etched, whereby the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b can be formed. With this procedure, the number of masks and the number of steps in the lithography process can be reduced.

Next, a gate insulating film 63 is formed over the oxide semiconductor film 59, the source electrode 61a, and the drain electrode 61b.

The gate insulating film 63 may be formed of a single layer of hafnium oxide, hafnium oxynitride, hafnium nitride, hafnium oxynitride, aluminum oxide, aluminum oxynitride, or gallium oxide or a stacked layer including one or more of the above. A portion of the gate insulating film 63 which preferably contacts the oxide semiconductor film 59 contains oxygen. It is more preferable to form the gate insulating film 63 by heating an oxide insulating film from which oxygen is released, just like the basic insulating film 53. By using a hafnium oxide film as the oxide insulating film, oxygen can be diffused into the oxide semiconductor film 59 in the heat treatment in the subsequent step, whereby the characteristics of the transistor 120 can be desirable.

When using high-k materials (such as HfSiO _x , adding nitrogen to HfSi _x O _y N _z ), adding nitrogen to it, HfAl _x O _y N _z , oxidation When the gate insulating film 63 is formed by yttrium or ytterbium oxide, the gate leakage current can be reduced. Further, a layered structure may be used in which a high-k material and one or more of yttrium oxide, yttrium oxynitride, tantalum nitride, lanthanum oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide are stacked. The thickness of the gate insulating film 63 is preferably greater than or equal to 1 nm and less than or equal to 300 nm, and more preferably greater than or equal to 5 nm and less than or equal to 50 nm. When the thickness of the gate insulating film 63 is greater than or equal to 5 nm, the gate leakage current can be reduced.

Before the formation of the gate insulating film 63, the surface of the oxide semiconductor film 59 may be exposed to a plasma of an oxidizing gas such as oxygen, ozone, or dinitrogen monoxide to be oxidized, thereby reducing oxygen deficiency.

Next, a gate electrode 65 is formed in a region above the gate insulating film 63 and overlying the oxide semiconductor film 59.

Metal elements selected from the group consisting of aluminum, chromium, copper, ruthenium, titanium, molybdenum, tungsten, manganese, and zirconium; alloys containing any of these metal elements as a component; alloys containing combinations of these metal elements; or the like Gate electrode 65. Alternatively, an alloy film or a nitride film containing aluminum and one or more metal elements selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, niobium, and tantalum. Further, the gate electrode 65 may be a single layer or a stack having two or more layers. For example, a single layer structure of a ruthenium-containing aluminum film, a two-layer structure in which a titanium film is stacked over an aluminum film, a two-layer structure in which a titanium film is stacked over titanium nitride, in which a tungsten film is stacked over titanium nitride, may be used. The two-layer structure, a two-layer structure in which a tungsten film is stacked on tantalum nitride, or a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in this order.

It is also possible to use indium tin oxide, indium oxide containing tungsten oxide, and oxidation. A gate electrode 65 is formed of indium zinc oxide of tungsten, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or a light-transmitting conductive material to which indium tin oxide is added. Further, a compound conductor obtained by sputtering using a metal oxide based on In-Ga-Zn-O as a target in a nitrogen-containing surrounding environment can be used. It may also have a layered structure formed using the above-described light-transmitting conductive material and the above-described metal elements.

Further, an insulating film 69 as a protective film may be formed over the gate electrode 65 (see FIG. 6E). Further, after the contact holes are formed in the gate insulating film 63 and the insulating film 69, wirings may be formed to be connected to the source electrode 61a and the drain electrode 61b.

The insulating film 69 can be formed with an insulating film similar to the gate insulating film 63 as appropriate. When a tantalum nitride film is formed as the insulating film 69 by sputtering, the entry of moisture and alkali metal from the outside can be prevented, and thus the amount of impurities contained in the oxide semiconductor film 59 can be reduced.

It is noted that after the gate insulating film 63 is formed or the insulating film 69 is formed, heat treatment can be performed. This heat treatment allows hydrogen to be released from the oxide semiconductor film 59 and a part of oxygen contained in the base insulating film 53, the gate insulating film 63, or the insulating film 69 to diffuse into the oxide semiconductor film 59, and the base insulating film 53 and In the vicinity of the interface between the oxide semiconductor film 59 and in the vicinity of the interface between the gate insulating film 63 and the oxide semiconductor film 59. By this procedure, oxygen defects in the oxide semiconductor film 59 can be reduced, and the interface between the oxide semiconductor film 59 and the base insulating film 53 or between the oxide semiconductor film 59 and the gate insulating film 63 can be reduced. Defects in the interface. Therefore, an oxide half in which hydrogen concentration and oxygen deficiency are reduced can be formed. Conductor film 59. A highly purified i-type (essential) or substantially i-type oxide semiconductor film is formed as described above, whereby a transistor having excellent characteristics can be realized.

Through the above steps, the transistor 120 can be manufactured in which a channel region is formed in the oxide semiconductor film including the crystalline region. As shown in FIG. 6E, the transistor 120 includes a base insulating film 53 disposed over the substrate 51, an oxide semiconductor film 59 disposed over the base insulating film 53, and an upper surface and a side disposed to contact the oxide semiconductor film 59. The source electrode 61a and the drain electrode 61b of the surface, the gate insulating film 63 provided over the oxide semiconductor film 59, the gate electrode 65 provided over the gate insulating film 63 to overlap the oxide semiconductor film 59, and the gate electrode 65 An insulating film 69 over the gate electrode 65.

The oxide semiconductor film including the crystalline region in the transistor 120 has a desired crystallinity compared to a completely amorphous oxide semiconductor film, and reduces defects or bonding to a dangling bond or the like which is typically oxygen deficiency. Such as impurities in hydrogen. A defect such as an oxygen defect, a bond to a dangling bond or the like, or the like acts as a source for supplying a carrier in the oxide semiconductor film, which may change the conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including the crystal region in which such defects are reduced has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like. By using such an oxide semiconductor film including a crystalline region as a transistor, a highly reliable semiconductor device having stable electrical characteristics can be provided.

The semiconductor device according to the present invention is not limited to the ones shown in Figs. 6A to 6E The transistor 120 is shown. For example, a structure such as the transistor 130 shown in Fig. 10A can be employed. The transistor 130 includes a base insulating film 53 disposed above the substrate 51, a source electrode 61a and a drain electrode 61b disposed above the base insulating film 53, and is disposed to contact the upper surface and the side of the source electrode 61a and the drain electrode 61b. The surface oxide semiconductor film 59, the gate insulating film 63 disposed over the oxide semiconductor film 59, the gate electrode 65 disposed over the gate insulating film 63 to overlap the oxide semiconductor film 59, and the gate electrode An insulating film 69 above 65. That is, the transistor 130 differs from the transistor 120 in that the oxide semiconductor film 59 is disposed to contact the upper surface and the side surface of the source electrode 61a and the drain electrode 61b.

In addition, a structure such as the transistor 140 shown in Fig. 10B can be employed. The transistor 140 includes a base insulating film 53 disposed above the substrate 51, a gate electrode 65 disposed over the base insulating film 53, a gate insulating film 63 disposed over the gate electrode 65, and disposed over the gate insulating film 63. The oxide semiconductor film 59 is provided with a source electrode 61a and a drain electrode 61b which are in contact with the upper surface and the side surface of the oxide semiconductor film 59, and an insulating film 69 which is provided above the oxide semiconductor film 59. That is, the transistor 140 differs from the transistor 120 in that it has a bottom gate structure in which the gate electrode 65 and the gate insulating film 63 are disposed under the oxide semiconductor film 59.

In addition, a structure such as the transistor 150 shown in Fig. 10C can be employed. The transistor 150 includes a base insulating film 53 disposed above the substrate 51, a gate electrode 65 disposed over the base insulating film 53, a gate insulating film 63 disposed over the gate electrode 65, and a gate insulating film 63. The upper source electrode 61a and the drain electrode 61b, the oxide semiconductor film 59 provided to contact the upper surface and the side surface of the source electrode 61a and the drain electrode 61b, and the insulating film 69 provided over the oxide semiconductor film 59 . That is, the transistor 150 differs from the transistor 130 in that it has a bottom gate structure in which the gate electrode 65 and the gate insulating film 63 are disposed under the oxide semiconductor film 59.

The structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Example 3)

In this embodiment, a transistor having a structure different from that of the transistor including the oxide semiconductor film including the crystalline region described in the previous embodiment will be described with reference to FIGS. 11A to 11C and FIG.

The transistor 160 having the top gate structure shown in FIG. 11A includes a base insulating film 353 disposed over the substrate 351, a metal oxide film 371 disposed over the base insulating film 353, and disposed over the metal oxide film 371. The oxide semiconductor film 359, the source electrode 361a and the drain electrode 361b disposed to contact the upper surface and the side surface of the oxide semiconductor film 359, the metal oxide film 373 disposed over the oxide semiconductor film 359, and the metal A gate insulating film 363 over the oxide film 373, a gate electrode 365 disposed over the gate insulating film 363 to overlap the oxide semiconductor film 359, and an insulating film 369 disposed over the gate electrode 365.

That is, the transistor 160 is the same as the transistor 120 described in the previous embodiment. The difference is that the metal oxide film 371 is disposed between the base insulating film 353 and the oxide semiconductor film 359, and the metal oxide film 373 is disposed between the oxide semiconductor film 359 and the gate insulating film 363. It is noted that other structures of the transistor 160 are similar to those of the transistor 120 described in the previous embodiments. In other words, the details of the substrate 351 can be referred to the description about the substrate 51; the details of the base insulating film 353 can be referred to the description about the base insulating film 53; the details of the oxide semiconductor film 359 can be referred to the description about the oxide semiconductor film 59; For details of the electrode 361a and the drain electrode 361b, reference may be made to the description about the source electrode 61a and the gate electrode 61b; the details of the gate insulating film 363 may be referred to the description about the gate insulating film 63; and the details of the gate electrode 365 may be referred to. Reference is made to the description of the gate electrode 65.

It is desirable to use a metal oxide containing a component similar to the oxide semiconductor film 359 as the metal oxide film 371 and the metal oxide film 373. Here, the "component similar to the oxide semiconductor film" means one or more atoms selected from the constituent metal atoms of the oxide semiconductor film. It is particularly preferable to use a component atom which may have a crystal structure similar to that of the oxide semiconductor film 359. In this manner, the metal oxide film 371 and the metal oxide film 373 are preferably formed using a metal oxide containing a component similar to the oxide semiconductor film 359 to have a crystal region similar to the oxide semiconductor film 359. Preferably, the crystalline region comprises crystals wherein the a-b face is substantially parallel to one of the surfaces of the film and the c-axis is substantially perpendicular to the surface of the film. That is, the crystal region preferably has a c-axis alignment, and when the crystal region is viewed from a direction perpendicular to the surface of the film, it is preferred that the atoms are disposed in the hexagonal crystal lattice.

Providing a metal oxide film including a crystalline region as described above 371, a crystalline region having continuous c-axis alignment can be formed at the interface between the metal oxide film 371 and the oxide semiconductor film 359 and its vicinity. According to this, defects such as oxygen defects or bonds such as dangling bonds or the like, such as hydrogen, can be reduced at the interface between the metal oxide film 371 and the oxide semiconductor film 359 and in the vicinity thereof. Further, in the interface between the metal oxide film 373 and the oxide semiconductor film 359 and in the vicinity thereof, a crystal region having continuous c-axis alignment can be formed.

As described above, a defect such as an oxygen defect, a bond to a dangling bond or the like, or the like acts as a source for supplying a carrier in the oxide semiconductor film, which may change the conductivity of the oxide semiconductor film. . Therefore, the above-described defects, hydrogen, or the like are reduced at the interface between the oxide semiconductor film 359 and the metal oxide film 371, at the interface between the oxide semiconductor film 359 and the metal oxide film 373, and in the vicinity thereof. Therefore, the oxide semiconductor film 359 has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like. By using the oxide semiconductor film 359, the metal oxide film 371, and the metal oxide film 373 as the transistor, it is possible to provide a highly reliable semiconductor device having stable electrical characteristics.

In the case where a metal oxide such as In—Ga—Zn—O is used as the oxide semiconductor film 359, the metal oxide film 371 and the metal oxide film 373 can be formed using a gallium oxide-containing metal oxide. In particular, a metal oxide based on Ga-Zn-O obtained by adding zinc oxide to gallium oxide. In the Ga-Zn-O-based metal oxide, the quality of the zinc oxide is less than 50%, preferably less than 25%, based on the gallium oxide. Note that metal oxides based on Ga-Zn-O-based metal oxides are in contact with In-Ga-Zn-O In the case of the object, the energy barrier is about 0.5 eV on the conduction band side and about 0.7 eV on the valence band side.

The metal oxide film 371 and the metal oxide film 373 each have a larger energy gap than the oxide semiconductor film 359 because the oxide semiconductor film 359 is used as an active layer. In addition, between the metal oxide film 371 and the oxide semiconductor film 359 or between the metal oxide film 373 and the oxide semiconductor film 359, it is necessary to form at least the carrier cannot flow out of the oxide at room temperature (20 ° C). The energy barrier of the semiconductor film 359. For example, the difference in energy between the bottom of the conduction band of the metal oxide film 371 or the metal oxide film 373 and the bottom of the conduction band of the oxide semiconductor film 359, or the top of the valence band of the metal oxide film 371 or the metal oxide film 373 and oxidation The energy difference between the tops of the valence bands of the semiconductor film 359 is preferably greater than or equal to 0.5 eV, more preferably greater than or equal to 0.7 eV. In addition, the energy difference is preferably less than or equal to 1.5 eV.

Further, the preferred metal oxide film 371 has a smaller energy gap than the base insulating film 353, and the metal oxide film 373 has a smaller energy gap than the gate insulating film 363.

Fig. 12 is a band diagram (schematic diagram) of the transistor 160, that is, a gate insulating film 363, a metal oxide film 373, an oxide semiconductor film 359, a metal oxide film 371, and a base insulating film 353 are gated. The energy band diagram of the structure disposed on the side of the electrode 365. Fig. 12 shows each of ruthenium oxide (having a band gap Eg of 8 eV to 9 eV) as the gate insulating film 363 and the base insulating film 353; using Ga-Zn-O as a base metal oxide (having a band of 4.4 eV) Gap Eg) as a metal oxide film; and using In-Ga-Zn-O based metal oxide (having a band gap Eg of 3.2 eV) In the case of the oxide semiconductor film, it is assumed that the gate insulating film 363, the metal oxide film 373, the oxide semiconductor film 359, the metal oxide film 371, and the base insulating film 353 disposed from the gate electrode 365 side are all essential. The ideal state. The difference in energy between the vacuum level and the bottom of the conduction band in yttrium oxide is 0.95 eV; the energy difference between the vacuum level and the bottom of the conduction band in the In-Ga-Zn-O based metal oxide is 4.1 eV And the energy difference between the vacuum level and the bottom of the conduction band in the In-Ga-Zn-O-based metal oxide is 4.6 eV.

As shown in Fig. 12, on the gate electrode (channel side) of the oxide semiconductor film 359, there is an energy barrier of about 0.5 eV and an about 0.7 eV at the interface between the oxide semiconductor film 359 and the metal oxide film 373. Energy barrier. On the rear channel side (the side opposite to the gate electrode) of the oxide semiconductor film 359, similarly, an energy barrier of about 0.5 eV and an about 0.7 eV exist at the interface between the oxide semiconductor film 359 and the metal oxide film 371. Energy barrier. Since these energy barriers exist at the interface between the oxide semiconductor film and the metal oxide, the transfer of the carrier at the interface can be prevented; therefore, the carrier moves inside the oxide semiconductor but does not move from the oxide semiconductor film 359 to the metal. An oxide film 371 or a metal oxide film 373. In other words, when the oxide semiconductor film 359 is sandwiched between a material having a band gap wider than that of the oxide semiconductor (here, a metal oxide film and an insulating film), the carrier is inside the oxide semiconductor film. mobile.

The method of forming the metal oxide film 371 and the metal oxide film 373 is not particularly limited. For example, a film formation method such as a plasma CVD method or a sputtering method can be used to form the metal oxide film 371 and the metal oxide film. The formation of 373. Sputtering or the like is suitable for low probability of entry of hydrogen, water, and the like. On the other hand, the plasma CVD method or the like is suitable for improving the film quality. Further, when the metal oxide film 371 and the metal oxide film 373 are formed using Ga-Zn-O as a base metal oxide film, the conductivity of the metal oxide film is high, and since zinc is used, DC sputtering can be used. A metal oxide film 371 and a metal oxide film 373 are formed by plating.

The semiconductor device according to the present invention is not limited to the transistor 160 shown in Fig. 11A. For example, a structure such as the transistor 170 shown in Fig. 11B can be employed. The transistor 170 includes a base insulating film 353 disposed over the substrate 351, a metal oxide film 371 disposed over the base insulating film 353, an oxide semiconductor film 359 disposed over the metal oxide film 371, and being disposed in contact with the oxide semiconductor A source electrode 361a and a drain electrode 361b on the upper surface and the side surface of the film 359, a gate insulating film 363 disposed over the oxide semiconductor film 359, and a gate insulating film 363 over the gate insulating film 363 to overlap the oxide semiconductor film 359 A gate electrode 365 and an insulating film 369 disposed above the gate electrode 365. That is, the transistor 170 differs from the transistor 160 in that a metal oxide film 373 is not provided between the oxide semiconductor film 359 and the gate insulating film 363.

In addition, a structure such as the transistor 180 shown in Fig. 11C can be employed. The transistor 180 includes a base insulating film 353 disposed over the substrate 351, an oxide semiconductor film 359 disposed over the base insulating film 353, and source electrodes 361a and 设置 disposed to contact the upper surface and side surfaces of the oxide semiconductor film 359. Electrode electrode 361b, disposed in an oxide semiconductor a metal oxide film 373 over the film 359, a gate insulating film 363 disposed over the metal oxide film 373, a gate electrode 365 disposed over the gate insulating film 363 to overlap the oxide semiconductor film 359, and a gate electrode 365 disposed thereon An insulating film 369 above the electrode 365. That is, the transistor 180 differs from the transistor 160 in that a metal oxide film 371 is not provided between the base insulating film 353 and the oxide semiconductor film 359.

In this embodiment, each of the transistors shown in FIGS. 11A to 11C has a top gate structure and a structure in which the source electrode 361a and the drain electrode 361b contact the upper surface and the side surface of the oxide semiconductor film 359, However, the semiconductor device according to the present invention is not limited thereto. As the transistor shown in FIGS. 10A to 10C in the previous embodiment, a bottom gate structure may be employed, or an upper surface and a side in which the oxide semiconductor film 359 contacts the source electrode 361a and the drain electrode 361b may be employed. The structure of the surface.

The structures, methods, and the like described in this embodiment can be combined as appropriate with any of the structures, methods, and the like described in the other embodiments.

(Example 4)

In this embodiment, an example in which at least a portion of the driver circuit to be disposed in the pixel portion and the transistor are formed over a substrate will be described below.

A transistor to be disposed in the pixel portion is formed according to Embodiment 2 or 3. Further, the transistor can be easily an n-channel transistor, and thus a portion of the driver circuit that can be formed by the n-channel transistor in the driver circuit is formed over the same substrate as the transistor of the pixel portion. By using the above The transistor described in the embodiment can provide a highly reliable display device in the above pixel portion or driver circuit.

FIG. 29A illustrates an example of a block diagram of an active matrix display device. A pixel portion 501, a first scanning line driver circuit 502, a second scanning line driver circuit 503, and a signal line driver circuit 504 are disposed above the substrate 500 in the display device. In the pixel portion 501, a plurality of signal lines extending from the signal line driver circuit 504 are disposed, and a plurality of scanning lines extending from the first scanning line driver circuit 502 and the second scanning line driver circuit 503 are disposed. It is noted that the pixels including the display elements are arranged in a matrix in individual regions in which the scanning lines and the signal lines cross each other. The substrate 500 in the display device is connected to a timing control circuit (also referred to as a controller or controller IC) via a connection portion such as a flexible printed circuit (FPC).

In FIG. 29A, the first scan line driver circuit 502, the second scan line driver circuit 503, and the signal line driver circuit 504 are formed over the same substrate 500 as the pixel portion 501. Accordingly, the number of components provided in the external driving circuit or the like can be reduced, so that cost reduction can be achieved. Further, if the driver circuit is disposed outside the substrate 500, it is necessary to extend the wiring and the number of wiring connections is increased. However, if a driver circuit is provided above the substrate 500, the number of wiring connections can be reduced. Accordingly, improvement in reliability and productivity can be achieved.

Figure 29B shows an example of the circuit configuration of the pixel portion. Here, the pixel structure of the VA liquid crystal display panel is shown.

In this pixel structure, a plurality of pixel electrodes are disposed in one pixel, and the transistors are connected to individual pixel electrodes. Constructing a plurality of transistors to be different The gate signal is driven. In other words, the signals applied to the individual pixel electrodes in the multi-domain pixels are independently controlled from each other.

The gate wiring 512 of the transistor 516 and the gate wiring 513 of the transistor 517 are separated, so that different gate signals can be supplied thereto. Conversely, the source or drain electrode layer 514 functioning as a data line is shared by transistors 516 and 517. For each of the transistors 516 and 517, the transistor described in the previous embodiment can be suitably used. According to the above manner, a highly reliable liquid crystal display panel can be provided.

The first pixel electrode layer electrically connected to the transistor 516 and the second pixel electrode layer electrically connected to the transistor 517 have different shapes and are separated by a crack. A second pixel electrode layer is disposed to surround the outer side of the first pixel electrode layer that is dispersed in a V shape. The alignment of the liquid crystals is controlled by causing the transistors 516 and 517 to make the voltage application timing between the first and second pixel electrode layers different. The transistor 516 is connected to the gate wiring 512, and the transistor 517 is connected to the gate wiring 513. When different gate signals are applied to the gate wiring 512 and the gate wiring 513, the operation timing of the transistor 516 and the transistor 517 can be changed.

Further, a storage capacitor is formed using a capacitor wiring 510, a gate insulating film serving as a dielectric, and a capacitor electrode electrically connected to the first pixel electrode layer or the second pixel electrode layer.

The first pixel electrode layer, the liquid crystal layer, and the opposite electrode layer overlap each other to form a first liquid crystal element 518. Further, the second liquid crystal element 519 is formed by overlapping the second pixel electrode, the liquid crystal layer, and the opposite electrode. The pixel structure is a multi-domain structure in which the first liquid crystal element 518 and the second liquid crystal element 519 is set in one pixel.

It is noted that the pixel structure is not limited to those shown in Fig. 29B. For example, a switch, a resistor, a capacitor, a transistor, a sensor, a logic circuit, or the like can be added to the pixel shown in FIG. 29B.

Figure 29C shows an example of the circuit configuration of the pixel portion. Here, the pixel structure of the display panel using the organic EL element is shown.

In the organic EL element, electrons and holes are respectively injected from a pair of electrodes into a layer containing a light-emitting organic compound by applying a voltage to the light-emitting element, and a current flows. The carriers (electrons and holes) recombine and, therefore, excite the luminescent organic compound. The luminescent organic compound returns from the excited state to the ground state, thereby emitting light. Due to such a mechanism, this light-emitting element is called a current-excited light-emitting element.

FIG. 29C illustrates an example of a pixel structure to which a digital time gray scale drive can be applied, as an example of a semiconductor device.

The structure and operation of the pixels to which the grayscale drive is driven by the digital time can be described. Here, one pixel includes two n-channel transistors each including an oxide semiconductor layer as a channel formation region.

The pixel 520 includes a switching transistor 521, a driver transistor 522, a light emitting element 524, and a capacitor 523. The gate electrode layer of the switching transistor 521 is connected to the scan line 526, the first electrode (one of the source electrode and the drain electrode) of the switching transistor 521 is connected to the signal line 525, and the second electrode of the transistor 521 is switched ( The other of the source electrode and the drain electrode is connected to the gate electrode layer of the driver transistor 522. The gate electrode layer of the driver transistor 522 is connected to the power line 527 through the capacitor 523, the driver transistor The first electrode of 522 is connected to power line 527, and the second electrode of driver transistor 522 is connected to the first electrode (pixel electrode) of light-emitting element 524. The second electrode of the light emitting element 524 corresponds to the common electrode 528. The common electrode 528 is electrically connected to a common potential line formed over the same substrate as the common electrode 528.

As the switching transistor 521 and the driver transistor 522, the transistor described in the previous embodiment can be suitably used. In this way, a highly reliable display panel including an organic EL element can be provided.

It is noted that the second electrode (common electrode 528) of the light-emitting element 524 is set to a low power supply potential. It is noted that the low power supply potential is at a potential which satisfies the low power supply potential <high power supply potential with reference to the high power supply potential set for the power supply line 527. As the low power supply potential, for example, GND, 0V, or the like can be employed. In order to cause the light-emitting element 524 to emit light to supply current to the light-emitting element 524 by applying a potential difference between the high power supply potential and the low power supply potential to the light-emitting element 524, each potential is set such that the potential difference between the high power supply potential and the low power supply potential is high. At or equal to the forward threshold voltage of the illuminating element 524.

The capacitor 523 can be replaced with the gate capacitance of the driver transistor 522, in which case the capacitor 523 can be omitted. A gate capacitance of the driver transistor 522 may be formed between the channel formation region and the gate electrode layer.

In the case of the voltage-to-input voltage driving method, a video signal is input to the gate electrode layer of the driver transistor 522, causing the driver transistor 522 to be in one of two states of full turn-on and turn-off. That is, the driver transistor 522 operates in a linear region. The driver transistor 522 operates in a linear region and, therefore, applies a voltage higher than the voltage of the power supply line 527 to the gate electrode layer of the driver transistor 522. Note that the application is higher than or equal to The voltage (voltage of the power supply line + Vth of the driver transistor 522) is applied to the signal line 525.

In the case where the analog gray scale method is used instead of the digital time gray scale method, the same pixel structure as that in the 29Cth picture can be used by changing the input signal.

In the case of performing an analog gray scale drive, a voltage higher than or equal to the sum of the forward voltage of the light emitting element 524 and the Vth of the driver transistor 522 is applied to the gate electrode layer of the driver transistor 522. The forward voltage of the illuminating element 524 indicates the voltage at which the desired brightness is obtained and includes at least a forward threshold voltage. A video signal that causes driver transistor 522 to operate in a saturated region is input such that current can be supplied to light-emitting element 524. In order for the driver transistor 522 to operate in the saturation region, the potential of the power line 527 is set to be higher than the gate potential of the driver transistor 522. Since the video signal is an analog signal, current according to the video signal can be supplied to the light-emitting element 524 and the analog gray scale drive can be performed.

It is noted that an embodiment of the present invention is not limited to the pixel structure shown in Fig. 29C. For example, a switch, a resistor, a capacitor, a transistor, a sensor, a logic circuit, or the like can be added to the pixel shown in FIG. 29C.

(Example 5)

The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). Examples of electronic devices are televisions (also known as television or television receivers), computers or monitors such as digital cameras or Digital video camera camera, digital photo frame, mobile phone (also known as mobile phone or portable phone device), portable game console, portable information terminal, audio reproduction device, large-size game machine (such as Bai Qing) Brother machine, and so on. An example of an electronic device each including the semiconductor device described in the previous embodiment will be described.

FIG. 30A illustrates a portable information terminal device including a main body 1001, a housing 1002, display portions 1003a and 1003b, and the like. The display portion 1003b functions as a touch panel. By touching the keyboard button 1004 displayed on the display portion 1003b, the screen can be operated and characters can be input. Needless to say, the display portion 1003b can function as a touch panel. A liquid crystal panel or an organic light-emitting panel is manufactured by using the transistor described in the previous embodiment as a switching element and applied to the display portion 1003a or 1003b, whereby a highly reliable portable information terminal can be provided.

The portable information terminal shown in FIG. 30A has a function of displaying various information (such as still images, moving images, and text images) on the display unit, displaying a calendar, date, time, or the like on the display unit. The function of the function, operation or editing of the information displayed on the display unit, the function of controlling the processing by various softwares (programs), and the like. Further, an external connection terminal (earphone terminal, USB terminal, or the like), a recording medium insertion portion, and the like may be disposed on a back surface or a side surface of the casing.

The portable information terminal shown in Fig. 30A can wirelessly transmit and receive data. Through wireless communication, you can purchase and download the desired book materials from the e-book server.

Figure 30B illustrates a portable music player, including, in the main body In 1021, the display portion 1023, the fixing portion 1022 (where the main body can be worn on the ear), the speaker, the operation button 1024, the external memory slot 1025, and the like. A liquid crystal panel or an organic light-emitting panel is manufactured by using the transistor described in the previous embodiment as a switching element and applied to the display portion 1023, whereby a highly reliable portable music player can be provided.

In addition, when the portable music player shown in FIG. 30B functions as an antenna, a microphone, or a wireless communication device and is used with a mobile device, the user can wirelessly and without hand while speaking while driving or the like. phone.

FIG. 30C illustrates a mobile phone including two housings, a housing 1030 and a housing 1031. The housing 1031 includes a display panel 1032, a speaker 1033, a microphone 1034, a pointing device 1036, a camera lens 1037, an external connection terminal 1038, and the like. The housing 1030 includes a solar cell 1040 having a function as a rechargeable portable information terminal, an external memory slot 1041, and the like. Further, an antenna system is incorporated in the housing 1031. The electro-crystalline system described in the previous embodiment is applied to the display panel 1032, whereby a highly reliable mobile phone can be provided.

Further, the display panel 1032 is provided with a touch panel. The plural operation key 1035 displayed as an image is shown by a broken line in Fig. 30C. It is noted that the boost circuit is also included, whereby the voltage output from the solar cell 1040 can be increased to be high enough for each circuit.

For example, when the oxide semiconductor film of the transistor described in the previous embodiment has a thickness greater than or equal to 2 μm and less than or equal to 50 μm, a power transistor for a power supply circuit such as a booster circuit can also be formed. body.

In the display panel 1032, the display direction can be appropriately changed according to the usage mode. Further, the mobile phone is provided with a camera lens 1037 on the same surface as the display panel 1032, and thus it can be used as a video phone. Speaker 1033 and microphone 1034 can be used for video calls, recording and playing sounds, and the like, as well as voice calls. Further, the housing 1030 and the housing 1031 in an unfolded state as shown in Fig. 30C can be moved by sliding so that one overlaps the other. Therefore, the size of the mobile phone can be reduced, which makes the mobile phone suitable for carrying.

The external connection terminal 1038 can be connected to an AC adapter and various cables such as a USB cable, and is possible to charge and communicate with a personal computer. In addition, a large amount of data can be stored by inserting a storage medium into the external memory slot 1041.

In addition, in addition to the above functions, an infrared communication function, a television reception function, or the like can be provided.

Figure 30D depicts an example of a television set. In the television set 1050, the display portion 1053 is incorporated in the housing 1051. The display unit 1053 can display an image. Here, the casing 1051 is supported by a bracket 1055 provided with a CPU. When the transistor described in the previous embodiment is applied to the display portion 1053, the television set 1050 having high reliability can be obtained.

The television device 1050 can be operated by an operation switch of the casing 1051 or an individual remote controller. Further, the remote controller may be provided with a display portion to display the material output from the remote controller.

It is noted that the television set 1050 is provided with a receiver, a data machine, and the like. A general television broadcast can be received by using a receiver. Furthermore, when the television device is wired or wirelessly connected to the communication network via the data machine, information communication can be performed from a single channel (from the transmitter to the receiver) or between two channels (between the transmitter and the receiver or between the receivers).

Further, the television 1050 is provided with an external connection terminal 1054, a storage medium recording and reproducing unit 1052, and an external memory slot. The external connection terminal 1054 can be connected to various cables such as a USB cable, and communication with a personal computer is possible. The disc-type storage medium is inserted into the storage medium recording and reproducing unit 1052, and can perform data reading stored in the storage medium and data writing to the storage medium. Further, a pattern, a video, or the like stored as a material in the external memory 1056 inserted into the external memory slot can be displayed on the display portion 1053.

When the semiconductor device described in the previous embodiment is applied to the external memory 1056 or the CPU, the television set 1050 can have high reliability and sufficiently reduce the power consumption thereof.

[example]

The measurement is performed on the oxide semiconductor film and the semiconductor device including the same according to an embodiment of the present invention by using various methods. The results are described in this example.

<1. Observation of TEM image and measurement of electron diffraction density using TEM, and XRD measurement>

In this section, an oxide semiconductor film is formed according to the above embodiment, The oxide semiconductor film was observed using a transmission electron microscope (TEM). The results are described below.

In this section, an oxide semiconductor film is formed over a quartz substrate by sputtering. In this manner, Sample A, Sample B, Sample C, Sample D, and Sample E were fabricated. The substrate temperatures in the deposition of Sample A, Sample B, Sample C, Sample D, and Sample E were room temperature, 200 ° C, 250 ° C, 300 ° C, and 400 ° C, respectively. Samples A and B were fabricated at a lower than the substrate temperature in the deposition in the method of Example 2, and Samples C to E were fabricated at the substrate temperature in the range in the method in Example 2. The target for forming an oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions were as follows: for the flow rate of the deposition gas, the flow rate of the argon gas was 30 sccm and the flow rate of the oxygen was 15 sccm; the pressure was 0.4 Pa; the distance between the substrate and the target was 60 mm; and the radio frequency (RF) power was 0.5 kW. Note that the target thickness of each of samples A, B, and E is 50 nm, and the target thickness of each of samples C and D is 100 nm.

After the oxide semiconductor film is formed, heat treatment is performed on the quartz substrate on which the oxide semiconductor film is formed. The heat treatment was carried out for 1 hour in a dry ambient environment having a dew point of -24 ° C at a temperature of 450 ° C. In this manner, samples A, B, C, D, and E were produced, each of which had an oxide semiconductor film formed over the quartz substrate.

Further, an oxide semiconductor film was formed by the two-step method described in Example 2 in a manner different from those of Samples A to E, whereby Sample F was formed. Forming the sample F in a manner of, first, forming a first oxide semiconductor film having a thickness of 5 nm; performing on the first oxide semiconductor film The first heat treatment is performed; a second oxide semiconductor film having a thickness of 30 nm is formed over the first oxide semiconductor film; and the second heat treatment is performed on the first oxide semiconductor film and the second oxide semiconductor film.

Here, the target for forming the first oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions were as follows: for the flow rate of the deposition gas, the flow rate of the argon gas was 30 sccm and the flow rate of the oxygen was 15 sccm; the pressure was 0.4 Pa; the distance between the substrate and the target was 60 mm; and the radio frequency (RF) power was 0.5 kW. The first heat treatment was performed at a temperature of 650 ° C for 1 hour in a nitrogen atmosphere.

Further, the target for forming the second oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions were as follows: for the flow rate of the deposition gas, the flow rate of the argon gas was 30 sccm and the flow rate of the oxygen was 15 sccm; the pressure was 0.4 Pa; the distance between the substrate and the target was 60 mm; and the radio frequency (RF) power was 0.5 kW. The second heat treatment was performed for 1 hour in a dry environment having a dew point of -24 ° C at a temperature of 650 ° C.

In this manner, a sample F was produced in which an oxide semiconductor film was formed over a quartz substrate by a two-step method.

As a comparative example of the samples A to F, an IGZO single crystal film having a thickness of 150 nm was formed over a yttrium-stabilized zirconia (YSZ) substrate, thereby forming a sample G.

By using a TEM, a TEM image of the samples A to G is obtained by irradiating a substrate on which an oxide semiconductor film is formed by an electron beam perpendicular to the substrate (that is, parallel to the c-axis direction in the above embodiment). Electronic derivative Shoot the pattern. Figures 13A through 13E are cross-sectional TEM images of samples A through E, respectively. Since the direction of the top surface of the sample corresponds to the longitudinal direction in each of the cross-sectional TEM images in the FIGS. 13A to 13E, the longitudinal direction of the image is the c-axis direction. Figures 14A through 14E are plane TEM images of samples A through E, respectively. Since the direction of the top surface of the sample corresponds to the vertical direction in each of the planar TEM images in FIGS. 14A to 14E, the vertical direction of the image is the c-axis direction. Figures 15A to 15E are electron diffraction patterns of samples A to E, respectively. Since the direction of the top surface of the sample corresponds to the vertical direction in each of the electron diffraction patterns in the 15A to 15E drawings, the vertical direction of the pattern is the c-axis direction. Figures 16A and 16B are plane TEM images of samples F and G, respectively. Figure 16C is an electron diffraction pattern of sample F. Figures 16D and 16E are electron diffraction patterns of sample G. Since the direction of the top surface of the sample corresponds to the vertical direction in each of the planar TEM image and the electron diffraction pattern in FIGS. 16A to 16E, the vertical direction of the image and the pattern is the c-axis direction.

Note that in this section, a cross-sectional TEM image, a planar TEM image, and an electron diffraction pattern were obtained with an H-9000 NAR manufactured by Hitachi High-Technologies Corporation, in which the diameter of the electron beam spot was set to 1 nm and the acceleration voltage was 300 kW.

In the cross-sectional TEM image of Figs. 13C to 13E, a crystal region having c-axis alignment was observed. On the other hand, in the cross-sectional TEM images in Figs. 13A and 13B, the crystal regions having the c-axis alignment were not clearly observed. This shows that the crystalline region with c-axis alignment is formed at a substrate temperature in a deposition higher than 200 ° C (preferably higher than or equal to 250 ° C). Formed in the oxide semiconductor film. The sharpness of the crystal region having the c-axis alignment is sequentially increased from the 13th Cth to the 13Eth, and therefore, it is estimated that the crystallinity of the oxide semiconductor film is improved as the temperature of the substrate in the oxide semiconductor film is increased.

In the planar TEM image in Fig. 14E, atoms arranged in a hexagonal lattice were observed. Also in the planar TEM image in Figures 14C to 14D, atoms of a brighter color arranged in a hexagonal lattice are observed. In the planar TEM image in Figs. 14A and 14B, the atoms arranged in the hexagonal lattice are not clearly observed. Further, in the planar TEM image in Figs. 16A and 16B, atoms arranged in a hexagonal crystal lattice were observed. From the above, it can be assumed that the crystal region having c-axis alignment in the oxide semiconductor film tends to have a hexagonal crystal structure containing triple symmetry as shown in Fig. 2. Further, it was found that the crystalline region was also formed in the oxide semiconductor film of the sample F produced by the two-step method as in the samples C to E. As in the cross-sectional TEM image in FIGS. 13A to 13E, it is assumed that the crystallinity of the oxide semiconductor film is improved as the temperature of the substrate in the oxide semiconductor film is increased. The observations of Figs. 13A to 13E and Figs. 14A to 14E show that each of the samples A and B is an amorphous oxide semiconductor film having almost no crystallinity and each of the samples C to F has a c-axis alignment. An oxide semiconductor film in a crystalline region.

Each of the electron diffraction patterns in FIGS. 15A to 15E has a concentric circular halo pattern in which the width of the diffraction pattern is wide and unclear, and the electron diffraction density of the outer halo pattern is lower than that of the inner halo pattern. In addition, the electron diffraction density of the outer halo pattern is sequentially increased from the 15A to the 15E. Figure. The electron diffraction pattern in Fig. 16C also has a concentric circular halo pattern; however, in comparison with the 15A to 15E, in the 16Cth, the width of the halo ring is thin, and the electron diffraction density of the inner halo pattern and The outer halo patterns are substantially equal to each other.

The electron diffraction density pattern in Fig. 16D is a dot pattern, unlike those in Figs. 15A to 15E and Fig. 16C. Processing the image of the electron diffraction density pattern in Fig. 16D to obtain the concentric circular halo pattern in Fig. 16E; the pattern in Fig. 16E is not the halo pattern, because the width of the concentric circular pattern is very thin, unlike the 15A to 15E and 16C. Further, the difference between the 16E and 15A to 15E and 16C is that the outer concentric circular pattern has an electron diffraction density higher than that of the inner concentric circular pattern.

Figure 17 is a graph showing the electron diffraction densities of samples A to G. In the graph shown in Fig. 17, the vertical axis indicates the electron diffraction density (arbitrary unit) and the horizontal axis indicates the magnitude of the scattering vector of the sample (1/ d [1/nm]). Note that in the size of the scattering vector (1/ d [1/nm]) d is the spacing of the crystal planes in the crystal. The distance r from a point of the wave transmitted from the center to the concentric circular pattern of the diffracted wave in the film using the electron diffraction pattern, the camera length L between the sample and the film in the TEM, and in the TEM The following formula of the wavelength λ of the electron beam represents the magnitude (1/ d ) of the scattering vector.

That is, the magnitude of the scattering vector on the horizontal axis of FIG. 17 (1/ d ) and the point of the wave transmitted from the center in each of the electron diffraction patterns of FIGS. 15A to 15E and FIGS. 16C and 16E are The distance r of a concentric circular pattern of diffracted waves is proportional.

That is, in the graph shown in Fig. 17, at 3.3 nm ^-1 1/ d The first peak in the range of 4.1 nm ^-1 corresponds to the peak of the inner halo pattern and the peak of the inner concentric circular pattern in the electron diffraction patterns of FIGS. 15A to 15E and FIGS. 16A and 16E, and is at 5.5 nm. ^-1 1/ d The second peak in the range of 7.1 nm ^-1 corresponds to the peak of the outer halo pattern and the peak of the outer concentric circular pattern in the electron diffraction patterns in the 15A to 15E and 16A and 16E diagrams.

Fig. 18 is a half-height width of the first peak showing each of the samples A to G, and Fig. 19 is a half-height width showing the second peak of each of the samples A to G. In the graph shown in Fig. 18, the vertical axis indicates the full width at half maximum (FWHM) (nm ^-1 ) of the first peak and the horizontal axis indicates the substrate temperature (°C) in the formation of the oxide semiconductor film of the samples A to G. . In addition, the broken line in the graph of Fig. 18 indicates the value of the full width at half maximum of the first peak in the samples F and G. In a manner similar to that in Fig. 18, the value of the half-height width of the second peak is shown in the graph of Fig. 19. The positions (nm ^-1 ) and the full width at half maximum (nm ^-1 ) of the first and second peaks in Figs. 18 and 19 are shown in Table 1.

Figs. 18 and 19 show that the half width and the peak position of each of the first peak and the second peak tend to decrease as the temperature of the substrate in the oxide semiconductor film is increased. It is also shown that the half-height width of each of the first peak and the second peak is not much different between the substrate temperatures in the film formation in the range of 300 ° C to 400 ° C. In addition, the values of the full width at half maximum and the position of each of the first peak and the second peak of the sample F formed by the two-step method are smaller than the values of the half height and position of the samples A to E and larger than the single crystal. The value of the half height and position of the sample G in the state.

The crystallinity of the oxide semiconductor film including the crystal region having the c-axis alignment is different from the crystallinity of the sample G having the single crystal structure. Therefore, in the measurement of the electron diffraction density in which the irradiation of the electron beam is performed from the c-axis direction, the full width at half maximum of each of the first peak and the second peak is greater than or equal to 0.2 nm ^-1 ; preferably, the first The full width at half maximum of the peak is greater than or equal to 0.4 nm ^-1 , and the full width at half maximum of the second peak is greater than or equal to 0.45 nm ^-1 .

From the 13A to 13E and 14A to 14E drawings, in the samples A and B, that is, in the oxide semiconductor film formed at a substrate temperature lower than or equal to 200 ° C, it is not clearly observed. To the degree of crystallinity; in view of this, in the measurement of the electron diffraction density in which the irradiation of the electron beam is performed from the c-axis direction, preferably in the oxide semiconductor film including the crystal region having the c-axis alignment, the first peak The full width at half maximum is less than or equal to 0.7 nm ^-1 , and the full width at half maximum of the second peak is less than or equal to 1.4 nm ^-1 .

In addition, X-ray diffraction (XRD) measurements were performed on samples A, E, and G, and the results supported the above TEM measurement results.

Figure 20 shows the results of measuring the XRD diffraction spectra of samples A and E by using an out-of-plane method. In Fig. 20, the vertical axis indicates the X-ray diffraction density (arbitrary unit), and the horizontal axis indicates the rotation angle 2θ [degrees].

Fig. 20 shows that a strong peak was observed in the sample E in a region in which the 2θ system was in the vicinity of 30°, and in the sample A in the region in which the 2θ system was in the vicinity of 30°, almost no peak was observed. This peak is attributed to diffraction in the (009) plane of the IGZO crystal. This also indicates that the sample E is an oxide semiconductor film including a crystal region having c-axis alignment, which is distinct from the sample A having an amorphous structure.

Fig. 21A shows the results of measuring the XRD diffraction spectrum of the sample E by using an in-plane method. Similarly, Figure 21B measures the results of the XRD diffraction spectrum of Sample G by using an in-plane method. In FIGS. 21A and 21B, the vertical axis indicates the X-ray diffraction density (arbitrary unit), and the horizontal axis indicates the rotation angle. [degree]. In the in-plane method used in this example, the rotation angle is used by using the c-axis of the sample as the rotation axis. Rotate the sample to perform the XRD measurement.

In the XRD diffraction spectrum of the sample G shown in Fig. 21B, peaks were observed at equal intervals of 60° of the rotation angle, which shows that the sample G was a single crystal film having six-fold symmetry. On the other hand, in the XRD diffraction spectrum of the sample E shown in Fig. 21A, no regular peak was observed, which showed no alignment in the a-b plane direction in the crystal region. That is, the individual crystal regions in the sample E are crystallized along the c-axis, but the alignment along the a-b plane does not necessarily occur. This also indicates that the sample E is an oxide semiconductor film including a crystal region having c-axis alignment, which is significantly different from the sample G having a single crystal structure.

As described above, the oxide semiconductor film including the crystal region having the c-axis alignment according to an embodiment of the present invention contains a significant difference from the oxide semiconductor film having an amorphous structure and the oxide semiconductor film having a single crystal structure. Crystallinity.

An oxide semiconductor film including a crystal region having c-axis alignment as described above has a desired crystallinity as compared with a completely amorphous oxide semiconductor film, and is reduced in defects of oxygen deficiency or bonding to dangling bonds or Such as impurities such as hydrogen. A defect such as an oxygen defect, a bond to a dangling bond or the like, or the like acts as a source for supplying a carrier in the oxide semiconductor film, which may change the conductivity of the oxide semiconductor film. Therefore, the oxide semiconductor film including the crystal region in which such defects are reduced has stable electrical characteristics and is more electrically stable in relation to irradiation of visible light, ultraviolet light, and the like. By using such an oxide semiconductor film including a crystalline region as a transistor, a highly reliable semiconductor having stable electrical characteristics can be provided. Device.

<2. ESR measurement>

In this section, an oxide semiconductor film is formed according to the above embodiment, and the oxide semiconductor film is evaluated using an electron spin resonance (ESR) method. The results are described below.

In this section, a sample H in which an oxide semiconductor film is formed over a quartz substrate by a sputtering method and a sample I obtained by performing heat treatment on a quartz substrate on which an oxide semiconductor film is formed are manufactured. The target for forming an oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions are as follows: for the flow rate of the deposition gas, the flow rate of the argon gas is 30 sccm and the flow rate of the oxygen is 15 sccm; the substrate temperature is 400 ° C; the pressure is 0.4 Pa; the distance between the substrate and the target is 60 mm; the radio frequency (RF) power is 0.5 kW; and the film thickness is 100 nm.

After the oxide semiconductor film is formed, heat treatment is performed on a quartz substrate on which an oxide semiconductor film is formed to form a sample I. The heat treatment was carried out for 1 hour in a dry ambient environment having a dew point of -24 ° C at a temperature of 450 ° C. In this manner, samples H and I were produced, each of which had an oxide semiconductor film formed over the quartz substrate.

In this section, the ESR measurements performed on samples H and I are described. ESR measurement is a method of measuring lone electrons in a substance by utilizing the Zeeman effect. When the magnetic field H applied to the sample is swept while irradiating the sample with microwaves having a specific frequency v , the lone electrons in the sample absorb the microwave in the specific magnetic field H , thereby causing a spin energy level parallel to the magnetic field to the magnetic field The anti-parallel transition of the spin energy level. The relationship between the frequency v of the microwave absorbed by the lone electrons in the sample and the magnetic field H applied to the sample can be expressed by the following formula.

[Formula 2] hv = gμ _B H

In this formula, h denotes the Planck constant and μ _B denotes a Bohr magnet. In addition, g is a coefficient called a g value which varies with the local magnetic field applied to the lone electron in the substance; that is, by using the above formula to calculate the g value, an environment such as a lone electron of a dangling bond can be known. .

In this example, ESR measurements are performed by using an E500 manufactured by Bruker Corporation. The measurement conditions were as follows: the measurement temperature was room temperature, the microwave frequency was 9.5 GHz, and the microwave power was 0.2 mW.

The results of the ESR measurements performed on samples H and I are shown in Figure 22. In the graph shown in Fig. 22, the vertical axis indicates the first-order difference of the absorption intensity of the microwave, and the horizontal axis indicates the g value.

As shown in the graph of Fig. 22, a signal corresponding to the absorption of the microwave was observed for the sample I, and a signal corresponding to the absorption of the microwave was observed for the sample H in the region where the g value was in the vicinity of 1.93. By calculating the integrated value of the signal in the region in which the g value is in the vicinity of 1.93, the spin density of the lone electron corresponding to the absorption of the microwave, that is, the spin density of 1.3 × 10 ¹⁸ can be obtained (from Spin / cm ³ ). Note that in the sample I, the absorption of the microwave is less than the lower limit of detection; therefore, the spin density of the lone electron in the sample I is lower than or equal to 1 × 10 ¹⁶ (spin / cm ³ ).

Here, the quantum chemical calculation is performed to examine the following: the signal value of the g value in the region in the vicinity of 1.93 is attributed to which dangling bond in the In-Ga-Zn-O-based oxide semiconductor film. In detail, a cluster model is formed in which metal atoms have dangling bonds corresponding to oxygen defects, and the structure of the cluster model is optimized, and its g value is calculated.

The Amsterdam density functional (ADF) software was used to optimize the structure of the model and calculate the g value of the structurally optimized model. In both the optimization of the structure of the model and the calculation of the g value of the model of the optimized structure, GGA:BP is used as a functional and TZ2P is used as a basic function. In addition, as a Core Type, Large is used for the optimization of the model structure, and None is used for the calculation of the g value.

Fig. 23 shows a model of dangling bonds in a metal oxide based on In-Ga-Zn-O, which is obtained by the above quantum chemical calculation. Figure 23 shows the dangling bond ( g = 1.984) due to oxygen deficiency in the indium-oxygen bond, the dangling bond due to oxygen deficiency in the gallium-oxygen bond ( g = 1.995), and the zinc-oxygen bond Dangling bond due to oxygen deficiency in the middle ( g = 1.996). These g values of the dangling bonds are relatively close to the g = 1.93 of the signal corresponding to the absorption of the microwaves of the sample H. That is, the sample H has the possibility of generating oxygen defects in the bonds of oxygen and one or more of indium, gallium, and zinc.

However, for sample I, no signal corresponding to the absorption of microwaves was observed in the region where the g value was in the vicinity of 1.93. This indicates that oxygen to oxygen deficiency is added after the oxide semiconductor film is formed by performing heat treatment in a dry surrounding environment. As described in the previous embodiment, the oxygen deficiency in the oxide semiconductor film can function as a carrier which changes conductivity; by reducing oxygen defects, the reliability of the transistor including the oxide semiconductor film can be improved.

Therefore, in the oxide semiconductor film including the crystal region having the c-axis alignment according to an embodiment of the present invention, it is preferable to add oxygen to oxygen defects by performing heat treatment after forming the oxide semiconductor film, and at the ESR The spin density in the region in which the g value is in the vicinity of 1.93 is preferably lower than or equal to 1.3 × 10 ¹⁸ (spin / cm ³ ), more preferably lower than or equal to 1 × 10 ¹⁶ (spin) /cm ³ ).

<3. Low temperature PL measurement>

In this section, an oxide semiconductor film is formed according to the previous embodiment, and the oxide semiconductor film is evaluated using low-temperature photoluminescence (PL) measurement. The results are described below.

In this section, a sample J in which an oxide semiconductor film is formed over a quartz substrate by sputtering at a substrate temperature of 200 ° C and sputtering of a substrate temperature in deposition at 400 ° C are produced. A sample K of an oxide semiconductor film is formed over the quartz substrate. That is, the sample J is an oxide semiconductor film not including a crystal region having c-axis alignment, and the sample K is an oxide semiconductor film including a crystal region having c-axis alignment. The target for forming an oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions are as follows: for the flow rate of the deposition gas, the flow rate of the argon gas is 30 sccm and the flow rate of the oxygen is 15 sccm; the pressure is 0.4 Pa; the distance between the substrate and the target is 60 mm; the radio frequency (RF) power is 0.5 kW; and the film thickness It is 100 nm.

Further, after the oxide semiconductor film was formed, heat treatment was performed on the quartz substrate in each of the samples J and K. The heat treatment was carried out for 1 hour in a dry ambient environment having a dew point of -24 ° C at a temperature of 450 ° C. In this manner, samples J and K were produced, each of which had an oxide semiconductor film formed over the quartz substrate.

In this section, low temperature PL measurements are performed on samples J and K. In low-temperature PL measurement, the sample is irradiated with excitation light in a very low temperature environment to provide energy to the sample, electrons and holes are generated in the sample while stopping the excitation light, and by using a charge coupled device (CCD) Or the like to detect the luminescence caused by the recombination of electrons generated by the irradiation of the excitation light with the holes.

In this example, the low temperature PL measurement is measured at a measured temperature of 10 K in the helium surrounding environment. For the excitation light, light having a wavelength of 325 nm emitted from a He-Cd gas laser is used. In addition, a CCD is used to detect luminescence.

The emission spectra of samples J and K detected in the low temperature PL measurement are shown in Fig. 24. In the graph shown in Fig. 24, the vertical axis indicates the PL detection count, and the horizontal axis indicates the energy (eV) of the detected luminescence.

From the graph of Fig. 24, it was found that although each of the samples J and K had a peak in a region in which the emission energy was in the vicinity of 1.8 eV, the number of PL detection counts of the sample K was smaller than that of the sample J by about 100. It is noted that one of the peaks in the region where the emission energy is in the vicinity of 3.2 eV in each of the samples J and K is attributed to the quartz window of the low temperature PL measuring device.

Here, in the graph of Fig. 24, the energy is emitted at 1.8 eV. The peak in the region in the vicinity indicates that the energy level exists at a depth of about 1.8 eV from the bottom of the conduction band in the band structure of the oxide semiconductor film. The deep energy level in the band gap coincides with the trap energy level due to oxygen deficiency in the calculation of the electron density in the state in FIG. Therefore, it can be assumed that the emission peak in the region in which the emission energy is in the vicinity of 1.8 eV in the graph of Fig. 24 represents the energy level of the trap level due to the oxygen defect in the band diagram in Fig. 4. That is, since the number of PL detection counts in the region in which the emission energy is in the vicinity of 1.8 eV in the sample K is smaller than that in the sample J, in the oxide semiconductor film including the crystal region having the c-axis alignment The number of trap levels due to oxygen defects, that is, the number of oxygen defects should be reduced.

<4. Measurement of Negative Bias Stress Photodegradation>

In this example, a transistor including an oxide semiconductor film is fabricated according to the previous embodiment, and a stress is applied to the transistor by applying a negative voltage to the gate of the transistor while irradiating the transistor with light to make the threshold of the transistor The voltage varies with the length of time the stress is applied. Describe the results of evaluating the change in the threshold voltage of the transistor. This threshold voltage or the like of the transistor due to stress is called negative bias stress photodegradation.

In this section, a transistor provided with an oxide semiconductor film (sample L) in which a c-axis aligned crystal region is formed as described in the previous embodiment is fabricated. Further, as a comparative example, a transistor formed of a material similar to the sample L but provided with an oxide semiconductor film (sample M) in which a crystal region having c-axis alignment was not formed was fabricated. Then, by Shi A negative voltage is applied to the gate of the sample while irradiating the samples L and M with light to apply stress to the samples L and M, and the threshold voltage Vth of the samples L and M is evaluated, which varies with the length of time during which the stress is applied. The method of manufacturing the samples L and M will be described below.

First, as a base film, a tantalum nitride film having a thickness of 100 nm and a hafnium oxynitride film having a thickness of 150 nm are successively formed on the glass substrate by a plasma CVD method, and then oxynitridation by sputtering. A tungsten film having a thickness of 100 nm was formed over the ruthenium film. The tungsten film is selectively etched, thereby forming a gate electrode having a tapered shape. Next, as a gate insulating film, a hafnium oxynitride film having a thickness of 100 nm was successively formed over the gate electrode by a plasma CVD method.

Next, an oxide semiconductor film is formed over the gate insulating film by sputtering. The oxide semiconductor film of the sample L is formed in such a manner that an oxide semiconductor film having a thickness of 30 nm is stacked on the oxide semiconductor film having a thickness of 5 nm which acts as a seed crystal, and heat treatment is performed thereon to form having c The crystallization area where the axes are aligned. The oxide semiconductor film of the sample M was formed in such a manner that heat treatment was performed on the oxide semiconductor film having a thickness of 25 nm.

First, a method of manufacturing an oxide semiconductor film of sample L will be described. An oxide semiconductor film that functions as a seed crystal is formed by sputtering; as a target for forming an oxide semiconductor film, using In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole A target that is proportional to the composition ratio. Other conditions are as follows: the substrate temperature during deposition is 200 ° C; the oxygen flow rate is 50% and the argon gas is 50%; the pressure is 0.6 Pa; the distance between the substrate and the target is 100 mm; direct current (DC) power It is 5 kW; and the film thickness is 5 nm. After the oxide semiconductor film was formed, heat treatment was performed in a nitrogen atmosphere at a temperature of 450 ° C for 1 hour, whereby crystallization was a seed oxide semiconductor film. Next, over the oxide semiconductor film functioning as a seed crystal, an oxide semiconductor film having a thickness of 30 nm was formed by sputtering under conditions similar to those for forming an oxide semiconductor film functioning as a seed crystal. Further, heat treatment was performed for 1 hour using an oven in a nitrogen atmosphere at a temperature of 450 ° C, and further, heat treatment was performed using an oven at a temperature of 450 ° C in a mixed environment of nitrogen and oxygen for 1 hour to form including having c An oxide semiconductor film of a crystal region in which the axis is aligned.

Further, an oxide semiconductor film of the sample M is formed by a sputtering method; as a target for forming an oxide semiconductor film, using In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole A target that is proportional to the composition ratio. Other conditions are as follows: the substrate temperature in the deposition is 200 ° C; the oxygen is 50% in the flow rate of the deposition gas and the argon gas is 50%; the pressure is 0.6 Pa; the distance between the substrate and the target is 100 mm; direct current (DC) The power was 5 kW; and the film thickness was 25 nm. After the formation of the oxide semiconductor film, heat treatment was performed for 6 minutes using a rapid thermal annealing (RTA) method in a nitrogen atmosphere at a temperature of 650 °C. Further, heat treatment was performed for 1 hour using an oven at a temperature of 450 ° C in a mixed environment of nitrogen and oxygen to form an oxide semiconductor film not including a crystal region having c-axis alignment.

Next, over the oxide semiconductor film, a conductive film in which a titanium film, an aluminum film, and a titanium film are stacked is formed by sputtering and selectively etched to form a source electrode and a drain electrode. Next, forming a thickness of 400 nm The ruthenium oxide film serves as a first interlayer insulating film. Further, as the second interlayer insulating film, an insulating film formed of an acrylic resin having a thickness of 1.5 μm was formed. Finally, heat treatment was performed for 1 hour in a nitrogen atmosphere at a temperature of 250 ° C to produce samples L and M.

Next, stress is applied to the samples L and M by applying a negative voltage to the gate of the sample while irradiating the samples L and M with light, and the Id-Vg characteristics of the samples L and M depending on the length of time during which the stress is applied are measured. The amount of change in the threshold voltage before and after the stress is applied.

The stress was applied to the ambient air at room temperature under the following conditions: the gate voltage was -20 V; the drain electrode was 0.1 V; the source voltage was 0 V; and the brightness of the illumination light was 36000 (lx). The Id-Vg characteristics of the samples L and M were measured by varying the length of time during which the stress was applied as follows: 100 seconds, 300 seconds, 600 seconds, 1000 seconds, 1800 seconds, 3600 seconds, 7200 seconds, 10000 seconds, 18000 seconds, and 43200 Seconds (12 hours). In measuring the Id-Vg characteristics, the gate voltage was set to +10 V, and the gate voltage was swept in the range from -10 V to +10 V; and other conditions were similar to those in the applied stress.

Figure 25 is a graph showing the amount of change in the threshold voltage of samples L and M. In the graph shown in Fig. 25, the vertical axis indicates the amount of change in the threshold voltage ΔVth (V) and the horizontal axis indicates the stress time (seconds).

In Fig. 25, the amount of change in the threshold voltage ΔVth(V) of the sample L is at most -1 V, and the amount of change in the threshold voltage ΔVth (V) of the sample M is at most -2 V; that is, The amount of change in the threshold voltage ΔVth of the sample L is reduced to about half of the sample M.

According to this, the stress of the transistor provided with the oxide semiconductor film including the crystal region of the c-axis alignment is more electrically stable with respect to the light irradiation or the gate voltage, and the reliability thereof is improved.

<5. Measurement using the light response defect evaluation method>

In this section, a transistor including an oxide semiconductor film is formed according to the previous embodiment, and a photoresponse defect evaluation method is performed on the transistor and the stability of the oxide semiconductor film related to light irradiation is evaluated. The results are described below.

In this section, the photoresponse defect evaluation method is performed on samples N and O fabricated by methods similar to samples L and M. In the photoresponsive defect evaluation method, the relaxation of a current (photocurrent) flowing by irradiating a semiconductor film with light is measured, and a formula represented by a linear combination of an exponential function is used to match the display of the photocurrent relaxation. The graph is calculated to calculate the relaxation time τ, and the defects in the semiconductor film are evaluated from the relaxation time τ.

Here, the current ID is represented by a linear combination of exponential functions having two terms by using a relaxation time τ ₁ corresponding to the rapid response and a relaxation time τ ₂ (τ ₂ >τ ₁ ) corresponding to the slow response. , resulting in the following formula.

In the photoresponse defect evaluation method described in this section, after 60 seconds of dark state, light irradiation was performed for 600 seconds, and then, light irradiation was stopped and the relaxation of the photocurrent was measured for 3000 seconds. The wavelength and intensity of the irradiation light were set to 400 nm and 3.5 mW/cm ² , respectively, and the voltages of the gate electrode and the source electrode of each of the samples N and O were set to 0 V, and a low voltage of 0.1 V was applied to the drain electrode. And measure the value of the photocurrent. Note that the channel length L and the channel width W of each of the samples N and O are 30 μm and 10000 μm, respectively.

Figures 26A and 26B are graphs showing the amount of change in the photocurrents of the samples N and O in the photoresponsive defect evaluation method. In the graphs shown in Figs. 26A and 26B, the vertical axis indicates the photocurrent ID and the horizontal axis indicates the time t (seconds). The formula represented by the graphs shown in Figs. 26A and 26B is performed by a formula represented by a linear combination of exponential functions, resulting in the following formula.

From FIGS. 26A and 26B, it is found that the sample N including the oxide semiconductor film having the c-axis aligned crystal region is smaller than the maximum value of the photocurrent in the sample O and the relaxation time τ ₁ and the relaxation time τ ₂ Shorter. In the sample N, the maximum value of the photocurrent was 6.2 × 10 ^-11 A, the relaxation time τ ₁ was 0.3 second, and the relaxation time τ ₂ was 39 seconds. On the other hand, the maximum value Imax of the photocurrent in the sample O was 8.0 × 10 ^-9 A, the relaxation time τ ₁ was 3.9 seconds, and the relaxation time τ ₂ was 98 seconds.

It was found that in both samples N and O, the relaxation of the photocurrent ID is fulfilled by a linear combination of exponential functions having at least two relaxation times. This indicates that the relaxation of the photocurrent ID has two relaxation processes in both samples N and O. This is in agreement with the relaxation process of the photocurrents with the two recombination models shown in Figures 5A and 5B. That is, as in the band diagrams in Figs. 5A and 5B in the previous embodiment, the trap level exists in the band gap of the oxide semiconductor.

Further, the sample N of the oxide semiconductor film including the crystal region having the c-axis alignment is shorter than the relaxation time τ ₁ and the relaxation time τ ₂ in the sample O. This indicates that the number of trap energy levels due to oxygen deficiency in the recombination model in Figures 5A and 5B is smaller in sample N than in sample O. This is because, in the sample N, the number of defects in the oxide semiconductor film, which can function as a trap level, is reduced by the oxide semiconductor film including the crystal region having c-axis alignment.

From the above, the transistor transmits a crystal region having c-axis alignment in the oxide semiconductor film to have a relatively stable structure in relation to light irradiation. By using such an oxide semiconductor film for a transistor, a highly reliable transistor having stable electrical characteristics can be provided.

<6.TDS analysis>

In this section, an oxide semiconductor film was fabricated according to the previous embodiment, and an oxide semiconductor film was evaluated using a thermal desorption spectrum (TDS). The results are described below.

In this section, an oxide semiconductor film is formed over a quartz substrate by sputtering, a sample P1 is formed at a substrate temperature in a deposition at room temperature, and a sample P2 is formed at a substrate temperature in a deposition at 100 ° C; The sample P3 in the deposition of °C was formed; the sample P4 was formed at the substrate temperature in the deposition at 300 ° C; and the sample P5 was formed at the substrate temperature in the deposition at 400 ° C. Here, each of the samples P1, P2, and P3 is an oxide semiconductor film not including a crystal region having c-axis alignment, and each of the samples P4 and P5 is oxidized including a crystal region having c-axis alignment. Semiconductor film. The target for forming an oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions are as follows: for the flow rate of the deposition gas, the flow rate of the argon gas is 30 sccm and the flow rate of the oxygen is 15 sccm; the pressure is 0.4 Pa; the distance between the substrate and the target is 60 mm; the radio frequency (RF) power is 0.5 kW; and the film thickness It is 50 nm. The quartz substrate was previously subjected to a heat treatment in a dry environment at 850 ° C to reduce the factor of desorption gas from the substrate in the TDS analysis.

It is noted that TDS analysis is an analytical method in which a halogen lamp is used in a vacuum housing to heat a sample, and quadrupole mass spectrometry (QMS) is used to detect a gas component generated from the entire sample when the temperature of the sample is increased. The detected gas components are distinguished from each other by M/z (mass/charge) and detected by mass spectrometry.

In this example, the TDS analysis is performed with the WA1000S manufactured by ESCO Ltd. A mass spectrum corresponding to H ₂ O of M/z = 18 was detected under the following measurement conditions: SEM voltage was 1500 V, substrate surface temperature was room temperature to 400 ° C, and vacuum degree was lower than or equal to 1.5 × 10 ^-7 Pa, The Dwell time is 0.2 (second/U) and the temperature rise rate is 30 (°C/min).

The results of the TDS analysis of the samples P1 to P5 are shown in Fig. 27. In the graph shown in Fig. 27, the vertical axis indicates the amount of desorbed water molecules (M/z = 18) [molecule / cm ³ ] (count), and the horizontal axis indicates the substrate temperature (° C.). Here, the molecular weight of the desorbed water is obtained by calculating the integrated value of the temperature at around 300 ° C in a mass spectrum of M/z = 18, that is, it is the molecular weight of water desorbed from the oxide semiconductor film. In the mass spectrum of M/z = 18, a peak is also present in a region in which the temperature is in the vicinity of 100 ° C, but it is assumed that this peak indicates the amount of moisture adsorbed on the surface of the oxide semiconductor film and is not calculated. The molecular weight of water for desorption.

Figure 27 is a graph showing the decrease in the amount of water molecules desorbed from each sample as the substrate temperature during deposition increases. Therefore, it can be said that the H (hydrogen) contained in the oxide semiconductor film can be reduced by increasing the temperature of the substrate during deposition, that is, by forming a crystal region having c-axis alignment in the oxide semiconductor film. A molecule or ion of an atom, typically a H ₂ O (water) molecule.

As described above, by forming an oxide semiconductor film including a crystal region having c-axis alignment, impurities such as molecules containing H (hydrogen atoms) or ions, typically H ₂ O (water) molecules, can be reduced, which can be To supply a source of carriers in an oxide semiconductor film. Therefore, the conductivity of the oxide semiconductor film can be prevented from being changed, whereby the reliability of the transistor including the oxide semiconductor film can be improved.

<7. Secondary ion mass spectrometry>

In this section, an oxide semiconductor film is fabricated according to the previous embodiment, The oxide semiconductor film was evaluated using secondary ion mass spectrometry (SIMS). The results are described below.

In this section, an oxide semiconductor film is formed over a quartz substrate by sputtering, and samples Q1 to Q7 are formed at a substrate temperature in a room temperature deposition, and a sample R1 is formed at a substrate temperature in a deposition at 400 ° C to R7. Here, each of the samples Q1 to Q7 is an oxide semiconductor film not including a crystal region having c-axis alignment, and each of the samples R1 to R7 is an oxide semiconductor film including a crystal region having c-axis alignment. . The target for forming an oxide semiconductor film has a composition ratio of In ₂ O ₃ :Ga ₂ O ₃ :ZnO=1:1:2 [mole ratio]. Other conditions are as follows: for the flow rate of the deposition gas, the flow rate of the argon gas is 30 sccm and the flow rate of the oxygen is 15 sccm; the pressure is 0.4 Pa; the distance between the substrate and the target is 60 mm; the radio frequency (RF) power is 0.5 kW; and the film thickness It is 300 nm. The quartz substrate was previously subjected to heat treatment at 850 ° C for 1 hour in a nitrogen atmosphere.

After the formation of the oxide semiconductor film, heat treatment is performed on the quartz substrate on which the oxide semiconductor film is formed in each of the samples Q2 to Q7 and the samples R2 to R7. The heat treatment is performed in such a manner as to increase the temperature to a predetermined temperature in the environment around the nitrogen, the surrounding environment is switched from the surrounding environment of the nitrogen to the surrounding environment of the oxygen, the predetermined temperature is maintained in the environment around the oxygen for 1 hour, and then lowered in the environment around the oxygen. temperature. The predetermined temperature is 200 ° C in samples Q2 and R2; 250 ° C in samples Q3 and R3; 350 ° C in samples Q4 and R4; 450 ° C in samples Q5 and R5; 550 in samples Q6 and R6 °C; and 650 ° C in samples Q7 and R7. In this way, samples Q1 to Q7 and sample R1 are manufactured to R7, in each of which an oxide semiconductor film is formed over the quartz substrate.

In this section, SIMS analysis is performed on each of samples Q1 through Q7 and samples R1 through R7. The results of SIMS analysis of samples Q1 to Q7 are shown in Fig. 28A, and the results of SIMS analysis of samples R1 to R7 are shown in Fig. 28B. In the graphs shown in FIGS. 28A and 28B, the vertical axis indicates the concentration of hydrogen (H) (atoms/cm ³ ), and the horizontal axis indicates the depth of the oxide semiconductor film from the surface of the oxide semiconductor film ( Nm) and the depth (nm) of the quartz substrate.

It is seen from the 28A and 28B graphs that the hydrogen concentrations in the oxide semiconductor film in the samples Q1 and R1 are substantially equal to each other, and the hydrogen concentrations in the oxide semiconductor film in the samples R2 to R7 are lower than those in the sample Q2, respectively. Those to Q7. This shows that hydrogen is less likely to enter the oxide semiconductor film in the subsequent heat treatment performed because the substrate temperature in forming the oxide semiconductor film is higher. In particular, the graphs of the samples Q3 to Q5 show that hydrogen increases from the surface side of the oxide semiconductor film when the temperature in the heat treatment increases, and a layer in which the hydrogen concentration is high is dispersed inside the oxide semiconductor film, and when the temperature is further When increasing, hydrogen is removed from the surface side of the oxide semiconductor film. According to this aspect, in the case where the oxide semiconductor film does not include the crystal region having the c-axis alignment, the entry or elimination of hydrogen is caused by the heat treatment. However, this phenomenon was not observed in the samples R2 to R7 each including a crystal region having c-axis alignment in the oxide semiconductor film.

It is considered that this is because hydrogen atoms and the like which are bonded to the dangling bonds to which they are bonded are formed by forming a crystal region having c-axis alignment in the oxide semiconductor film at an increased substrate temperature in forming the oxide semiconductor film. Semi-guide There is a decrease in the body membrane.

According to this, by forming a crystal region having c-axis alignment in the oxide semiconductor film at an increased substrate temperature in forming the oxide semiconductor film, an increase in hydrogen can be prevented, which may become supply oxidation due to heat treatment. The source of the carrier in the semiconductor film. Therefore, the conductivity of the oxide semiconductor film can be prevented from being changed, whereby the reliability of the transistor including the oxide semiconductor film can be improved.

Claims (8)

A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating a substrate at a temperature lower than or equal to 400 ° C, wherein the oxide semiconductor The film is in a non-single-crystal state, and wherein the oxide semiconductor film includes a crystal region in which the c-axis is substantially perpendicular to the surface of the oxide semiconductor film. A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating the substrate at a temperature lower than or equal to 400 ° C, wherein the oxide is formed In the step of the semiconductor film, a rare gas, oxygen, or a mixed gas of a rare gas and oxygen is used as a sputtering gas, wherein the oxide semiconductor film is in a non-single-crystal state, and wherein the oxide semiconductor film is contained therein A crystal region in which the c-axis is substantially perpendicular to the surface of the oxide semiconductor film. A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating the substrate at a temperature lower than or equal to 400 ° C, wherein the oxide is formed In this step of the semiconductor film, a rare gas, oxygen, or a mixed gas of a rare gas and oxygen is used as a sputtering gas, and the target for forming the oxide semiconductor film contains indium, gallium, Zinc and oxygen, wherein the oxide semiconductor film is in a non-single-crystal state, and wherein the oxide semiconductor film contains a crystal region in which the c-axis is substantially perpendicular to the surface of the oxide semiconductor film. A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating the substrate at a temperature lower than or equal to 400 ° C, wherein the oxide is formed In this step of the semiconductor film, a rare gas, oxygen, or a mixed gas of a rare gas and oxygen is used as a sputtering gas, and a target for forming the oxide semiconductor film includes indium, gallium, zinc, and oxygen. Forming the oxide semiconductor film in a processing chamber, wherein a pressure in the processing chamber is set to be lower than or equal to 0.4 Pa, wherein the oxide semiconductor film is in a non-single-crystal state, and wherein the oxide semiconductor film comprises A crystal region in which the c-axis is substantially perpendicular to the surface of the oxide semiconductor film. A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating the substrate at a temperature lower than or equal to 400 ° C, wherein the oxide is formed In this step of the semiconductor film, a rare gas, oxygen, or a mixed gas of a rare gas and oxygen is used as a sputtering gas, and a target for forming the oxide semiconductor film includes indium, gallium, zinc, and oxygen. Forming the oxide semiconductor film in the processing chamber, wherein a pressure in the processing chamber is set to be lower than or equal to 0.4 Pa, wherein a leak rate of the processing chamber is set to be lower than or equal to 1 × 10 ^-10 Pa·m ³ / Sesec, wherein the oxide semiconductor film is in a non-single-crystal state, and wherein the oxide semiconductor film includes a crystal region in which a c-axis is substantially perpendicular to a surface of the oxide semiconductor film. A method for producing a semiconductor film, the method comprising the steps of: forming an oxide semiconductor film over an insulating surface by a sputtering method while heating the substrate at a temperature lower than or equal to 400 ° C After the semiconductor film, heat treatment is performed on the substrate at a temperature higher than the temperature at which the oxide semiconductor film is formed, wherein a rare gas, oxygen, or a rare gas is used in the step of forming the oxide semiconductor film. And a mixed gas of oxygen is a sputtering gas, wherein the target for forming the oxide semiconductor film comprises indium, gallium, zinc and oxygen, wherein the oxide semiconductor film is formed in a processing chamber, wherein the processing chamber is The pressure is set to be lower than or equal to 0.4 Pa, wherein the leakage rate of the processing chamber is set to be lower than or equal to 1 × 10 ^-10 Pa ‧ m ³ /sec, wherein the oxide semiconductor film is in a non-single-crystal state, and Wherein the oxide semiconductor film includes a crystal region in which the c-axis is substantially perpendicular to the surface of the oxide semiconductor film. The method of any one of claims 1 to 6, wherein the size of the crystalline region is greater than or equal to 1 nm and less than or equal to 1000 nm. The method of any one of claims 1 to 6, wherein an angle between the c-axis and a normal to the surface of the oxide semiconductor film is greater than or equal to 0° and less than or equal to 20°.