TW201312535A - LCD panel with the dual gate structure and the driving method of the same - Google Patents

Abstract

The present invention discloses a LCD panel having a dual gate structure and the driving method of the same, the dual gate structure comprises a plurality of scanning units, a plurality of data lines and a pixel array, wherein the pixel array includes three pixel units, each of the first pixel unit and the third pixel unit comprises one column of pixels connecting to one date line separately, in addition, the second pixel unit comprises a plurality of column pixels and every two column of pixels of the second pixel unit are connected with one data line. Based on the above mentioned dual gate structure, each of the odd scanning units is turned on in sequence so that the data signal is input to the pixels via the data lines, then switching on each of the even scanning units and inputting the data signal to the pixels via the data lines as well, as a result, the first pixel unit and the third unit become single dot inversion, and the second unit become dual dot inversion.

Description

Double gate liquid crystal display panel driving structure and driving method

The present invention relates to a driving structure and a driving method of a double gate liquid crystal display panel, in particular to a driving structure and a driving method for a double gate liquid crystal display panel of a single point plus double dot inversion mode of a pixel array.

Liquid crystal display (LCD) has the advantages of low radiation, small size and low energy consumption. It has gradually replaced traditional cathode ray tube (CRT) displays, and is widely used in notebook computers, personal digital assistants (PDAs), and flat-panel televisions. , or information products such as mobile phones. How to improve display quality and reduce production costs has gradually become a major issue in the development of liquid crystal displays.

The pixel structure of the liquid crystal display panel can be mainly divided into a single gate (Single Gate) pixel structure and a dual gate (Dual Gate) pixel structure according to different driving modes. At the same resolution, compared to the single-gate pixel structure, the number of scan lines of a liquid crystal display panel using a double-gate pixel structure is doubled, and the number of data lines is reduced to one-half. Therefore, a liquid crystal display panel using a dual gate pixel structure uses more gate drive wafers and fewer source drive wafers. Since the cost and power consumption of the gate driving chip are lower than that of the source driving chip, the double gate pixel structure design can greatly reduce the production cost and power consumption.

A schematic diagram of the structure of the drive circuit of a general double-gate liquid crystal display device is shown in Fig. 1. The dual gate liquid crystal display device includes a source driving circuit 200, a timing controller 210, a gate driving circuit 220, and a liquid crystal display panel 300. The liquid crystal display panel 300 includes a scanning line unit G disposed in a horizontal direction and parallel to each other, a data line D′ and a pixel array P disposed in a vertical direction and parallel to each other, wherein the data line D′ has a total of m strips. The m-th data line D 'is the D' _m, the scanning lines G there are n cells, so the n-th scan line G _n to G units, and each of the scanning lines G _n means comprises a first scan line G and _oN A second scan line G _sn , the pixel array P contains a plurality of pixels P _x . In the above, the source driving circuit 200 can generate the data signal SD', wherein the gate driving circuit 220 can generate the scan signal SG, and the timing controller 210 can generate the driving source driving circuit 200 and the gate driving The control signals required by the circuit 220, such as the latch pulse signal TP and the image data signal DATA, etc. The gate driving circuit 220 can sequentially output the scan signal SG to the scan line unit G according to the received latch pulse signal TP, and the source drive circuit 200 can respectively output the corresponding image according to the received image data signal DATA. Data signal SD' like grayscale value to data line D'. Therefore, under the operation of the circuit as described above, the liquid crystal display panel 300 can control the image display of each pixel P _x according to the input data signal SD', thereby displaying the image on the liquid crystal display panel 300. In the liquid crystal display panel 300, each pixel P _x in the pixel array P has a thin film transistor (TFT) 512 as a switch.

In a liquid crystal display panel, each pixel itself must be driven in a polarity inversion manner, but in the case of a pixel array, adjacent pixels in the array do not have to be driven with the same polarity. The pixel array polarity inversion methods used now include frame inversion, column inversion, column inversion, and dot inversion. The conventional single-point inversion method means that each pixel in each frame has the opposite polarity of the voltage of the pixels around it, and the two-point inversion method refers to inverting the pixel in a vertical direction. Its voltage polarity reverses its voltage polarity in units of two pixels along the horizontal direction. A two-dot inversion method is mentioned, for example, in the patent US20080068516A1. The liquid crystal display panel in Fig. 1 adopts a single point plus two-point polarity inversion method. Specifically, as shown in FIG. ₁ , the polarities of the pixels P _x connected to the odd-numbered scanning line units G ₁ , G ₃ , G ₅ , . . . are [+--++--...+ ], the polarities of the pixels P _x connected to the even-numbered scanning line units G ₂ , G ₄ , G ₆ , . . . are sequentially [-++--++...-]. The single-point plus double-dot inversion method is matched with the above-mentioned double-gate pixel structure, so that the pixel P _x connected to the left and right sides of the same data line D' has different voltage polarities in the same frame, thereby causing The screen displays unevenness, which leads to poor image quality.

Please refer to FIG. 2 at the same time. FIG. 2 is a waveform diagram of the scan line turn-on sequence and the data line output signal in the prior art. The inversion period t is defined as the time sum of each time the positive signal and the negative signal are outputted by the data line D′, and each inversion period t includes a first time period t ₁ and a second time period t ₂ . FIG 1, FIG. 2 of the prior art, the ₁ in the first scanning line units _O1 G G scan line turn the first scan, each time data line D 'output the first data signal is called the initial time period t ₁ '; _a second scan line of the first scan line _S1 and the _second cell G G cells line scanning of the first scan line G ₂ G _o2 open scan line data D' output data signal a second time period t _2, which is t ₁ 'as an initial first time period twice; second scanning line ₂ in the second scanning line units G G _s2 third scan line units G ₃ When the first scan line G _{o3 is} turned on, the data line D' outputs the data signal for the first time period t ₁ , which is also twice the initial first time period t ₁ '; and so on, all subsequent times The segments [t ₂ -t ₁ -t ₂ ...] are all twice the initial first time period t ₁ '. Therefore, the data signal outputted by the initial first time period t ₁ ' and the data signal outputted by the subsequent time period [t ₂ -t ₁ -t ₂ ...] may be asymmetrical, so that the picture display quality is not ideal. At the same time, under the requirement of panel cost, considering the power consumption factor, based on the above-mentioned single-point plus double-dot inversion structure, the pixels connected to the left and right sides of the same data line have opposite polarities, so the data line outputs signals. The positive and negative reversal frequencies are large, and it is impossible to achieve more power saving purposes. In addition, in the patent US Pat. No. 6,750,835 B2, the use of the scanning line to select the driving mode for the purpose of power saving is mentioned. However, in the above-mentioned prior art structure, the power saving by the scanning line is limited.

In order to solve the above problems, the present invention provides a dual gate liquid crystal display panel, the structure comprising a plurality of scan line units, a plurality of data lines and a pixel array. The scan line unit includes a first scan line and a second scan line. The data line and the scan line unit are perpendicular to each other. The pixel array includes a first pixel unit, a second pixel unit, and a third pixel unit, wherein the first pixel unit and the third pixel unit each include a row of pixels and are electrically connected to a data line, and second The pixel unit includes a plurality of rows of pixels and is electrically connected to the same data line by two rows of pixels.

In an embodiment of the present invention, the first pixel unit is a first row of pixels, the second pixel unit is a second row to a penultimate row of pixels, and the third pixel unit is a first row of pixels. Specifically, the first data line is electrically connected to a first pixel unit, and the first data line is electrically connected to a third pixel unit, and the second data line is connected to the second data line. Each of the left and right sides of each data line is electrically connected to a second pixel unit. At the same time, the polarity of the first row and the second row of pixels are opposite, and the first row of the last line is opposite to the polarity of the pixel of the second to last row to achieve the effect of single point inversion of the first pixel unit and the third pixel unit. Located in the second data line to the second last data line, the left and right pixels on both sides of each data line have the same polarity to achieve the effect of double-point inversion of the second pixel unit.

At the same time, the driving method based on the structure of the double gate liquid crystal display panel is as follows: firstly, an odd number of scanning line units are sequentially turned on, and at the same time, a data signal is outputted to the pixels through the data lines, wherein the odd data lines output signals are positive polarity and even numbers The data line output signal is negative polarity; then the even number of scanning line units are continuously turned on, and the data signal is outputted to the pixels through the data line, wherein the odd data lines output signals are negative polarity, and the even number data line output signals are positive polarity; So that the first pixel unit and the third pixel unit are single point inversion, and the second pixel unit is double point inversion.

In one embodiment of the present invention, the odd-numbered scan line units constitute a plurality of scan line groups, and the even-numbered scan line units constitute a plurality of scan line groups, and then are loop-turned in the order of the scan line groups. At the same time, the time sum of the positive signal and the negative signal input once for the data line is defined as a reverse period, and the inversion period includes a first time period and a second time period, and the odd data lines are output in the first time period. Positive polarity, even data line output negative polarity, in the second time period, odd data lines output negative polarity, even data lines output positive polarity.

In one embodiment of the present invention, each of the odd-numbered scan line units is a set of scan line groups, and each of the two even-numbered scan line units is a set of scan line groups.

In another embodiment of the present invention, each of the three odd-numbered scan line units is a set of scan line groups, and each of the three even-numbered scan line units is a set of scan line groups.

In combination with the liquid crystal display panel structure and the driving method thereof, the present invention solves the asymmetry of the data signals outputted by the data lines in the liquid crystal display panel due to the initial first time period and the subsequent time period, and the left and right sides of each data line. The problem of poor display of the picture caused by the polarity of the connected pixels of the electrical connection, and simultaneously changing the scanning line opening order by dividing the odd-numbered scanning line unit and the even-numbered scanning line unit in all the scanning line units into a plurality of scanning line groups Reduce the inversion frequency of the data line output signal to achieve more power saving.

The present invention will be further described with reference to the accompanying drawings and embodiments in which the same elements are given the same reference numerals.

Please refer to FIG. 3, which is a schematic structural diagram of a driving circuit of a liquid crystal display device with a double gate structure according to the present invention. The dual gate liquid crystal display device includes a source driving circuit 200, a timing controller 210, a gate driving circuit 220, and a liquid crystal display panel 100. The liquid crystal display panel 100 includes a scanning line unit G disposed in a horizontal direction and parallel to each other, a data line D and a pixel array P disposed in a vertical direction and parallel to each other, wherein the data line D in the present case has a total of m+ 1 bar, so the m+1th data line D is D _m+1 , and the scan line unit G has n, so the nth scan line unit G is G _n , and the pixel array P contains a plurality of pixels P _x , the pixels P _{x are} disposed in a region formed by the intersection of the scan line unit G and the parallel data line D, and the pixels P _x are electrically connected to the corresponding scan line unit G and the data line D, respectively. In the above, the source driving circuit 200 can generate the data signal SD, wherein the gate driving circuit 220 can generate the scan signal SG, and the timing controller 210 can generate the driving source driving circuit 200 and the gate driving circuit. 220 required control signals, such as the latch pulse signal TP and the image data signal DATA. The gate driving circuit 220 can sequentially output the scan signal SG to the scan line unit G according to the received latch pulse signal TP, and the source drive circuit 200 can respectively output the corresponding image according to the received image data signal DATA. Data signal SD like grayscale value to data line D. Therefore, under the operation of the circuit as described above, the liquid crystal display panel 100 can control the image display of each pixel P _x according to the input data signal SD, thereby displaying the image on the liquid crystal display panel 100.

Please refer to FIG. 4 again. FIG. 4 is a schematic structural view of the liquid crystal display panel 100 in FIG. Each of the scan line units G _n includes a first scan line G _on and a second scan line G _sn , that is, the first scan line unit G ₁ includes a first scan line G _o1 and a second scan line G _s1 , The two scan line units G ₂ include a first scan line G _o2 and a second scan line G _s2 , and so on, the nth scan line unit G _n includes a first scan line G _on and a second scan line G _sn , and Each of the scanning line units G _{n is} electrically connected to the pixel array P. In addition, the pixel array P is divided into three groups of pixel units, which are a first pixel unit 110, a second pixel unit 120, and a third pixel unit 130. First, the pixel unit 110 is defined to include a first line. pixel P _x, which is the first row for the pixel of pixel array P P _x, and the first pixel of the first row of the pixel unit 110 includes P _X are electrically connected to the first data line D ₁ And continuously connected to the first scan lines G _o1 , G _o2 , . . . , G _on in each scan line unit G. Next, the second pixel unit 120 is defined to include the second row of pixels P _x to the second to last row (ie, the 2m-1th row) pixel P _x (which does not include the first row and the last row of pixels P _x ), wherein The second pixel unit 120 further includes an odd line pixel 121 and an even line pixel 122. In the above, the odd line pixels 121 in the second pixel unit 120 are electrically connected to the second data line D ₂ to the mth data line D _m respectively, and are respectively located on the left side of the data lines D. And at the same time electrically connected to the second scan lines G _s1 , G _s2 , . . . , G _sn in each scan line unit G respectively; the even number of pixels 122 in the second pixel unit 120 are respectively electrically Connecting the second data line D ₂ to the mth data line D _m , which are respectively located on the right side of the data lines, and are electrically connected to the first scan lines in each of the scan line units G respectively G _o1 , G _o2 , ..., G _on . Finally, the third pixel unit 130 is defined to include a second m-line pixel P _x , which is the last row of pixels P _x of the pixel array P, which is electrically connected to the m+1th data line D _m+1 , and They are electrically connected to the second scan lines G _s1 , G _s2 , . . . , G _sn in each of the scan line units G, respectively. In other words, in the structure of the liquid crystal display panel 100, the first data line D _{1 is} electrically connected to the first pixel unit 110, that is, the first line pixel P _x in the pixel array P, The m+1th data line D _{m+1 is} electrically connected to the third pixel unit 130, that is, the last row of pixels P _x in the pixel array P, and each of the intermediate data lines D ₂ to D _m The left side of one data line is electrically connected to the odd line pixels 121 of the second pixel unit 120, and the right side is electrically connected to the even line pixels 122 of the second pixel unit 120, respectively.

As shown in Fig. 4, the following describes the inversion mode of the liquid crystal display device in the present case. The conventional dot inversion method is a single dot inversion method, that is, the pixel polarity of each pixel and its surrounding pixels are opposite. The two-dot inversion method refers to inverting the polarity of the voltage in a single pixel in the vertical direction, and inverting the polarity of the voltage in units of two pixels in the horizontal direction. In this case, the above double gate liquid crystal display panel driving structure is matched with a single point plus double dot inversion method, that is, the polarity of the first row and the second row of pixels P _x in the present case is opposite, and the first row of the last line and the penultimate line are drawn. The polarity of the pixel (ie, the 2m-1th row) P _x is opposite to the first pixel unit 110 electrically connected to the first data line D _{1 and} electrically connected to the last first data line D _m+1 The third pixel unit 130 is arranged in a single dot inversion manner, and is disposed on the left and right pixels P _x on both sides of each of the second data line D ₂ to the second to last data line D _m The polarities are the same to achieve the two-point inversion of the second pixel unit 120. Specifically, as shown in FIG. 4, the polarities of the pixels P _x connected to the odd-numbered scanning line units G ₁ , G ₃ , G ₅ , . . . are [+--++--++. ..+], the polarity of the pixel P _x connected to the even-numbered scanning line units G ₂ , G ₄ , G ₆ , . . . is [-++--++--...-]. In this way, the above-mentioned driving architecture is matched with the single-point plus double-dot inversion method described above, and the odd-line pixels of the left and right sides of the same data line D in the second pixel unit 120 respectively located in the data lines D ₂ to D _m are maintained. The voltages of 121 and even rows of pixels 122 are the same.

Referring to FIG. 5 again, the inversion period T is first described as the time sum of the positive signal and the negative signal input once for the data line D, and each inversion period T includes a first time period T ₁ and a first period. Two time periods T ₂ , where T ₁ or T ₂ is a half inversion period T/2. In the first time period T ₁ shown in the figure, the data signals output by all the odd data lines D ₁ , D ₃ , D ₅ ... are the same as the first polarity, and all the even data lines D ₂ , The data signals output by D ₄ , D ₆ ... are the same as the second polarity; in the second time period T ₂ , the data signals output by all the odd data lines D ₁ , D ₃ , D ₅ ... are inverted The second polarity, and the data signals output by all the even data lines D ₂ , D ₄ , D ₆ ... are inverted to the first polarity, and the first polarity and the second polarity are opposite to each other. Different polarity.

The first embodiment of the present invention will be specifically described below. Please refer to FIG. Two odd-numbered scan line units (for example, the first scan line unit G ₁ and the third scan line unit G ₃ ) are taken as one scan line group, and two even-numbered scan line units are simultaneously (for example, the second one The scanning line unit G ₂ and the fourth scanning line unit G ₄ ) are used as one scanning line group. As shown in FIG. 5, first, the first scanning line unit G ₁ and the third scanning line unit G _{3 are taken} as the first scanning line group S ₁ ; the second scanning line unit G ₂ and the fourth scanning The line unit G ₄ serves as the second scan line group S ₂ ; the fifth scan line unit G ₅ and the seventh scan line unit G ₇ serve as the third scan line group S ₃ ; and so on, the remaining scan lines Units G ₆ , G ₈ , G ₉ , ... G _n are grouped according to the above rules. Then, scanning lines are sequentially turned on in accordance with the order of the scanning line groups S ₁ , S ₂ , S ₃ , . Specifically, as shown in the figure, first, the first scan line G _o1 in the first scan line unit G ₁ of the first scan line group S _{1 is} turned on, and each data line D is turned on the first scan line. Each pixel P _x connected to the first scan line G _o1 in the cell G ₁ is charged with a data signal, and after the data signal is charged, the first scan line G _o1 in the first scan line unit G ₁ is turned off. And then turning on the second scan line G _s1 in the first scan line unit G ₁ while each data line D is connected to each pixel on the second scan line G _s1 in the first scan line unit G ₁ P _{x is} charged with the data signal, and after the data signal is charged, the second scan line G _s1 in the first scan line unit G ₁ is turned off; then the third of the first scan line group S ₁ is turned on again. The first scan line G _o3 of the scan line unit G ₃ , and the data lines D charge the data signal of the pixel P _x connected to the first scan line G _o3 of the third scan line unit G ₃ , after completion of the data signals is charged, the third closing unit is a first scan line of the scan lines G ₃ G _o3, and then turn on the second scan _{line. 3} G in the third scanning line units G _S3 , at the same time, each data line D is charged with a data signal for the pixel P _x connected to the second scan line G _s3 of the third scan line unit G ₃ , and after the data signal is charged, the third is turned off. a second scan line G _s3 in the scan line unit G ₃ ; secondly, the second scan line group S ₂ and the third scan line group S ₃ are sequentially turned on, and the subsequent scan line group S ₄ is successively driven according to the above method. S ₅ , S ₆ ..., and charge the corresponding data signal. The data signals output by all the odd data lines D ₁ , D ₃ , D ₅ ... in the first time period T ₁ in which each of the odd scanning line groups S ₁ , S ₃ , S ₅ ... is turned on are The first polarity, the positive polarity in the figure, and the data signals output by all the even data lines D ₂ , D ₄ , D ₆ ... are the second polarity, and the second polarity is opposite to the first polarity, in the figure It is negative polarity. And the data signals output by all the odd data lines D ₁ , D ₃ , D ₅ ... in the second time period T ₂ in which each of the even scan line groups S ₂ , S ₄ , S ₆ ... is turned on are The second polarity, and the data signals output by all the even data lines D ₂ , D ₄ , D ₆ ... are the first polarity, and the first polarity and the second polarity are two positive and negative opposite polarities. In addition, each of the first time period T ₁ is equal to the length of each of the second time periods T ₂ and is a half inversion period T/2.

In summary, the left and right of the data line D caused by the asymmetry of the initial first time period t ₁ ' and the subsequent time period [t ₂ -t ₁ -t ₂ ...] in the second figure The problem of uneven display visual effect caused by different side polarities, the driving method of the present case ensures that the data line D is symmetrical in all time periods [T ₁ -T ₂ -T ₁ -T ₂ ...], thereby The problem of uneven display visual effects of the liquid crystal panel is improved. And in combination with the scanning line unit G, the scanning line groups S ₁ , S ₂ , S ₃ , ... are sequentially turned on, so that the inversion frequency 1/T of the data line D output signal is lowered, that is, two or two scanning lines. The units are divided into one group, so that the inversion frequency 1/T of the data line D output signal is reduced to one-half of the original, that is, the power consumption on the data line D is saved by half.

According to the above method, the second embodiment of the present invention will be specifically described. Please refer to FIG. 3 and FIG. 6 at the same time. Three odd-numbered scan line units (for example, the first scan line unit G ₁ , the third scan line unit G _{3 ,} and the fifth scan line unit G ₅ ) are taken as one scan line group, and three even-numbered strips are simultaneously selected The scanning line unit (for example, the second scanning line unit G ₂ , the fourth scanning line unit G _{4 ,} and the sixth scanning line unit G ₆ ) serves as one scanning line group. As shown in FIG. 6, wherein the first units of the first scan line G _1, the third scanning line unit G ₃ and the fifth scanning line unit G ₅ as the first group of scan lines S _1; second scan The line unit G ₂ , the fourth scanning line unit G ₄ and the sixth scanning line unit G _{6 are} used as the second scanning line group S ₂ ; the seventh scanning line unit G ₇ and the ninth scanning line unit G ₉ are 11 units of the scanning lines G ₁₁ as the third scan line group S _3; and so on, the rest scan line, unit _{G 8, G 10, ... G} n are grouped in accordance with the above rules. Then, scanning lines are sequentially turned on in accordance with the order of the scanning line groups S ₁ , S ₂ , S ₃ , . As shown in the figure, first, the first scan line G _o1 in the first scan line unit G ₁ of the first scan line group S _{1 is} turned on, and each data line D is in the first scan line unit G ₁ . Each pixel P _x connected to the first scan line G _o1 is charged with a data signal, and after the data signal is charged, the first scan line G _o1 in the first scan line unit G ₁ is turned off, and then the first a second scan line G _{s1 of} one scan line unit G ₁ , and each data line D is charged to each pixel P _x connected to the second scan line G _s1 of the first scan line unit G ₁ After the data signal is completed, the second scan line G _s1 in the first scan line unit G ₁ is turned off; then the third scan line unit in the first scan line group S ₁ is turned on. The first scan line G _{o3 in} G ₃ , and each data line D is charged with a data signal to the pixel P _x connected to the first scan line G _o3 of the third scan line unit G ₃ , and the data signal is charged. after the completion, close the third scan line units in the first scan lines G ₃ G _o3, and then turn on the second scanning line G _{s3 3} in the third scan line unit G, while _S3 connected to the second scan line G in the _3-D data lines of the scanning line three pixel units P _x G charging information signal, the information signal to be charged is completed, close the third scanning line units G ₃ of a second scan line G _s3; followed by reopening G _o5 first scan line of the first scan line segments S ₁ in the fifth scanning line in the unit G _5, while each of the fifth to the data lines D The pixel P _x connected to the first scan line G _o5 of the scan line unit G ₅ is filled with the data signal, and after the data signal is charged, the first scan line of the fifth scan line unit G ₅ is turned off. G _o5, and then turning on the fifth scanning line G ₅ units of the second scan lines G _s5, while each of the data line D on the second scanning line of the scanning line unit 5 G ₅ G _s5 are connected Videos pixel data P _x charging signal, the information signal to be charged is completed, a second scan line off the fifth scanning line unit G ₅ is G _s5; followed by re-opening sequence of the second scan line group S _2, the first The three scanning line groups S ₃ are successively driven to drive the subsequent scanning line groups S ₄ , S ₅ , S ₆ ... according to the above method, and are charged with corresponding data signals. The data signals output by all the odd data lines D ₁ , D ₃ , D ₅ ... in the first time period T ₁ in which each of the odd scanning line groups S ₁ , S ₃ , S ₅ ... is turned on are The first polarity, the positive polarity in the figure, and the data signals output by all the even data lines D ₂ , D ₄ , D ₆ , ... are the second polarity, and the second polarity is opposite to the first polarity, Medium is negative polarity. And the data signals output by all the odd data lines D ₁ , D ₃ , D ₅ , ... in the second time period T ₂ in which each of the even scan line groups S ₂ , S ₄ , S ₆ ... is turned on For the second polarity, the data signals output by all the even data lines D ₂ , D ₄ , D ₆ , . . . are the first polarity, and the first polarity and the second polarity are opposite polarities of the two positive and negative polarities. In addition, each of the first time period T ₁ is equal to the length of each of the second time periods T ₂ and is a half inversion period T/2.

In summary, the initial first time period t ₁ ' of the second picture of the previous case is asymmetrical with the subsequent time period [t ₂ -t ₁ -t ₂ ...], causing a problem of uneven visual display. The driving method of the present invention ensures that the data line D is symmetrical over all time periods [T ₁ -T ₂ -T ₁ -T ₂ ...], thereby improving the display visual unevenness problem of the liquid crystal panel. And means with the scanning line G _n are sequentially turned on and then grouping the scanning line groups _{S 1, S 2, S 3} , ..., so that the data line D inversion frequency of the output signal 1 / T is reduced, i.e., three scanning The line units are grouped into one, so that the inversion frequency 1/T of the data line D output signal is reduced to one-third of the original, that is, the power consumption on the data line D is saved by two-thirds.

The driving structure is combined with the single point plus double dot inversion method to improve the polarity of the voltage stored in the pixels P _x connected to the left and right sides of the intermediate data line D, and each of the first time periods T ₁ and each The equalization of the two time periods T ₂ improves the problem that the output signal of the data line is asymmetrical with the subsequent time period [t ₂ -t ₁ -t ₂ ...] in the initial first time period t ₁ ', thus improving the display quality. Simultaneously, the odd-numbered scanning line units G ₁ , G ₃ , G ₅ , . . . and the even-numbered scanning line units G ₂ , G ₄ , G ₆ , . . . in the scanning line unit G are grouped as a plurality of scanning lines. The groups S ₁ , S ₂ , S ₃ , . . . are sequentially scanned in the order of the scan line groups S ₁ , S ₂ , S ₃ , . . . , which can reduce the inversion frequency of the data line D. T, to achieve more power-saving purposes.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope defined by the scope of the claims shall prevail.

200. . . Source drive circuit

210. . . Timing controller

220. . . Gate drive circuit

100, 300. . . LCD panel

512. . . Thin film transistor

G, G ₁ ~ G _n . . . Scan line unit

G _o1 ~G _on . . . First scan line

G _s1 ~G _sn . . . Second scan line

S ₁ , S ₂ , S ₃ .... . . Scanning line group

D', D, D' ₁ ~ D' _m , D ₁ ~ D _m+1 . . . Data line

P. . . Pixel array

P _x . . . Pixel

110. . . First pixel unit

120. . . Second pixel unit

121. . . Odd line pixels in the second pixel unit 120

122. . . Even line pixels in the second pixel unit 120

130. . . Third pixel unit

Fig. 1 is a schematic view showing the driving structure of a double gate liquid crystal display device in the prior art.

Fig. 2 is a waveform diagram of the scanning sequence of the scanning line and the output signal of the data line in Fig. 1.

Fig. 3 is a schematic view showing the driving structure of a double gate liquid crystal display device in the present case.

Fig. 4 is a view showing the structure of the liquid crystal display panel of Fig. 3.

Fig. 5 is a waveform diagram showing the scanning line opening sequence and the data line output signal in the present case.

Fig. 6 is a waveform diagram showing another scan line turn-on sequence and a data line output signal in the present case.

D ₁ ~D _m+1 . . . Data line

G ₁ ~G _n . . . Scan line unit

110. . . First pixel unit

120. . . Second pixel unit

130. . . Third pixel unit

Claims (15)

A driving structure of a dual-gate liquid crystal display panel, comprising: a plurality of scanning line units, each scanning line unit comprising a first scanning line and a second scanning line; and a plurality of parallel data lines, and the The scan line units are perpendicular to each other; a pixel array comprising three pixel units, a first pixel unit, a second pixel unit, and a third pixel unit, wherein the first pixel unit and the third pixel unit Each of the first pixel units and the third pixel unit are electrically connected to one data line, and the pixels in the second pixel unit are two columns. Connect the same data line electrically to a group. The driving structure of the double-gate liquid crystal display panel according to claim 1, wherein the first pixel unit is a first line of pixels, and the second pixel unit is a second line to a penultimate line. Prime, the third pixel unit is the first row of pixels in the last. The driving structure of the double-gate liquid crystal display panel of claim 2, wherein the first data line is electrically connected to the first pixel unit, and the first data line is electrically connected to the first line. And a third pixel unit, wherein the second pixel unit is electrically connected to each of the left and right sides of each of the second data line to the second data line. The driving structure of the double-gate liquid crystal display panel according to claim 3, wherein the first row and the second row of pixels have opposite polarities, and the first row of the last row is opposite to the polarity of the second-to-last row of pixels. In order to achieve the effect of single point inversion of the first pixel unit and the third pixel unit. The driving structure of the double-gate liquid crystal display panel according to claim 3, wherein: the left and right pixels disposed on both sides of each of the data lines are located in the second data line to the second data line The polarity is the same to achieve the effect of double-point inversion of the second pixel unit. A method for driving a dual-gate liquid crystal display panel according to claim 1, wherein: firstly, an odd number of scanning line units are sequentially turned on, and at the same time, a data signal is charged to the pixel through the data line, wherein the odd number is The input signal of the data line is positive, and the input signal of the even data line is negative; then the even scan line unit is turned on, and the data signal is charged to the pixel through the data line, wherein the odd data line input signal is The negative polarity, the even data line input signal is positive polarity; so that the first pixel unit and the third pixel unit are single point inversion, and the second pixel unit is double point inversion. The method of driving a double-gate liquid crystal display panel according to claim 6, wherein the odd-numbered scanning line units are formed by a plurality of scanning line groups. The method of driving a double-gate liquid crystal display panel according to claim 7, wherein the scan line group is a group of two odd-numbered scan line units. The method of driving a double-gate liquid crystal display panel according to claim 7, wherein the scan line group is a group of every three odd-numbered scan line units. The method of driving a double-gate liquid crystal display panel according to claim 6, wherein the even-numbered scanning line units are formed by a plurality of scanning line groups. The method for driving a dual-gate liquid crystal display panel according to claim 10, wherein the scan line group is a group of two even-numbered scan line units. The method for driving a dual-gate liquid crystal display panel according to claim 10, wherein the scan line group is a group of three even-numbered scan line units. The method for driving a double-gate liquid crystal display panel according to claim 7 or 10, wherein a plurality of scan line groups of the odd-numbered scan line units and a plurality of scan line units of the even-numbered scan line units are grouped back The circle is turned on. The method for driving a dual-gate liquid crystal display panel according to claim 6, wherein the time sum of the positive signal and the negative signal input for each of the data lines is an inversion period, and the inversion period includes a first A period of time and a second period of time. The method for driving a dual-gate liquid crystal display panel according to claim 14, wherein in the first period of the inversion period, the odd data lines output positive polarity, and the even data lines output negative polarity; At the same time, in the second period of the inversion period, the odd data lines output negative polarity, and the even data lines output positive polarity.