TW201218604A - capable of providing low harmonic distortion and high efficiency three-phase AC power source - Google Patents
capable of providing low harmonic distortion and high efficiency three-phase AC power source Download PDFInfo
- Publication number
- TW201218604A TW201218604A TW99136014A TW99136014A TW201218604A TW 201218604 A TW201218604 A TW 201218604A TW 99136014 A TW99136014 A TW 99136014A TW 99136014 A TW99136014 A TW 99136014A TW 201218604 A TW201218604 A TW 201218604A
- Authority
- TW
- Taiwan
- Prior art keywords
- phase
- current
- output
- power
- harmonic
- Prior art date
Links
Landscapes
- Inverter Devices (AREA)
Abstract
Description
201218604 六、發明說明: 【發明所屬之技術領域】 本發明所涉及之_包錢力電子、交流/纽整祕術、自 動控制等㈣’主要係關於—種特定諧波消除之多階層電流源變 頻器的方法及裝置,本發明提出模組化之單相交流電源轉三相三 階層電流源變顧並聯_,省略了現有文獻賴+,使用上下 鲁電感來平衡輸出電流各階層位準,同時亦可多模組化並聯使用, +申二輸出電心層’喊三相多階層電流源變頻器。因此,在 =力率應料。中,使用多階層變頻器架構,將輸出容量分散於 夕組功率開關元件上,降低每個_元件上之顏、電流切換應 ,、及藉由外波合成之近似正弦波輸出波形,並使用特定譜 波消除之脈波寬度調變來降低輸出波形之諧波含量。 【先前技術】 _ 在工_域巾’在傳統的:階層變㈣雜巾,常利用提高 切換頻率方絲降低輸㈣麵錢的諧波量,但在高功率應用 時’功率铸體元件須承受高電壓與高電流切換,且須較長的切 換時間’因此切換頻率較—般的低,導致其輸出電㈣電流含較 回的谐波量’易影響電力品質。另外受限於功率半導體元件製程 技術魏頸,功料導體元件皆具有_、耐流與切換速度上的 限制’若要追求高耐壓、耐流與祕速度的功钟賴元件其價 格往往不便宜。 、 201218604 因此’當在高功率應用時’使用多階層變頻器架構,將輸出 容量分散於多組功率開關元件上,降低每個開關元件上之電壓、 電流應力,以及藉由多階合成輸出波形,以降低輸出波形之總諧 波含量。 多階層變頻器大多數元件都是藉由切換裝置及電容式電壓源 所組成’藉由適當的控制切換裝置來產生低諸波失真的步級輸出 波形’由於运些多階變頻器能克服傳統的脈波寬度調變的缺點, φ目此被製造廠廣泛的使用和認可為一個新的電力轉換方法,一般 的商用多_變_架構大致可被分為:錯層輕雜構和多階 層電流源架構兩大類’其中單相多階層電壓源變頻器架構又可分 為二極體箝位式(neutral-p〇int-damped,Νρρ、電容箝位式(flying capacitor, FQ及串接橋式(cascaded H_bridge,CHB)等架構。此三種 架構亦可延伸應用至三相系統上。 在三相多階層電流源變頻器研究文獻之架構,如圖2所示。 鲁此電路架構可延伸其電流等級至2州階層(其中乃為正整數)。又 因多階層電流源變頻器架構中,考量每個功率半導體元件需均勻 分配承受所流過電流大小,減低功率半導體元件上之電流切換應 力,且在功率半導體元件等級選用上也較為方便。 本專利所提出之三相五階層電流源變頻器架構,改善研究文 獻中多階層電流源變頻器電路架構中功率半導體元件電流分配不 均之缺點,進而提升之可紐與壽命;並彻歡譜波消 除之脈波寬度調變策略’消除特定諧波並控制三相五階層電源變「 [S ] 5 201218604 頻器之輸出。 【發明内容】 本發明之目的即在提供更低魏失真、高效率、且適用於較 兩功率場合之三相交流電源,且減少了現有文獻架構中,使用上 下_來平衡輸出電流各階層準位。因此,在高功率應用場合中’ •使用本多階層變頻器架構,除了將輸出容量分散於多組功率開關 兀件上,降低每個開關元件上之電壓、電流切換應力,以及藉由 多階波合紅独絲蘭,朗_定諧波崎低輸出 波形之譜波含量。 本發明使料线波消除之脈波寬度調變(sdectiv Harmomc Ehmination Pulse -Width Modulation, SHE-PWM)*^|201218604 VI. Description of the Invention: [Technical Fields According to the Invention] The present invention relates to a multi-layer current source for a specific harmonic elimination, such as _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The method and device of the frequency converter, the invention proposes a modular single-phase AC power supply to a three-phase three-layer current source to turn into parallel _, omitting the existing literature 赖+, using the upper and lower Lu inductors to balance the output current levels of each level, At the same time, it can also be used in multiple modules in parallel, and the second output of the electric core layer is called the three-phase multi-level current source inverter. Therefore, at = the force rate should be expected. In the multi-layer inverter architecture, the output capacity is dispersed on the power switch components of the squad, the color and current switching on each _ component are reduced, and the approximate sine wave output waveform synthesized by the external wave is used and used. The pulse width of a particular spectral cancellation is modulated to reduce the harmonic content of the output waveform. [Prior Art] _ In the work _ domain towel 'in the traditional: tier change (four) shawl, often use the increase of switching frequency square wire to reduce the amount of harmonics of the (four) face money, but in high power applications 'power casting components must Withstand high voltage and high current switching, and have a long switching time 'so the switching frequency is lower than normal, so that its output power (four) current contains a smaller amount of harmonics 'easy to affect power quality. In addition, it is limited by the power semiconductor component process technology Wei neck, the power material conductor components have _, the resistance to flow and the switching speed limit 'If you want to pursue high pressure, flow and secret speed, the price of the components is often not Cheap. 201218604 Therefore, when used in high-power applications, the multi-level inverter architecture is used to spread the output capacity across multiple sets of power switching elements, reducing the voltage and current stress on each switching element, and multi-level composite output waveforms. To reduce the total harmonic content of the output waveform. Most components of multi-level inverters are composed of switching devices and capacitive voltage sources. 'Step output waveforms with low wave distortion are generated by appropriate control switching devices'. The shortcomings of the pulse width modulation, φ mesh is widely used and recognized by the manufacturer as a new power conversion method. The general commercial multi-variable _ architecture can be roughly divided into: staggered light hybrid structure and multi-level There are two main types of current source architectures. The single-phase multi-level voltage source inverter architecture can be divided into two-phase clamp-type (neutral-p〇int-damped, Νρρ, capacitive clamp (finging capacitor, FQ and series bridge). Architecture (cascaded H_bridge, CHB), etc. These three architectures can also be extended to three-phase systems. The architecture of the research literature for three-phase multi-level current source inverters is shown in Figure 2. This circuit architecture can extend its The current level is up to the 2 state level (which is a positive integer). Also, due to the multi-level current source inverter architecture, it is considered that each power semiconductor component needs to be uniformly distributed to withstand the magnitude of the current flowing, and the power semiconductor component is reduced. The current switching stress is also convenient in selecting the power semiconductor component level. The three-phase five-layer current source inverter architecture proposed in this patent improves the current of the power semiconductor component in the circuit structure of the multi-level current source inverter in the research literature. Disadvantages of uneven distribution, and thus improve the energy and life; and the pulse width modulation strategy of eliminating the spectrum wave elimination 'eliminating specific harmonics and controlling the three-phase five-level power supply change' [S ] 5 201218604 frequency converter output SUMMARY OF THE INVENTION The object of the present invention is to provide a three-phase AC power supply with lower Wei distortion, high efficiency, and suitable for two power applications, and reduce the use of the upper and lower _ to balance the output current levels in the existing literature architecture. Therefore, in high-power applications, • use this multi-level inverter architecture, in addition to distributing the output capacity across multiple sets of power switch components, reducing the voltage and current switching stress on each switching element, and borrowing The multi-order wave is combined with the red yucca, and the spectral wave content of the output waveform of the harmonic wave is low. The pulse width of the line wave is eliminated by the present invention. Modulation (sdectiv Harmomc Ehmination Pulse - Width Modulation, SHE-PWM)*^|
二相五階層電流源變頻器系統,再透過並聯諧振電路,產生似 真之一相弦波輸出電流。系統架構由兩組三騎電流源變頻器立 聯組成。脈波寬度觀之辦咖伟·瑞絲_啦却_ meth〇d)求關切換之特U度,作為五階層電流源變頻器切換保 關的觸發域’叫足魏_之要求。料得歡肖度可和 消除《個非三倍頻奇讀找波(如第五、七、十—、十三次··等 諧波),並藉蝴_之相移再州個奇次特定譜波。再加 上特定的30度及6G度這_肖歧為規敝計,可制3χ n次 諧波即三次、九次及第十五次諧波•·…。 201218604 開關驅動電路107、電流感測電路i〇9、絕對值平均輪出電路11〇 是以類比元件如電阻、電容、運算放大器、光耦合隔離驅動器等 所組成。電流與電壓感測電路主要是將實際電流與電壓轉換成數 位微處理器内的類比/數位模組可接受的信號範圍。而數位方式的 實現可使用數位信號處理器(DSP)及可程式邏輯元件(CPLD)所組 成的數位控制器,用以處理回授訊號、债測、運算以及提供開關 的觸發訊號命令,並經電力開關驅動電路驅動變流器之電力開 • 關,完成本發明之控制驅動裝置。本發明使用數位控制器之數位 信號處理器為TMS320F2812,可程式邏輯元件為ispMACH 4256V。 本發明之變流器所使用的電力開關是由高功率半導體元件, 如閘極絕緣雙極性電晶體(IGBT)、雙極性接面電晶體(BJT)等可控 開關所組成。 【實施方式】 本發明之系統電路架構如圖!所示,可概分為前級與後級兩 部份。前級之直流電流源輸出是由單相全橋整流電路1〇3與直流 轉直流降壓轉換器104所組成,利用電流磁滯控制使其成為一個 可控制的錢電絲;喊級為直流触流之三相電_變頻器 105。前級所提供之直流電流源,轉換為針對特定驗消除的交流 波形,且運祕定·:消除之脈波寬度鞭策略加上數值分析方 法,得到特定角度解作為兩模組切換開關的觸發訊號。兩模組並 201218604 聯合成後之多階層輸出電流,經過並聯諧振電路106放大Q倍以 後(Q為系統的諧振品質因數,即電路的昇流倍率),產生三相弦波 輸出電流。The two-phase five-layer current source inverter system is then passed through a parallel resonant circuit to produce a sinusoidal sine wave output current. The system architecture consists of two sets of three-ride current source inverters. The pulse width view of the coffee café, Rui Si _ 啦 _ 〇 _ ) ) ) 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求 求It is expected that the degree of joy can be eliminated and eliminated. "A non-three-frequency singular reading wave (such as the fifth, seventh, ten-, thirteenth, etc.), and the phase shift of the butterfly _ Specific spectral wave. In addition to the specific 30 degrees and 6G degrees, it is possible to make 3 χ n harmonics, that is, three, nine and fifteenth harmonics. 201218604 The switch drive circuit 107, the current sense circuit i〇9, and the absolute value average turn-off circuit 11〇 are composed of analog components such as resistors, capacitors, operational amplifiers, and optically coupled isolation drivers. The current and voltage sensing circuit primarily converts the actual current and voltage into an acceptable signal range for the analog/digital module within the digital microprocessor. The digital implementation can use a digital signal processor (DSP) and a programmable logic element (CPLD) digital controller to process the feedback signal, the debt measurement, the operation, and the trigger signal command to provide the switch, and The power switch drive circuit drives the power on/off of the converter to complete the control drive of the present invention. The digital signal processor using the digital controller of the present invention is TMS320F2812, and the programmable logic component is ispMACH 4256V. The power switch used in the converter of the present invention is composed of a high power semiconductor component such as a gate insulated bipolar transistor (IGBT) or a bipolar junction transistor (BJT). [Embodiment] The circuit architecture of the system of the present invention is as shown in the figure! As shown, it can be divided into two parts, the former stage and the latter stage. The DC current source output of the former stage is composed of a single-phase full-bridge rectifier circuit 1〇3 and a DC-to-DC buck converter 104, which uses current hysteresis control to make it a controllable money wire; Three-phase electric current_inverter 105. The DC current source provided by the pre-stage is converted into an AC waveform for specific test elimination, and the secret frequency: the eliminated pulse width whip strategy plus numerical analysis method, the specific angle solution is obtained as the trigger of the two module switch Signal. The multi-level output current of the two modules and 201218604 is combined, and after being amplified by Q times by the parallel resonant circuit 106 (Q is the resonance quality factor of the system, that is, the rising current rate of the circuit), a three-phase sine wave output current is generated.
f先模組A之前級視為定電流源,輸出電流為三相三階 :之k k ’α3 ’核組B之前級視為定電流源b,輸出電流為 三相三階層之4l、、心且等於〜,最後合成模組A與 模組B之輸出電流為三相五階層之心、^,其輸出電流有厂 H//2、/五種電流位階,其中電流鹆與_之和。 而各功率關所承受流過之f流位階相同。 藉由表1之輸出電餘階朗_換狀態義,可說明三相 ^階層電流源變頻器架構工作原理。由表ι之輸出狀態可分為三 比^6、#7〜#12細〜#18。輸出狀態#1〜#6之三相電流 =H/’輸出狀態#7〜#12之三相電流位階為 為=有兩種開關切換模式;輸出狀細〜#18之三相電流位 °利用輸出狀態#1〜#18之輸出合成後,可獲得 二_位階。由於輸出狀態#2〜#—^ #13之:3之卫作模式操作相同。因此,以下將只針_餐 #13之工作模式進行分析與說明。 〜、ΓΓ::此時開關 三相輪出電:二止,電流導通路徑如圖6所示’ 工作模式#7:開關?、c ^ 1關導通m⑸ 8 201218604 工作模式#7:開及〜 ς „ α2 ' ύα3 ' «5 m5及&皆戴止,電流導通路徑如圖7所示 :=、㈣導通,〜、“、、、二 二兩種_換模式㈣ 工作模式#13:鱗開關導通,n 心、m &及&皆截止,電流導通路徑如㈣獅3, 二相輸出電流&= 0 ϋ2、Zc =//2。 形當w之—獅嫩奇函數波 百 (輸出電流為變頻器輸入側直流鏈電流的 77 M 1,0、0及-1.0三個階層來表示,可消除《個非三倍 射:人特定魏(如第五、七、十—、十三次.··等諧波),並藉域 ==目:再消除第"+1個奇權諧波’再加上3G度及60度 =個=作為_設計的條件下,可自_除%次譜波,即 弟二、第九次諧波等。 如㈣麻’為枝綱職形以30 侧的 自嫩咖,祕組B為模組 角戶^ 再相移—個自由角和,如圖η所示。三個自由 二即可㈣由晴波含量。嘯齡與模組_ 輸出波形合成即為本系統之五階層輸出波形。 其中,池Α輪岐频級触葉分柯絲為 I S1 9 201218604 1 00 /α {ή = -zaA〇 +T,{aAh cos(hat) + bAh sin(^)} (1) ^ h=\ 由於AO)為四分之一週期對稱奇函數,因此 aA〇=aAh=() for/z=l,2,...,〇o ⑵ yAh for /z=2,4,...,〇o 'Ahf first module A is regarded as a constant current source, the output current is three-phase third-order: kk 'α3 'core group B is regarded as constant current source b, output current is 4l of three-phase three-level, and heart And equal to ~, the final output module A and module B output current is the three-phase five-level heart, ^, its output current has factory H / /2, / five current levels, where the current 鹆 and _ sum. The power flow is subjected to the same flow level as the f flow. The operating principle of the three-phase ^-level current source inverter structure can be explained by the output power residual lang_change state of Table 1. The output state of the table can be divided into three ratios ^6, #7~#12细〜#18. Output state #1 to #6 three-phase current = H / 'output state #7 ~ #12 three-phase current level is = there are two switch switching modes; output fine ~ #18 three-phase current bit ° use After the output of the output states #1 to #18 is synthesized, the second gradation can be obtained. Since the output state #2~#—^ #13: 3, the mode of operation is the same. Therefore, the following will only analyze and explain the working mode of the needle_meal #13. ~, ΓΓ:: At this time, the switch three-phase wheel is powered out: second, the current conduction path is as shown in Figure 6. 'Work mode #7: Switch? , c ^ 1 off conduction m (5) 8 201218604 working mode #7: open and ~ ς „ α2 ' ύα3 ' «5 m5 and & are wearing, the current conduction path is shown in Figure 7: =, (four) conduction, ~, " , , , 22 or 2 _ change mode (4) Working mode #13: The scale switch is turned on, n core, m & and & are off, current conduction path such as (four) lion 3, two-phase output current & = 0 ϋ 2 Zc = / /2. The shape of the w- lion tender function function wave hundred (output current is the input line side of the converter DC link current 77 M 1,0,0 and -1.0 three levels to represent, can eliminate "non-triple shot: person-specific Wei (such as the fifth, seventh, ten, thirteenth, ... and other harmonics), and borrow the domain == target: then eliminate the "quote +1 odd-weight harmonics" plus 3G degrees and 60 degrees = = = as a condition of _ design, can be removed from _% of the spectrum, that is, the second, the ninth harmonic, etc.. Such as (four) hemp 'for the branch profile with 30 side of the tender coffee, secret group B For the module corner household ^ phase shift - a free angle sum, as shown in Figure η. Three free two can be (four) from the clear wave content. Xiaoling and module _ output waveform synthesis is the system's five-level output waveform Among them, the Α Α 岐 级 触 分 柯 柯 I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I - - - =\ Since AO) is a quarter-cycle symmetric odd function, so aA〇=aAh=() for/z=l,2,...,〇o (2) yAh for /z=2,4,... ,〇o 'Ah
0 —icostej - cos ha2 +cos/z30° hn 1 -cos /z(60° -a2)+cosh(60° - a, )| for /z=l,3,...,〇〇 因此 ⑶⑷⑸ 而模組Β輸出波形規劃之傅立葉分析可表示為 ⑹ /β(ή =^saB〇 +X{^cos(/Kar)+^sin(to)} Z h=\ 由於為半波週期函數,故 aBQ = aBh=bBh=0 for /2=2,4,...,00 ⑺ -4 a0 —icostej - cos ha2 +cos/z30° hn 1 -cos /z(60° -a2)+cosh(60° - a, )| for /z=l,3,...,〇〇(3)(4)(5) The Fourier analysis of the module Β output waveform can be expressed as (6) /β(ή =^saB〇+X{^cos(/Kar)+^sin(to)} Z h=\ Since it is a half-wave periodic function, aBQ = aBh=bBh=0 for /2=2,4,...,00 (7) -4 a
Bh - ^ {coshax - cosha2 + cos/z30° - cos/z(60° -a2) +cosh(60° - ax )| sinhaz for /z=l,3,.··,〇〇 ⑻ 4 〇 〇 bBh =—{cos/za, - cosha2 +cos/z30° -cos/z(60° -a2) ⑼ +cos /z(60° - a{) J cos ha^ for/z=l,3,...,〇〇 00 201218604 因此, ^ έ Cos^hcot) + bBh sin( to)} (10) =(:即0)可Mll)式,即模組A與模組B輸出波形合 傅立葉分析如下 /〇-(0 = Λ(〇+/β(ί) 00 =Σ (¾c〇s(to) + + bBh)sm(hat)} 00 /』)為本專利所提出之系統輸咖彡方程式,此方程式為非線性 聽° 之錢波含量可表示為 f〇r^Uv..>00 (12) 本專利中,由於本系統輸出波形的基本波含量是由前級直流 鍵電抓來控制’幻x„次諧波成份是不存在的。因此,本系統輸 ^波形的最低三個魏成份為第五、七及十一次。藉由上述之概 Π第五、七及十—次奴是被賴為欲消除之魏成份,也就 是7 5 Γ7 0 1 0。自由角度利用式(4)、⑻、(9)及(12)可獲 得:個非祕聯立方餘。藉由此聯立方她,、^及 3疋11獲得的由於該絲組為非紐函數,斜頓-瑞福森數值 分析方法具有快速收斂雜,目此本專锻伟—瑞福森方法 來求取該聯立株組的自由角度解。藉由鮮模絲體刪沾, 求得三組自由角度解’如表2所示。由於第-組解_諧波失真 最小,因此’本㈣湖第—組肢參數來實行本發明所提出之 理論與架構。 201218604Bh - ^ {coshax - cosha2 + cos/z30° - cos/z(60° -a2) +cosh(60° - ax )| sinhaz for /z=l,3,.··,〇〇(8) 4 〇〇 bBh =—{cos/za, - cosha2 +cos/z30° -cos/z(60° -a2) (9) +cos /z(60° - a{) J cos ha^ for/z=l,3,. ..,〇〇00 201218604 Therefore, ^ έ Cos^hcot) + bBh sin( to)} (10) = (: is 0) can be Mll), that is, the output waveform of module A and module B is analyzed by Fourier analysis as follows /〇-(0 = Λ(〇+/β(ί) 00 =Σ(3⁄4c〇s(to) + + bBh)sm(hat)} 00 /』) is the system of the system for the transfer of coffee, This equation is a non-linear listening. The money wave content can be expressed as f〇r^Uv..>00 (12) In this patent, since the fundamental wave content of the output waveform of the system is controlled by the pre-stage DC key The 'magic x subharmonic component does not exist. Therefore, the lowest three Wei components of the system waveform are the fifth, seventh and eleven. By the above, the fifth, seventh and tenth times The slave is the component of the Wei that is to be eliminated, that is, 7 5 Γ 7 0 1 0. The free angle can be obtained by using the formulas (4), (8), (9) and (12): Simultaneous She, ^ and 3疋11 obtained because the silk group is a non-nucleus function, the Norton-Rifson numerical analysis method has a fast convergence, and the purpose of this special forging Wei-Rui Fusen method to obtain the simultaneous strain group The free angle solution. The three sets of free angle solutions are obtained by the blanking of the fresh mold filaments, as shown in Table 2. Since the first set of solutions has the smallest harmonic distortion, the 'fourth lake' Implement the theory and architecture proposed by the present invention. 201218604
此外為了提供三相弦波之高輸出電流,並聯諧振電路是用來 放大三相五階㈣娜之輸出電流,其放A倍枝由並聯諧振電 路之Q值所決定。其中q值是由並聯諧振電路之諧振頻率、串聯 等效電感值心及其繞線内阻值(有關。為了方便計算並聯諧振之Q 值,實際的串聯等效電感及其繞線内阻將被等效為並聯等效電感 及其繞線内阻的型式,其轉換關係為 rs = {_rs + (2^r/ X I, )2 / rs (13) ^=[Κ+(2π/χΣγ/(2π/ΥΣ] (14) 其中/為五階層輸出電流之系統頻率。由於本系統欲產生一高輸出 電流’因此’頻率/將控制在並聯譜振電路之譜振頻率,產生共振 以獲得三相弦波之高輸出電流,其諧振頻率的計算如下 机 (15) 其中c為並聯諧振電容值。 因此,利用式(13)-(15),可計算出q值為 Q = rJ2Kf0i (16) 本發明之TMS320F2812程式流程,如圖12_丨。開始先設定周 邊控制暫存器功能’並使用事件管理模組來設定本系統之中斷頻 率21.6kHz和予以複雜的可程式邏輯元件却嫩(^4256V使用之 外部輸入時脈2.16MHz。 當計數器發生中斷,即進入中斷副程式,如圖12-2。開啟類 比數位轉換通道,將電流回授訊號從類比轉換為數位值。並執行 S] 12 201218604 直流電流馳制_式與執行輸㈣流㈣副程式。 、· L電机源龜式.讀取電流命令值n。當Q a大於磁 ▼上限咖職止’當、小於辦下關開關導通,當以上狀態 都沒有符α時開關維持原狀態,k亦為如此,如圖⑸In addition, in order to provide a high output current of the three-phase sine wave, the parallel resonant circuit is used to amplify the output current of the three-phase fifth-order (four) nu, which is determined by the Q value of the parallel resonant circuit. The q value is the resonant frequency of the parallel resonant circuit, the series equivalent inductance value center and its winding internal resistance value. (In order to facilitate the calculation of the Q value of the parallel resonance, the actual series equivalent inductance and its winding internal resistance will be It is equivalent to the parallel equivalent inductance and its winding internal resistance. The conversion relationship is rs = {_rs + (2^r/ XI, ) 2 / rs (13) ^=[Κ+(2π/χΣγ/ (2π/ΥΣ] (14) where / is the system frequency of the five-level output current. Since the system wants to generate a high output current 'so the 'frequency' will be controlled at the spectral frequency of the parallel spectrum circuit, generating resonance to obtain three The high output current of the sine wave, the resonance frequency is calculated as follows (15) where c is the value of the parallel resonant capacitor. Therefore, using equations (13)-(15), the q value can be calculated as Q = rJ2Kf0i (16) The TMS320F2812 program flow of the present invention is as shown in Fig. 12_丨. Firstly, the peripheral control register function is set first and the event management module is used to set the interrupt frequency of the system to 21.6 kHz and the complex programmable logic elements are tender (^ The external input clock used by the 4256V is 2.16MHz. When the counter is interrupted, it enters Disconnect the subroutine, as shown in Figure 12-2. Turn on the analog digital conversion channel, convert the current feedback signal from analog to digital value, and execute S] 12 201218604 DC current chirping _ type and execution input (four) stream (4) subroutine. · L motor source turtle type. Read the current command value n. When Q a is greater than the magnetic limit of the upper limit of the yoke, when the switch is turned on, when the above state does not match α, the switch maintains the original state, k also To do so, as shown in Figure (5)
、輸出交流電流控制_式:讀取電流命令值_,假設系統 為平衡一相輸出’本專利取W以控制,當,Χ則降低兩模組前 可控直机電机叩7,冑w:則增加兩模組前級可控直流電流命 7田以上狀態都沒有符合時,兩模組前級可控直流 電流命令維 持不變,如圖12-4。 稷雜的可程式_元件程式触,如圖12_5。首先設定輸出 切換開關肢表。外部輸人時脈2.16ΜΗζ,使用正賴發予以控 制’當正緣觸發-次時,除頻計數器+卜本發明之開關切換角度 需要在特定肢下做切換’精確度到達小數點後兩位,為方便整 數運算,且輸出交流電流頻率為觀ζ,因此將—個週期的時間分 為36〇χ100度,所以每一計數角度的單位時間為j^_ = 4629 36000 即等於外部輸入時脈2.16MHz。當除頻計數器大於36〇⑻,除頻計 數器歸零’重新計數。當除麟數器小於3嶋,則計數數值為開 關所對應之角度來作切換。 本發明提出模組化之單相電源轉三相三階層電流源變頻器並 聯架構’同時亦可多模組化並聯使用,延伸其輪出電流階層,形 成三相多階層電流源變頻器,並使用特定諧波消除之脈波寬度調 [S] 13 201218604 變來控制三相五階層電流源變頻器系統’消除多個(本發明在此以 五次、七次、十一次為例)及的諧波。因此,在高功率應用 場合中’使輸ttl容量分散於多組功率關元件上,降低每個開關 元件上之賴、錢切觀力,以及藉由多階波合叙近似正弦 波輸出波形,並消除特定諧波以降低輸出波形之諧波含量。 【圖式簡單說明】 圖1為本發明之整體系統架構圖; • 圖2為研究文獻所提之三相五階層電流源變頻器架構; 圖3為本發明之功率開關元件驅動電路; 圖4為本發明之電流感測電路; 圖5為本發明之絕對值平均輸出電路; 圖6為本發明之工作模式#1電流導通路徑; 圖7為本發明之卫賴式#7電流導通路徑一; 圖8為本發明之工作模式#7電流導通路徑二; 春目9為本發明之:L侧細3電料通路徑; 圖10為本發明之模組A規劃輸出波形; 圖11為本發明之模組A與模級錄劃輸出波形; 圖m、12-2、12-3、12-4、12-5為本發明之數位控制器程式 流程; 表1為輸出電流位階與開關切換狀態表 表2四分之-週期對稱之切換角度除第五 、七及十一次諧 201218604 【主要元件符號說明】 101 :系統硬體電路裝置 102 :單相電源 103 :單相全橋整流電路 104 :直流轉直流降壓轉換器 105 :三相變流器 106 :並聯諧振電路 107 :功率開關元件驅動電路 • 108 :數位控制器(TMS320F2812、ispMACH4256V) 109 :電流感測電路 110 :絕對值平均輸出電路 201 :橋式整流器 202 :濾波器 203 : IGBT功率開關原件 204 :電感器 205 :快速回復二極體 ® 206 :譜振電容 207 :諧振電感 208 :光轉合器 209 :電流感測元件 210 :運算放大器 211 :運算放大器 212 :二極體 vs :單相電源輸入 [S1 15 201218604 //)C_a : A模組定電流源Output AC current control _ type: read current command value _, assuming the system is balanced one-phase output 'This patent takes W to control, when, Χ reduces the two modules before the controllable straight motor 叩7, 胄w : If the controllable DC current of the two modules is increased, the controllable DC current command of the two modules is unchanged, as shown in Figure 12-4. The noisy programmable _ component program touches, as shown in Figure 12_5. First set the output switch switch body table. The external input clock is 2.16ΜΗζ, which is controlled by positive feedback. When the positive edge triggers-time, the frequency division counter + the switching angle of the invention needs to be switched under a specific limb. The accuracy reaches two decimal places. In order to facilitate integer arithmetic, and the output AC current frequency is Guanyu, the time of one cycle is divided into 36〇χ100 degrees, so the unit time of each counting angle is j^_= 4629 36000, which is equal to the external input clock. 2.16MHz. When the divide counter is greater than 36 〇 (8), the counter is reset to zero 'recount. When the division counter is less than 3 嶋, the count value is the angle corresponding to the switch to switch. The invention proposes a modular single-phase power to three-phase three-layer current source inverter parallel architecture', and can also be used in multiple modules in parallel, extending its wheel current level to form a three-phase multi-level current source inverter, and Use pulse width adjustment of specific harmonic elimination [S] 13 201218604 Change to control three-phase five-level current source inverter system 'to eliminate multiple (the invention is here five times, seven times, eleven times as an example) and Harmonics. Therefore, in high-power applications, 'distribute the ttl capacity across multiple sets of power-off components, reduce the dependence on each switching element, and approximate the sine-wave output waveform by multi-order wave recombination. And eliminate specific harmonics to reduce the harmonic content of the output waveform. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an overall system architecture diagram of the present invention; FIG. 2 is a three-phase five-layer current source inverter architecture proposed in the research literature; FIG. 3 is a power switching component driving circuit of the present invention; The current sensing circuit of the present invention; FIG. 5 is an absolute value average output circuit of the present invention; FIG. 6 is a current conduction path of the working mode #1 of the present invention; FIG. 7 is a current conduction path of the Wei Lai #7 of the present invention. 8 is the working mode of the present invention #7 current conduction path 2; Chunmu 9 is the invention: L side fine 3 electric material passage path; FIG. 10 is the module A planning output waveform of the present invention; Invented module A and mode level recording output waveform; Figure m, 12-2, 12-3, 12-4, 12-5 are the digital controller program flow of the present invention; Table 1 is the output current level and switching State table Table 2 quarter-cycle symmetry switching angle except fifth, seventh and eleventh harmonic 201218604 [Main component symbol description] 101: system hardware circuit device 102: single-phase power supply 103: single-phase full-bridge rectifier circuit 104: DC to DC buck converter 105: three-phase converter 106: and Resonant circuit 107: power switching element drive circuit • 108: digital controller (TMS320F2812, ispMACH4256V) 109: current sensing circuit 110: absolute value average output circuit 201: bridge rectifier 202: filter 203: IGBT power switch original 204: Inductor 205: Fast Recovery Diode® 206: Spectral Capacitance 207: Resonant Inductor 208: Light Coupler 209: Current Sensing Element 210: Operational Amplifier 211: Operational Amplifier 212: Diode vs: Single Phase Power Input [S1 15 201218604 //) C_a : A module constant current source
Zz)c_i^ B模組定電流源 乙、心2、L : A模組三相變流器輪出電流 心1、42、L : B模組三相變流器輸出電流Zz)c_i^ B module constant current source B, heart 2, L: A module three-phase converter wheel current Core 1,42, L: B module three-phase converter output current
Lb、zc : A模組與B模組合成之三相五階層輸出電流 七、申請專利範圍: 頻器Lb, zc: three-phase five-level output current synthesized by A module and B module. 7. Patent application scope: Frequency device
1. 一種特定諧波消除之模組化單相轉三相多階層電流變 的方法與裝置,包括有 兩組單相全橋整流電路:由橋式整流器和濾波電容組成,提供A 模組與B模組直流電壓源。 兩組直流轉直流降壓轉換器:由功率半導體元件所組成,提供A 模植與B模組定電流源。 兩組二相變流器:由功率半導體元件所組成,此A、B模組輸出 波形即合成三相五階層輸出波形。 φ 控制與驅動電路.其中包含一功率開關源件驅動電路、一數位微 處理器、一複雜可程式邏輯元件、二電流感測電路、一絕對值平 均輪出電路,並輸出變流器電力開關驅動信號。 二相並聯諧振電路:放大三相五階層變流器之輸出電流。 2.如申請專利範圍第1項所述之使用於高功率特定諧波消除 之夕階層電流源變頻器,其中用兩組定電流源及兩組三相變流器 並聯構成。 3.如申請專利範圍第1項所述之使用於高功率特定諧波消除A method and device for modularized single-phase to three-phase multi-layer current change of specific harmonic elimination, comprising two sets of single-phase full-bridge rectifier circuits: consisting of a bridge rectifier and a filter capacitor, providing an A module and B module DC voltage source. Two sets of DC-to-DC buck converters: consisting of power semiconductor components, providing A-mode and B-module constant current sources. Two sets of two-phase converters: composed of power semiconductor components, the output waveforms of the A and B modules are combined three-phase five-layer output waveforms. φ control and drive circuit. It comprises a power switch source drive circuit, a digital microprocessor, a complex programmable logic component, two current sense circuits, an absolute value average turn-off circuit, and an output converter power switch. Drive signal. Two-phase parallel resonant circuit: amplifies the output current of a three-phase five-level converter. 2. The current-level current source frequency converter for use in high-power specific harmonic elimination as described in claim 1 of the patent application, wherein two sets of constant current sources and two sets of three-phase current transformers are connected in parallel. 3. For use in high power specific harmonic cancellation as described in claim 1
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW99136014A TW201218604A (en) | 2010-10-22 | 2010-10-22 | capable of providing low harmonic distortion and high efficiency three-phase AC power source |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW99136014A TW201218604A (en) | 2010-10-22 | 2010-10-22 | capable of providing low harmonic distortion and high efficiency three-phase AC power source |
Publications (1)
Publication Number | Publication Date |
---|---|
TW201218604A true TW201218604A (en) | 2012-05-01 |
Family
ID=46552566
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW99136014A TW201218604A (en) | 2010-10-22 | 2010-10-22 | capable of providing low harmonic distortion and high efficiency three-phase AC power source |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW201218604A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103888008A (en) * | 2014-03-25 | 2014-06-25 | 中国矿业大学(北京) | Multi-level inverter modulation method based on specific harmonic cancellation and waveform overlapping |
US10148164B2 (en) | 2017-02-27 | 2018-12-04 | Delta Electronics (Shanghai) Co., Ltd. | Topology of composite cascaded high-voltage and low-voltage modules |
TWI661632B (en) * | 2016-12-16 | 2019-06-01 | 大陸商台達電子企業管理(上海)有限公司 | Modular power system |
US10374504B2 (en) | 2016-12-16 | 2019-08-06 | Delta Electronics (Shanghai) Co., Ltd | Power unit and power electronic converting device |
TWI697187B (en) * | 2019-11-26 | 2020-06-21 | 國立臺灣科技大學 | Multi-level buck converter |
CN112886849A (en) * | 2019-11-29 | 2021-06-01 | 北京华航无线电测量研究所 | Output current harmonic suppression method for seven-phase current source type converter |
TWI815357B (en) * | 2022-03-18 | 2023-09-11 | 東元電機股份有限公司 | System for improving total harmonic distortion |
-
2010
- 2010-10-22 TW TW99136014A patent/TW201218604A/en unknown
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103888008A (en) * | 2014-03-25 | 2014-06-25 | 中国矿业大学(北京) | Multi-level inverter modulation method based on specific harmonic cancellation and waveform overlapping |
CN103888008B (en) * | 2014-03-25 | 2016-08-10 | 中国矿业大学(北京) | Eliminate based on particular harmonic and the multi-electrical level inverter modulator approach of addition of waveforms |
US10924030B2 (en) | 2016-12-16 | 2021-02-16 | Delta Electronics (Shanghai) Co., Ltd | Modular power supply system |
TWI661632B (en) * | 2016-12-16 | 2019-06-01 | 大陸商台達電子企業管理(上海)有限公司 | Modular power system |
US10374504B2 (en) | 2016-12-16 | 2019-08-06 | Delta Electronics (Shanghai) Co., Ltd | Power unit and power electronic converting device |
US11101740B2 (en) | 2016-12-16 | 2021-08-24 | Delta Electronics (Shanghai) Co., Ltd | Modular power supply system |
US11183947B2 (en) | 2016-12-16 | 2021-11-23 | Delta Electronics (Shanghai) Co., Ltd | Modular power supply system |
US11463016B2 (en) | 2016-12-16 | 2022-10-04 | Delta Electronics (Shanghai) Co., Ltd | Modular power supply system |
US10148164B2 (en) | 2017-02-27 | 2018-12-04 | Delta Electronics (Shanghai) Co., Ltd. | Topology of composite cascaded high-voltage and low-voltage modules |
TWI697187B (en) * | 2019-11-26 | 2020-06-21 | 國立臺灣科技大學 | Multi-level buck converter |
CN112886849A (en) * | 2019-11-29 | 2021-06-01 | 北京华航无线电测量研究所 | Output current harmonic suppression method for seven-phase current source type converter |
CN112886849B (en) * | 2019-11-29 | 2022-08-16 | 北京华航无线电测量研究所 | Output current harmonic suppression method for seven-phase current source type converter |
TWI815357B (en) * | 2022-03-18 | 2023-09-11 | 東元電機股份有限公司 | System for improving total harmonic distortion |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW201218604A (en) | capable of providing low harmonic distortion and high efficiency three-phase AC power source | |
Hegazy et al. | Analysis, modeling, and implementation of a multidevice interleaved DC/DC converter for fuel cell hybrid electric vehicles | |
Zou et al. | Switched-capacitor-cell-based voltage multipliers and DC–AC inverters | |
CN104065291B (en) | There is the neutral-point voltage balance system and method for low-frequency oscillation suppression function | |
Khan et al. | A new reliable three-phase buck-boost AC–AC converter | |
Xia et al. | Optimal variable switching frequency scheme to reduce combined switching loss and inductor core loss of single phase grid connected inverter | |
Lee et al. | Single-inductor multiple-output (SIMO) buck hybrid converter for simultaneous wireless and wired power transfer | |
Majhi | Analysis of single-phase SPWM inverter | |
Ye et al. | Voltage-gap modeling method for single-stage switched-capacitor converters | |
Jammy et al. | A new configuration of seven‐level quasi Z‐source–based isolated inverter for renewable applications | |
CN108390572B (en) | Input current waveform optimization topological structure of active third harmonic injection matrix converter | |
CN107086807B (en) | A kind of boosting inverter | |
CN102856928A (en) | Inverter | |
CN107579522A (en) | Coordinated control system based on Ip Iq theories harmonic wave controls and reactive-load compensation | |
TWI416853B (en) | A New Type of Curved Winding Transformer in a Multi-Stage Voltage Source Converter System and Using a Special Harmonic Elimination Strategy | |
CN112737391A (en) | Single-phase single-stage boost inverter and control method | |
TWI221351B (en) | Symmetrical duty-cycle control device of current-mode controlled half-bridge DC/DC converter | |
Tompkins et al. | Design of a low cost DC/AC inverter for integration of renewable energy sources into the smart grid | |
Adel et al. | A single-phase direct buck-boost AC–AC converter with minimum number of components | |
Umar-Lawal et al. | An Isolated Single-Stage Single-Phase Micro-Inverter Topology with Integrated Magnetic Components | |
Chakraborty et al. | A novel single-stage dual-active bridge based isolated DC-AC converter | |
TWI296460B (en) | High-performance power conditioner for clean energy with low input voltage | |
Rajkumar et al. | Design and Experimental Investigation of Zeta Converter Fed Reduced Switch Multi-stage Grid Connected Boost MLI | |
Kumar et al. | A Single-Stage Universal Input Wireless Inductive Power Transfer System with V2G Capability | |
Kannan et al. | A comparative study on different control techniques on bridgeless interleaved AC-DC converter for power factor correction |