200937554 六、發明說明： 【發明所屬之技術領域】 <本發日祕·-種顧在轉體麵電路製造過程巾的缺陷複查 知樣缺陷複查方法及缺陷分類上之方法，及基於此方法所設計的裝 置。本裝置與方法可用於檢驗轉體晶圓上的缺陷或積體電路之印刷 光罩上的缺陷。 【先前技術】 φ ❹ 隨著半導體積體電路線寬與結構設計之縮小、綱酿的晶圓成為 曰、使用的尺寸、以及製程控制窗口逐漸變小，其結果是由檢驗機台 戶^貞測到缺陷數目隨之增仏_是那些處於暖早贼是剛進入量 產階段之元件，缺陷數量非常之高。 缺陷通常是藉由所謂缺陷檢驗機台這一類的儀器偵測。圖i為典 =的，陷複查裝置100之簡圖。待複查晶圓及先前檢測的缺陷槽案自 單元1G2載人，接下來晶圓之定位、晶粒的座標及缺陷相對位置 均於取像單元104中校準。取像條件1〇6及複查取樣計晝⑽ =電腦11G提供。由取像單元⑽拍攝缺陷影像朗-位置之參考 2像-起在缺陷定位單元112中比對，在缺陷定位單元ιΐ2中可 :陷影像每—位置的實際座標。接著，將此位置資訊迴_取像單元 二及高倍率的缺陷影像，再將缺陷影像提 刀類及倾輸出單元114進行缺陷分類4後， 陷職名稱更換為缺陷分類代碼，並與此高解析度及高倍率 缺fe影像一起送到資料庫116儲存。 =圖1所不’典型的自動缺陷複查程序包括下列步驟：⑴載 準驗絲儲(缺峨4是由概機台所得）；（2)校 日日圓及欲複查之日日教座標；（3)缺陷於晶粒相對位置的偏位修正，·⑷ 200937554 . 電子束檢測條件設定；（5)設定複查缺陷取樣標準；（6)自動尋找 缺陷位址的方法；⑺設定複查取像條件；⑻缺陷分類，其可為全 ' 自動、半自動、或是手動分類；（9)設定資料輸出；以及(1〇)卸載晶圓。 逐一複查由檢驗機台所挑選的全部缺陷相當地耗時，並且多半是 非必要的。關於步驟5，在半導體生產線監控之中最常見的做法是由 一次檢驗結果中隨機取樣50或1〇〇個缺陷進行複查。更加複雜的取樣 方法可包括藉由百分比、缺陷大小、缺陷分類(大致分格(r〇ughbin))、 以及叢集缺陷等缺陷中隨機選取。上述取樣方法的共同問題為機台使 用者不flb避免複查位於「非重要區域或是非線上監控者所關心的位置」 © 的缺陷。檢視不重要之非關鍵缺陷浪費了寶貴的機台時間。 上述方法僅能定位隨機出現的缺陷而難以界定系統性缺陷(例如 重覆性缺陷：如光罩缺陷），因為做為參考的鄰近晶粒中很可能也含有 同樣或相似的缺陷，因此難以在受檢晶粒的圖像與參考晶粒之圖像比 對中，發現重複性的缺陷，所以要用原始設計資料庫的資訊。再者， 缺陷複查機自，制是電子物_beam)雜複錢自的歸很大(每座 通常超過二百萬美金）。所以對自動缺陷複查機台之處理速度要求愈來 愈尚，因此，智慧型的缺陷複查方法便愈形必要，而本發明可協助達 成上述要求。 【相關申請案的交互參照】 本案主張2007年2月2日申請’名稱為「半導體積體電路之智慧型缺 陷複查(Smart Defect Review For Semiconductor Integrated Circuit)」的第 60/887,901號美國臨時專利申請案的優先權，以將其内容併入本案作 為參考。 ^ 【發明内容】 本發明之目的之一為提供一種在半導體積體電路製造過程中自動 缺陷複查採樣、及缺陷分類之方法，及基於此方法所設計的裝置。本 4 200937554 - 裝置與方法可用於檢驗半導體晶圓上的缺陷或積體電路之印刷光罩上 • 的缺陷。上述及其他目的係藉由比對缺陷的複查圖像與經由智慧型取 樣過濾器所拾取之缺陷位置之參考圖像所達成。 在一實施例中，本發明揭示一種叢集式電腦系統，此系統 基於高速網路能提供資料快取器並節省運算時間及記憶體。 在另-實施例中’本發明揭示—種智慧型複查取樣過滤器， 其可自動尋找「敏感區域」並選取「敏感區域」附近之可能 缺陷位置以做為複查樣品。此項資訊亦可協助將缺陷分類。 〇 以下藉由具體實施例配合所附的圖式詳加說明，當更容易 瞭解本發明之目的、技術内容、特點及其所達成之功效。 【實施方式】 在此將依據本發明之特定實施例進行詳細敘述。這些實施 例所舉的例子以所㈣圖式說明。應可理解的是’當本發明 連=這些特定實施進行說明，其並非要將本發明的範圍限縮 到延些實施例。相反地，是要包含由所附請求項所定義、可 在本發明的精神及範圍内所包括的替代方案、修改、及均等 © 物。在以下說明之中，將許多特定細節依序陳述，以使本發 明可被徹底了解。本發明在缺少部分或全部的上述細節仍可 實施。、另-方面，未對習知的步驟操作詳細敘述以免對本發 明造成不必要的曲解。 本發明藉由積體電路設計資料庫之協助以改善步驟5(設 定複查缺陷取樣標準）、步驟6(自動尋找缺陷位址的方法）以及 步驟8(缺陷分類）的績效。 本發明之一實施想樣為智慧型複查取樣過濾器2〇〇(圖 2)。圖2為一實施例顯示智慧型複查取樣過濾器2〇〇之簡圖。 元件座標可由位置摘錄處理器2〇4自積體-電路設計資料庫 5 200937554 202中取得’並自動建立易發生缺陷之「敏感區域」。此「敏 感區域」亦可於初步檢視晶圓之影像後，以人工方式設立。 -結合「敏感區域」及先前檢驗結果中的缺陷分佈資訊’可產 生元件之複查位置計晝206,並且傳送到電腦主機中的複查取 樣單元208。 全部先前檢驗結果發現的缺陷都經過位置摘錄處理器204 取得元件座標。經智慧型複查取樣過濾器200分析後，可以 決定要複查之缺陷的取樣位置。智慧型複查取樣過濾器200 與缺陷複查位置計晝兩者皆於建立檢驗程序時確立。下列項 〇 目可藉由建立智慧型複查取樣過濾器200後達成： (1) 機台使用者可避免浪費寶貴時間於複查位於不重要地 區的缺陷，例如切割線（晶粒之間的空間）上的缺陷。使用者可 以藉由設定複查取樣條件，使機台只複查定義為敏感區域内 的缺陷（例如含有高縱橫比（HAR)之接點挖孔的區域）。 (2) 可顯示位於特定元件上的缺陷分佈（例如靜態隨機存取 記憶體（Static Random Access Memory，SRAM)上的缺陷分 佈），以協助使用者評估晶圓上的積體電路製程。200937554 VI. Description of the invention: [Technical field to which the invention pertains] <This is a Japanese secret.--A method for reviewing defect defects in the manufacturing process of the rotating surface circuit manufacturing process, and a method for classifying defects, and based on the method Designed device. The apparatus and method can be used to verify defects on a swivel wafer or defects on a printed reticle of an integrated circuit. [Prior Art] φ ❹ With the reduction of the line width and structural design of the semiconductor integrated circuit, the wafer of the outline becomes 曰, the size of the use, and the process control window are gradually reduced, and the result is determined by the inspection machine. The number of defects detected has increased. _ Those components that are in the early stage of the warm-up thief are just entering the mass production stage, and the number of defects is very high. Defects are usually detected by instruments such as the so-called defect inspection machine. Figure i is a simplified diagram of the trapping device 100. The wafer to be reviewed and the previously detected defect slot are loaded from the unit 1G2, and the positioning of the wafer, the coordinates of the die, and the relative position of the defect are all calibrated in the image capturing unit 104. Image taking condition 1〇6 and review sampling meter (10) = computer 11G provided. The reference image of the defect image ray-position is taken by the image capturing unit (10). The image is aligned in the defect locating unit 112, and the actual coordinate of each position of the image can be trapped in the defect locating unit ι2. Then, the position information is returned to the image capturing unit 2 and the high-magnification defect image, and then the defect image lifting tool and the tilting output unit 114 are classified into the defect 4, and the trapped name is replaced with the defect classification code, and is high. The resolution and high-magnification images are sent to the database 116 for storage. = The typical automatic defect review procedure in Figure 1 includes the following steps: (1) Loaded silk storage (absence 4 is obtained from the general machine); (2) school day yen and the date of the day to be reviewed; 3) Deviation correction of the relative position of the defect in the grain, · (4) 200937554 . Electron beam detection condition setting; (5) setting the defect sampling standard; (6) automatically finding the defect address; (7) setting the review image taking condition; (8) Defect classification, which can be all 'automatic, semi-automatic, or manual classification; (9) setting data output; and (1) unloading the wafer. It is quite time consuming to review all the defects selected by the inspection machine one by one, and most of them are unnecessary. Regarding step 5, the most common practice in semiconductor production line monitoring is to review 50 or 1 defect randomly from one test result. More sophisticated sampling methods may include random selection of defects, such as percentage, defect size, defect classification (roughing bin), and cluster defects. A common problem with the above sampling methods is that the machine user does not avoid reviewing the defects located in the "non-critical area or the position of the non-line monitor". Examining non-critical defects that are not important wastes valuable machine time. The above method can only locate randomly occurring defects and it is difficult to define systemic defects (such as repetitive defects: such as mask defects), because adjacent grains that are used as a reference may also contain the same or similar defects, so it is difficult to The image of the examined die is compared with the image of the reference die, and repetitive defects are found, so the information of the original design database is used. In addition, the defect review machine is self-contained, and the electronic product _beam is very complicated (there is usually more than two million dollars each). Therefore, the processing speed of the automatic defect review machine is becoming more and more demanding. Therefore, the intelligent defect review method becomes more and more necessary, and the present invention can assist in meeting the above requirements. [Reciprocal Reference of Related Applications] This case claims to apply for the US Provisional Patent Application No. 60/887,901 entitled "Smart Defect Review For Semiconductor Integrated Circuit" on February 2, 2007. The priority of the case is to incorporate its contents into the case for reference. SUMMARY OF THE INVENTION One object of the present invention is to provide an automatic defect review sampling and defect classification method in a semiconductor integrated circuit manufacturing process, and a device designed based on the method. Ben 4 200937554 - Apparatus and methods for inspecting defects on a semiconductor wafer or defects on a printed reticle of an integrated circuit. The above and other objects are achieved by comparing the image of the defect with a reference image of the defect location picked up by the smart sampling filter. In one embodiment, the present invention discloses a cluster computer system that provides a data cache based on a high speed network and saves computation time and memory. In another embodiment, the present invention discloses a smart review sampling filter that automatically searches for a "sensitive area" and selects a possible defect location near the "sensitive area" as a review sample. This information can also help to classify defects. The purpose of the present invention, the technical contents, the features, and the effects achieved by the present invention will be more readily understood by the following detailed description of the embodiments. [Embodiment] A specific embodiment of the present invention will be described in detail herein. The examples given in these embodiments are illustrated by the drawings. It should be understood that the invention is not intended to limit the scope of the invention to the embodiments. Rather, the alternatives, modifications, and equivalents are intended to be included within the spirit and scope of the invention as defined by the appended claims. In the following description, numerous specific details are set forth in order to provide a thorough understanding. The invention may be practiced in the absence of some or all of the above details. In other instances, well-known step operations have not been described in detail to avoid unnecessary misinterpretation of the present invention. The present invention assists in improving the performance of Step 5 (setting for review of defect sampling criteria), Step 6 (method of automatically finding defective addresses), and Step 8 (Defect Classification) with the assistance of an integrated circuit design database. One embodiment of the present invention is intended to be a smart review sampling filter 2 (Fig. 2). FIG. 2 is a schematic diagram showing an intelligent review sampling filter 2A according to an embodiment. The component coordinates can be obtained from the location extract processor 2〇4 from the integrated circuit-circuit design database 5 200937554 202 and automatically create a “sensitive area” that is prone to defects. This "sensing area" can also be manually established after initially viewing the image of the wafer. - Combining the "sensitive area" and the defect distribution information in the previous inspection result' can generate the component review position meter 206 and transmit it to the review sampling unit 208 in the host computer. Defects found by all previous inspection results are taken by the location extract processor 204 to obtain the component coordinates. After analysis by the smart review sampling filter 200, the sampling position of the defect to be reviewed can be determined. Both the smart review sampling filter 200 and the defect review position gauge are established when the inspection procedure is established. The following items can be achieved by establishing a smart review sampling filter 200: (1) Machine users can avoid wasting valuable time reviewing defects located in unimportant areas, such as cutting lines (space between dies) Defects on the. The user can review the sampling conditions so that the machine only reviews defects defined as sensitive areas (for example, areas with high aspect ratio (HAR) contact holes). (2) Defect distribution on a specific component (such as defect distribution on a Static Random Access Memory (SRAM)) can be displayed to assist the user in evaluating the integrated circuit process on the wafer.
響 (3)可提供在特定區域或是元件上的缺陷密度，例如SRAM 上的缺陷密度。 (4)可能衝擊到後繼電路層的缺陷，將被標示並且可對其 取樣以進行複查。 當設計線寬低至32nm或是更小時，晶圓積體電路設計資 料庫會變得非常地巨大，有時甚至會到達200G以上的資料。 本發明的一實施態樣為基於叢集電腦結構的一高速資料快取 ‘器。如圖3所示，積體電路設計資料庫將儲存於各個獨立電 -腦，再由一高速網路304 (例如無限寬頻（Infiniband))與主機電 腦連結。 200937554 请接續參考圖3，圖3為一叢集式電腦的積體電路設計資 料庫300。可將積體電路設計資料庫3〇〇根據位置座標分別儲 -存於獨立的電腦3〇2a-302n中，每一台獨立的電腦3〇2a_3〇2n 都由咼速網路304連接在一起。缺陷的位置資訊依座標分別 輸入相關的電腦302a-n來反應此缺陷之位置，並根據座標輸 出積體電路的設計配置資料。基於上述結構，吾人可以非常 快速處理任何記憶容量的積體電路原始設計資料庫。每部獨 立的電腦302a-n僅需處理小量區域的設計資料。 基於所複查的缺陷座標資訊，每部電腦僅快取於缺陷位置 〇 周邊的積體電路設計資料，而不需將全部的積體電路設計資 料庫載入到運算記憶體中。 關於步驟0’圖4顯示目前複查機台最普遍的運用方式。 圖4為缺陷複查機台中典型的自動缺陷定位單元4〇〇之簡 圖。缺陷影像402及其取自參考晶粒中同樣位置的參考圖像 404由圖像比對及缺陷定位單元4〇6進行圖像比對處理，以決 定缺陷為不完整之配置圖案或是外來之異物，其中參考晶粒 是標準晶粒或是含缺陷晶粒鄰近的一、二個晶粒。此比對程 序可得到缺陷影像中的切確缺陷位置座標。將此座標資訊迴 © 冑到顯微鏡408以取得此座標之更高倍數放大影像，用以進 行詳細的缺陷分類及導致缺陷生成原因的研究。 使用如圖4所示之程序做自動缺陷定位defect 1〇Cati〇G，ADL)時最常見的困難為比對過程耗費太多日夺間。為 檢視-處缺陷’通常需要移動樣品台兩次(檢視缺陷及其參考 位置）·並拍攝三張影像(低倍率之參考影像、低倍 率之缺陷影像、高倍率之缺陷影像）。 本發明的另一要素為通用缺陷座標定位（general defect locating，GDL) ’不但可定位無出現規律的缺陷，並且也可自 7 200937554 動定位有出現規律的缺陷。圖5顯示GDL的定位方法，其特 點是將缺陷影像與來自資料庫之積體電路設計配置圖像比 • 對，以定位出缺陷之切確座標位置。圖5為通用缺陷座標定 位單元500之簡圖。在自動通用缺陷複查工具502中比對的 圖像可能是常規的缺陷影像504與其他晶粒（標準晶粒或鄰近 晶粒）於同一位置所拍攝之影像。在此情形中影像轉換器一 508及影像轉換器二510可略過不用。 然而，當待複查之缺陷影像屬於一複雜的元件組合之線路 配置，而原始積體電路設計資料庫又無現存之同一位置之配 〇 置影像時，可以用影像轉換器將設計資料庫中，各相關晶粒 或元件之部分圖像分別擷取出來，組成此複雜之待測線路配 置之對比參考圖像，再據以比對出複查之缺陷的相對位置座 標。另一方面，亦可將複查之缺陷真實影像加以調整，成為 設計資料庫中已存在之配置圖像，再據以比對出缺陷的相對 位置座標。 因此，若比對的圖像是經過影像處理/轉換過的缺陷影像 及資料庫中同一位置經過影像處理/轉換過的影像的話；則影 像轉換器一 508是用來將積體電路設計資料庫中之資料506 Ο 轉換為影像，而影像轉換器二510是用以將由顯微鏡所拍攝 的真實影像轉換為可與積體電路設計資料庫影像比對的影 像。 藉由此比對方法，可以克服兩項現行缺陷複查機台所普遍 存在的問題。 (1) 本發明所提出的方法，樣品台在複查缺陷時可以移動 較少次數，因此，使用本方法可以增加處理速度。 (2) 轉換自積體電路原始設計資料庫的影像不會因為製程 之細微變異或製造時產生了重覆性缺陷（如光罩缺陷）而改變 8 200937554 了比對結果的正確性。依據本發明設計之複查系統及方法提 供了經由晶牴與積體電路資料庫之直接比對’建構缺陷檔案 •供複查之能力。 關於步驟8，由圖6所示，智慧型複査取樣過濾器提供使 用者依據缺陷所在位置對缺陷自動分類的選擇。圖6為依據 本發明之自動型通用缺陷複查工具600之簡圖。與一般的缺 陷複查裝置相似之處為：待檢晶圓及先前檢測缺陷檔案自載 入單元102載入；接下來於取像單元1〇4中完成校準晶圓、 晶粒原點座標及缺陷相對位置的偏位修正。自動型通用缺陷複查 © 機台600相較於標準缺陷複查機台100(如圖1所示）具有下列 主要的差異： (1) 首先會將先前檢驗結果傳到智慧型複查取樣過濾器 200 (如圖2所示）以濾除所有非位於「敏感區域」的缺陷。所 有先前檢驗發現的缺陷在智 慧型複查取樣過濾器200處理之 後都帶有元件相對位置的座標資訊。 (2) 另一項差異為缺陷定位時的圖像比對方式406。比對是 在自動型通用缺陷複查機台600中進行，比對的圖像可能是 0 常規的缺^衫像與其他晶粒（標準晶粒或鄰近晶粒）於同一位 置所拍攝之影像；或者是經過影像處理/轉換過的缺陷影像及 資料庫202中同—位置經過影像處理/轉換過的影像。 (3) 如先前在（丨）中所述，所有檢驗發現的缺陷在智慧型複 查取樣過遽器2〇〇處理之後都帶有元件相對位置的座標資 訊’此項資訊不僅可用在複查時的樣本選取，亦可據以自動 分類缺陷。 舉例而言’若界定複查範圍為50%之SRAM區域，也就 是說SRAM區域中5〇%的缺陷會被隨機選取及複查。而sraM 區域可由智慧型複查取樣過濾器2〇〇從晶圓積體電路設計資 9 200937554 料庫202中來界定。 此發明裝置亦可用在缺陷檢驗上，這時智慧型複查取樣過 濾器200可用來界定一檢驗敏感區域，這將使檢驗程序設定 得更有效率且更準確。 再進—步舉例說明’在缺陷檢驗時，檢驗參數為50%的 SRAM區域、X=80%、γ=9〇%，代表將每隔一 SRAM區域界 定為檢驗敏感區域’檢驗涵蓋範圍是每一 SRAM區域的X軸 為依積體電路設計資料庫所摘錄的實際長度的8〇%，與每一 SRAM區域的y軸為依積體電路設計資料庫所摘錄的實際長 度的90%。 又舉一例說明在缺陷檢驗之應用，積體電路元件的晶粒中 通常有兩種接觸挖孔型態：常規接觸挖孔型態及高縱橫比 (high aspect ratio, HAR)之接觸挖孔型態。依據本發明實施例 之智慧型複查取樣過濾器200可決定缺陷是否為過钱刻（over etch)之常規接觸挖孔或是蝕刻不足之HAR接觸挖孔。因為此 兩種缺陷對於半導體製程代表不同的意義。 當複查取樣過濾器在關鍵元件中檢驗到缺陷，或是在複查 取樣過濾器中的自動缺陷重新定位之比對過程中發現到缺 陷，就會自動標示這些缺陷的位置座標並且藉由網際網路發 送警告訊號給相關人員。不同敏感區中各關鍵元件的取像範 圍均可以預先定義並提供給智慧型複查取樣過濾器200，於設 立缺陷複查計畫時選用。 雖然本發明之敘述是依據所示實施例，熟悉本項技藝者應 可理解上述實施例可具有多種變化，而這些變化仍在本發明 之精神和範圍内。同樣地，熟悉本項技藝者可進行各種修改 而不背離如所附之請求項之精神和範圍。 200937554 【圖式簡單說明】 圖1為標準缺陷檢視裝置之簡圖。 圖2為本發明一實施例之智慧型複查取樣過濾器。 圖3為一建置於叢集式電腦的積體電路設計資料庫。 圖4為缺陷檢視機台中典型的自動缺陷定位單元之簡圖。 圖5為本發明一實施例之通用缺陷定位單元之簡圖。 圖6為本發明一實施例之自動型通用缺陷複查機台之簡 【主要元件符號說明】 100 缺陷複查機台 102 載入單元 104 取像單元 106 取像條件 108 複查取樣 110 主機 112 缺陷定位單元 114 缺陷分類及資料輸出單元 116 貢料庫 200 智慧型複查取樣過濾器 202 積體電路設計資料庫 204 位置摘錄處理器 11 200937554 , 206 複查位置計晝 „ 208 複查取樣單元 300 積體電路設計資料庫 302a、302b〜302η 電腦 304 高速網路 400 自動缺陷定位單元 402 缺陷影像 ❹ 404 參考影像 406 影像比對缺陷定位單元 408 顯微鏡 500 通用型缺陷定位單元 502 通用型缺陷檢驗機台 504 缺陷影像 506 自設計資料庫擷取的資料 ^ 508 影像轉換器一 510 影像轉換器二 600 自動型通用缺陷複查機台 602 載入單元 604 影像轉換器一 ' 606 影像轉換器二 12(3) can provide defect density in a specific area or component, such as defect density on SRAM. (4) Defects that may impact subsequent circuit layers will be flagged and sampled for review. When the design line width is as low as 32 nm or less, the wafer integrated circuit design library becomes very large, and sometimes it can reach more than 200G. An embodiment of the present invention is a high speed data cacher based on a cluster computer architecture. As shown in Figure 3, the integrated circuit design database will be stored in each individual brain, and then connected to the host computer by a high-speed network 304 (such as Infiniband). 200937554 Please refer to FIG. 3, which is a integrated circuit design data library 300 of a cluster computer. The integrated circuit design database 3 can be stored in the independent computer 3〇2a-302n according to the position coordinates, and each independent computer 3〇2a_3〇2n is connected by the idle network 304. . The position information of the defect is input to the relevant computer 302a-n according to the coordinates to reflect the position of the defect, and the design configuration data of the integrated circuit is output according to the coordinate. Based on the above structure, we can process the original design database of the integrated circuit of any memory capacity very quickly. Each individual computer 302a-n only needs to process design information for a small area. Based on the reviewed defect coordinate information, each computer is only taken in the peripheral circuit design data of the defect location , without loading all the integrated circuit design data libraries into the arithmetic memory. Regarding step 0', Figure 4 shows the most common mode of operation of the current review machine. Figure 4 is a simplified diagram of a typical automatic defect locating unit 4 in a defect review machine. The defect image 402 and its reference image 404 taken from the same position in the reference die are image-aligned by the image alignment and defect locating unit 〇6 to determine whether the defect is an incomplete configuration pattern or an external one. Foreign matter, wherein the reference crystal grain is a standard crystal grain or one or two crystal grains adjacent to the defect crystal grain. This alignment program obtains the coordinates of the exact defect locations in the defective image. This coordinate information is returned to the microscope 408 to obtain a higher magnification image of the coordinate for detailed defect classification and research leading to the cause of the defect. The most common difficulty when using the program shown in Figure 4 for automatic defect location defect 1〇Cati〇G, ADL) is that the comparison process takes too much time. In order to view the defect, it is usually necessary to move the sample stage twice (view the defect and its reference position) and take three images (low-rate reference image, low-magnification defect image, high-magnification defect image). Another element of the present invention is that general defect locating (GDL) can not only locate defects without regularity, but also can have regular defects from 7 200937554. Figure 5 shows the GDL positioning method, which is characterized by comparing the defect image with the integrated circuit design configuration image from the database to locate the correct coordinate position of the defect. Figure 5 is a simplified diagram of a general defect coordinate positioning unit 500. The image that is aligned in the Auto-General Defect Review Tool 502 may be an image taken at the same location as the conventional defect image 504 and other dies (standard dies or adjacent dies). In this case, the image converter 508 and the image converter 510 can be skipped. However, when the defect image to be reviewed belongs to a complicated component combination circuit configuration, and the original integrated circuit design database has no existing image at the same position, the image converter can be used in the design database. Part of the image of each relevant die or component is extracted separately to form a comparative reference image of the complex circuit configuration to be tested, and then the relative position coordinates of the defect are compared. On the other hand, the real image of the defect can be adjusted to become the existing configuration image in the design database, and then the relative position coordinates of the defect are compared. Therefore, if the compared image is an image processed/converted defect image and an image processed/converted image at the same position in the database; the image converter 508 is used to integrate the integrated circuit design database. The data 506 中 is converted into an image, and the image converter 510 is used to convert the real image taken by the microscope into an image that can be compared with the integrated circuit design database image. By means of this comparison method, the problems common to the two current defect review machines can be overcome. (1) According to the method proposed by the present invention, the sample stage can be moved a small number of times when the defect is reviewed, and therefore, the processing speed can be increased by using the method. (2) The image converted from the original design database of the integrated circuit will not change due to minor variations in the process or repeated defects (such as reticle defects) during manufacturing. 200937554 The correctness of the comparison results. The review system and method designed in accordance with the present invention provides the ability to construct a defect file via a direct comparison of the wafer and integrated circuit database for review. With respect to step 8, as shown in Figure 6, the smart review sampling filter provides the user with the option to automatically classify defects based on the location of the defect. Figure 6 is a block diagram of an automatic type general defect review tool 600 in accordance with the present invention. Similar to the general defect review device, the wafer to be inspected and the previously detected defect file are loaded from the loading unit 102; then, the wafer, the origin coordinates and the defect are completed in the image capturing unit 1〇4. Offset correction of relative position. Automatic General Defect Review © Machine 600 has the following major differences compared to Standard Defect Review Machine 100 (shown in Figure 1): (1) The previous inspection results are first passed to the Smart Review Sampling Filter 200 ( As shown in Figure 2), all defects not located in the "sensitive area" are filtered out. Defects found by all previous inspections have coordinate information about the relative position of the components after processing by the intelligent review sampling filter 200. (2) Another difference is the image matching mode 406 when the defect is positioned. The comparison is performed in the automatic general defect inspection machine 600, and the compared image may be an image of a conventional conventional image with the other crystal grains (standard crystal or adjacent crystal grains) at the same position; Or the image processed/converted defect image and the same image in the database 202 that has undergone image processing/conversion. (3) As previously described in (丨), all defects found in the inspection are followed by the coordinate information of the relative position of the component after the smart review of the sampler. The information can be used not only during the review. Sample selection can also be used to automatically classify defects. For example, if a SRAM area with a review range of 50% is defined, it means that 5% of the defects in the SRAM area are randomly selected and reviewed. The sraM area can be defined by the smart review sampling filter 2 from the wafer integrated circuit design. The inventive device can also be used for defect inspection where the smart review sampling filter 200 can be used to define a test sensitive area which will make the test procedure more efficient and accurate. Step-by-step example shows that 'in the defect inspection, the inspection parameter is 50% SRAM area, X=80%, γ=9〇%, which means that every other SRAM area is defined as the inspection sensitive area'. The inspection coverage is per The X-axis of an SRAM area is 8〇% of the actual length extracted by the integrated circuit design database, and the y-axis of each SRAM area is 90% of the actual length extracted by the integrated circuit design database. Another example is the application of defect inspection. There are usually two kinds of contact boring patterns in the crystal grains of integrated circuit components: conventional contact boring type and high aspect ratio ( HAR) contact boring type. state. The smart review sampling filter 200 in accordance with an embodiment of the present invention can determine whether the defect is an over-etch conventional contact hole or an under-etched HAR contact hole. Because these two defects represent different meanings for the semiconductor process. When the review sampling filter detects a defect in a critical component, or if a defect is found during the comparison of the automatic defect repositioning in the review sampling filter, the position coordinates of the defect are automatically marked and the Internet is used. Send a warning signal to the relevant personnel. The image range of each key component in different sensitive areas can be pre-defined and provided to the intelligent review sampling filter 200, which is used when setting up the defect review plan. While the invention has been described in terms of the embodiments shown herein, it will be understood that Similarly, those skilled in the art can make various modifications without departing from the spirit and scope of the appended claims. 200937554 [Simple description of the diagram] Figure 1 is a simplified diagram of a standard defect inspection device. 2 is a smart review sampling filter according to an embodiment of the present invention. Figure 3 shows a library of integrated circuit design built into a cluster computer. Figure 4 is a simplified diagram of a typical automatic defect locating unit in a defect inspection machine. FIG. 5 is a schematic diagram of a general defect locating unit according to an embodiment of the present invention. 6 is a simplified diagram of an automatic type general defect review machine according to an embodiment of the present invention. [Main component symbol description] 100 defect review machine 102 loading unit 104 image capturing unit 106 image capturing condition 108 review sampling 110 host 112 defect positioning unit 114 Defect classification and data output unit 116 Digestory library 200 Intelligent review sampling filter 202 Integrated circuit design database 204 Location excerpt processor 11 200937554 , 206 Review position meter 208 Review sampling unit 300 Integrated circuit design database 302a, 302b~302η Computer 304 High Speed Network 400 Automatic Defect Positioning Unit 402 Defect Image 404 Reference Image 406 Image Alignment Defect Locating Unit 408 Microscope 500 Universal Defect Locating Unit 502 Universal Defect Inspection Machine 504 Defect Image 506 Self Design Data Captured by the Database ^ 508 Image Converter 510 Image Converter II 600 Automatic General Defect Review Machine 602 Load Unit 604 Image Converter A '606 Image Converter II 12