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TW200733248A - Monolithic integration of enhancement-and depletion-mode AlGaN/GaN HFETs - Google Patents

Monolithic integration of enhancement-and depletion-mode AlGaN/GaN HFETs

Info

Publication number
TW200733248A
TW200733248A TW095144273A TW95144273A TW200733248A TW 200733248 A TW200733248 A TW 200733248A TW 095144273 A TW095144273 A TW 095144273A TW 95144273 A TW95144273 A TW 95144273A TW 200733248 A TW200733248 A TW 200733248A
Authority
TW
Taiwan
Prior art keywords
hfets
mode
depletion
enhancement
monolithic integration
Prior art date
Application number
TW095144273A
Other languages
Chinese (zh)
Inventor
Jing Chen
Yong Cai
Kei-May Lau
Original Assignee
Univ Hong Kong Science & Techn
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Hong Kong Science & Techn filed Critical Univ Hong Kong Science & Techn
Publication of TW200733248A publication Critical patent/TW200733248A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

A method for and devices utilizing monolithic integration of enhancement-mode and depletion-mode AlGaN/GaN heterojunction field-effect transistors (HFETs) is disclosed. Source and drain ohmic contacts of HFETs are first defined. Gate electrodes of the depletion-mode HFETs are then defined. Gate electrodes of the enhancement-mode HFETs are then defined using fluoride-based plasma treatment and high temperature post-gate annealing of the sample. Device isolation is achieved by either mesa etching or fluoride-based plasma treatment. This method provides a complete planar process for GaN-based integrated circuits favored in high-density and high-speed applications.
TW095144273A 2005-11-29 2006-11-29 Monolithic integration of enhancement-and depletion-mode AlGaN/GaN HFETs TW200733248A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US74025605P 2005-11-29 2005-11-29
US74833905P 2005-12-08 2005-12-08

Publications (1)

Publication Number Publication Date
TW200733248A true TW200733248A (en) 2007-09-01

Family

ID=38091871

Family Applications (2)

Application Number Title Priority Date Filing Date
TW095144273A TW200733248A (en) 2005-11-29 2006-11-29 Monolithic integration of enhancement-and depletion-mode AlGaN/GaN HFETs
TW95144275A TWI406413B (en) 2005-11-29 2006-11-29 Low density drain hemts

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW95144275A TWI406413B (en) 2005-11-29 2006-11-29 Low density drain hemts

Country Status (2)

Country Link
TW (2) TW200733248A (en)
WO (2) WO2007062590A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111668127A (en) * 2019-03-07 2020-09-15 西安电子科技大学 Hot electron effect test structure based on HEMT device and characterization method thereof
TWI745916B (en) * 2019-06-19 2021-11-11 穩懋半導體股份有限公司 Gate-sinking phemts having extremely uniform pinch-off/threshold voltage

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WO2008151842A1 (en) * 2007-06-15 2008-12-18 Microgan Gmbh Logic circuit on the basis of nitrides of main group iii elements
CN101359686B (en) * 2007-08-03 2013-01-02 香港科技大学 Reliable normally-off iii-nitride active device structures, and related methods and systems
US8159002B2 (en) 2007-12-20 2012-04-17 General Electric Company Heterostructure device and associated method
US8124505B1 (en) 2010-10-21 2012-02-28 Hrl Laboratories, Llc Two stage plasma etching method for enhancement mode GaN HFET
US8853709B2 (en) 2011-07-29 2014-10-07 Hrl Laboratories, Llc III-nitride metal insulator semiconductor field effect transistor
US8941118B1 (en) 2011-07-29 2015-01-27 Hrl Laboratories, Llc Normally-off III-nitride transistors with high threshold-voltage and low on-resistance
US9337332B2 (en) 2012-04-25 2016-05-10 Hrl Laboratories, Llc III-Nitride insulating-gate transistors with passivation
US10276712B2 (en) 2014-05-29 2019-04-30 Hrl Laboratories, Llc III-nitride field-effect transistor with dual gates
US9812532B1 (en) 2015-08-28 2017-11-07 Hrl Laboratories, Llc III-nitride P-channel transistor
CN108292678B (en) 2015-11-19 2021-07-06 Hrl实验室有限责任公司 Group III nitride field effect transistor with dual gates
CN107170820B (en) * 2017-03-29 2020-04-14 西安电子科技大学 Current aperture heterojunction device of arc-shaped gate-drain composite field plate
CN117936403B (en) * 2023-12-26 2024-09-20 苏州汉骅半导体有限公司 GaN HEMT epitaxial material Hall test sample and preparation method thereof

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JPS6318677A (en) * 1986-07-11 1988-01-26 Nec Corp Iii-v compound semiconductor device
US6316793B1 (en) * 1998-06-12 2001-11-13 Cree, Inc. Nitride based transistors on semi-insulating silicon carbide substrates
US20010015437A1 (en) * 2000-01-25 2001-08-23 Hirotatsu Ishii GaN field-effect transistor, inverter device, and production processes therefor
JP4022708B2 (en) * 2000-06-29 2007-12-19 日本電気株式会社 Semiconductor device
US6515316B1 (en) * 2000-07-14 2003-02-04 Trw Inc. Partially relaxed channel HEMT device
KR100379619B1 (en) * 2000-10-13 2003-04-10 광주과학기술원 Monolithically integrated E/D mode HEMP and method of fabricating the same
US6849882B2 (en) * 2001-05-11 2005-02-01 Cree Inc. Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer
CN1557024B (en) * 2001-07-24 2010-04-07 美商克立股份有限公司 Insulting gate Al Ga nitride/GaN HEMT
JP3733420B2 (en) * 2002-03-01 2006-01-11 独立行政法人産業技術総合研究所 Heterojunction field effect transistor using nitride semiconductor material
WO2004019415A1 (en) * 2002-08-26 2004-03-04 University Of Florida GaN-TYPE ENHANCEMENT MOSFET USING HETERO STRUCTURE
JP4385205B2 (en) * 2002-12-16 2009-12-16 日本電気株式会社 Field effect transistor
JP2004260114A (en) * 2003-02-27 2004-09-16 Shin Etsu Handotai Co Ltd Compound semiconductor element
JP3858888B2 (en) * 2003-12-02 2006-12-20 ソニー株式会社 Etching method and semiconductor device manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111668127A (en) * 2019-03-07 2020-09-15 西安电子科技大学 Hot electron effect test structure based on HEMT device and characterization method thereof
CN111668127B (en) * 2019-03-07 2023-04-25 西安电子科技大学 Hot electron effect test structure based on HEMT device and characterization method thereof
TWI745916B (en) * 2019-06-19 2021-11-11 穩懋半導體股份有限公司 Gate-sinking phemts having extremely uniform pinch-off/threshold voltage

Also Published As

Publication number Publication date
WO2007062589A1 (en) 2007-06-07
TWI406413B (en) 2013-08-21
TW200733385A (en) 2007-09-01
WO2007062590A1 (en) 2007-06-07

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